Solar cell and manufacturing method therefor, and photovoltaic module

Abstract

A solar cell and a manufacturing method therefor, and a photovoltaic module. The solar cell comprises: a substrate, comprising first regions and second regions alternately arranged on a first side of the substrate in a preset direction, and an isolation region being further provided between every adjacent first region and second region; and a first doped polysilicon layer and a second doped polysilicon layer, wherein the first doped polysilicon layer is doped with a P-type element and is arranged on the side of the first region facing away from the substrate, and the second doped polysilicon layer is doped with an N-type element and a carbon element and is arranged on the side of the second region facing away from the substrate. An insulating isolation trench extending to the isolation region of the substrate is provided between the first doped polysilicon layer and the second doped polysilicon layer.

Description

Solar cell, manufacturing method thereof and photovoltaic module

[0001] Cross-reference to Related Applications

[0002] The present application claims priority to the Chinese patent application No. 202411231822.0, filed on September 4, 2024, and entitled "Solar cell, manufacturing method thereof and photovoltaic module", the content of which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the field of photovoltaic technology, and in particular, to a solar cell, a manufacturing method thereof, and a photovoltaic module. BACKGROUND

[0004] IBC (Interdigitated Back Contact) cells have no metal grid lines on the front surface, and the emitter and back field and corresponding positive and negative metal electrodes are integrated in a back-to-back manner on the back surface of the cell. This structure minimizes optical loss and can achieve higher conversion efficiency under the same area. TBC cells introduce the TOPCon cell structure on the basis of the related IBC cell structure, which can significantly reduce the carrier recombination loss of the silicon substrate and the emitter, especially the metal contact area. At present, a large number of technologies have been developed to improve the passivation performance of TBC cells. Since the polycrystalline silicon film layer structure on the back surface of the TBC cell accounts for a large proportion, how to balance the passivation performance while reducing parasitic absorption is one of the key points for improving the efficiency and process development of TBC cells. SUMMARY

[0005] The first aspect of the embodiments of the present application provides a solar cell, comprising:

[0006] a substrate comprising first regions and second regions arranged alternately along a preset direction on a first side of the substrate, and a separation region is further arranged between adjacent first regions and second regions; and

[0007] a first doped polysilicon layer and a second doped polysilicon layer, the first doped polysilicon layer is doped with a P-type element and is arranged on a side of the first region facing away from the substrate, and the second doped polysilicon layer is doped with an N-type element and a carbon element and is arranged on a side of the second region facing away from the substrate;

[0008] an insulating separation groove extending to the separation region of the substrate is arranged between the first doped polysilicon layer and the second doped polysilicon layer.

[0009] In some embodiments, the solar cell further comprises:

[0010] The first tunneling oxide layer and the third doped polysilicon layer are arranged on the surface of the first region between the first region and the first doped polysilicon layer; the doping element of the third doped polysilicon layer is the same as that of the first doped polysilicon layer, and the doping element concentration of the third doped polysilicon layer is less than that of the first doped polysilicon layer.

[0011] In some embodiments, the solar cell further comprises:

[0012] The second tunneling oxide layer and the fourth doped polysilicon layer are arranged on the surface of the second region between the second region and the second doped polysilicon layer; the doping element of the fourth doped polysilicon layer is the same as that of the second doped polysilicon layer, and the doping element concentration of the fourth doped polysilicon layer is less than that of the second doped polysilicon layer.

[0013] In some embodiments, the solar cell further comprises a first passivation layer and / or a second passivation layer, the first passivation layer is arranged on the surface of the first doped polysilicon layer and the second doped polysilicon layer away from the substrate, and the second passivation layer is arranged on the surface of the second side of the substrate.

[0014] In some embodiments, the first passivation layer is also arranged in the insulating isolation groove.

[0015] In some embodiments, the solar cell further comprises a first anti-reflection layer and / or a second anti-reflection layer, the first anti-reflection layer is arranged on the surface of the first passivation layer away from the substrate, and the second anti-reflection layer is arranged on the surface of the second passivation layer away from the substrate.

[0016] In some embodiments, the first anti-reflection layer is also arranged in the insulating isolation groove.

[0017] In some embodiments, the doping concentration of carbon in the second doped polysilicon layer is 0.1at% to 4at%, and optionally 0.5at% to 3at% in terms of percentage of atomic number.

[0018] The second aspect of the embodiments of the present application provides a manufacturing method of a solar cell, comprising:

[0019] A substrate is provided, the substrate comprising a substrate, the surface of the first side of the substrate comprising a first region and a processing region arranged staggeredly along a preset direction and connected to each other, the first side of the first region being formed with a first doped amorphous silicon material layer doped with P-type elements, and the first side of the processing region being formed with a second doped amorphous silicon material layer doped with N-type elements;

[0020] An annealing process is performed to form a first doped polysilicon material layer from the first doped amorphous silicon material layer and to form a second doped polysilicon material layer from the second doped amorphous silicon material layer;

[0021] The second doped amorphous silicon material layer is doped with carbon.

[0022] In some embodiments, the second doped amorphous silicon material layer is formed by:

[0023] forming the second doped amorphous silicon material layer using a reaction gas including a carbon source and a silicon source;

[0024] The gas flow ratio of the carbon source to the silicon source is greater than 0 and less than or equal to 1.

[0025] In some embodiments, the annealing temperature of the annealing process is 910-930°C.

[0026] In some embodiments, a first tunneling oxide material layer and a first intrinsic amorphous silicon material layer are further sequentially arranged between the first region and the first doped amorphous silicon material layer; and / or a second tunneling oxide material layer and a second intrinsic amorphous silicon material layer are further sequentially arranged between the processing region and the second doped amorphous silicon material layer.

[0027] The step of performing the annealing process specifically includes:

[0028] performing the annealing process:

[0029] forming the first doped amorphous silicon material layer into a first doped polysilicon material layer, and diffusing the doping element in the first doped amorphous silicon material layer into the first intrinsic amorphous silicon material layer, so that the first intrinsic amorphous silicon material layer forms a third doped polysilicon material layer; and / or

[0030] forming the second doped amorphous silicon material layer into a second doped polysilicon material layer, and diffusing the doping element in the second doped amorphous silicon material layer into the second intrinsic amorphous silicon material layer, so that the second intrinsic amorphous silicon material layer forms a fourth doped polysilicon material layer.

[0031] In some embodiments, the doping concentration of the third doped polysilicon material layer is less than the doping concentration of the first doped polysilicon material layer, and / or the doping concentration of the fourth doped polysilicon material layer is less than the doping concentration of the second doped polysilicon material layer.

[0032] In some embodiments, the step of providing the substrate includes:

[0033] forming, on the surface of the first side of the substrate, a first tunneling oxide material layer, a first intrinsic amorphous silicon material layer, and a first doped amorphous silicon material layer in sequence;

[0034] removing the portions of the first tunneling oxide material layer, the first intrinsic amorphous silicon material layer, and the first doped amorphous silicon material layer covering the surface of the processing region;

[0035] The second tunneling oxide material layer, the second intrinsic amorphous silicon material layer and the second doped amorphous silicon material layer are formed in the processing region in sequence.

[0036] In some embodiments, each processing region comprises a second region and an isolation region in sequence, and there is an isolation region between adjacent first region and second region; the step of performing annealing treatment further comprises:

[0037] The structure layer covering the isolation region is removed, so that the first doped polysilicon material layer is formed, the third doped polysilicon material layer is formed, and / or the second doped polysilicon material layer is formed, and the fourth doped polysilicon material layer is formed.

[0038] In some embodiments, the step of removing the structure layer covering the isolation region further comprises:

[0039] The oxide material layer generated on the side surface of the substrate and the surface of the second side of the substrate during the annealing treatment is removed, and the second side is opposite to the first side;

[0040] A second passivation layer is formed on the surface of the second side of the substrate, and a first passivation layer is formed on the whole surface of the first side of the substrate;

[0041] A second anti-reflection layer and a first anti-reflection layer are respectively formed on the surface of the second passivation layer and the surface of the first passivation layer away from the substrate.

[0042] The third aspect of the embodiments of the present application provides a photovoltaic module, comprising at least one cell string, and the cell string comprises at least two solar cells described above. BRIEF DESCRIPTION OF DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiments or the prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are only embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of the disclosed drawings.

[0044] FIG. 1 is a structural schematic diagram of a solar cell provided by the embodiments of the present application.

[0045] FIG. 2 is a flow schematic diagram of a manufacturing method of a solar cell provided by the embodiments of the present application.

[0046] FIG. 3 is a schematic diagram of forming a first tunneling oxide material layer, a first intrinsic amorphous silicon material layer and a first doped amorphous silicon material layer on a substrate in a manufacturing method of a solar cell provided by the embodiments of the present application.

[0047] FIG. 4 is a structural schematic diagram of removing the film layer on the processing area in the method for manufacturing the solar cell according to the embodiment of the present application.

[0048] FIG. 5 is a structural schematic diagram of the substrate in the method for manufacturing the solar cell according to the embodiment of the present application.

[0049] FIG. 6 is a structural schematic diagram of the substrate after the annealing treatment in the method for manufacturing the solar cell according to the embodiment of the present application.

[0050] FIG. 7 is a structural schematic diagram of forming the insulating isolation groove in the method for manufacturing the solar cell according to the embodiment of the present application.

[0051] FIG. 7 is a structural schematic diagram of forming the insulating isolation groove in the method for manufacturing the solar cell according to the embodiment of the present application. DETAILED DESCRIPTION

[0052] In order to make the above objectives, features and advantages of the present application more apparent, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in a variety of ways beyond the specific embodiments described herein without departing from the scope of the present application, and it is understood that similar modifications can be made by those skilled in the art in the light of the teachings of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0053] It should be understood that the terms "include", "comprise", "have", "contain", and any derivative thereof used in the present application should be regarded as non-exclusive inclusion of the features referred to by the terms, and it does not mean the exclusion of any additional features unless otherwise stated or implied.

[0054] In some instances, a single embodiment can incorporate multiple features for the sake of brevity and / or to aid in understanding the scope of the disclosure. It is to be understood that, in such cases, the multiple features can be provided separately (e.g., in different embodiments) or in any other suitable combination. Conversely, when different features are described in different embodiments, these different features can be combined into a single embodiment, unless otherwise indicated or implied. This principle applies similarly to the claims, which can be recombined in any combination, i.e., any claim can be modified to include any feature defined in another claim.

[0055] In this application, the term "at least one", followed by a listing of one or more items, means any one of those items including individual members of the group. For example, "at least one of a, b, and c" is intended to mean: a, b, c, a and b, a and c, b and c, and a and b and c.

[0056] In the description of the application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate the orientation or positional relationship shown in the drawings, which are only for the convenience of describing the application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the application.

[0057] In addition, the terms "first", "second", etc. are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include at least one of the features. In the description of the application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise specifically limited.

[0058] In this application, unless otherwise specifically defined and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixed connection, or detachable connection, or integral; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise specifically limited. For those skilled in the art, the specific meaning of the above terms in this application can be understood according to the specific circumstances.

[0059] In this application, unless otherwise explicitly specified and limited, a first feature is "on" or "under" a second feature can be that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature is "over", "above" and "on top of" the second feature can be that the first feature is directly above or obliquely above the second feature, or only indicates that the first feature is higher in horizontal height than the second feature. The first feature is "under", "below" and "underneath" the second feature can be that the first feature is directly below or obliquely below the second feature, or only indicates that the first feature is lower in horizontal height than the second feature.

[0060] It should be noted that when an element is referred to as being "fixed to" or "set to" another element, it can be directly on the other element or there can be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there can be an intermediate element. The terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only implementation.

[0061] The solar cell and the manufacturing method thereof according to the embodiments of the present application will be described below with reference to the accompanying drawings. It should be noted that in the present application, the solar cell is taken as an example of a TBC cell, and the solar cell can also be set as other types of cells according to actual needs, such as a back contact solar cell of a traditional structure and a solar cell of an HBC type. For the case that the solar cell is of other types, similar to this case, details are not repeated here.

[0062] In the related art, the backside boron and phosphorus diffusion doping regions of the solar cell, especially the TBC cell, often need to go through multiple boron diffusion, phosphorus diffusion and crystallization steps in the preparation process. The repeated high-temperature process can make the diffusion depth of the doping elements in the first crystallized doped polysilicon uncontrollable, thereby causing the passivation effect of the solar cell to be poor. In addition, the multiple high-temperature processing processes also increase the number of processes, resulting in a higher production cost.

[0063] Referring to FIG. 1, the solar cell 100 provided by the embodiments of the present application includes a substrate 10, a first doped polysilicon layer 20 and a second doped polysilicon layer 50.

[0064] The substrate 10 includes first regions Y and second regions R alternately arranged along a preset direction on a first side F of the substrate 10, and a separation region G is further arranged between adjacent first regions Y and second regions R. It can be understood that the first regions Y, the separation regions G, and the second regions R on the substrate 10 are provided in multiple numbers, and FIG. 1 only shows the structure of one set of adjacent first regions Y, separation regions G, and second regions R. The structures of the remaining sets of first regions Y, separation regions G, and second regions R are similar to this, and are not described herein. The multiple first regions Y and the multiple second regions R are alternately arranged on the first side F of the substrate 10, and a separation region G can be arranged between each adjacent first region Y and second region R.

[0065] The first doped polysilicon layer 20 is doped with a P-type element and is arranged on a side of the first region Y away from the substrate 10. The second doped polysilicon layer 50 is doped with an N-type element and a carbon element and is arranged on a side of the second region R away from the substrate 10.

[0066] In some embodiments, the doping concentration of the P-type element in the first doped polysilicon layer 20 (calculated in terms of the number of atoms per cubic centimeter) is greater than 0, for example, can be 1×10 20 cm -3 to 5×10 21 cm -3 , in some embodiments, can be 2×10 20 cm -3 to 6×10 20 cm -3 , or further can be 3×10 20 cm -3 to 5×10 20 cm -3 . In some embodiments, the doping concentration of the carbon in the second doped polysilicon layer can be 1×10 20 cm -3 , 2×10 20 cm -3 , 3×10 20 cm -3 , 4×10 20 cm -3 , 5×10 20 cm -3 , 6×10 20 cm -3 , 7×10 20 cm -3 , 8×10 20 cm -3 , 9×10 20 cm -3 , 1×10 21 cm -3 , 2×1020 cm -3 , 3 x 10 20 cm -3 , 4 x 10 20 cm -3 , 5 x 10 20 cm -3 , or in any two of the above ranges.

[0067] An insulating isolation groove extending to the substrate 10 in a thickness direction (F-S direction) of the substrate 10 is provided between the first doped polysilicon layer 20 and the second doped polysilicon layer 50 in the isolation region G.

[0068] Since the second doped polysilicon layer 50 is doped with carbon elements, the reaction temperature required for crystallization of the second doped polysilicon layer 50 is increased to be substantially the same as that of the first doped polysilicon layer 20, so that the crystallization of the first doped polysilicon layer 20 and the second doped polysilicon layer 50 can be performed simultaneously in the same process. In the case of performing the reaction in the same process under the same reaction conditions, the diffusion depth of the doped elements in the first doped polysilicon layer 20 and the second doped polysilicon layer 50 formed is easy to keep consistent, so that the passivation performance of the solar cell 100 can be improved. In addition, compared with the related art in which the crystallization of the first doped polysilicon layer 20 and the second doped polysilicon layer 50 needs to be performed respectively, the number of processes can be saved, and the cost can be reduced.

[0069] It can be understood that the carbon elements and the N-type elements are both in a doped amount in the second doped polysilicon layer 50.

[0070] In some embodiments, the doped concentration of the N-type elements in the second doped polysilicon layer 50 (calculated in the number of atoms per cubic centimeter) is greater than 0, for example, can be 1 x 10 20 cm -3 to 5 x 10 21 cm -3 , in some embodiments, can be 2 x 10 20 cm -3 to 6 x 10 20 cm -3 , or further can be 3 x 10 20 cm -3 to 5 x 10 20 cm -3 . In some embodiments, the doped concentration of carbon in the second doped polysilicon layer can be 1 x 10 20 cm -3 , 2 x 10 20 cm -3 , 3 x 10 20 cm -3 , 4 x 10 20 cm-3 5 x 10 20 cm -3 6 x 10 20 cm -3 7 x 10 20 cm -3 8 x 10 20 cm -3 9 x 10 20 cm -3 1 x 10 21 cm -3 2 x 10 20 cm -3 3 x 10 20 cm -3 4 x 10 20 cm -3 5 x 10 20 cm -3 , or in any range defined by any two of the above values.

[0071] In some embodiments, the doping concentration of carbon in the second doped polysilicon layer, in terms of percentage of atomic number, is greater than 0, for example, it can be 0.1 at% to 4 at%, in some embodiments, it can be 0.5 at% to 3 at%, or further can be 1 at% to 2 at%. In some embodiments, the doping concentration of carbon in the second doped polysilicon layer can be 0.1 at%, 0.2 at%, 0.3 at%, 0.4 at%, 0.5 at%, 0.6 at%, 0.7 at%, 0.8 at%, 0.9 at%, 1 at%, 1.5 at%, 2 at%, 2.5 at%, 3 at%, 3.5 at%, 4 at%, or in any range defined by any two of the above values.

[0072] It can be understood that the first region Y and the second region R of the substrate 10 are respectively defined by the coverage area of the first doped polysilicon layer 20 and the second doped polysilicon layer 50, that is, the substrate surface area covered by the first doped polysilicon layer 20 is defined as the first region Y, and the substrate surface area covered by the second doped polysilicon layer 50 is defined as the second region R.

[0073] In some embodiments, the solar cell 100 further comprises a first tunneling oxide layer 41 and a third doped polysilicon layer 30, the first tunneling oxide layer 41 and the third doped polysilicon layer 30 are located between the first region Y and the first doped polysilicon layer 20, and are sequentially arranged on the surface of the first region Y. The doping element of the third doped polysilicon layer 30 is the same as that of the first doped polysilicon layer 20, and the doping element concentration of the third doped polysilicon layer 30 is less than that of the first doped polysilicon layer 20.

[0074] In some embodiments, the solar cell 100 further comprises a second tunneling oxide layer 42 and a fourth doped polysilicon layer 60. The second tunneling oxide layer 42 and the fourth doped polysilicon layer 60 are located between the second region R and the second doped polysilicon layer 50, and are sequentially arranged on the surface of the second region R. The doping element of the fourth doped polysilicon layer 60 is the same as that of the second doped polysilicon layer 50, and the doping element concentration of the fourth doped polysilicon layer 60 is less than that of the second doped polysilicon layer 50.

[0075] In this way, a high-low junction is formed between the first doped polysilicon layer 20 and the third doped polysilicon layer 30, and / or a high-low junction is also formed between the second doped polysilicon layer 50 and the fourth doped polysilicon layer 60, which can improve the recombination of carriers and improve the passivation performance of the solar cell 100, and in addition, can reduce the negative impact of parasitic current on the efficiency of the solar cell. In a specific implementation, the first doped polysilicon layer 20 and the third doped polysilicon layer 30 can be doped with boron elements, and the second doped polysilicon layer 50 and the fourth doped polysilicon layer 60 can be doped with phosphorus elements.

[0076] In some embodiments, the coverage range of the first tunneling oxide layer 41 and the third doped polysilicon layer 30 on the surface of the substrate is completely the same as that of the first doped polysilicon layer 20, and / or the coverage range of the second tunneling oxide layer 42 and the fourth doped polysilicon layer 60 on the surface of the substrate is completely the same as that of the second doped polysilicon layer 50.

[0077] In some embodiments, continuing to refer to FIG. 1, the solar cell 100 further comprises a first passivation layer 71 and a second passivation layer 72. The first passivation layer 71 is arranged on the surface of the first doped polysilicon layer 20 and the second doped polysilicon layer 50 away from the substrate 10, and the second passivation layer 72 is arranged on the surface of the second side S of the substrate 10. In some embodiments, part of the structure of the first passivation layer 71 also covers the bottom wall of the insulating isolation groove 102 and the side wall of the insulating isolation groove 102.

[0078] In some embodiments, the solar cell 100 further comprises a first anti-reflection layer 81 and a second anti-reflection layer 82. The first anti-reflection layer 81 is arranged on the surface of the first passivation layer 71 away from the substrate 10, and the second anti-reflection layer 82 is arranged on the surface of the second passivation layer 72 away from the substrate 10. In some embodiments, the first anti-reflection layer 81 is located in the first region Y and the second region R, and can be further located in the insulating isolation groove 102.

[0079] In some embodiments, the solar cell further comprises a first electrode 91 and a second electrode 92, which are arranged alternately and spaced apart from each other. The first electrode 91 is in ohmic contact with the first doped polysilicon layer 20, and the second electrode 92 is in ohmic contact with the second doped polysilicon layer 50.

[0080] In some embodiments, the first electrode 91 is arranged on the first anti-reflective layer 81 at a position corresponding to the first doped polysilicon layer 20 and is in ohmic contact with the first doped polysilicon layer 20, and the second electrode 92 is arranged on the first anti-reflective layer 81 at a position corresponding to the second doped polysilicon layer 50 and is in ohmic contact with the second doped polysilicon layer 50.

[0081] The second aspect of the embodiments of the present application provides a manufacturing method of a solar cell, which can be used to manufacture the solar cell 100 as described above.

[0082] Referring to FIGS. 2, 5 and 6, the manufacturing method of the solar cell provided by the embodiments of the present application includes the following steps.

[0083] S10, providing a substrate, the substrate including a substrate 10, a surface of a first side F of the substrate 10 including a first region Y and a processing region T arranged in a staggered manner along a preset direction and successively with each other, a first side of the first region Y being formed with a first doped amorphous silicon material layer 21 doped with P-type elements, and a first side of the processing region T being formed with a second doped amorphous silicon material layer 51 doped with N-type elements.

[0084] S20, performing annealing treatment to form a first doped polysilicon material layer 22 from the first doped amorphous silicon material layer 21 and to form a second doped polysilicon material layer 52 from the second doped amorphous silicon material layer 51; wherein the second doped amorphous silicon material layer 51 is doped with carbon elements.

[0085] Since the second doped amorphous silicon material layer 51 is doped with carbon elements, the reaction temperature required for annealing of the second doped amorphous silicon material layer 51 is increased to be substantially the same as the annealing temperature of the first doped amorphous silicon material layer 21, so that the annealing of the first doped amorphous silicon material layer 21 and the second doped amorphous silicon material layer 51 can be performed simultaneously in the same process, and in the case of the same annealing conditions, the diffusion depths of the first doped polysilicon material layer 22 and the second doped polysilicon material layer 52 formed thereby are easy to keep consistent, thereby improving the passivation performance of the solar cell 100. In addition, compared with the related art in which the first doped polysilicon layer 20 and the second doped polysilicon layer 50 need to be annealed respectively, the number of processes can be saved, and the cost can be reduced.

[0086] In addition, the annealing treatment to form the first doped polysilicon material layer 22 from the first doped amorphous silicon material layer 21 means to activate the P-type elements in the first doped amorphous silicon material layer 21 and to crystallize the amorphous silicon in the first doped amorphous silicon material layer 21 into polysilicon. The annealing treatment to form the second doped polysilicon material layer 52 from the second doped amorphous silicon material layer 51 means to activate the N-type elements in the second doped amorphous silicon material layer 51 and to crystallize the amorphous silicon in the second doped amorphous silicon material layer 51 into polysilicon.

[0087] In some embodiments, the second doped amorphous silicon material layer 51 is formed by the following steps:

[0088] The second doped amorphous silicon material layer 51 is formed by using a reaction gas including a carbon source and a silicon source. The flow ratio of the carbon source and the silicon source is greater than 0 and less than or equal to 1. Optionally, the flow ratio of the carbon source and the silicon source can be 0.4, 0.65, or 0.9.

[0089] In this way, the annealing temperature of the second doped amorphous silicon material layer 51 can be reduced to be consistent with the first doped amorphous silicon material layer 21.

[0090] In a specific implementation, the annealing temperature of the annealing process can be 910-930°C.

[0091] In this way, the first doped amorphous silicon material layer 21 and the second doped amorphous silicon material layer 51 can be better crystallized into polycrystalline silicon material layers, and the diffusion depth of the doping elements in each layer can be consistent. In a specific implementation, the annealing time can be 30-120 minutes, and can be 90 minutes.

[0092] In some embodiments, referring back to FIG. 5, the first region Y and the first doped amorphous silicon material layer 21 are further sequentially provided with a first tunneling oxide material layer 411 and a first intrinsic amorphous silicon material layer 31. The processing region T and the second doped amorphous silicon material layer 51 are further sequentially provided with a second tunneling oxide material layer 421 and a second intrinsic amorphous silicon material layer 61.

[0093] In combination with FIG. 6, the annealing process includes the following steps:

[0094] The annealing process causes the first doped amorphous silicon material layer 21 to form a first doped polycrystalline silicon material layer 22, and causes the doping elements in the first doped amorphous silicon material layer 21 to diffuse into the first intrinsic amorphous silicon material layer 31, so that the first intrinsic amorphous silicon material layer 31 forms a third doped polycrystalline silicon material layer 32.

[0095] The annealing process also causes the second doped amorphous silicon material layer 51 to form a second doped polycrystalline silicon material layer 52, and causes the doping elements in the second doped amorphous silicon material layer 51 to diffuse into the second intrinsic amorphous silicon material layer 61, so that the second intrinsic amorphous silicon material layer 61 forms a fourth doped polycrystalline silicon material layer 62.

[0096] Due to the difference in doping concentration between the first intrinsic amorphous silicon material layer 31 and the first doped amorphous silicon material layer 21 before annealing, the first intrinsic amorphous silicon material layer 31 at the bottom can play a role of isolating the first doped amorphous silicon material layer 21 and the first tunneling oxide material layer 411, preventing the first tunneling oxide material layer 411 from being diffused by the doped elements after activation treatment, and improving the passivation effect of the first tunneling oxide material layer 411. In addition, it can also make the distribution of doped elements in the third doped polysilicon material layer 32 and the first doped polysilicon material layer 22 more uniform after annealing, reduce the contact resistance, and improve the battery conversion efficiency. The setting effect of the second intrinsic amorphous silicon material layer 61 and the second doped amorphous silicon material layer 51 is similar, which will not be repeated here.

[0097] In some embodiments, the doping concentration of the third doped polysilicon material layer 32 is less than the doping concentration of the first doped polysilicon material layer 22, and the doping concentration of the fourth doped polysilicon material layer 62 is less than the doping concentration of the second doped polysilicon material layer 52.

[0098] In this way, a high-low junction is formed between the first doped polysilicon material layer 22 and the third doped polysilicon material layer 32, and a high-low junction is also formed between the second doped polysilicon material layer 52 and the fourth doped polysilicon material layer 62, which can improve the recombination of carriers and improve the passivation performance of the solar cell 100.

[0099] In some embodiments, in combination with FIG. 3, FIG. 4, and FIG. 5, the step of providing the substrate 101 includes:

[0100] The first tunneling oxide material layer 411, the first intrinsic amorphous silicon material layer 31, and the first doped amorphous silicon material layer 21 are sequentially stacked on the surface of the first side F of the substrate 10;

[0101] The portions of the first tunneling oxide material layer 411, the first intrinsic amorphous silicon material layer 31, and the first doped amorphous silicon material layer 21 covering the surface of the processing area T are removed, and the portions covering the surface of the first area Y are retained to obtain an intermediate structure;

[0102] The second tunneling oxide material layer 421, the second intrinsic amorphous silicon material layer 61, and the second doped amorphous silicon material layer 51 are sequentially stacked on the processing area T.

[0103] Referring to FIG. 4, the step of sequentially laminating the second tunneling oxide material layer 421, the second intrinsic amorphous silicon material layer 61 and the second doped amorphous silicon material layer 51 in the processing region T can specifically include: forming the second tunneling oxide material layer 421, the second intrinsic amorphous silicon material layer 61 and the second doped amorphous silicon material layer 51 on the first side of the intermediate structure in an integral layer, and then removing the second tunneling oxide material layer 421, the second intrinsic amorphous silicon material layer 61 and the second doped amorphous silicon material layer 51 covering the first region Y by using a mask, and retaining the second tunneling oxide material layer 421, the second intrinsic amorphous silicon material layer 61 and the second doped amorphous silicon material layer 51 covering the processing region T.

[0104] In some embodiments, in combination with FIG. 1, FIG. 6 and FIG. 7, each processing region T includes the second region R and the isolation region G in sequence, and each of the adjacent first region Y and the second region R is provided with an isolation region G. The step of performing the annealing process further includes:

[0105] The structure layer covering the isolation region G is removed, so that the first doped polysilicon material layer 22 forms the first doped polysilicon layer 20, the third doped polysilicon material layer 32 forms the third doped polysilicon layer 30, the second doped polysilicon material layer 52 forms the second doped polysilicon layer 50, and the fourth doped polysilicon material layer 62 forms the fourth doped polysilicon layer 60.

[0106] In some embodiments, in combination with FIG. 1 and FIG. 7, the step of removing the structure layer covering the part region adjacent to the first region Y on the processing region T further includes:

[0107] The oxide material layer generated on the side surface of the substrate 10 and the surface of the second side S of the substrate 10 during the annealing process is removed, and the second side S is opposite to the first side F;

[0108] The second passivation layer 72 is formed on the surface of the second side S of the substrate 10, and the first passivation layer 71 is formed on the surface of the first side F of the substrate 10;

[0109] The second anti-reflection layer 82 and the first anti-reflection layer 81 are respectively formed on the surfaces of the second passivation layer 72 and the first passivation layer 71 away from the substrate 10.

[0110] The manufacturing method of the solar cell according to the embodiments of the present application will be described below in combination with specific examples.

[0111] The method includes:

[0112] Step 1: Select an N-type silicon wafer as the substrate 10, and perform double-sided polishing to remove the damage layer. The adopted chemical solution includes deionized water, KOH and polishing additives.

[0113] Step 2, referring to Fig. 3, after the substrate 10 processed in step 1 is cleaned, it is put into PECVD, and a first tunneling oxide material layer 411, a first intrinsic amorphous silicon material layer 31 and a first doped amorphous silicon material layer 21 are deposited on the surface of the first side F of the substrate 10 in sequence.

[0114] Step 3, referring to Fig. 4, after step 2, a green outer picosecond laser is used to perform a film opening treatment, and the portions of the first tunneling oxide material layer 411, the first intrinsic amorphous silicon material layer 31 and the first doped amorphous silicon material layer 21 covering the surface of the treatment area T are removed, and the portions covering the surface of the first area Y are reserved.

[0115] Step 4, referring to Fig. 5, after the structure processed in step 4 is polished and cleaned, it is put into PECVD again, and a second tunneling oxide material layer 421, a second intrinsic amorphous silicon material layer 61 and a second doped amorphous silicon material layer 51 are deposited on the treatment area T.

[0116] Step 5, referring to Fig. 6, after the structure processed in step 4 is put into an annealing furnace for high-temperature annealing treatment (annealing temperature: 910-930℃), the first doped amorphous silicon material layer 21 is crystallized, and the boron impurities therein are activated and diffused into the first intrinsic amorphous silicon material layer 31, so as to form a first doped polysilicon material layer 22 from the first doped amorphous silicon material layer 21 and a third doped polysilicon material layer 32 from the first intrinsic amorphous silicon material layer 31, and a high-low junction is formed between the first doped polysilicon material layer 22 and the third doped polysilicon material layer 32. At the same time, the second doped amorphous silicon material layer 51 is crystallized, and the phosphorus impurities therein are activated and diffused into the second intrinsic amorphous silicon material layer 61, so as to form a second doped polysilicon material layer 52 from the second doped amorphous silicon material layer 51 and a fourth doped polysilicon material layer 62 from the second intrinsic amorphous silicon material layer 61, and a high-low junction is formed between the second doped polysilicon material layer 52 and the fourth doped polysilicon material layer 62.

[0117] Step 6, referring to Fig. 7, after step 5, a green outer picosecond laser is used to perform a film opening treatment on the isolation area G at the junction of the first area Y and the second area R, and an insulating isolation groove 102 is formed as a non-diffusion region.

[0118] Step 7, after step 6, the second side S of the substrate 10 is put into a chain cleaning machine to remove the SiO2 layer on the surface and side of the second side S of the substrate 10. And further put into a tank machine for cleaning and texturing, and a textured structure is formed on the surface of the second side S of the substrate 10, and at the same time, the bottom wall of the insulating isolation groove 102 on the surface of the first side F of the substrate 10 is also textured. After texturing, RCA cleaning is performed.

[0119] Step 8, the structure after step 7 is put into an ALD device, an AlOx layer is made on the second side S and the first side F of the substrate 10 as the second passivation layer 72 and the first passivation layer 71 respectively, and an annealing process is performed.

[0120] Step 9, after step 8, a SiNx layer is deposited on the second passivation layer 72 and the first passivation layer 71 as the second anti-reflection layer 82 and the first anti-reflection layer 81 respectively.

[0121] Step 10, after step 9, silver paste is printed on the first anti-reflection layer 81 corresponding to the positions of the first doped polysilicon layer 20 and the second doped polysilicon layer 50, and sintering is performed to form the first electrode 91 and the second electrode 92 made of silver.

[0122] The third aspect of the embodiments of the present application further provides a photovoltaic module, which includes at least one cell string, and the cell string includes at least two solar cells 100 implemented in the foregoing manner. The solar cells 100 can be connected together in a string welding manner.

[0123] The fourth aspect of the embodiments of the present application further provides a photovoltaic system, which includes the photovoltaic module described above.

[0124] The photovoltaic system can be applied in a photovoltaic power station, such as a ground power station, a roof power station, a water surface power station, etc., and can also be applied in a device or apparatus that utilizes solar energy to generate power, such as a user solar power source, a solar street lamp, a solar car, a solar building, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is, the photovoltaic system can be applied in all fields that need to utilize solar energy to generate power. Taking a photovoltaic power generation system network as an example, the photovoltaic system can include a photovoltaic array, a combiner box and an inverter, the photovoltaic array can be an array combination of multiple photovoltaic modules, for example, multiple photovoltaic modules can form multiple photovoltaic arrays, the photovoltaic arrays are connected to the combiner box, the combiner box can combine the currents generated by the photovoltaic arrays, the combined current flows through the inverter to be converted into an alternating current required by a power grid, and then the alternating current is connected to a power network to realize solar power supply.

[0125] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described, but as long as the combinations of the technical features do not exist contradictions, they should be considered as the scope of the present disclosure.

[0126] The above embodiments only express several implementation ways of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation to the patent scope of the application. It should be pointed out that for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, which all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A solar cell, characterized by, The solar cell comprises: a substrate, wherein a first region and a second region are alternately arranged on a first side of the substrate along a preset direction, and an isolation region is arranged between the first region and the second region; a first doped polysilicon layer and a second doped polysilicon layer, wherein the first doped polysilicon layer is doped with a P-type element and is arranged on a side of the first region away from the substrate, and the second doped polysilicon layer is doped with an N-type element and a carbon element and is arranged on a side of the second region away from the substrate; an insulating isolation groove is arranged between the first doped polysilicon layer and the second doped polysilicon layer and extends to the isolation region of the substrate.

2. The solar cell according to claim 1, characterized in that, The solar cell further comprises: a first tunneling oxide layer and a third doped polysilicon layer, which are arranged between the first region and the first doped polysilicon layer and are sequentially arranged on a surface of the first region, wherein the third doped polysilicon layer has the same doping element as the first doped polysilicon layer, and the doping element concentration of the third doped polysilicon layer is less than that of the first doped polysilicon layer.

3. The solar cell according to claim 1 or 2, characterized in that, The solar cell further comprises: a second tunneling oxide layer and a fourth doped polysilicon layer, which are arranged between the second region and the second doped polysilicon layer and are sequentially arranged on a surface of the second region, wherein the fourth doped polysilicon layer has the same doping element as the second doped polysilicon layer, and the doping element concentration of the fourth doped polysilicon layer is less than that of the second doped polysilicon layer.

4. Solar cell according to any of claims 1 to 3, characterized in that The solar cell further comprises a first passivation layer and / or a second passivation layer, wherein the first passivation layer is arranged on a surface of the first doped polysilicon layer and the second doped polysilicon layer away from the substrate, and the second passivation layer is arranged on a surface of a second side of the substrate.

5. The solar cell according to claim 4, characterized in that, The first passivation layer is also arranged in the insulating isolation groove.

6. The solar cell according to any one of claims 1 to 5, wherein The solar cell further comprises a first anti-reflection layer and / or a second anti-reflection layer, wherein the first anti-reflection layer is arranged on a surface of the first passivation layer away from the substrate, and the second anti-reflection layer is arranged on a surface of the second passivation layer away from the substrate.

7. The solar cell according to claim 6, characterized in that The first anti-reflection layer is also arranged in the insulating isolation groove.

8. Solar cell according to any of claims 1 to 7, characterized in that The doping concentration of the carbon element in the second doped polysilicon layer is 0.1 at% to 4 at%, and optionally 0.5 at% to 3 at% in terms of percentage of atomic number.

9. A method for manufacturing a solar cell, characterized in that, The solar cell comprises: providing a substrate, wherein a first side of the substrate comprises a first region and a processing region which are alternately arranged and sequentially connected along a preset direction, and a first doped amorphous silicon material layer doped with a P-type element is formed on the first side of the first region, and a second doped amorphous silicon material layer doped with an N-type element is formed on the first side of the processing region; performing annealing treatment to form a first doped polysilicon material layer from the first doped amorphous silicon material layer and to form a second doped polysilicon material layer from the second doped amorphous silicon material layer; wherein the second doped amorphous silicon material layer is doped with a carbon element.

10. The method of producing a solar cell according to claim 9, wherein The second doped amorphous silicon material layer is formed by the following steps: forming the second doped amorphous silicon material layer by using a reaction gas comprising a carbon source and a silicon source; The gas flow ratio of the carbon source and the silicon source is greater than 0 and less than or equal to 1.

11. The method of producing a solar cell according to claim 9 or 10, wherein The annealing temperature of the annealing process is 910-930 ℃.

12. The method of producing a solar cell according to any one of claims 9 to 11, wherein The first region and the first doped amorphous silicon material layer are further sequentially provided with a first tunneling oxide material layer and a first intrinsic amorphous silicon material layer; and / or the processing region and the second doped amorphous silicon material layer are further sequentially provided with a second tunneling oxide material layer and a second intrinsic amorphous silicon material layer. The step of performing the annealing process specifically comprises: Performing the annealing process: The first doped amorphous silicon material layer forms a first doped polysilicon material layer, and the doping elements in the first doped amorphous silicon material layer diffuse into the first intrinsic amorphous silicon material layer, so that the first intrinsic amorphous silicon material layer forms a third doped polysilicon material layer; and / or The second doped amorphous silicon material layer forms a second doped polysilicon material layer, and the doping elements in the second doped amorphous silicon material layer diffuse into the second intrinsic amorphous silicon material layer, so that the second intrinsic amorphous silicon material layer forms a fourth doped polysilicon material layer.

13. The method of producing a solar cell according to claim 12, wherein The doping concentration of the third doped polysilicon material layer is less than the doping concentration of the first doped polysilicon material layer, and / or the doping concentration of the fourth doped polysilicon material layer is less than the doping concentration of the second doped polysilicon material layer.

14. The method of producing a solar cell according to claim 12 or 13, wherein The step of providing the substrate comprises: The surface of the first side of the substrate is uniformly provided with a first tunneling oxide material layer, a first intrinsic amorphous silicon material layer, and a first doped amorphous silicon material layer in sequence; The portions of the first tunneling oxide material layer, the first intrinsic amorphous silicon material layer, and the first doped amorphous silicon material layer covering the surface of the processing region are removed; The second tunneling oxide material layer, the second intrinsic amorphous silicon material layer, and the second doped amorphous silicon material layer are sequentially formed on the processing region.

15. The method of producing a solar cell according to any one of claims 12 to 14, wherein Each of the processing regions comprises a second region and an isolation region in sequence, and each of the adjacent first region and second region is provided with an isolation region; The step of performing the annealing process further comprises: The structure layer covering the isolation region is removed, so that the first doped polysilicon material layer forms a first doped polysilicon layer, the third doped polysilicon material layer forms a third doped polysilicon layer, and / or the second doped polysilicon material layer forms a second doped polysilicon layer, and the fourth doped polysilicon material layer forms a fourth doped polysilicon layer.

16. The method of producing a solar cell according to claim 15, wherein The step of removing the structure layer covering the isolation region further comprises: The oxide material layer generated on the side surface of the substrate and the surface of the second side of the substrate during the annealing process is removed, and the second side is opposite to the first side; A second passivation layer is formed on the surface of the second side of the substrate, and a first passivation layer is formed on the entire surface of the first side of the substrate; A second anti-reflection layer and a first anti-reflection layer are respectively formed on the surfaces of the second passivation layer and the first passivation layer away from the substrate.

17. A photovoltaic module, characterized by The solar cell module comprises at least one battery string, and the battery string comprises at least two solar cells according to any one of claims 1-8.

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