Method for operating a framework and system
The framework addresses inefficiencies and safety issues in heterogeneous data sharing by using a parent runnable to schedule tasks without recopying data, improving communication efficiency and meeting deadlines.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-08-28
- Publication Date
- 2026-03-19
AI Technical Summary
Sharing heterogeneous compute data between processes is inefficient and unsafe, leading to resource overloading, complex kernel scheduling, and data corruption.
A method for operating a framework that communicates with a heterogeneous processing unit by passing data through a parent runnable, creating a buffer stream to schedule tasks without recopying, and providing a single point of contact for synchronization, ensuring timely data processing.
Enhances data communication efficiency and safety by avoiding unnecessary data copies and ensuring task deadlines are met, simplifying kernel scheduling.
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Figure EP2025074491_19032026_PF_FP_ABST
Abstract
Description
Mercedes-Benz Group AG NegiMETHOD FOR OPERATING A FRAMEWORK AND SYSTEMFIELD OF THE INVENTION
[0001] The present invention relates to the field of automobiles. More specifically, the present invention relates to a method for operating a framework to communicate with a heterogeneous processing unit according to claim 1. Furthermore, the present invention relates to a system for operating such a method, a corresponding computer program product, and a corresponding non-transitory computer-readable storage mediumBACKGROUND INFORMATION
[0002] It is known that sharing heterogeneous compute data between processes is not always efficient and safe. Additionally, unnecessary copies can also be caused. Granting all executable units access to a heterogeneous processing unit (GPUs, FPGAs, TPUs, DSPs, Al accelerators, etc.) can lead to inefficiency, make kernel scheduling more complex, overload resources, miss task deadlines, overwrite or damage existing data on the heterogeneous processing unit, and so on.
[0003] The CN114064551 B discloses a high-performance sequence comparison computation acceleration method based on the combination of CPU and GPU, utilizing both task parallel and data parallel processing modes. By closely integrating the features of the BWA-MEM algorithm with the advantages of GPU acceleration, the method enables efficient and powerful processing of sequence comparison tasks.SUMMARY OF THE INVENTION
[0004] A first aspect of the invention relates to a method for operating a framework to communicate with a heterogeneous processing unit and perform tasks scheduled on the939872 heterogeneous processing unit. This involves passing data to and reading data from the heterogeneous processing unit, chaining heterogeneous tasks (kernels) to be performed on the same data without the need for recopying the data to the target device, providing a single point of contact for starting and synchronizing with the target device, and coupling a framework runnable with a parent runnable. The parent runnable supplies data, assigns heterogeneous tasks (kernels) to perform, and requires output data as a task to ensure that process deadlines are met. Through the parent runnable, a buffer stream is created, which contains information as to how tasks are scheduled and which data is to be published. With the parent runnable, information as to which heterogeneous task (kernel) to launch on what data may be generated. The information as to which kernels to launch on which data may be condensed in a buffer stream object. It is also possible that through the parent runnable, data can be serialized in the buffer stream object, or a pointer to data in the buffer stream can be passed, or another mechanism can be used to pass data.
[0005] Further advantages, features, and details of the invention derive from the following description of preferred embodiments as well as from the drawings. The features and feature combinations previously mentioned in the description as well as the features and feature combinations mentioned in the following description of the figures and / or shown in the figures alone can be employed not only in the respectively indicated combination but also in any other combination or taken alone without leaving the scope of the invention.BRIEF DESCRIPTION OF THE DRAWINGS
[0006] The novel features and characteristic of the disclosure are set forth in the appended claims. The accompanying drawings, which are incorporated in and constitute a part of this disclosure, illustrate exemplary embodiments and together with the description, serve to explain the disclosed principles. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the figures to reference like features and components. Some embodiments of system and / or methods in accordance with embodiments of the present subject matter are now described below, by way of example only, and with reference to the accompanying figures.
[0007] The drawings show in:3
[0008] Fig 1 a first block diagram illustrating a method for operating a framework to communicate with a heterogeneous processing unit;
[0009] Fig. 2 a second block diagram illustrating the method for operating the framework to communicate with the heterogeneous processing unit; and
[0010] Fig. 3 a third block diagram illustrating the method for operating the framework to communicate with the heterogeneous processing unit.
[0011] In the figures the same elements or elements having the same function are indicated by the same reference signs.DETAILED DESCRIPTION
[0012] In the present document, the word "exemplary" is used herein to mean "serving as an example, instance, or illustration". Any embodiment or implementation of the present subject matter described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
[0013] While the disclosure is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawing and will be described in detail below. It should be understood, however, that it is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternatives falling within the scope of the disclosure.
[0014] The terms “comprises”, “comprising”, or any other variations thereof, are intended to cover a non-exclusive inclusion so that a setup, device or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or device or method. In other words, one or more elements in a system or apparatus preceded by “comprises” or “comprise” does not or do not, without more constraints, preclude the existence of other elements or additional elements in the system or method.
[0015] In the following detailed description of the embodiment of the disclosure, reference is made to the accompanying drawing that forms part hereof, and in which is shown by way of illustration a specific embodiment in which the disclosure may be4 practiced. This embodiment is described in sufficient detail to enable those skilled in the art to practice the disclosure, and it is to be understood that other embodiments may be utilized and that changes may be made without departing from the scope of the present disclosure. The following description is, therefore, not to be taken in a limiting sense.
[0016] Fig. 1 shows a first block diagram B1 illustrating a method for operating a framework 10 to communicate with a heterogeneous processing unit 12.
[0017] In Fig. 1 , a sequence of blocks is shown, each representing the data DO, D1 , D2, Dn, on which a task is to be performed, being copied ("copy") and transferred to heterogeneous units with heterogeneous tasks or kernels K1, K2, K3, Kn, and then forwarded. Each block has an embedded runnable R1, R2, R3, Rn, representing the processing and encapsulation of the data.
[0018] Fig. 2 a second block diagram B2 illustrating the method for operating the framework 10 to communicate with the heterogeneous processing unit 12.
[0019] The instance of the MB Compute Framework as the framework 10, called MB_1 runnable, will ingest the data from the buffer stream 14, read the data, perform copying of the correct data from the CPU to the device (processing unit 12), initiate the heterogeneous computation, synchronize the heterogeneous device, read and publish the output data from the heterogeneous device. If the data is serialized by the parent runnable, then the MB_1 runnable is responsible for deserializing it. The parent runnable P1 and the MB_1 runnable can be combined to form an entity called task T1, which can have a strict time requirement for task execution. Furthermore, it may be specified that Task T 1 needs to be completed within time "t" or time t1 in milliseconds.
[0020] Therefore the parent runnable P1 generates information as to which heterogeneous tasks to perform on what data and what needs to be read from the heterogeneous compute unit / processing unit 12. Runnable MB_1 reads the information from the buffer stream 14, schedules the task, reads output 16 from the heterogeneous compute device / processing unit 12, and publishes it.
[0021] Fig. 3 a third block diagram B3 illustrating the method for operating the framework 10 to communicate with the heterogeneous processing unit 12.The buffer stream 14 holds identifications IDs and data information required to perform computation tasks. These IDs may relate to tasks such as reading data from the buffer, copying data to a device, scheduling kernels on given data, and reading output from the heterogeneous compute device. The runnable MB_1 chains the kernels KO, K1 , ..., Kn, and also publishes user-requested data like D1 , D2, ..., Dn.List of Reference Signs10 framework12 heterogeneous unit14 buffer stream16 outputDO-Dn dataK1-Kn kernelsR1-Rn runnablesB1-B3 blockT1 task t1 timeP1 parent runnableMB compute frameworkMB_1 runnableID identification
Claims
7Mercedes-Benz Group AG NegiCLAIMS1. Method for operating a framework to communicate with a heterogeneous processing unit and perform tasks, which are scheduled on the heterogeneous processing unit, wherein- data is passed to and read from the heterogeneous processing unit,- heterogeneous tasks to be performed on the same data are chained without the need for recopying the data to the target device,- one point of contact is provided for start and synchronization with the target device, and- a framework runnable is coupled with a parent runnable supplying data, assigning heterogeneous tasks (kernel) to perform, and requiring output data as a task to ensure that process deadlines are met, wherein through the parent runnable, a buffer stream is created containing information on how tasks are scheduled and which data is to be published.
2. The method according to claim 1 , characterized in that through the parent runnable, information will be generated regarding which heterogeneous task to launch on what data,3. The method according to claim 2, characterized in that the information as to which kernels to launch on which data will be condensed in a buffer stream object.9398784. The method according to any one of claims 1 to 3, characterized in that through the parent runnable, data can be serialized in the buffer stream object, or a pointer to data in the buffer stream can be passed, or another mechanism can be used to pass data.
5. System to perform a method for operating a framework to communicate with a heterogeneous processing unit and perform tasks according to any one of claims 1 to 4.
6. A computer program product comprising program code means for performing a method according to any one of claims 1 to 4.
7. A non-transitory computer-readable storage medium comprising at least the computer program product according to claim 6.
Citation Information
Patent Citations
A CPU+GPU heterogeneous high-concurrency sequence alignment computation acceleration method
CN114064551B
Persistent scratchpad memory for data exchange between programs
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