Optical modulator and method for manufacturing same

Abstract

A modulator chip (40), in which an input waveguide (401), modulators (403a, 403b), and output waveguides (404a, 404b) are integrated on a semiconductor chip, and a silicon photonics chip (30), in which an input waveguide (301), first output waveguides (302a, 302b), a multiplexer (303), and a second output waveguide (304) are formed, are arranged in a package (10) with a gap of 10 μm or less, and are connected using resin (70, 80). The input waveguide and the at least two output waveguides of the modulator chip are butt-coupled to the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively. Such a configuration makes it possible to reduce the size of an optical modulator, including the optical implementation section and the like, and to achieve cost reduction by simplifying the implementation process.

Description

Optical Modulator and Method for Manufacturing the Same

[0001] The present invention relates to an optical modulator used for optical communication and a method for manufacturing the same.

[0002] In recent years, in order to cope with the increase in communication traffic, the demand for high-speed optical modulators and optical receivers compatible with advanced optical modulation methods has been increasing. In particular, as a result of introducing digital signal processing technologies such as digital coherent technology into optical fiber communication systems, backbone network transmission technologies of 100 Gbps (32 GBd operation) per wavelength have been established, and today, high-speed optical communication systems achieving 800 Gbps to 1.2 Tbps (128 GBd operation) per wavelength are being put into practical use.

[0003] In the initial 100G digital coherent systems, each component of optical modulators and optical receivers, for example, the driver IC and the optical modulator chip in an optical modulator, and the transimpedance amplifier (TIA) and the optical receiving chip in a receiver, were generally packaged individually and mounted on, for example, a printed circuit board (PCB) (for example, Patent Document 1). However, in systems exceeding 400G, for example, a further wider bandwidth is required, such as a modulation bandwidth of 40 GHz or more. To meet this requirement, aiming at reducing high-frequency loss and miniaturization, in the case of an optical modulator, the driver IC and the optical modulator chip are integrated and mounted in the same package, and in the case of a receiver, the TIA and the light receiving chip are integrated and mounted in the same package. Also, from the viewpoints of high speed, miniaturization, and low power consumption, a design based on differential operation has become common from single-ended operation.

[0004] Today, research and development of optical transceiver devices enabling ultra-high-speed optical transmission and reception exceeding 800 Gbps and 1 Tbps, and considerations for their market introduction are actively underway.

[0005] Various technologies have been proposed as package configurations to further increase bandwidth while reducing high-frequency losses. For example, HB-CDM (High Bandwidth Coherent Driver Modulator) (Non-Patent Literature 1) has been proposed for optical transmitters, HB-ICR (High Bandwidth Intradyne Coherent Receiver) for optical receivers, and IC-TROSA (Integrated Coherent Transmit-Receiver Optical Sub-Assembly) (Non-Patent Literature 2) has been proposed as a small package integrating both the optical transmitter and receiver. All of these packages have space-saving form factors, and their realization requires miniaturization of the chip and optical mounting area.

[0006] However, there were the following challenges in achieving miniaturization of optical modulators.

[0007] As an example, Figure 14 shows the internal configuration of a conventional HB-CDM optical transmitter. The optical fibers 201a and 201b are output to the outside of the package 10 through the pipe sections 101a and 101b. Inside the package 10 are an InP DP-IQ modulator chip (hereinafter referred to as "InP modulator chip") 400, a driver IC 60 to drive it, and a spatial optical system 300 for inputting and outputting light to the InP modulator chip 400. One end of the spatial optical system 300 is optically connected to the InP modulator chip 400, and the other end of the spatial optical system 300 is optically connected to the optical fibers 201a and 201b.

[0008] The spatial optical system 300, in particular, is a complex assembly of numerous components, each individually mounted. These components include lenses for coupling light to the InP modulator chip 400, a polarization beam combiner (PBC) for polarization synthesis, and a monitor PD for monitoring the light power. To arrange so many components, it is necessary to leave a certain amount of space between them to prevent adhesive from flowing in and to prevent the components from becoming difficult to grasp with the mounting machine's handle. As a result, the spatial optical system 300 tends to occupy a large area, making it difficult to miniaturize the package.

[0009] Furthermore, because the optical system is constructed by combining numerous components in a complex manner, even a slight misalignment of a single component can lead to a misalignment when light is coupled to the InP modulator chip 400, increasing optical loss. Therefore, in order to mount each component with high precision, there were challenges such as the time required for fine adjustments to the position of each component.

[0010] Furthermore, especially in the TROSA configuration, it is necessary to integrate the modulator chip, PD (Photo Diode) chip, driver, TIA, etc., inside the package, and in addition, it is required to integrate the optical amplifier on the optical transmitter side.

[0011] However, integrating micro-erbium-doped fiber amplifiers (Micro-EDFAs) and other components into a package is difficult due to size limitations. Therefore, IC-TROSAs reported to date employ a method of integrating semiconductor optical amplifiers (SOAs) into an InP (indium phosphide) modulator chip (Non-Patent Literature 3).

[0012] However, such methods presented a challenge: adding functionality to the InP modulator chip complicates its structure and process, leading to a decrease in chip yield.

[0013] Patent No. 7335539

[0014] Kurata et al., “Ultra-Compact DP-IQ Modulator with Hybrid Integration of InPBased High-Speed ​​Modulator and Si-Based Optical Circuit”, [on line], Internet <URL: https: / / www.oiforum.com / wp-content / uploads / OIF-HB-CDM-02.0.pdf> The OIF, “Implementation Agreement for Integrated Coherent Transmit-Receive Optical Sub “Integrated Coherent Transmit-Receive Optical Sub-Assembly (IC-TROSA) for 140 GBd Applications”, “Integrated Coherent Transmit-Receive Optical Sub-Assembly (IC-TROSA) for 140 GBd Applications”, Optical Fiber Communication Conference (OFC) 2024, W3A.2

[0015] Therefore, the present invention aims to miniaturize optical modulators, including optical mounting components, and to reduce costs by simplifying the mounting process.

[0016] To solve the above-mentioned problems, an optical modulator according to one configuration example of the present invention comprises a modulator chip in which an input waveguide for guiding an input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding each of the at least two modulated optical signals are integrally integrated on a semiconductor chip; an input waveguide configured for guiding the input optical signal, at least two first output waveguides for guiding each of the at least two modulated optical signals, and a multiplexer connected to the at least two first output waveguides and configured to combine the two modulated optical signals; and The modulator chip and the silicon photonics chip are housed in a package, the modulator chip and the silicon photonics chip being arranged within the package with a gap of 10 μm or less between them and connected using resin, and the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

[0017] Furthermore, a method for manufacturing an optical modulator according to one configuration example of the present invention involves arranging a silicon photonics chip, in which an input waveguide configured to guide an input optical signal, at least two first output waveguides each guiding at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to combine the two modulated optical signals, and a second output waveguide configured to guide the combined optical signal, all formed from silicon photonics, and a fiber array including a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip, with a gap of 10 μm or less between them and connecting them using resin, thereby batting the input waveguide and the second output waveguide of the silicon photonics chip and the optical fibers of the fiber array together. The package is coupled and a thermoelectric cooler is placed inside it. The modulator chip, which is integrally integrated on a semiconductor chip, is mounted on a chip carrier. The chip carrier on which the modulator chip is mounted is mounted on the thermoelectric cooler. The silicon photonics chip, which is connected to the fiber array, is placed inside the package with a gap of 10 μm or less and connected using resin. The input waveguide and the at least two output waveguides of the modulator chip are butt-coupled with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

[0018] According to the present invention, by connecting a modulator chip and a silicon photonics chip using resin and butt-coupling them, it is possible to miniaturize the optical modulator and reduce costs by simplifying the mounting process.

[0019] Figure 1 is a plan view illustrating the configuration of an optical modulator according to the first embodiment of the present invention. Figure 2 is a plan view illustrating the internal configuration of the optical modulator package according to the first embodiment of the present invention. Figure 3 is a cross-sectional view illustrating the configuration of an optical modulator according to the first embodiment of the present invention. Figure 4 is a cross-sectional view showing the configuration of an optical modulator according to a modified example of the first embodiment of the present invention. Figure 5 is a plan view illustrating the configuration of an optical modulator according to the second embodiment of the present invention. Figure 6 is a cross-sectional view illustrating the configuration of an optical modulator according to the second embodiment of the present invention. Figure 7 is a plan view illustrating the internal configuration of the optical modulator package according to the third embodiment of the present invention. Figure 8 is a cross-sectional view showing the configuration of an optical modulator according to a modified example of the third embodiment of the present invention. Figure 9 is a plan view illustrating the internal configuration of the optical modulator package according to the fourth embodiment of the present invention. Figure 10 is a plan view illustrating the internal configuration of the optical modulator package according to the fifth embodiment of the present invention. Figure 11 is a flowchart illustrating a method for manufacturing an optical modulator according to an embodiment of the present invention. Figure 12A is a diagram illustrating one step in the method for manufacturing an optical modulator according to an embodiment of the present invention. Figure 12B is a diagram illustrating one step in the method for manufacturing an optical modulator according to an embodiment of the present invention. Figure 12C is a diagram illustrating one step in the manufacturing method of an optical modulator according to an embodiment of the present invention. Figure 12D is a diagram illustrating one step in the manufacturing method of an optical modulator according to an embodiment of the present invention. Figure 12E is a diagram illustrating one step in the manufacturing method of an optical modulator according to an embodiment of the present invention. Figure 13 is a diagram illustrating a configuration for improving the alignment accuracy between chips. Figure 14 is a diagram showing the internal configuration of a conventional HB-CDM optical transmitter.

[0020] Embodiments of the present invention will be described below with reference to the drawings.

[0021] [First Embodiment] The optical modulator according to the first embodiment of the present invention is an HB-CDM for an optical transmitter. Its configuration is shown in Figures 1 to 3. As shown in Figure 1, the optical modulator 1A according to this embodiment has a fiber array 20, a silicon photonics chip (SiPh chip) 30, and an InP DP-IQ modulator chip (hereinafter referred to as "InP modulator chip") 40 arranged inside the package 10. In addition, there are wires and pads for power supply and signal transmission inside the package 10, but these are omitted in the drawings.

[0022] [Package] Here, package 10 is a roughly rectangular housing sealed by brazing ceramics and metal components together. Package 10 is equipped with pipe sections 101a and 101b through which optical fibers 201a and 201b are inserted. Package 10 also efficiently dissipates heat generated from the internal elements to the outside by constructing the package (PKG) base substrate 101 (see Figure 3) from a metal component with high heat dissipation properties. Furthermore, from the viewpoint of ensuring reliability, package 10 is sealed by welding a lid called a lid to the package body by seam welding or the like. The pipe sections 101a and 101b of package 10 are also sealed by solder sealing or the like.

[0023] The fiber array 20 includes optical fibers 201a and 201b, with one end of each optical fiber fixed to a glass block 202. The optical fibers 201a and 201b are led out of the package 10 after being soldered or otherwise sealed in the pipe sections 101a and 101b provided in the package 10. The glass block 202 supporting the optical fibers 201a and 201b is connected to the end face of the SiPh chip 30 by resin (UV-curing adhesive) 70.

[0024] [SiPh Chip] The SiPh chip 30 is a chip formed by silicon photonics, that is, a technology that integrates optical waveguides and other optical elements on a silicon substrate, and is a device that inputs and outputs optical signals to the InP modulator chip 40, which will be described later.

[0025] Specifically, as shown in Figure 2, the SiPh chip 30 integrates an input waveguide 301 configured to guide an input optical signal, two first output waveguides 302a and 302b that guide two modulated optical signals respectively, a polarization beam combiner (PBC) 303 connected to the two first output waveguides 302a and 302b and acting as a multiplexer to combine the two modulated optical signals, and a second output waveguide 304 configured to guide the combined optical signal, all on a single chip.

[0026] Furthermore, the SiPh chip 30 is also provided with a polarization rotator 305. The polarization rotator 305 is configured to rotate the polarization of the Y-channel optical signal, which is linearly polarized by the InP modulator chip 40 and guided by one of the two first output waveguides 302a and 302b, by 90 degrees and input it to the PBC 303. The PBC 303 combines the Y-channel optical signal with its polarization rotated by 90 degrees and the X-channel optical signal guided by the other first output waveguide 302a, and outputs it from the output waveguide 304. The SiPh chip 30, which integrates the polarization rotator 305 and the PBC 303 in this way, has the function of polarizing and rotating the TE light output from the InP modulator chip 40 (described later) into TM light, and further polarizing and combining them.

[0027] In the SiPh chip 30, branching elements (Tap) 306a, 306b, and 306c are provided in the input and output waveguides, respectively, and the intensity of the optical signal propagating through each waveguide can be monitored by monitor photodiodes (MPD) 307a, 307b for individual monitoring of X-polarization and Y-polarization, and MPD 307c for X+Y combined wave.

[0028] In this way, all the functions that are essential for a typical HB-CDM, such as the PBC and monitor PD, which were conventionally composed of spatial optical systems, are integrated into the SiPh chip 30. As a result, since the optical components other than the fiber are concentrated only in the SiPh chip 30, the number of components can be greatly reduced, and furthermore, the mounting area itself can be greatly reduced by integrating the waveguides of the SiPh chip 30.

[0029] The SiPh chip 30 has a rectangular parallelepiped shape, and the output terminal of the input waveguide 301 and the input terminals of the two first output waveguides 302a and 302b are converged on the first end face of the SiPh chip 30 that faces the InP modulator chip 40. The distance between the output terminal of the input waveguide 301 and the input terminals of the two first output waveguides 302a and 302b is preferably 250 μm or more and 1 mm or less.

[0030] Furthermore, the input end of the input waveguide 301 of the SiPh chip 30 and the output end of the second output waveguide 304 are converged at the second end face of the SiPh chip 30, which faces the end face of the fiber array 20.

[0031] Furthermore, the SiPh chip 30 has a spot size converter (SSC) at each of its end faces: a first end face facing the InP modulator chip 40 and a second end face facing the fiber array 20, to align the mode field and reduce coupling loss.

[0032] As described later, the mode field diameter of the SSCs provided at the output terminal of the input waveguide 301 of the SiPh chip 30 and at the input terminals of the two first output waveguides 302a and 302b should be 3.0 μm to 3.5 μm. Also, the mode field diameter of the SSCs provided at the input terminal of the input waveguide 301 of the SiPh chip 30 and at the input terminals of the first output waveguides 302a and 302b should be 3.5 μm to 4.0 μm.

[0033] The fiber array 20 and the SiPh chip 30 are arranged within the package 10 with a gap of 10 μm or less and are connected to each other using resin 70. As a result, the optical fibers 201a and 201b constituting the fiber array 20 and the input waveguide 301 and second output waveguide 304 of the SiPh chip 30 are butt-coupled to each other. A UV-curing adhesive can be used as the resin 70.

[0034] [InP DP-IQ Modulator Chip] The InP modulator chip 40 is a semiconductor chip mounted on the chip carrier 50, and as shown in Figure 2, it integrates on an InP semiconductor chip an input waveguide 401 that guides the input optical signal input via the input waveguide 301 of the SiPh chip 30, a 1x2 multimode interference waveguide (MMI: Multimode Interference) 402 configured to split this input optical signal into two, X-polarized and Y-polarized signals, IQ modulators 403a and 403b configured to modulate the two split input optical signals and output modulated optical signals, and two output waveguides 404a and 404b that guide the two modulated optical signals output from the IQ modulators 403a and 403b. Each of the IQ modulators 403a and 403b consists of two Mach-Zehnder modulators and a phase shifter that provides a 90° phase difference between the modulated signals output from these Mach-Zehnder modulators. Thus, the InP modulator chip 40 constitutes a DP-IQ (Dual Polarization In-phase Quadrature) modulator having two IQ modulators 403a and 403b.

[0035] The InP modulator chip 40 has a rectangular parallelepiped shape, and the input end of the input waveguide 401 and the output ends of the two output waveguides 404a and 404b are converged on the first end face of the InP modulator chip 40 that faces the SiPh chip 30. The distance between the input end of the input waveguide 401 and the output ends of the two output waveguides 404a and 404b on the first end face of the InP modulator chip 40 that faces the SiPh chip 30 is equal to the distance between the output end of the input waveguide 301 and the input ends of the two first output waveguides 302a and 302b on the face of the SiPh chip 30 that faces the InP modulator chip 40.

[0036] From the perspective of connecting multiple waveguides at once, it is desirable that the pitch of these input and output waveguides be concentrated in as close together as possible, i.e., in one place. However, considering that the InP modulator chip 40 is pre-tested using a tip-shaped fiber, the pitch of the input and output waveguides needs to be 250 μm or more to ensure that the tip-shaped fibers do not interfere with each other. On the other hand, if the pitch of the input and output waveguides is 1 mm or more, the difficulty of alignment increases, and misalignment is more likely to occur due to stress when the UV-curing adhesive hardens, potentially increasing coupling loss. Therefore, it is desirable that the spacing between input and output waveguides be between 250 μm and 1 mm, and more preferably between 500 μm and 1 mm.

[0037] Furthermore, the InP modulator chip 40 has spot-size converters at the input terminal of the input waveguide 401 and at the output terminals of the two output waveguides 404a and 404b. As will be described later, the mode field diameter of the spot-size converter is 2.5 μm to 3.0 μm.

[0038] The SiPh chip 30 and the InP modulator chip 40 are arranged within the package 10 with a gap of 10 μm or less and connected to each other using resin 80. A UV-curing adhesive can be used as the resin 80. As a result, the output terminal of the input waveguide 301 of the SiPh chip 30 and the input terminals of the two first output waveguides 302a and 302b are butt-coupled to the input terminal of the input waveguide 401 of the InP modulator chip 40 and the two output waveguides 404a and 404b.

[0039] [UV-curing adhesive] The adhesive used for connection will now be described. The optical modulator 1A according to this embodiment is intended to be used in the communication wavelength band of 1550 nm or 1300 nm. Therefore, in accordance with the wavelength band in which the IQ modulators 403a and 403b of the InP modulator chip 40 operate, it is desirable that the light transmittance of the resins 70 and 80 after curing of the UV-curing adhesive be 90% or more, so that the impact on the propagation loss of light in the wavelength band is 0.1 dB.

[0040] Furthermore, since the UV-curing adhesive is intended for use in connecting to the SiPh chip 30, it is desirable to use one in which the refractive index of the cured resin 70 and 80 is approximately 1.5.

[0041] However, the adhesive used to fix the InP modulator chip 40 and the SiPh chip 30, and the adhesive used to fix the SiPh chip 30 and the fiber array 20, may be the same UV-curing adhesive, but they do not necessarily have to be the same. Since Si and glass transmit UV light, as shown in Figure 2, it is possible to cure them by dripping UV-curing adhesive from above the paper in a plan view and irradiating them with UV light from above the paper. However, since InP is a material that does not transmit UV light, it is difficult to stably cure the InP modulator chip 40 by simply irradiating it with UV light from above. For this reason, it is desirable to use a UV-curing adhesive that also has a thermosetting effect for connecting the InP modulator chip 40 and the SiPh chip 30. By using a UV-curing adhesive that also has a thermosetting effect, even if InP does not transmit UV light and the resin around InP cannot be sufficiently cured by UV light, sufficient connection strength can be achieved by curing with heat. It is desirable that the heat curing temperature be 85°C or lower, which is the normal operating and storage temperature for optical devices. This is because, for example, in a case where the SiPh chip 30 is first fixed to the glass block 202 of the fiber array 20 and then connected to the InP modulator chip 40, applying high heat to an already UV-cured adhesive would cause problems such as thermal expansion or the resin 70 melting, leading to misalignment of the optical connection.

[0042] [SSC] Next, we will describe the waveguide structure of the connection surface when connecting the fiber array 20, SiPh chip 30, and InP modulator chip 40 to each other, in particular the SSC (spot size converter).

[0043] In order to reduce the coupling loss between devices, it is necessary to make the mode field diameters of each other match. When the mode field diameters are misaligned, the misaligned part becomes optical loss. In order to create a stable mode field (light intensity distribution around the waveguide direction), SSCs are integrated on the end faces of the input / output waveguides of the InP modulator chip 40 and the SiPh chip 30 to make the mode field shape approach a perfect circle.

[0044] At this time, in the case of the InP modulator chip 40, due to the relationship of the stacked structure of the InP semiconductor, if the mode field diameter is increased, problems such as bonding to the lower semiconductor layer will occur. Therefore, if it is in the direction of making it as small as about 2 μm, there is room for design, but generally about 3 μm is considered the upper limit.

[0045] On the other hand, when integrating SSCs on the SiPh chip 30, it is said that it is difficult to confine light so that the mode field diameter becomes 2 μm or less due to its structure. If no SSC is provided, it is possible to set the mode field diameter to about 1 μm. Conversely, in that case, since the mode field diameter is small and there is no tolerance for misalignment between waveguides, the loss variation due to misalignment during adhesive fixing becomes large, and it becomes difficult to stably mount and use.

[0046] Therefore, regarding the connection between the InP modulator chip 40 and the SiPh chip 30, in the InP modulator chip 40, for example, the SSC is designed so that the mode field diameter becomes about 2.5 to 3 μm, and in the SiPh chip 30, the SSC is designed so that the mode field diameter becomes about 3 to 3 .5 μm, it becomes possible to appropriately suppress the coupling loss.

[0047] Regarding the connection between the SiPh chip 30 and the fiber array 20, it is as follows. Although the general fiber diameter is about 10 μm, it is difficult to expand the output on the SiPh chip 30 side to that size by SSC. Therefore, in the fiber array 20, the optical fibers 201a and 201b are replaced with thin optical fibers having a diameter of about 4 μm instead of the normal fibers with a diameter of 10 μm. The diameter of 4 μm is a general value of the thin optical fibers available on the market and can be easily obtained. The thin optical fibers are connected to the fiber part or the connector part other than the connection part (not shown) that is at least 50 cm or more away from the pipe parts 101a and 101b of the package 10 to a fiber with a standard mode field of about 10 μm by a thermal diffusion technique or the like to form a mode conversion part where the mode field diameter is smoothly converted while suppressing the loss. It is desirable that the fiber fusion point is located on the side farther from the pipe parts 101a and 101b than the mode conversion part.

[0048] Also, in the SiPh chip 30, it is desirable that the mode field diameter on the side coupled to the fiber is about 3.5 to 4.0 μm. That is, in the SiPh chip 30, the mode field diameter on the side connected to the fiber array 20 is different from the mode field diameter on the side connected to the InP modulator chip 40, and the structure of the SSC is designed for each end face of the SiPh chip 30 such that the mode field diameter on the side connected to the InP modulator chip 40 is smaller than the mode field diameter on the side connected to the fiber array 20.

[0049] In addition, by performing an AR coating process on the end face of the InP modulator chip 40 in accordance with the refractive indices of the SiPh chip 30 and the UV curable resin, the light reflection on the bonding surface can be suppressed. Also, in order to improve the wettability of the UV curable adhesive on the bonding surface, an ozone cleaning process or the like for enhancing the hydrophilicity of the bonding surface may be performed immediately before mounting.

[0050] [TEC and Chip Carrier] Figure 3 shows a partial cross-sectional view of the optical modulator 1A according to this embodiment along the line A-A shown in Figure 1. As shown in Figure 3, the optical modulator 1A according to this embodiment has a thermoelectric cooler (TEC) 90 made of a Peltier element provided on a package (PKG) base plate 101 which forms part of the package 10. A chip carrier 50 is placed on the TEC 90, and an InP modulator chip 40 is placed on this chip carrier 50.

[0051] The InP modulator chip 40 operates using absorption changes due to the quantum confined Stark effect (QCSE), etc., and is very sensitive to temperature. Therefore, in the optical modulator 1A according to this embodiment, the InP modulator chip 40 is mounted on the TEC 90 and its characteristics are stabilized by temperature control.

[0052] Furthermore, if, as in the optical modulator 1A according to this embodiment, no active elements such as semiconductor optical amplifiers (SOAs) are mounted on the SiPh chip 30 as described above, temperature control is not necessary. From the viewpoint of power consumption, it is desirable for the mounting area of ​​the TEC 90 to be small. Therefore, in the optical modulator 1A according to this embodiment, the fiber array 20 and SiPh chip 30 are not mounted on the TEC 90, and only the InP modulator chip 40 is mounted on the TEC 90 via the chip carrier 50.

[0053] From the perspective of suppressing the power consumption of the TEC90, it is important to reduce the thermal resistance between the TEC90 and the InP modulator chip 40. For this reason, in the optical modulator 1A according to this embodiment, the chip carrier 50 is made of aluminum nitride (AlN).

[0054] AlN, as a material, is known not only for its high thermal conductivity but also for its excellent compatibility with InP because its coefficient of thermal expansion is very similar to that of InP. If a substrate made of a material with a different coefficient of thermal expansion were selected as a chip carrier, when a thermal load is applied to the InP modulator chip 40 and SiPh chip 30 connected using a UV-curing adhesive, the difference in coefficients of thermal expansion in the stacking direction could cause unexpected warping, potentially leading to misalignment of the optical axis or damage. Therefore, it is desirable to make the coefficient of thermal expansion of the InP constituting the InP modulator chip 40 and the coefficient of thermal expansion of the chip carrier 50 on which the InP modulator chip 40 is mounted as close to the same value as possible, and from this perspective, applying AlN is optimal.

[0055] To fix the InP modulator chip 40 to the chip carrier 50, for example, silver (Ag) paste or solder can be used. It is desirable that the thermal conductivity of the fixing agent used is at least 1 W / mK. Furthermore, the thickness of the fixing agent used to fix the InP modulator chip 40 to the chip carrier 50 should be thin; specifically, it is desirable that it be controlled to 10 μm or less. Similarly, Ag paste or solder can be used to fix the chip carrier 50 to the TEC 90.

[0056] Furthermore, fixing the InP modulator chip 40 onto the AlN chip carrier 50 has the following advantages.

[0057] The InP modulator chip 40 uses cleavage to stably expose the waveguide end face, but in the case of an InP substrate, it is known that the thickness to which cleavage can be performed is 400 μm or less. However, in order to connect the SiPh chip 30 and the InP modulator chip 40 with a resin 80 such as a UV-curing adhesive, a thickness of 400 μm or less is insufficient for fixing the connection area, and sufficient connection strength cannot be guaranteed. Therefore, the InP modulator chip 40 is mounted on a chip carrier 50, and the InP modulator chip 40 and the chip carrier 50 are bonded together as one unit to the SiPh chip 30, thereby increasing the size of the InP modulator chip 40 in the thickness direction and ensuring sufficient adhesive strength in the connection with the SiPh chip 30.

[0058] For example, if the combined thickness of the InP modulator chip 40 and the chip carrier 50, and the thickness of the SiPh chip 30 are both 600 μm or more, sufficient adhesive strength can be ensured when the InP modulator chip 40 and the SiPh chip 30 are assumed to be connected with a gap of 10 μm or less. Therefore, if the thickness of the InP modulator chip 40 is 400 μm, the thickness of the chip carrier 50 should be 200 μm, and if the thickness of the InP modulator chip 40 is 200 μm, the thickness of the chip carrier 50 should be 400 μm, and so on, adjusting the thickness of the chip carrier 50 to match the thickness of the InP modulator chip 40 so that the combined thickness of the InP modulator chip 40 and the chip carrier 50 is 600 μm. In this case, the combined thickness of the InP modulator chip 40 and the chip carrier 50 does not necessarily have to be the same as the thickness of the SiPh chip 30. However, when mounting chip carriers (50 carriers) and SiPh chips on the same plane, it is necessary to ensure that their thicknesses are the same.

[0059] Furthermore, the chip carrier 50 does not protrude beyond the first end face of the InP modulator chip 40 that faces the SiPh chip 30 towards the SiPh chip 30. This is because if the chip carrier 50 were to protrude beyond the first end face of the InP modulator chip 40 towards the SiPh chip 30, it may become impossible to connect the InP modulator chip 40 and the SiPh chip 30 with a gap of 10 μm or less. Considering general mounting tolerances, it is desirable that the chip carrier 50 be offset by at least 50 μm or more from the first end face of the InP modulator chip 40.

[0060] Furthermore, while the chip carrier 50 may be made from a single AlN plate, as shown in Figure 4, by stacking multiple AlN plates to form a chip carrier 50a, it is possible to create irregularities between the chip carrier and the connection surface of the SiPh chip 30, thereby increasing the bonding area and improving the connection strength.

[0061] Although not shown in the diagram, it is also possible to mount elements such as capacitors and thermistors on the chip carrier 50, in addition to wiring and pads for extracting DC wiring to operate the IQ modulators 403a and 403b of the InP modulator chip 40. In that case, in order to secure space, the chip carrier 50 may be made larger than the InP modulator chip 40 in directions other than the direction of the SiPh chip 30 in a plan view, for example, in the vertical direction in Figure 2, and wiring etc. may be provided there. On the other hand, if it is not necessary to provide wiring etc., it is desirable to make the chip carrier 50 slightly smaller than the InP modulator chip 40 in a plan view, so that it does not protrude from any side of the InP modulator chip 40 in a plan view, in order to avoid the risk of the Ag paste used for fixing rising up on the top surface of the InP modulator chip 40.

[0062] [Gap between elements] The reason for setting the gap between the InP modulator chip 40 and the SiPh chip 30 and the gap between the fiber array 20 and the SiPh chip 30 to 10 μm or less is as follows.

[0063] From the standpoint of the coefficient of linear expansion, it is desirable that the coefficient of linear expansion of the resin 80 be the same as that of the InP modulator chip 40 and the SiPh chip 30. However, in reality, UV-curing adhesives that make up the resin 80 are generally known to be acrylic resins, and in that case, the coefficient of linear expansion differs by one to two orders of magnitude from that of the InP modulator chip 40 and the SiPh chip 30, making it nearly impossible to match the coefficients of linear expansion. Therefore, in order to keep the positional and angular deviations that may occur due to the difference in the coefficients of linear expansion within an acceptable range, the gap between the InP modulator chip 40 and the SiPh chip 30 is set to 10 μm or less for each. This is because, even if the coefficients of linear expansion differ by two orders of magnitude, in order to keep the difference in light propagation loss due to positional and angular deviations within an acceptable range, specifically 0.1 dB or less, the gap needs to be 10 μm or less.

[0064] Furthermore, the connection between the SiPh chip 30 and the fiber array 20 using resin 70, particularly the thickness of the fiber array 20 and the gap between the SiPh chip 30 and the fiber array 20, is the same as the connection between the InP modulator chip 40 and the SiPh chip 30 described above. However, since the fiber array 20 is not mounted on the TEC 90, as long as sufficient adhesive strength can be ensured, it is not necessary to control its thickness to be the same as that of the SiPh chip 30.

[0065] [Effects of the First Embodiment] According to the first embodiment, the InP modulator chip 40 and the SiPh chip 30 are connected using a UV-curing adhesive and butt-coupled to each other, thereby enabling miniaturization of the optical modulator. Furthermore, because the number of components has been reduced, only the connection between the InP modulator chip 40 and the SiPh chip 30 is required during mounting, thus simplifying the mounting process, which in turn reduces mounting time and costs.

[0066] [Second Embodiment] In the first embodiment of the present invention described above, the driver IC is not located within the package 10 but is provided separately from the optical modulator 1A. However, in the optical modulator 1B according to the second embodiment of the present invention, the driver IC 60 is mounted within the package 10, as shown in Figures 5 and 6. Figure 6 is a partial cross-sectional view taken along the line B-B in Figure 5. Furthermore, components common to the optical modulator 1A according to the first embodiment are given the same reference numerals, and their detailed descriptions are omitted.

[0067] In the optical modulator 1B according to the second embodiment of the present invention, a driver IC 60 is further mounted on the side opposite the SiPh chip 30, with the InP modulator chip 40 in between. This driver IC 60 is mounted on a carrier 62 provided on the PKG base plate 101.

[0068] When wire mounting is used, the characteristics may deteriorate depending on the length of the wire, so it is desirable to shorten the wire as much as possible. From this perspective, by mounting the chip carrier 50 on the carrier 62, the height of the top surface of the driver IC 60 and the top surface of the InP modulator chip 40 are aligned, and the gap between the driver IC 60 and the InP modulator chip 40 is made as narrow as possible. This can be achieved by offsetting the chip carrier 50 away from the driver IC 60, so that in a plan view the chip carrier 50 does not protrude from the side of the InP modulator chip 40 that is on the driver IC 60 side, and thus does not interfere with the driver IC 60 or the carrier 62.

[0069] [Effects of the second embodiment] According to the second embodiment, the optical modulator can be miniaturized by housing the driver IC 60 in the package 10.

[0070] [Third Embodiment] The optical modulator 1A according to the first embodiment of the present invention is shown as an example of an HB-CDM for an optical transmitter, in which no active elements such as a semiconductor optical amplifier (SOA) are mounted on the SiPh chip 30. However, it goes without saying that the present invention is also applicable to configurations such as IC-TROSA, which integrate a modulator and a receiver. In particular, in a configuration such as IC-TROSA, the modulator, receiver, and laser are integrated into a single package. In this case, the mounting surface area is smaller than when each component is individually packaged and integrated, and the mounting part becomes even more complex. Therefore, this patent, which enables a reduction in optical mounting area, a reduction in the number of components, and a simplification of the mounting process, is extremely useful.

[0071] Furthermore, while integrating the SOA inside the package was not essential for HB-CDM, it is essential for IC-TROSA. In IC-TROSA, which is currently under research and development, the SOA is integrated into the InP DP-IQ modulator chip.

[0072] However, integrating active elements such as SOAs into an InP modulator chip leads to increased process complexity and potentially reduces yield due to the increased number of SOAs within the chip. In particular, the InP DP-IQ modulator process is extremely complex, with wafer sizes limited to around 3-4 inches, and is generally considered to have high manufacturing costs. Therefore, integrating SOAs into an InP DP-IQ modulator and resulting in reduced yield is undesirable as it leads to increased costs.

[0073] Therefore, as a third embodiment of the present invention, an example is shown in which SOA308a and 308b are integrated within a SiPh chip 30c. In the optical modulator according to the third embodiment of the present invention, as shown in Figures 7 and 8, two SOA308a and 308b are provided on the SiPh chip 30c, which are placed in front of the PBC 303 and are configured to amplify the optical signals propagating through two first output waveguides 302a and 302b, respectively.

[0074] This configuration, which involves hybridizing two SOAs 308a and 308b on the SiPh chip 30c just before the multiplexing in the PBC 303 of the output waveguide, and attaching an SOA to each polarization just before multiplexing, allows for an increase in optical power at the point where the most light is lost before multiplexing. As a result, it is efficient and the SOAs can compensate for losses not only in the InP modulator chip 40 but also in the SiPh chip 30c and the losses at the coupling between the InP modulator chip 40 and the SiPh chip 30c. Furthermore, by placing the SOA before the PBC, it is possible to compensate for the loss difference between the two polarizations. As a result, it is possible to suppress the loss difference between polarizations, known as PDL, to almost zero.

[0075] When hybrid mounting active elements such as SOA308a and 308b on the SiPh chip 30c, the SiPh chip 30c also needs temperature control. Therefore, as shown in Figure 8, the SiPh chip 30c also needs to be mounted on the TEC90c. In this case, the SiPh chip 30c is mounted on the TEC90c using a conductive paste such as Ag paste, similar to the InP modulator chip 40 and chip carrier 50. On the other hand, the fiber array 20 does not have active elements and does not require temperature control, so to prevent unnecessary increases in power consumption and costs, the fiber array 20 is placed outside the TEC90c. In this case, since the InP modulator chip 40 and chip carrier 50 and the SiPh chip 30c are mounted on the same TEC90c, it is desirable that the combined thickness of the InP modulator chip 40 and chip carrier 50 and the thickness of the SiPh chip 30c be approximately the same.

[0076] [Fourth Embodiment] In the optical modulator according to the third embodiment described above, SOA308a and 308b were provided only in the output waveguides 302a and 302b of the SiPh chip 30c. However, in the optical modulator according to the fourth embodiment of the present invention, as shown in Figure 9, SOA308c is also provided in the input waveguide 301 of the SiPh chip 30d.

[0077] By providing the SOA 308c in the input waveguide 301 of the SiPh chip 30d in this way, the optical signal input to the InP modulator chip 40 can be amplified in the SiPh chip 30d. As a result, it is possible to avoid integrating the SOA into the InP modulator chip 40, thus preventing a decrease in the yield during manufacturing of the InP modulator chip 40.

[0078] [Fifth Embodiment] In the fourth embodiment described above, an SOA 308c was provided in the input waveguide 301 of the SiPh chip 30d. However, in this case, it is not possible to compensate for the loss that occurs at the connection between the InP modulator chip 40, which is the path of the input light, and the SiPh chip 30d. Therefore, in the fifth embodiment of the present invention, an optical modulator is provided in which an SOA that amplifies the input optical signal is integrated into the InP modulator chip 40e. Specifically, as shown in Figure 10, the InP modulator chip 40e is provided with two SOAs 405a and 405b that amplify the input optical signal.

[0079] In this embodiment, it is desirable that the SOAs 405a and 405b are monolithically integrated between the splitter 402a of the InP modulator chip 40e and the Mach-Zehnder interferometer that constitutes the IQ modulators 403a and 403b. This allows the SOAs 405a and 405b to boost the optical power, not only by reducing losses in the inter-chip connections and SiPh chip 30c, but also by reducing branching losses that occur when the optical signal is split into two on the InP modulator chip 40e. However, instead of providing the SOAs 405a and 405b after the splitter 402a, the SOAs may be provided before the splitter 402a.

[0080] Furthermore, in this embodiment, since the SOAs 308a and 308b that amplify the output optical signal are provided on the SiPh chip 30c, the number of SOAs integrated on the InP modulator chip 40e can be limited to only two on the input side. Therefore, compared to the case where all four SOAs—the SOAs that amplify the input optical signals to the IQ modulators 403a and 403b, and the SOAs that amplify the output optical signals output from the IQ modulators 403a and 403b—are monolithically integrated on the InP modulator chip 40e, the number of SOAs integrated on the InP modulator chip 40e can be reduced by half, thereby improving the yield caused by SOAs.

[0081] [Manufacturing Method for Optical Modulator] Next, the process for assembling the optical modulator 1B (see Figures 5 and 6) of the HB-CDM for the optical transmitter according to the second embodiment will be described with reference to Figures 11 and 12A to 12E.

[0082] Generally, it is conceivable to assemble the InP modulator chip 40, SiPh chip 30, and fiber array 20 all at once and then house them in the package 10. However, in this method, when fixing the chip carrier 50 and InP modulator chip 40 on the TEC 90 using Ag paste or solder, the temperature exceeds 85°C. As a result, the resin 70 and 80, which are made of UV-curing adhesive, may loosen due to the heat generated during fixing with Ag paste, causing the optical coupling to shift. Furthermore, since the device has many optical connection points, there is a risk of damaging the connection points during transport and mounting. For example, it is possible to solve the above problems by using Ag paste with a curing temperature of less than 85°C. However, in order to avoid dependence on the curing temperature of the paste or solder, in this embodiment, the SiPh chip 30, which may integrate SOA, etc., and the fiber array 20 are connected first, and then connected to the InP modulator chip 40 within the package 10.

[0083] More specifically, as shown in Figure 12A, first, the SiPh chip 30 and the fiber array 20 are placed with a gap of 10 μm or less, aligned, and then a UV-curing adhesive is applied and the two are fixed by irradiation with ultraviolet light (UV) (Step 1 in Figure 11). In this way, the input waveguide 301 and the second output waveguide 304 of the SiPh chip 30 and the input optical fiber 201b and output optical fiber 201a of the fiber array 20 are butt-coupled to each other.

[0084] On the other hand, as shown in Figure 12B, the TEC90 and driver IC60 are fixed inside the package 10 (Step 2 in Figure 11).

[0085] Furthermore, as shown in Figure 12C, the InP modulator chip 40 is fixed onto the AlN chip carrier 50 using a thermally conductive paste (Step 3 in Figure 11). Then, as shown in Figure 12D, the InP modulator chip 40 mounted on the chip carrier 50 is mounted together with the chip carrier 50 onto the TEC 90 provided in the package 10, and after various wiring such as wire bonding is performed, processing such as UV ozone cleaning is carried out (Step 4 in Figure 11).

[0086] Next, as shown in Figure 12E, the SiPh chip 30 and fiber array 20 fixed in Step 1 are placed inside the package 10, and the fibers 201a and 201b are brought out through the pipe portions 101a and 101b of the package 10. Then, the SiPh chip 30 and the InP modulator chip 40 are aligned with a gap of 10 μm or less, and UV-curing adhesive is applied and fixed by UV irradiation. This butt-couples the input waveguide 401 and the two output waveguides 404a and 404b of the InP modulator chip 40 to the input waveguide 301 and the two first output waveguides 302a and 302b of the SiPh chip 30, respectively. At this time, before applying the UV-curing adhesive, the end face of the InP modulator chip 40 may be treated to make it hydrophilic by ozone cleaning or the like. Furthermore, if a component located below the resin 80, such as the upper surface of the TEC 90, or any plate-like component placed on the upper surface of the TEC 90, the outermost surface of that plate-like component may be pre-metallized to diffuse UV irradiation light. After that, a heat treatment is performed to further cure the adhesive (Step 5 in Figure 11).

[0087] Since both the SiPh chip 30 and the InP modulator chip 40 are incorporated into the package 10, UV irradiation cannot be performed from the back of the package 10. Therefore, if UV irradiation is performed only from the top, the UV light may not reach the bottom of the InP modulator chip 40 sufficiently, so heat treatment is performed to cure the adhesive. When performing this heat treatment, it is desirable to heat the chip to a temperature of 85°C or lower, which is within the operating and storage temperature range, so as not to cause the fixation by the UV-curing adhesive after fixing to shift.

[0088] Then, after wiring the SOA and MPD of the SiPh chip 30, the pipes 101a and 101b are sealed with solder or the like, the wires of the SOA and MPD terminals on the SiPh chip 30 are taken out into the package, and finally the lid is mounted on the main body of the package 10 and sealed by seam welding or the like (Step 6 in Figure 11).

[0089] As described above, by first connecting the SiPh chip 30 and the fiber array 20, and then mounting the InP modulator chip 40 inside the package 10, and then connecting the SiPh chip 30 and the InP modulator chip 40 inside the package 10, the mounting process can be simplified and the cost of the optical modulator can be reduced.

[0090] [Improved Alignment Accuracy] When connecting the InP modulator chip 40 and the SiPh chip 30, it is necessary to properly manage the pitch of the input and output waveguides. As a way to further improve alignment accuracy, for example, alignment marks such as triangular markers for positioning may be formed by etching near the SSC when the waveguide of the InP modulator chip 40 is processed.

[0091] Alignment marks are easier to recognize than waveguides, and if the alignment marks are highly accurate, the position can be adjusted with greater precision during the initial setup, which has advantages such as reducing the alignment time.

[0092] While metal patterns are commonly used as alignment marks, forming metal alignment marks at a different time than the waveguide processing results in positional misalignment due to photomask displacement, making them insufficient for alignment marks requiring high precision of 1 μm or less. Therefore, it is desirable to form alignment marks by etching simultaneously with waveguide processing.

[0093] Furthermore, as shown in Figure 13, the InP modulator chip 40f may be provided with monitor output waveguides 407a and 407b in addition to the waveguide connected to the SiPh chip 30f to improve alignment accuracy, and MPDs 309a and 309b may be provided on the SiPh chip 30f to receive the output light from these monitor output waveguides 407a and 407b, and the alignment may be performed with high precision by observing the output power of the MPDs 309a and 309b.

[0094] Here, the monitor output waveguides 407a and 407b can be realized by making the portion where the light passing through the IQ modulators 403a and 403b, respectively, combines into a 2x2 MMI 406a and 406b. In this case, it is preferable that the monitor output waveguides 407a and 407b are located on the upper and lower edge sides of the InP modulator chip 40f in Figure 13, rather than on the two output waveguides 404a and 404b of the InP modulator chip 40f. This is because the monitoring output waveguides 407a and 407b are located closer to the upper and lower edges than the two output waveguides 404a and 404b of the InP modulator chip 40f, making them more sensitive to the relative tilt and angular misalignment between the InP modulator chip 40f and the SiPh chip 30f. When the monitoring power of the MDPs 309a and 309b of the SiPh chip 30f is maximized, the two output waveguides 404a and 404b, located inside of it, are precisely aligned.

[0095] However, it is desirable that the monitor output waveguides 407a and 407b be formed at least 100 μm inward from the upper and lower edges of the InP modulator chip 40f in Figure 13. This is to prevent the monitor output waveguides 407a and 407b from being damaged and rendered unusable during the manufacturing process of the InP modulator chip 40f, such as when the wall is opened.

[0096] Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above. Various modifications to the configuration and details of the present invention can be made that will be understood by those skilled in the art within the scope of the present invention.

[0097] (Note) The following additional information is disclosed regarding the above embodiments.

[0098] (Note 1) A modulator chip in which an input waveguide for guiding an input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding each of the at least two modulated optical signals are integrally integrated on a semiconductor chip; a silicon photonics chip in which an input waveguide configured to guide the input optical signal, at least two first output waveguides for guiding each of the at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to combine the two modulated optical signals, and a second output waveguide configured to guide the combined optical signal are formed of silicon photonics; and a package housing the modulator chip and the silicon photonics chip, wherein the modulator chip and the silicon photonics chip are arranged within the package with a gap of 10 μm or less and connected using resin. An optical modulator in which the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

[0099] (Note 2) The optical modulator according to Note 1, further comprising a chip carrier on which the modulator chip is mounted, wherein the combined thickness of the modulator chip and the chip carrier is 600 μm or more, and the end face of the modulator chip facing the silicon photonics chip is located 50 μm or more toward the silicon photonics chip than the end face of the chip carrier facing the silicon photonics chip.

[0100] (Note 3) The optical modulator according to Note 1 or 2, wherein the modulator chip and the silicon photonics chip each have a rectangular parallelepiped shape, the input end of the input waveguide of the modulator chip and the output ends of the at least two output waveguides are aggregated at a first end face of the modulator chip, the output end of the input waveguide of the silicon photonics chip and the input ends of the at least two first output waveguides are aggregated at a first end face of the silicon photonics chip that faces the first end face of the modulator chip, the modulator chip further comprises a spot-size converter having a mode field diameter of 2.5 μm to 3.0 μm, which is integrated at the input end of the input waveguide and the output ends of the at least two output waveguides, respectively, and the silicon photonics chip further comprises a spot-size converter having a mode field diameter of 3.0 μm to 3.5 μm, which is integrated at the output end of the input waveguide and the input ends of the at least two first output waveguides, respectively.

[0101] (Note 4) The optical modulator according to Note 3, further comprising a fiber array including a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip, wherein the silicon photonics chip and the fiber array are arranged with a gap of 10 μm or less and connected using resin, the input end of the input waveguide and the output end of the second output waveguide are aggregated at a second end face of the silicon photonics chip facing the fiber array, the silicon photonics chip has a spot size converter having a mode field diameter of 3.5 μm to 4.0 μm, which is aggregated at the input end of the input waveguide and the output end of the second output waveguide, respectively, and the input waveguide and the second output waveguide of the silicon photonics chip are butt coupled to the plurality of optical fibers constituting the fiber array.

[0102] (Note 5) The optical modulator as described in Note 2, further comprising a thermoelectric cooler, wherein the modulator is an InP IQ modulator consisting of a plurality of Mach-Zehnder interferometers, and the chip carrier on which the modulator chip is mounted is formed of aluminum nitride and mounted on the thermoelectric cooler.

[0103] (Note 6) The optical modulator according to Note 1 or 2, wherein the silicon photonics chip further comprises at least two semiconductor optical amplifiers provided upstream of the multiplexer and configured to amplify the optical signals propagating through the at least two first output waveguides.

[0104] (Note 7) The optical modulator described in Note 6, further comprising a thermoelectric cooler, wherein the silicon photonics chip is mounted on the thermoelectric cooler.

[0105] (Note 8) A silicon photonics chip is formed from silicon photonics, comprising an input waveguide configured to guide an input optical signal, at least two first output waveguides each guiding at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to combine the two modulated optical signals, and a second output waveguide configured to guide the combined optical signal. A fiber array is also provided, which includes a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip, and these are arranged with a gap of 10 μm or less and connected using resin, thereby butt-coupling the input waveguide and the second output waveguide of the silicon photonics chip with the optical fibers of the fiber array. A thermoelectric cooler is provided inside the package. A method for manufacturing an optical modulator, comprising: mounting a modulator chip, which integrally integrates an input waveguide for guiding the input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding each of the at least two modulated optical signals, on a semiconductor chip on a chip carrier; mounting the chip carrier on which the modulator chip is mounted on a thermoelectric cooler; arranging the silicon photonics chip connected to the fiber array within the package with a gap of 10 μm or less and connecting them using resin; and butt coupling the input waveguide and the at least two output waveguides of the modulator chip with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

[0106] This invention can be used in optical modulators for optical communication.

[0107] 1A, 1B...Optical modulator, 10...Package, 20...Fiber array, 30, 30c, 30d, 30f...SiPh chip, 40, 40e, 40f...InP DP-IQ modulator chip, 50, 50a...chip carrier, 60...driver IC, 70, 80...resin, 90, 90c...TEC, 201a, 201b...optical fiber, 202...glass block, 301...input waveguide, 302a, 302b...first output waveguide, 303...PBC, 304...second output waveguide, 305...polarization rotator, 308a, 308b, 308c, 405a, 405b...SOA, 401...input waveguide, 402...MMI, 403a, 403b...IQ modulator, 404a, 404b...output waveguide.

Claims

1. A modulator chip in which an input waveguide for guiding an input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding each of the at least two modulated optical signals are integrally integrated on a semiconductor chip; a silicon photonics chip in which an input waveguide configured for guiding the input optical signal, at least two first output waveguides for guiding each of the at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to combine the two modulated optical signals, and a second output waveguide configured to guiding the combined optical signal are formed from silicon photonics; and a package housing the modulator chip and the silicon photonics chip, wherein the modulator chip and the silicon photonics chip are arranged within the package with a gap of 10 μm or less and connected using resin. An optical modulator in which the input waveguide and the at least two output waveguides of the modulator chip are butt-coupled with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

2. The optical modulator according to claim 1, further comprising a chip carrier on which the modulator chip is mounted, wherein the combined thickness of the modulator chip and the chip carrier is 600 μm or more, and the end face of the modulator chip facing the silicon photonics chip is located 50 μm or more toward the silicon photonics chip than the end face of the chip carrier facing the silicon photonics chip.

3. The optical modulator according to claim 1 or 2, wherein the modulator chip and the silicon photonics chip each have a rectangular parallelepiped shape, the input end of the input waveguide of the modulator chip and the output ends of the at least two output waveguides are aggregated at a first end face of the modulator chip, the output end of the input waveguide of the silicon photonics chip and the input ends of the at least two first output waveguides are aggregated at a first end face of the silicon photonics chip facing the first end face of the modulator chip, the modulator chip further comprises a spot-size converter having a mode field diameter of 2.5 μm to 3.0 μm, which is integrated at the input end of the input waveguide and the output ends of the at least two output waveguides, respectively, and the silicon photonics chip further comprises a spot-size converter having a mode field diameter of 3.0 μm to 3.5 μm, which is integrated at the output end of the input waveguide and the input ends of the at least two first output waveguides, respectively.

4. The optical modulator according to claim 3, further comprising a fiber array including a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip, wherein the silicon photonics chip and the fiber array are arranged with a gap of 10 μm or less and connected using resin, the input end of the input waveguide and the output end of the second output waveguide are aggregated at a second end face of the silicon photonics chip facing the fiber array, the silicon photonics chip has a spot size converter having a mode field diameter of 3.5 μm to 4.0 μm, which is aggregated at the input end of the input waveguide and the output end of the second output waveguide, respectively, and the input waveguide and the second output waveguide of the silicon photonics chip are butt coupled to the plurality of optical fibers constituting the fiber array.

5. The optical modulator according to claim 2, further comprising a thermoelectric cooler, wherein the modulator is an InP IQ modulator consisting of a plurality of Mach-Zehnder interferometers, and the chip carrier on which the modulator chip is mounted is formed of aluminum nitride and mounted on the thermoelectric cooler.

6. The optical modulator according to claim 1 or 2, wherein the silicon photonics chip further comprises at least two semiconductor optical amplifiers provided upstream of the multiplexer and configured to amplify optical signals propagating through the at least two first output waveguides.

7. The optical modulator according to claim 6, further comprising a thermoelectric cooler, wherein the silicon photonics chip is mounted on the thermoelectric cooler.

8. A silicon photonics chip is formed from silicon photonics, comprising an input waveguide configured to guide an input optical signal, at least two first output waveguides each guiding at least two modulated optical signals, a multiplexer connected to the at least two first output waveguides and configured to combine the at least two modulated optical signals, and a second output waveguide configured to guide the combined optical signal. A fiber array is also provided, comprising a plurality of optical fibers optically connected to the input waveguide and the second output waveguide of the silicon photonics chip, and these two are arranged with a gap of 10 μm or less and connected using resin, thereby butt-coupling the input waveguide and the second output waveguide of the silicon photonics chip with the optical fibers of the fiber array. A thermoelectric cooler is provided inside the package. A method for manufacturing an optical modulator, comprising: mounting a modulator chip, which integrally integrates an input waveguide for guiding the input optical signal, a modulator configured to modulate the input optical signal and output at least two modulated optical signals, and at least two output waveguides for guiding each of the at least two modulated optical signals, on a semiconductor chip on a chip carrier; mounting the chip carrier on which the modulator chip is mounted on a thermoelectric cooler; arranging the silicon photonics chip connected to the fiber array within the package with a gap of 10 μm or less and connecting them using resin; and butt coupling the input waveguide and the at least two output waveguides of the modulator chip with the input waveguide and the at least two first output waveguides of the silicon photonics chip, respectively.

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