Array substrate, display panel, and display device

Abstract

An array substrate, a display panel, and a display device. The array substrate comprises a base substrate (101); and a plurality of electrodes (102) located on the base substrate (101). The electrodes (102) include a first main electrode (M1), a second main electrode (M2), a plurality of first branch electrodes (B1), a plurality of second branch electrodes (B2), and a plurality of third branch electrodes (B3), wherein the plurality of first branch electrodes (B1) extend in a first direction (D) and are arranged in a second direction (Y), and the plurality of second branch electrodes (B2) extend in a third direction (D') and are arranged in the second direction (Y), the first direction (D), the second direction (Y) and the third direction (D') intersecting; the plurality of third branch electrodes (B3) extend in the first direction (D) and are arranged in the second direction (Y) on one side of the plurality of first branch electrodes (B1); the first main electrode (M1) is located between the column where the plurality of first branch electrodes (B1) are located and the column where the plurality of second branch electrodes (B2) are located, and the first main electrode (M1) is connected to the plurality of first branch electrodes (B1) and the plurality of second branch electrodes (B2); and the second main electrode (M2) is located on the side of the plurality of third branch electrodes (B3) away from the first main electrode (M1), and the second main electrode (M2) is connected to the plurality of third branch electrodes (B3). Thus, the problems of a large dark field at the edge, low light efficiency, and wire breakage caused by excessively long electrodes are solved.

Description

Array substrate, display panel and display device TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and particularly relates to an array substrate, a display panel and a display device. BACKGROUND

[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) has the characteristics of small volume, low power consumption, high image quality, no radiation and portability, and has been rapidly developed in recent years, and has gradually replaced the traditional Cathode Ray Tube display (CRT) and occupies a dominant position in the current flat panel display market. At present, TFT-LCD has been widely used in various large, medium and small size products, and almost covers the main electronic products in today's information society, such as liquid crystal televisions, high-definition digital televisions, computers (desktop and notebook), mobile phones, tablet computers, navigation instruments, vehicle-mounted displays, projection displays, video cameras, digital cameras, electronic watches, calculators, electronic instruments, instruments, public displays and virtual displays, etc.

[0003] SUMMARY

[0004] The array substrate, the display panel and the display device provided by the present disclosure have the following specific solutions.

[0005] In one aspect, the present disclosure provides an array substrate, comprising:

[0006] a substrate substrate;

[0007] a plurality of electrodes located on the substrate substrate; the electrodes comprise a first trunk electrode, a second trunk electrode, a plurality of first branch electrodes, a plurality of second branch electrodes and a plurality of third branch electrodes; wherein,

[0008] the plurality of first branch electrodes extend along a first direction and are arranged along a second direction;

[0009] the plurality of second branch electrodes extend along a third direction and are arranged along the second direction, and the first direction, the second direction and the third direction intersect;

[0010] the plurality of third branch electrodes extend along the first direction and are arranged along the second direction on one side of the plurality of first branch electrodes;

[0011] the first trunk electrode is located between the column where the plurality of first branch electrodes are located and the column where the plurality of second branch electrodes are located, and the first trunk electrode is connected with the plurality of first branch electrodes and the plurality of second branch electrodes.

[0012] The second stem electrode is located on a side of the plurality of third branch electrodes away from the first stem electrode, and the second stem electrode is connected with the plurality of third branch electrodes.

[0013] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the electrode further comprises a first common branch electrode, the first common branch electrode extends along the first direction between the plurality of first branch electrodes and the plurality of third branch electrodes, and the first common branch electrode is connected between the first stem electrode and the second stem electrode.

[0014] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the electrode further comprises a third stem electrode and a plurality of fourth branch electrodes; wherein,

[0015] The plurality of fourth branch electrodes extend along the third direction on a side of the plurality of second branch electrodes and are arranged along the second direction;

[0016] The third stem electrode is located on a side of the plurality of fourth branch electrodes away from the first stem electrode, and the third stem electrode is connected with the plurality of fourth branch electrodes.

[0017] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the electrode further comprises a second common branch electrode, the second common branch electrode extends along the third direction between the plurality of second branch electrodes and the plurality of fourth branch electrodes, and the second common branch electrode is connected between the first stem electrode and the third stem electrode.

[0018] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the plurality of first branch electrodes and the plurality of second branch electrodes are connected with the same first stem electrode.

[0019] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the plurality of first branch electrodes and the plurality of second branch electrodes are arranged along a fourth direction, the plurality of third branch electrodes and the plurality of fourth branch electrodes are arranged along the fourth direction, and the fourth direction is substantially perpendicular to the second direction.

[0020] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, a transistor is further included.

[0021] The electrode further comprises a block electrode located at an end of the second stem electrode away from the first common branch electrode, and the block electrode is electrically connected with a first pole of the transistor.

[0022] In some embodiments, the array substrate provided by the embodiments of the present disclosure further comprises a plurality of data lines, and the second electrode of the transistor is electrically connected with the data line.

[0023] The second electrode of the transistor is of an "m-type", the opening of the "m-type" faces the electrode corresponding to the transistor, the first electrode of the transistor comprises two sub-electrodes extending from the opening of the "m-type", and the two sub-electrodes converge at the block electrode.

[0024] In some embodiments, the array substrate provided by the embodiments of the present disclosure further comprises a plurality of common electrode lines, a plurality of switching electrodes and a plurality of common electrodes.

[0025] The electrode comprises an avoiding structure at the side corner where the third stem electrode is located, and the common electrode line is electrically connected with the common electrode through the switching electrode in the area where the avoiding structure is located.

[0026] In some embodiments, the array substrate provided by the embodiments of the present disclosure further comprises a fourth stem electrode, a third common branch electrode, a fourth common branch electrode, a plurality of fifth branch electrodes and a plurality of sixth branch electrodes; wherein,

[0027] The third common branch electrode extends along the first direction on the side of the plurality of third branch electrodes away from the first common branch electrode, and the third common branch electrode is connected between the second stem electrode and the fourth stem electrode.

[0028] On the side of the third common branch electrode away from the plurality of third branch electrodes, the plurality of fifth branch electrodes extend along the first direction and are arranged along the second direction.

[0029] The fourth common branch electrode extends along the third direction on the side of the plurality of fourth branch electrodes away from the second common branch electrode, and the fourth common branch electrode is connected between the third stem electrode and the fourth stem electrode.

[0030] On the side of the fourth common branch electrode away from the plurality of fourth branch electrodes, the plurality of sixth branch electrodes extend along the third direction and are arranged along the second direction.

[0031] The fourth stem electrode is located between the plurality of fifth branch electrodes and the plurality of sixth branch electrodes, and the plurality of fifth branch electrodes are electrically connected with the plurality of sixth branch electrodes through the fourth stem electrode.

[0032] In some embodiments, the array substrate provided by the embodiments of the present disclosure further comprises a fourth stem electrode, a third common branch electrode, a fourth common branch electrode, a plurality of fifth branch electrodes and a plurality of sixth branch electrodes; wherein,

[0033] The line width of the third common branch electrode, the line width of the fifth branch electrode, and the line width of the first branch electrode are substantially the same;

[0034] The line width of the fourth common branch electrode, the line width of the sixth branch electrode, and the line width of the second branch electrode are substantially the same;

[0035] The distance between adjacent fifth branch electrodes, the distance between the third common branch electrode and adjacent third branch electrodes, and the distance between the third common branch electrode and adjacent fifth branch electrodes are substantially equal to the distance between adjacent first branch electrodes;

[0036] The distance between adjacent sixth branch electrodes, the distance between the fourth common branch electrode and adjacent fourth branch electrodes, and the distance between the fourth common branch electrode and adjacent sixth branch electrodes are substantially equal to the distance between adjacent second branch electrodes.

[0037] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the plurality of first branch electrodes and the plurality of fourth branch electrodes are arranged along a fourth direction, the plurality of third branch electrodes and the plurality of second branch electrodes are arranged along the fourth direction, and the first trunk electrode connected to the plurality of first branch electrodes and the first trunk electrode connected to the plurality of second branch electrodes are arranged in a staggered manner along the fourth direction, the fourth direction being substantially perpendicular to the second direction.

[0038] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the plurality of first branch electrodes and the plurality of second branch electrodes are connected to different first trunk electrodes;

[0039] The third branch electrode farthest from the first common branch electrode is connected to the fourth branch electrode farthest from the second common branch electrode.

[0040] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the line width of the second trunk electrode, the line width of the third trunk electrode, and the line width of the first trunk electrode are substantially the same;

[0041] The line width of the first common branch electrode, the line width of the third branch electrode, and the line width of the first branch electrode are substantially the same;

[0042] The line width of the second common branch electrode, the line width of the fourth branch electrode, and the line width of the second branch electrode are substantially the same;

[0043] The interval between adjacent third branch electrodes, the interval between the first common branch electrode and adjacent first branch electrodes, and the interval between the first common branch electrode and adjacent third branch electrodes are substantially equal to the interval between adjacent first branch electrodes.

[0044] The interval between adjacent fourth branch electrodes, the interval between the second common branch electrode and adjacent second branch electrodes, and the interval between the second common branch electrode and adjacent fourth branch electrodes are substantially equal to the interval between adjacent second branch electrodes.

[0045] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the plurality of first branch electrodes and the plurality of second branch electrodes are symmetric about a central axis of the electrodes along the second direction.

[0046] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the included angle between the first branch electrode and the central axis of the electrodes along the second direction is not equal to the included angle between the second branch electrode and the central axis of the electrodes along the second direction.

[0047] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the included angle between the first branch electrode and the central axis of the electrodes along the second direction and the included angle between the second branch electrode and the central axis of the electrodes along the second direction are both 5°-15°.

[0048] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the line width of the first branch electrode is substantially the same as the line width of the second branch electrode, and the interval between adjacent first branch electrodes is substantially the same as the interval between adjacent second branch electrodes.

[0049] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the line width of the first main stem electrode is 1.5 μm-4 μm, the line width of the first branch electrode is 2 μm-6 μm, and the interval between adjacent first branch electrodes is 2 μm-6 μm.

[0050] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the gate lines and the data lines are arranged in different layers and cross each other.

[0051] The ratio of the size of the electrode in the extension direction of the gate line to the size of the electrode in the extension direction of the data line is (0.8-1.2):1, or 1:(0.8-1.2).

[0052] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the gate lines and the data lines are arranged in different layers and cross each other, and the second direction is the extension direction of the gate line or the extension direction of the data line.

[0053] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the electrode is a pixel electrode.

[0054] In another aspect, the embodiments of the present disclosure provide an array substrate, comprising:

[0055] a substrate substrate;

[0056] a plurality of electrodes on the substrate substrate; the electrodes comprise a first trunk electrode, a plurality of first branch electrodes and a plurality of second branch electrodes; wherein,

[0057] the plurality of first branch electrodes extend along a first direction and are arranged along a second direction;

[0058] the plurality of second branch electrodes extend along a third direction and are arranged along the second direction, and the first direction, the second direction and the third direction intersect;

[0059] the first trunk electrode is located between the column where the plurality of first branch electrodes are located and the column where the plurality of second branch electrodes are located, and the first trunk electrode is connected with the plurality of first branch electrodes and the plurality of second branch electrodes;

[0060] the angle between the first branch electrode and the central axis of the electrode along the second direction is not equal to the angle between the second branch electrode and the central axis of the electrode along the second direction.

[0061] In another aspect, the embodiments of the present disclosure provide a display panel, comprising an array substrate and a counter substrate oppositely arranged, wherein the array substrate is the above-mentioned array substrate provided by the embodiments of the present disclosure.

[0062] In another aspect, the embodiments of the present disclosure provide a display device, comprising the above-mentioned display panel provided by the embodiments of the present disclosure, and a backlight module located on the light incident side of the display panel, wherein the backlight module comprises red lamp beads, green lamp beads and blue lamp beads. BRIEF DESCRIPTION OF DRAWINGS

[0063] FIG. 1 is a schematic structural diagram of a "convex" electrode provided by the embodiments of the present disclosure;

[0064] FIG. 2 is a layout of the electrode region shown in FIG. 1 defined by the gate lines and the data lines;

[0065] FIG. 3 is a layout of the gate metal layer in FIG. 2;

[0066] FIG. 4 is a layout of the active layer in FIG. 2;

[0067] FIG. 5 is a layout of the source-drain metal layer in FIG. 2;

[0068] Figure 6 is the layout of the via layer in Figure 2;

[0069] Figure 7 is the layout of the common electrode layer in Figure 2;

[0070] Figure 8 is the layout of the electrode layer in Figure 2;

[0071] Figure 9 is a schematic structural diagram of the "double horse-shaped" electrode provided by the embodiment of the present disclosure;

[0072] Figure 10 is a schematic structural diagram of the "wan-shaped" electrode provided by the embodiment of the present disclosure;

[0073] Figure 11 is a schematic structural diagram of the "zhong-shaped" electrode provided by the embodiment of the present disclosure;

[0074] Figure 12 is another schematic structural diagram of the "convex-shaped" electrode provided by the embodiment of the present disclosure;

[0075] Figure 13 is another schematic structural diagram of the "convex-shaped" electrode provided by the embodiment of the present disclosure;

[0076] Figure 14 is a schematic structural diagram of the "feng-shaped" electrode provided by the embodiment of the present disclosure;

[0077] Figure 15 is a schematic structural diagram of the "fishbone-shaped" electrode provided by the embodiment of the present disclosure;

[0078] Figure 16 is another schematic structural diagram of the "feng-shaped" electrode provided by the embodiment of the present disclosure;

[0079] Figure 17 is a schematic structural diagram of the display panel provided by the embodiment of the present disclosure;

[0080] Figure 18 is a schematic structural diagram of the display device provided by the embodiment of the present disclosure. Detailed implementation manners

[0081] For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the following will be described with reference to the drawings of the embodiments of the present disclosure. In the drawings, the thicknesses of layers, films, panels, regions and the like are exaggerated for clarity. In the present disclosure, example embodiments are described with reference to cross-sectional views that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments described in the present disclosure are not to be construed as being limited to the particular shapes of regions as illustrated but are to include deviations in shapes that result from, for example, manufacturing. For example, an area illustrated or described as flat can typically have rough and / or nonlinear features; an illustrated sharp angle can be rounded, etc. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region and are not reflective of the true scale or proportions of a region. Like numbers refer to like or similar elements throughout.

[0082] Unless otherwise defined, technical terms or scientific terms used herein shall have the same meaning as is commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first", "second", and similar terms do not denote any order, quantity, or importance, but are used to distinguish one element from another, and the terms "comprises", "comprising", "includes", "including" and the like can be used herein and mean including but not limited to as set out herein. The terms "connected", "coupled", and the like, can be used herein and mean one or more elements or components connected or coupled at least indirectly together, whether connected or coupled directly together or connected or coupled indirectly together, via an intervening element or intervening components. The terms "inner", "outer", "upper", "lower", and the like can be used herein and mean relative positions for the purpose of illustration only, and can be reversed when the positions of the described objects are changed.

[0083] In the following description, when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on the other element or layer, or be directly connected to the other element or layer, or intervening elements or layers can be present. When an element or layer is referred to as being "on one side of" another element or layer, it can be directly on the side of the other element or layer, or be directly connected to the other element or layer, or intervening elements or layers can be present. When an element or layer is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. The term "and / or" includes any and all combinations of one or more of the associated listed items. The various embodiments of the present disclosure can be combined with each other, without conflict, if not incompatible.

[0084] Field-Sequential Color LCD is a kind of LCD which uses three color backlights to light up in sequence, and the liquid crystal screen controls the color and brightness of the light to realize the additive color mixing in time, without color filter film, the number of pixels is 1 / 3 of the ordinary transmissive LCD, and it is easier to realize high capacity and large screen display, and it is possible to become the development trend of LCD, and its color gamut and brightness are far more than the previous liquid crystal television. The delicate skin color, moist green leaves and vast scenery in the picture can produce a sense of being in the picture. The panel production of the filmless technology will bring a revolutionary impact, and it is the most important application of LED backlight in the field of LCD. In addition to the cost reduction, the simplification of the process procedure also plays an important role in reducing the related costs (production and manpower, etc.) and improving the production efficiency.

[0085] In some embodiments, the pixel of the field-sequential color LCD can be combined by the RGB sub-pixels of the conventional LCD including the color film, but the inventors find that in such a pixel structure, the frame body is connected around the slit electrode, which causes the edge dark field of the pixel structure to be large and the light efficiency to be poor, and because the single pixel is large, the single strip electrode of the slit electrode contained in the pixel is too long, and the risk of disconnection is large.

[0086] In order to at least improve the above technical problems, the array substrate provided by the embodiments of the present disclosure, Fig. 1 is a structure schematic diagram of a "Huangzi type" electrode provided by the embodiments of the present disclosure, Fig. 2 is a layout of the electrode area shown in Fig. 1 defined by the gate line and the data line, Fig. 3 is a layout of the gate metal layer in Fig. 2, Fig. 4 is a layout of the active layer in Fig. 2, Fig. 5 is a layout of the source-drain metal layer in Fig. 2, Fig. 6 is a layout of the layer where the via is located in Fig. 2, Fig. 7 is a layout of the layer where the common electrode is located in Fig. 2, Fig. 8 is a layout of the layer where the electrode is located in Fig. 2, Fig. 9 is a structure schematic diagram of a "double Huangzi type" electrode provided by the embodiments of the present disclosure, Fig. 10 is a structure schematic diagram of a "Hunzi type" electrode provided by the embodiments of the present disclosure, Fig. 11 is a structure schematic diagram of a "Zhongzi type" electrode provided by the embodiments of the present disclosure, Fig. 12 is another structure schematic diagram of a "Huangzi type" electrode provided by the embodiments of the present disclosure, and Fig. 13 is another structure schematic diagram of a "Huangzi type" electrode provided by the embodiments of the present disclosure. As shown in Fig. 1, Fig. 8 to Fig. 13, the array substrate provided by the embodiments of the present disclosure can include:

[0087] The substrate 101 can be a substrate allowing visible light to pass through, for example, a glass, quartz, plastic or the like.

[0088] A plurality of electrodes 102 are located on the substrate 101, for example, the plurality of electrodes 102 are arranged in an array on the substrate 101; the material of the electrode 102 can include at least one transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), etc.

[0089] In some embodiments, the electrode 102 can include a first main electrode M1, a second main electrode M2, a plurality of first branch electrodes B1, a plurality of second branch electrodes B2, and a plurality of third branch electrodes B3; wherein the plurality of first branch electrodes B1 extend along a first direction D and are arranged along a second direction Y, and the second direction Y is optionally the extension direction of the gate line 108 or the extension direction of the data line 104; the plurality of second branch electrodes B2 extend along a third direction D' and are arranged along the second direction Y, and the first direction D, the second direction Y, and the third direction D' intersect; the plurality of third branch electrodes B3 extend along the first direction D on one side of the plurality of first branch electrodes B1 and are arranged along the second direction Y; the first main electrode M1 is located between the column where the plurality of first branch electrodes B1 are located and the column where the plurality of second branch electrodes B2 are located, and the first main electrode M1 is connected to the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2; the second main electrode M2 is located on the side of the plurality of third branch electrodes B3 away from the first main electrode M1, and the second main electrode M2 is connected to the plurality of third branch electrodes B3.

[0090] In the array substrate provided in the embodiments of the present disclosure, the longer strip-shaped electrode in the related slit electrode is segmented into a first branch electrode B1 and a second branch electrode B2, thereby reducing the length and reducing the risk of disconnection; the third branch electrode B3 arranged in the same row as the first branch electrode B1 is also shorter, and the risk of disconnection is also lower; at the same time, the present disclosure provides a first main electrode M1 between the column where the first branch electrode B1 is located and the column where the second branch electrode B2 is located, and the first main electrode M1 is connected to the first branch electrode B1 and the second branch electrode B2, thereby ensuring the electrical connection relationship of the first branch electrode B1 and the second branch electrode B2, so that the electrical connection of the first branch electrode B1 and the second branch electrode B2 is realized without setting a frame around the first branch electrode B1 and the second branch electrode B2, thereby reducing the edge dark field caused by the frame and improving the light efficiency.

[0091] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 1, FIG. 8 to FIG. 13, the array substrate can further include a first common branch electrode S1, a second common branch electrode S2, a plurality of third branch electrodes B3 and a plurality of fourth branch electrodes B4; the first common branch electrode S1 extends along the first direction D between the plurality of first branch electrodes B1 and the plurality of third branch electrodes B3, and the first common branch electrode S1 is connected between the first stem electrode M1 and the second stem electrode M2; the second common branch electrode S2 extends along the third direction D', and the second common branch electrode S2 is connected between the first stem electrode M1 and the third stem electrode M3; on the side of the second common branch electrode S2 away from the plurality of second branch electrodes B2, the plurality of fourth branch electrodes B4 extend along the third direction D' and are arranged along the second direction Y; on the side of the central axis MN of the electrode 102 away from the second direction Y, the plurality of fourth branch electrodes B4 are connected to the third stem electrode M3.

[0092] The introduction of the first stem electrode M1 will cause the electric field near it to be disturbed to some extent and dark lines to appear. The present disclosure provides the second stem electrode M2 and / or the third stem electrode M3 on the part of the edge of the electrode 102, which can well balance the small edge dark field and the small middle dark field, ensure the overall light efficiency of the pixel, and improve the overall transmittance by 5% to 20% compared with the LCD with a color film. Moreover, the third branch electrode B3 connected to the second stem electrode M2 and the fourth branch electrode B4 connected to the third stem electrode M3 are disconnected in the middle of the pixel, so that the length of the third branch electrode B3 and the fourth branch electrode B4 is smaller than that of the strip-shaped electrode in the related slit electrode, thereby reducing the risk of disconnection.

[0093] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 1, FIG. 8, FIG. 10 to FIG. 13, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 can be connected to the same first stem electrode M1. Alternatively, as shown in FIG. 9, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 can be connected to different first stem electrodes M1. Optionally, in FIG. 10, the first stem electrode M1 connected to the plurality of first branch electrodes B1 and the first stem electrode M1 connected to the plurality of second branch electrodes B2 are arranged in a staggered manner along the fourth direction X, and the fourth direction X can be substantially perpendicular to the second direction Y. Optionally, the second direction Y is the extension direction of the data line 104, and the fourth direction X is the extension direction of the gate line 108, or the second direction Y is the extension direction of the gate line 108, and the fourth direction X is the extension direction of the data line 104. Due to the limitation of process conditions or the influence of other factors such as measurement, the "substantially perpendicular" of the present disclosure can be exactly perpendicular, or there can be some deviation (for example, with a deviation of ±5). Therefore, as long as the "substantially perpendicular" relationship between the related features meets the error allowance, it belongs to the protection scope of the present disclosure.

[0094] Continuing to refer to FIGS. 1, 8, 10-13, the plurality of first branch electrodes B1, the plurality of second branch electrodes B2, the first main trunk electrode M1, the first common branch electrode S1, the second main trunk electrode M2, the plurality of third branch electrodes B3, the second common branch electrode S2, the third main trunk electrode M3, and the plurality of fourth branch electrodes B4 constitute an electrically conductive electrode 102. In order to enable the parts of the electrode 102 shown in FIG. 9 to be electrically conductive while minimizing the risk of disconnection, the present disclosure provides that the third branch electrode B3 farthest from the first common branch electrode S1 is connected to the fourth branch electrode B4 farthest from the second common branch electrode S2. Since FIGS. 1, 8, 11-13 are themselves electrically conductive electrodes 102, in FIGS. 1, 8, 11-13, the third branch electrode B3 farthest from the first common branch electrode S1 can or can not be connected to the fourth branch electrode B4 farthest from the second common branch electrode S2, which is not limited by the present disclosure. The third branch electrode B3 and the fourth branch electrode B4 of FIG. 10 are staggered along the second direction Y, so they are not easily connected.

[0095] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 1, 8, 9, 11-13, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 are arranged along the fourth direction X, the plurality of third branch electrodes B3 and the plurality of fourth branch electrodes B4 are arranged along the fourth direction X, and the first main trunk electrode M1 is a straight line type electrode between the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2. In other embodiments, as shown in FIG. 10, the plurality of first branch electrodes B1 and the plurality of fourth branch electrodes B4 are arranged along the fourth direction X, the plurality of third branch electrodes B3 and the plurality of second branch electrodes B2 are arranged along the fourth direction X, the plurality of first branch electrodes B1 and the plurality of third branch electrodes B3 constitute a column of branch electrodes, the plurality of second branch electrodes B2 and the plurality of fourth branch electrodes B4 constitute another column of branch electrodes, and the first main trunk electrode M1 is a broken line type electrode between the two columns of branch electrodes.

[0096] In some embodiments, as shown in FIG. 1, FIG. 8 to FIG. 12, the first common branch electrode S1 of the present disclosure can be an electrode structure with a line width substantially the same as that of the first branch electrode B1, and the second common branch electrode S2 can also be an electrode structure with a line width substantially the same as that of the second branch electrode B2. In other embodiments, as shown in FIG. 13, the first common branch electrode S1 of the present disclosure can also be two adjacent electrode structures with a line width substantially the same as that of the first branch electrode B1, and the two first common branch electrodes S1 and the first trunk electrode M1 and the second trunk electrode M2 form a closed loop structure. In some embodiments, the gap between the two first common branch electrodes S1 shown in FIG. 13 can be filled with electrode material to form a thicker branch electrode structure to prevent disconnection. As shown in FIG. 13, the second common branch electrode S2 of the present disclosure can be two adjacent electrode structures with a line width substantially the same as that of the second branch electrode B2, and the two second common branch electrodes S2 and the first trunk electrode M1 and the third trunk electrode M3 form a closed loop structure. In some embodiments, the gap between the two second common branch electrodes S2 shown in FIG. 13 can be filled with electrode material to form a thicker branch electrode structure to prevent disconnection. Due to the limitation of process conditions or the influence of other factors such as measurement, the "substantially the same" of the present disclosure can be exactly the same or can have some deviation (for example, with a deviation of ±10%). Therefore, as long as the error is allowed, the relationship between the related features "substantially the same" belongs to the protection scope of the present disclosure.

[0097] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 2 to FIG. 8, a transistor 103 can also be included. Optionally, the electrode 102 is a pixel electrode, and the electrode 102 further includes a block electrode P located at the end of the second trunk electrode M2 away from the first common branch electrode S1. The block electrode P is electrically connected to the first electrode d of the transistor 103. Specifically, the block electrode P and the first electrode d of the transistor 103 are electrically connected through a first via V1 penetrating the insulating layer between them. The block electrode P covers the first via V1, so that the contact area between the electrode 102 and the transistor 103 is larger, and the electrical connection effect is better.

[0098] It should be noted that the electrode 102 of the present disclosure can also be a common electrode, and in the case that the electrode 102 is a common electrode, a connection structure is arranged between adjacent common electrodes, so that the common electrodes are connected as a whole. The present disclosure is illustrated by taking the electrode 102 as a pixel electrode as an example.

[0099] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 2-8, a plurality of data lines 104 can also be included, and the second pole s of the transistor 103 can be electrically connected with the data lines 104. Optionally, the second pole s of the transistor 103 is of an "m-type", the opening of the "m-type" faces the electrode 102 corresponding to the transistor 103, the first pole d of the transistor 101 includes two sub-electrodes extending from the opening of the "m-type", and the two sub-electrodes converge to the block electrode P. The transistor 103 of this structure has a larger current output capacity, which is beneficial to improve the pixel charging rate.

[0100] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 2-8, a plurality of common electrode lines 105, a plurality of transfer electrodes 106 and a plurality of common electrodes 107 can also be included. Optionally, the common electrode lines 105 are arranged in the same layer and of the same material as the gate lines 108, the common electrode lines 105 and the gate lines 108 are both of a smaller line width at the intersection with the data lines 104, and the data lines 104 are also of a narrower line width at the intersection with the common electrode lines 105 and the gate lines 108, so as to reduce the parasitic capacitance between the data lines 104 and the common electrode lines 105 and the gate lines 108. In some embodiments, the orthogonal projection of the common electrode lines 105 on the substrate 101 overlaps with the orthogonal projection of the edge of the electrode 102 at the end of the first stem electrode M1 on the substrate 101. The transfer electrodes 106 are arranged in the same layer and of the same material as the electrode 102, and the orthogonal projection of the transfer electrodes 106 on the substrate 101 extends across the orthogonal projection of the gate lines 108 on the substrate 101 along the extension direction of the data lines 104. The electrode 102 can include an avoiding structure C at the side corner where the third stem electrode M3 is located, the orthogonal projection of the common electrode 107 on the substrate 101 can cover the orthogonal projection of the slit and the avoiding structure C of the electrode 102 on the substrate 101, and the orthogonal projection of the common electrode 107 on the substrate 101 does not overlap with the orthogonal projection of the block electrode P on the substrate 101. The common electrode lines 105 can be electrically connected with the common electrodes 107 through the transfer electrodes 106 in the area where the avoiding structure C is located, so as to improve the uniformity of the common voltage.

[0101] In some embodiments, as shown in FIGS. 2-8, the common electrode 107 and the transfer electrode 106 are electrically connected through a second via V2 penetrating the insulating layer therebetween, and the common electrode line 105 and the transfer electrode 106 are electrically connected through a third via V3 penetrating the insulating layer therebetween. In addition, the present disclosure can provide a connecting electrode 109 at the second via V2 corresponding to the layer where the gate line 108 is located, so that the common electrode 107, the connecting electrode 109 and the transfer electrode 106 are sequentially electrically connected, thereby reducing the contact resistance between the transfer electrode 106 and the common electrode 107 and enhancing the electrical connection effect. The common electrode line 105 can be provided with a widened portion 106' at the third via V3 to improve the electrical connection effect with the transfer electrode 106.

[0102] In some embodiments, in the array substrate provided in the embodiments of the present disclosure, as shown in FIG. 11, the electrode 102 can further include a fourth trunk electrode M4, a third common branch electrode S3, a fourth common branch electrode S4, a plurality of fifth branch electrodes B5 and a plurality of sixth branch electrodes B6; wherein the third common branch electrode S3 can extend along the first direction D on the side of the plurality of third branch electrodes B3 away from the first common branch electrode S1, and the third common branch electrode S3 is connected between the second trunk electrode M2 and the fourth trunk electrode M4; on the side of the third common branch electrode S3 away from the plurality of third branch electrodes B3, the plurality of fifth branch electrodes B5 extend along the first direction D and are arranged along the second direction Y; the fourth common branch electrode S4 extends along the third direction D' on the side of the plurality of fourth branch electrodes B4 away from the second common branch electrode S2, and the fourth common branch electrode S4 is connected between the third trunk electrode M3 and the fourth trunk electrode M4; on the side of the fourth common branch electrode S4 away from the plurality of fourth branch electrodes B4, the plurality of sixth branch electrodes B6 extend along the third direction D' and are arranged along the second direction Y; the fourth trunk electrode M4 is located between the plurality of fifth branch electrodes B5 and the plurality of sixth branch electrodes B6, and the plurality of fifth branch electrodes B5 are electrically connected with the plurality of sixth branch electrodes B6 through the fourth trunk electrode M4. In this way, both the edge dark field and the middle dark field can be small, achieving super-high transmittance, while helping to reduce the risk of disconnection.

[0103] In some embodiments, in the array substrate provided in the embodiments of the present disclosure, to achieve better light efficiency and reduce the risk of disconnection, the line width of the second main electrode M2, the line width of the third main electrode M3, and the line width of the fourth main electrode M4 can be substantially the same as the line width of the first main electrode M1, for example, 1.5 μm to 4 μm, and can be specifically 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, etc. The line width of the first common branch electrode S1, the line width of the second common branch electrode S2, the line width of the third common branch electrode S3, the line width of the fourth common branch electrode S4, the line width of the second branch electrode B2, the line width of the third branch electrode B3, the line width of the fourth branch electrode B4, the line width of the fifth branch electrode B5, and the line width of the sixth branch electrode B6 are substantially the same as the line width of the first branch electrode B1, for example, 2 μm to 6 μm, and can be specifically 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, etc. The distance between adjacent second branch electrodes B2, the distance between adjacent third branch electrodes B3, the distance between adjacent fourth branch electrodes B4, the distance between adjacent fifth branch electrodes B5, the distance between adjacent sixth branch electrodes B6, the distance between the first common branch electrode S1 and the adjacent first branch electrode B1, the distance between the first common branch electrode S1 and the adjacent third branch electrode B3, the distance between the second common branch electrode S2 and the adjacent second branch electrode B2, the distance between the second common branch electrode S2 and the adjacent fourth branch electrode B4, the distance between the third common branch electrode S3 and the adjacent third branch electrode B3, the distance between the third common branch electrode S3 and the adjacent fifth branch electrode B5, the distance between the fourth common branch electrode S4 and the adjacent fourth branch electrode B4, the distance between the fourth common branch electrode S4 and the adjacent sixth branch electrode B6, and the distance between the adjacent first branch electrode B1 are substantially equal, for example, 2 μm to 6 μm, and can be specifically 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, etc.

[0104] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 1, FIG. 8 to FIG. 11 and FIG. 13, in order to reduce the risk of left-right color cast and achieve true color, the electrode 102 of the present disclosure can be a left-right symmetrical structure. Specifically, in FIG. 1, FIG. 8, FIG. 9 and FIG. 13, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 are symmetrical about the center axis MN of the electrode 102 along the second direction Y, and the plurality of third branch electrodes B3 and the plurality of fourth branch electrodes B4 are symmetrical about the center axis MN; in FIG. 10, the plurality of first branch electrodes B1 and the plurality of fourth branch electrodes B4 are symmetrical about the center axis MN, and the plurality of third branch electrodes B3 and the plurality of second branch electrodes B2 are symmetrical about the center axis MN; in FIG. 11, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 are symmetrical about the center axis MN, and the plurality of third branch electrodes B3 and the plurality of fourth branch electrodes B4 are symmetrical about the center axis MN, and the plurality of fifth branch electrodes B5 and the plurality of sixth branch electrodes B6 are symmetrical about the center axis MN.

[0105] In the field sequential color LCD product, since one color picture is divided into RGB three pictures in time sequence, and then those pictures are switched in high speed to constitute one color picture, the key technology of realizing field sequential display is to greatly improve the response speed of the present LCD. Considering the gray scale response time (GTG) optimization, the present disclosure can set the branch electrodes on the left and right sides to be asymmetric structures, so that the included angle of the first branch electrode B1 and the center axis MN of the electrode 102 along the second direction Y is not equal to the included angle of the second branch electrode B2 and the center axis MN of the electrode 102 along the second direction Y. In some embodiments, the included angle of the first branch electrode B1 and the center axis MN, and the included angle of the second branch electrode B2 and the center axis MN are both 5°-15°, for example, the included angle of the first branch electrode B1 and the center axis MN is 7°, and the included angle of the second branch electrode B2 and the center axis MN is 11°. Because the branch electrode with the extension direction in the range of 5°-15° increases the component of the electric field acting on the liquid crystal along the deflection direction of the liquid crystal, the liquid crystal is increased by the electric field force, and the deflection is accelerated, so the GTG is reduced, the super-fast response is realized, and compared with the LCD with a color film, the response speed of the present disclosure is improved by 10%-20%. After the response speed of the LCD is improved, the backlight duty cycle is improved, the brightness of the whole machine is improved, and the power consumption of the whole machine can be greatly reduced.

[0106] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the ratio of the size of the electrode 102 in the extension direction of the gate line 108 to the size of the electrode 102 in the extension direction of the data line 104 can be (0.8-1.2):1 or 1:(0.8-1.2), which is different from the ratio of 1 / 3 of the size of the conventional pixel in the extension direction of the gate line 108 to the size in the extension direction of the data line 104.

[0107] In some embodiments, FIG. 14 shows a structural schematic diagram of a "H" shaped electrode provided by the embodiments of the present disclosure. As can be seen from FIG. 14, the electrode 102 of the embodiments of the present disclosure can only include the first main electrode M1, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 which are symmetrically arranged on the left and right sides of the first main electrode M1, and the extension direction (for example, 7°) of the first branch electrode B1 can be different from the extension direction (for example, 11°) of the second branch electrode B2. Of course, in some embodiments, the plurality of first branch electrodes B1 and the plurality of second branch electrodes B2 can also be symmetrically arranged in the electrode 102, for example, the "fishbone" structure shown in FIG. 15 which is symmetrically arranged up and down, and the "H" structure shown in FIG. 16 which is symmetrically arranged left and right.

[0108] Based on the same inventive concept, the embodiments of the present disclosure provide a display panel, as shown in FIG. 17, which includes an array substrate 001 and a counter substrate 002 which are oppositely arranged, wherein the array substrate 001 is the above-mentioned array substrate 001 provided by the embodiments of the present disclosure. Since the problem solving principle of the display panel is similar to the problem solving principle of the above-mentioned array substrate, the implementation of the display panel provided by the embodiments of the present disclosure can be referred to the implementation of the above-mentioned array substrate provided by the embodiments of the present disclosure, and the repeated parts will not be described herein again.

[0109] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in FIG. 17, a liquid crystal layer 003 can also be arranged between the array substrate and the counter substrate, a first polarizer 004 arranged on the side of the array substrate 001 away from the counter substrate 002, and a second polarizer 005 arranged on the side of the counter substrate 002 away from the array substrate 001, and the polarization direction of the first polarizer 004 and the polarization direction of the second polarizer 005 are perpendicular to each other. It should be understood by those skilled in the art that other indispensable components in the display panel are also understood, which will not be described herein again and should not be regarded as a limitation to the present disclosure.

[0110] Based on the same inventive concept, the embodiments of the present disclosure provide a display device, as shown in FIG. 18, which includes the above-mentioned display panel PNL provided by the embodiments of the present disclosure, and a backlight module BLU arranged on the light entering side of the display panel PNL. The backlight module BLU includes red light beads, green light beads and blue light beads, and the red light beads, the green light beads and the blue light beads are sequentially lighted at different time periods of a frame time to realize one frame of color picture display. In some embodiments, the backlight module BLU is a side-in backlight module, and the side-in backlight module can further include a reflective sheet, a light guide plate, a diffusion sheet, a prism group and the like which are arranged in a stacked manner. The light bar composed of the red light beads, the green light beads and the blue light beads can be located on one side of the light guide plate in the thickness direction. The red light beads, the green light beads and the blue light beads can be light emitting diodes (LEDs), such as micro light emitting diodes (Mini LED, Micro LED, etc.).

[0111] In some embodiments, the display device provided by the embodiments of the present disclosure can be a projector, a 3D printer, a virtual reality device, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigation device, a smart watch, a fitness wristband, a personal digital assistant, or any product or component having a display function. Optionally, the display device provided by the embodiments of the present disclosure includes, but is not limited to, a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, and a control chip, and the like. Optionally, the control chip is a central processing unit, a digital signal processor, a system chip (SoC), or the like. For example, the control chip can further include a memory, and can further include a power module, and the like, and the power supply and signal input and output functions are realized through the wires, signal lines, and the like arranged additionally. For example, the control chip can further include a hardware circuit and computer executable code, and the like. The hardware circuit can include a conventional very large scale integration (VLSI) circuit or gate array, and existing semiconductors such as logic chips, transistors, or other discrete elements; the hardware circuit can also include a field programmable gate array, a programmable array logic, a programmable logic device, and the like. In addition, those skilled in the art can understand that the above structure does not constitute a limitation on the display device provided by the embodiments of the present disclosure, in other words, the display device provided by the embodiments of the present disclosure can include more or less components, or combine certain components, or different component arrangements.

[0112] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make further changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including all the preferred embodiments and all the changes and modifications falling within the scope of the present disclosure.

[0113] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure is also intended to include these modifications and variations.

Claims

1. An array substrate, wherein, The application relates to a substrate, a plurality of electrodes on the substrate, the electrodes comprising a first trunk electrode, a second trunk electrode, a plurality of first branch electrodes, a plurality of second branch electrodes and a plurality of third branch electrodes, wherein the plurality of first branch electrodes extend in a first direction and are arranged in a second direction; the plurality of second branch electrodes extend in a third direction and are arranged in the second direction, the first direction, the second direction and the third direction intersecting; the plurality of third branch electrodes extend in the first direction on one side of the plurality of first branch electrodes and are arranged in the second direction; the first trunk electrode is located between the column of the plurality of first branch electrodes and the column of the plurality of second branch electrodes, and the first trunk electrode is connected with the plurality of first branch electrodes and the plurality of second branch electrodes; the second trunk electrode is located on the side of the plurality of third branch electrodes away from the first trunk electrode, and the second trunk electrode is connected with the plurality of third branch electrodes. The electrodes further comprise a first common branch electrode extending in the first direction between the plurality of first branch electrodes and the plurality of third branch electrodes, and the first common branch electrode is connected between the first trunk electrode and the second trunk electrode. The electrodes further comprise a third trunk electrode and a plurality of fourth branch electrodes, wherein the plurality of fourth branch electrodes extend in the third direction on one side of the plurality of second branch electrodes and are arranged in the second direction; the third trunk electrode is located on the side of the plurality of fourth branch electrodes away from the first trunk electrode, and the third trunk electrode is connected with the plurality of fourth branch electrodes. The electrodes further comprise a second common branch electrode extending in the third direction between the plurality of second branch electrodes and the plurality of fourth branch electrodes, and the second common branch electrode is connected between the first trunk electrode and the third trunk electrode. The plurality of first branch electrodes and the plurality of second branch electrodes are connected with the same first trunk electrode. The plurality of first branch electrodes and the plurality of second branch electrodes are arranged in a fourth direction, the plurality of third branch electrodes and the plurality of fourth branch electrodes are arranged in the fourth direction, and the fourth direction is substantially perpendicular to the second direction. The application further relates to a transistor. The electrodes further comprise a block electrode at the end of the second trunk electrode away from the first common branch electrode, and the block electrode is electrically connected with a first electrode of the transistor.

2. The array substrate of claim 1, wherein, The application further relates to a plurality of data lines, a second electrode of the transistor being electrically connected with the data lines.

3. The array substrate of claim 2, wherein, The second electrode of the transistor is "m-shaped", an opening of the "m-shaped" structure facing the electrode corresponding to the transistor, the first electrode of the transistor comprising two sub-electrodes extending out of the opening of the "m-shaped" structure, and the two sub-electrodes converging at the block electrode. The application further relates to a plurality of common electrode lines, a plurality of switching electrodes and a plurality of common electrodes. ​ 4. The array substrate of claim 3, wherein, ​ 5. The array substrate of claim 4, wherein, ​ 6. The array substrate of claim 5, wherein, ​ 7. The array substrate of claim 6, wherein, ​ ​ 8. The array substrate of claim 7, wherein, ​ ​ 9. The array substrate according to any one of claims 6 to 8, wherein, ​ The electrode comprises an avoiding structure at a side corner where the third main electrode is located, and the common electrode line is electrically connected with the common electrode through the switching electrode in the area where the avoiding structure is located.

10. The array substrate of claim 6, wherein, The electrode further comprises a fourth main electrode, a third common branch electrode, a fourth common branch electrode, a plurality of fifth branch electrodes and a plurality of sixth branch electrodes; wherein, The third common branch electrode extends along the first direction on the side of the plurality of third branch electrodes away from the first common branch electrode, and the third common branch electrode is connected between the second main electrode and the fourth main electrode; On the side of the third common branch electrode away from the plurality of third branch electrodes, the plurality of fifth branch electrodes extend along the first direction and are arranged along the second direction; The fourth common branch electrode extends along the third direction on the side of the plurality of fourth branch electrodes away from the second common branch electrode, and the fourth common branch electrode is connected between the third main electrode and the fourth main electrode; On the side of the fourth common branch electrode away from the plurality of fourth branch electrodes, the plurality of sixth branch electrodes extend along the third direction and are arranged along the second direction; The fourth main electrode is located between the plurality of fifth branch electrodes and the plurality of sixth branch electrodes, and the plurality of fifth branch electrodes are electrically connected with the plurality of sixth branch electrodes through the fourth main electrode. The line width of the fourth main electrode is substantially the same as the line width of the first main electrode; 11. The array substrate of claim 10, wherein, The line width of the third common branch electrode, the line width of the fifth branch electrode and the line width of the first branch electrode are substantially the same; The line width of the fourth common branch electrode, the line width of the sixth branch electrode and the line width of the second branch electrode are substantially the same; The distance between adjacent fifth branch electrodes, the distance between the third common branch electrode and adjacent third branch electrodes, and the distance between the third common branch electrode and adjacent fifth branch electrodes are substantially equal to the distance between adjacent first branch electrodes; The distance between adjacent sixth branch electrodes, the distance between the fourth common branch electrode and adjacent fourth branch electrodes, and the distance between the fourth common branch electrode and adjacent sixth branch electrodes are substantially equal to the distance between adjacent second branch electrodes. The plurality of first branch electrodes and the plurality of fourth branch electrodes are arranged along a fourth direction, the plurality of third branch electrodes and the plurality of second branch electrodes are arranged along the fourth direction, the first main electrode connected with the plurality of first branch electrodes and the first main electrode connected with the plurality of second branch electrodes are arranged in a staggered manner along the fourth direction, and the fourth direction is substantially perpendicular to the second direction.

12. The array substrate of claim 5, wherein, The plurality of first branch electrodes, the plurality of second branch electrodes and different first main electrodes are connected; 13. The array substrate of claim 4, wherein, The third branch electrode farthest from the first common branch electrode is connected with the fourth branch electrode farthest from the second common branch electrode. The line width of the second main electrode, the line width of the third main electrode and the line width of the first main electrode are substantially the same; 14. The array substrate according to any one of claims 4 to 13, wherein, ​ The line width of the first common branch electrode, the line width of the third branch electrode and the line width of the first branch electrode are substantially the same. The line width of the second common branch electrode, the line width of the fourth branch electrode and the line width of the second branch electrode are substantially the same. The distance between adjacent third branch electrodes, the distance between the first common branch electrode and adjacent first branch electrodes, and the distance between the first common branch electrode and adjacent third branch electrodes are substantially equal to the distance between adjacent first branch electrodes. The distance between adjacent fourth branch electrodes, the distance between the second common branch electrode and adjacent second branch electrodes, and the distance between the second common branch electrode and adjacent fourth branch electrodes are substantially equal to the distance between adjacent second branch electrodes.

15. The array substrate of any one of claims 1 to 14, wherein, The plurality of first branch electrodes and the plurality of second branch electrodes are symmetric about a central axis of the electrode along the second direction.

16. The array substrate of any one of claims 1 to 14, wherein, The included angle between the first branch electrode and the central axis of the electrode along the second direction is not equal to the included angle between the second branch electrode and the central axis of the electrode along the second direction.

17. The array substrate of claim 15 or 16, wherein, The included angle between the first branch electrode and the central axis of the electrode along the second direction and the included angle between the second branch electrode and the central axis of the electrode along the second direction are both 5°-15°.

18. The array substrate of any one of claims 1 to 17, wherein, The line width of the first branch electrode and the line width of the second branch electrode are substantially the same, and the distance between adjacent first branch electrodes and the distance between adjacent second branch electrodes are substantially the same.

19. The array substrate of claim 18, wherein, The line width of the first main electrode is 1.5 μm-4 μm, the line width of the first branch electrode is 2 μm-6 μm, and the distance between adjacent first branch electrodes is 2 μm-6 μm.

20. The array substrate of any one of claims 1-19, wherein, The gate lines and the data lines are arranged in different layers and cross each other. The ratio of the size of the electrode in the extension direction of the gate line to the size of the electrode in the extension direction of the data line is (0.8-1.2):1, or 1:(0.8-1.2).

21. The array substrate of any one of claims 1 to 20, wherein, The gate lines and the data lines are arranged in different layers and cross each other, and the second direction is the extension direction of the gate line or the extension direction of the data line.

22. The array substrate of any one of claims 1 to 21, wherein, The electrode is a pixel electrode.

23. An array substrate, wherein, It comprises: a substrate; a plurality of electrodes on the substrate; the electrodes comprise a first main electrode, a plurality of first branch electrodes and a plurality of second branch electrodes; wherein, the plurality of first branch electrodes extend in a first direction and are arranged in a second direction; the plurality of second branch electrodes extend in a third direction and are arranged in the second direction, and the first direction, the second direction and the third direction intersect; the first main electrode is located between the column of the plurality of first branch electrodes and the column of the plurality of second branch electrodes, and the first main electrode is connected to the plurality of first branch electrodes and the plurality of second branch electrodes; the included angle between the first branch electrode and the central axis of the electrode along the second direction is not equal to the included angle between the second branch electrode and the central axis of the electrode along the second direction. It comprises an array substrate and a counter substrate opposite to each other, wherein the array substrate is as claimed in any one of claims 1-23.

24. A display panel, wherein, ​ 25. A display device comprising: The display panel comprises the display panel as claimed in claim 24, and a backlight module located at the light-incident side of the display panel, wherein the backlight module comprises red light beads, green light beads and blue light beads.

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