Solar cell, module and system

Abstract

The present disclosure is applicable to the technical field of photovoltaics. Provided are a solar cell, a module and a system. In the solar cell, a first region, a second region and an isolation region are provided on a back surface of a silicon substrate, wherein the first region comprises a P-type amorphous silicon layer; the second region comprises an N-type polycrystalline silicon layer; and the isolation region comprises a protective layer, the protective layer is disposed on the outermost layer, and the protective layer is of a discontinuous structure.

Description

Solar cell, module and system

[0001] Cross-reference to related applications

[0002] The present disclosure incorporates by reference in its entirety the Chinese Patent Application No. 202411318807.X entitled "A solar cell, a battery module and a photovoltaic system" filed on September 20, 2024. TECHNICAL FIELD

[0003] The present disclosure belongs to the field of photovoltaic technology, and in particular relates to a solar cell, a battery module and a photovoltaic system. BACKGROUND

[0004] In the current photovoltaic cell production process, PN region isolation is a key process step, which directly affects the production quality and photoelectric conversion efficiency of the cell. In most cases, the isolation of the PN region is realized by laser preparation of isolation grooves.

[0005] However, the traditional isolation groove structure has the following significant problems: when the laser preparation of the isolation groove is performed, the film layer at the bottom of the groove is completely exposed to the external environment. This exposed film layer is very susceptible to the subsequent process, especially during the chemical cleaning or electrode preparation process. Due to the direct exposure of the bottom film layer, it is extremely easy to be etched, resulting in a decrease in the quality of the film layer. During the stacking and handling of the cell, the exposed film layer at the bottom of the isolation groove is susceptible to mechanical wear and tear. Due to the relatively fragile laser groove structure, the exposed film layer is easily damaged due to friction when the cell is transported, loaded or subjected to other mechanical operations in the production line. This not only affects the production yield, but also negatively affects the long-term stability of the cell.

[0006] SUMMARY

[0007] The present disclosure provides a solar cell, a battery module and a photovoltaic system, which aims to solve the problem of negative impact of the traditional isolation groove structure on the production yield and the long-term stability of the cell.

[0008] The present disclosure is implemented in such a way that a solar cell comprises:

[0009] a silicon substrate having a back surface and a front surface arranged oppositely, a first region, a second region and an isolation region are arranged on the back surface of the silicon substrate, and the isolation region is arranged between the first region and the second region;

[0010] a first passivation layer, a P-type amorphous silicon layer and a first conductive film layer are arranged in the first region, the first conductive film layer is arranged at the outermost layer, and the P-type amorphous silicon layer is arranged at the second outermost layer;

[0011] The second region comprises a tunneling oxide layer, an N-type polysilicon layer, and a second conductive film layer, the second conductive film layer being disposed at the outermost layer, and the N-type polysilicon layer being disposed at the second outer layer.

[0012] The isolation region comprises a protective layer, the protective layer being disposed at the outermost layer, and the protective layer being in a discontinuous structure.

[0013] In some embodiments, the area of the protective layer covering the isolation region accounts for 10% to 80% of the total area of the isolation region.

[0014] In some embodiments, the area of the protective layer covering the isolation region accounts for 30% to 80% of the total area of the isolation region.

[0015] In some embodiments, the area of the protective layer covering the isolation region accounts for 50% to 80% of the total area of the isolation region.

[0016] In some embodiments, the protective layer covers part of the first conductive film layer near the isolation region.

[0017] In some embodiments, the area of the protective layer covering the first conductive film layer accounts for 10% to 20% of the total area of the first conductive film layer.

[0018] In some embodiments, the protective layer covers part of the second conductive film layer near the isolation region.

[0019] In some embodiments, the area of the protective layer covering the second conductive film layer accounts for 10% to 50% of the total area of the second conductive film layer.

[0020] In some embodiments, the thickness of the protective layer is less than 1 μm.

[0021] The present disclosure also provides a battery assembly comprising the solar cell described above.

[0022] The present disclosure also provides a photovoltaic system comprising the battery assembly described above.

[0023] The present disclosure achieves the following beneficial effects. Since the first region is a P-type region and the second region is an N-type region, the isolation region is arranged between the first region and the second region to prevent current crosstalk between adjacent regions. The protective layer is arranged at the outermost layer of the isolation region and plays a key role as a protective film layer in the manufacturing process of the solar cell, ensuring that subsequent processes do not cause physical or chemical damage to the film layer, thereby ensuring film quality and ultimately achieving higher production yield and battery performance. BRIEF DESCRIPTION OF DRAWINGS

[0024] FIG. 1 is a structural schematic diagram of a solar cell provided by the present disclosure.

[0025] Explanation of reference signs: 110, first region; 111, first passivation layer; 112, P-type amorphous silicon layer; 113, first conductive film layer; 120, second region; 121, tunneling oxide layer; 122, N-type polysilicon layer; 123, second conductive film layer; 124, phosphor-silicate glass layer; 130, isolation region; 131, protective layer; 140, second passivation layer; 150, anti-reflection layer. DETAILED DESCRIPTION

[0026] In order to make the objects, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below with reference to the drawings and embodiments. The examples of the embodiments are shown in the drawings, wherein the same or similar notations represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present disclosure, and cannot be understood as a limitation on the present disclosure. In addition, it should be understood that the specific embodiments described herein are only used to explain the present disclosure and are not used to limit the present disclosure.

[0027] In the description of the present disclosure, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom" and the like indicate the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present disclosure and simplify the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0028] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified and limited.

[0029] In the description of the present disclosure, it should be noted that, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0030] In the present disclosure, unless otherwise explicitly specified and limited, "on" or "under" of a first feature to a second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, "on", "above" and "over" of a first feature to a second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the first feature is higher in horizontal height than the second feature. "Under", "below" and "underneath" of a first feature to a second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the first feature is lower in horizontal height than the second feature.

[0031] The disclosure below provides many different embodiments or examples for implementing different structures of the present disclosure. In order to simplify the disclosure of the present disclosure, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present disclosure. In addition, the present disclosure can repeatedly refer to numerals and / or reference letters in different examples, and such repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present disclosure provides examples of various specific processes and materials, but those of ordinary skill in the art can realize the application of other processes and / or the use of other materials.

[0032] The first region of the present disclosure is a P-type region, the second region is an N-type region, and the isolation region is provided between the first region and the second region to prevent current crosstalk between adjacent regions. The protective layer is provided on the outermost layer of the isolation region, which plays a key role in the protective film layer during the manufacturing process of the solar cell, ensures that subsequent processes do not cause physical or chemical damage to the film layer, thereby ensuring the film quality, and ultimately achieving higher production yield and battery performance.

[0033] Embodiment one

[0034] As shown in FIG. 1, the present embodiment provides a solar cell, comprising:

[0035] The silicon substrate has a back surface and a front surface arranged oppositely, and the first region 110, the second region 120 and the isolation region 130 are arranged on the back surface of the silicon substrate, and the isolation region 130 is arranged between the first region 110 and the second region 120;

[0036] The first region 110 includes a first passivation layer 111, a P-type amorphous silicon layer 112 and a first conductive film layer 113, the first conductive film layer 113 is arranged on the outermost layer, and the P-type amorphous silicon layer 112 is arranged on the second outermost layer;

[0037] The second region 120 includes a tunneling oxide layer 121, an N-type polycrystalline silicon layer 122 and a second conductive film layer 123, the second conductive film layer 123 is arranged on the outermost layer, and the N-type polycrystalline silicon layer 122 is arranged on the second outermost layer;

[0038] The protective layer 131 is disposed on the outermost layer and has a discontinuous structure. The discontinuous structure of the plurality of protective layers 131 is distributed on the outermost layer.

[0039] The "front" and "back" of the solar cell provided by the present disclosure are relative, that is, the "front" refers to the side facing the sunlight in the vertical direction, and the "back" refers to the side facing away from the sunlight in the vertical direction.

[0040] The first conductive film layer 113 is disposed on the outermost layer, which refers to the side of the first conductive film layer 113 facing away from the first passivation layer 111 of the P-type amorphous silicon layer 112. The P-type amorphous silicon layer 112 is disposed on the outer layer, which refers to the P-type amorphous silicon layer 112 between the first passivation layer 111 and the first conductive film layer 113. The second conductive film layer 123 is disposed on the outermost layer, which refers to the side of the second conductive film layer 123 facing away from the tunneling oxide layer 121 of the N-type polycrystalline silicon layer 122. The N-type polycrystalline silicon layer 122 is disposed on the outer layer, which refers to the N-type polycrystalline silicon layer 122 between the tunneling oxide layer 121 and the second conductive film layer 123.

[0041] The first region 110 and the second region 120 of the back surface of the silicon substrate are alternately arranged, and the isolation region 130 is arranged between the adjacent first region 110 and the second region 120. The first region 110 is provided with layers related to P-type materials, including: the first passivation layer 111, the P-type amorphous silicon layer 112, and the first conductive film layer 113. The first passivation layer 111 is used to reduce surface recombination and improve cell efficiency. The P-type amorphous silicon layer 112 is used to provide P-type electrical properties and help charge separation. The first conductive film layer 113 serves as the outermost layer and is used for current collection and transmission.

[0042] The second region 120 is provided with layers related to N-type materials, including: the tunneling oxide layer 121, the N-type polycrystalline silicon layer 122, and the second conductive film layer 123. The tunneling oxide layer 121 is a very thin oxide layer, which is usually used to enhance the tunneling effect of carriers. The N-type polycrystalline silicon layer 122 is used to provide N-type electrical properties. The second conductive film layer 123 serves as the outermost layer and is used for current collection and transmission. The P-type amorphous silicon layer 112, the silicon substrate, and the N-type polycrystalline silicon layer 122 form a PN junction structure, realizing the process of photogenerated carrier separation and collection of the solar cell.

[0043] It can be understood that the first conductive film layer 113 and the second conductive film layer 123 are light-transmitting film layers, which avoid shielding the P-type amorphous silicon layer 112 and the N-type polycrystalline silicon layer 122 and affecting the absorption of sunlight.

[0044] The isolation region 130 is arranged between the first region 110 and the second region 120 to prevent current crosstalk between adjacent regions. The protective layer 131 is arranged in the isolation region 130. The protective layer 131 is arranged at the outermost layer and has a discontinuous structure. In the manufacturing process of the solar cell, especially in subsequent processes such as photolithography, etching, or electrode deposition, the film layer on the silicon substrate is easily affected by mechanical stress. The protective layer 131 can act as a barrier to prevent the lower film from being damaged or thinned due to friction or other mechanical contact during these processes, maintain the integrity and thickness consistency of the film layer, reduce the scrap rate caused by film failure or quality problems, greatly improve the production yield of the solar cell, and thus improve the overall production efficiency.

[0045] The protective layer 131 can be formed by physical vapor deposition (PVD), in which the material is deposited on the substrate surface by evaporation or sputtering to form the protective layer 131; sol-gel method, in which the liquid sol is converted into solid gel to form the protective layer 131; chemical solution etching method, in which the original coating agent is chemically etched, and the residual material forms the protective layer 131.

[0046] Specifically, the chemical solution etching method can be used to arrange a third conductive film layer in the isolation region to communicate with the first conductive film layer 113 and the second conductive film layer 123. The first conductive film layer 113, the second conductive film layer 123, and the third conductive film layer are formed simultaneously. The protective ink is printed to cover the first conductive film layer 113 and the second conductive film layer 123. The chemical solution is used for etching. The chemical solution etches the third conductive film layer, and at the same time, the protective ink on the first conductive film layer 113 and the second conductive film layer 123 diffuses to the edge and combines with the residual conductive film layer in the isolation region to form a discontinuous protective film.

[0047] In the embodiment, the first region 110 is a P-type region, and the second region 120 is an N-type region. The isolation region is arranged between the first region 110 and the second region 120 to prevent current crosstalk between adjacent regions. The protective layer 131 is arranged at the outermost layer of the isolation region 130 and plays a key role as a protective film layer in the manufacturing process of the solar cell. The protective layer 131 ensures that the subsequent processes do not cause physical or chemical damage to the film layer, thereby ensuring the film formation quality and ultimately achieving higher production yield and battery performance.

[0048] In some embodiments, the second region 120 includes a first sub-region and a second sub-region disposed on both sides of the first sub-region, in the first sub-region, the tunneling oxide layer 121, the N-type polysilicon layer 122, and the second conductive film layer 123 are sequentially stacked, and in the second sub-region, the tunneling oxide layer 121, the N-type polysilicon layer 122, the phosphosilicate glass layer 124, the first passivation layer 111, the P-type amorphous silicon layer 112, and the second conductive film layer 123 are sequentially stacked. The front surface of the silicon substrate can also sequentially stack the second passivation layer 140 and the anti-reflection layer 150. The stacking in this embodiment refers to the positional relationship between the above-mentioned layers, and does not exclude the case where other functional layers are also disposed between the above-mentioned layers.

[0049] Embodiment Two

[0050] On the basis of embodiment one, the area of the protective layer 131 covering the isolation region accounts for 10% to 80% of the total area of the isolation region.

[0051] Partial coverage of the protective layer 131 can be used to cope with material deformation caused by thermal expansion or mechanical stress. Complete coverage can cause accumulation of thermal stress, while partial coverage allows the material to have some free expansion space in the local area, avoiding cracking or delamination. Partial coverage of the protective layer 131 can reduce the generation of parasitic capacitance effects or parasitic resistance. Complete coverage can increase additional capacitance effects, and by limiting the coverage area, the accumulation of capacitance can be reduced.

[0052] The coverage rate of the protective layer 131 in the isolation region 130 is 10% to 80%, by only partially covering the isolation region, the function of the region can be maintained while providing sufficient protection. For example, the protective layer 131 can be reduced in areas that require electrical or optical conduction, so as not to affect the electrical conductivity or light transmittance of the material. This partial coverage of the protective layer 131 design provides greater design flexibility for solar cells and other advanced manufacturing, allowing fine tuning according to the needs of different areas, achieving dual optimization of functionality and cost.

[0053] Embodiment Three

[0054] On the basis of embodiment two, the area of the protective layer 131 covering the isolation region accounts for 30% to 80% of the total area of the isolation region.

[0055] The increase in the coverage area ratio indicates that the protection demand for the isolation region is more significant. Compared to a smaller coverage ratio, a coverage range of 30% to 80% provides stronger protection while taking into account other functional requirements.

[0056] Embodiment Four

[0057] On the basis of embodiment three, the area of the protective layer 131 covering the isolation region accounts for 50% to 80% of the total area of the isolation region.

[0058] Further increase the coverage ratio of the protective layer 131 in the isolation area, which means that the protection of the area is increased, and large-area coverage can effectively prevent corrosion, mechanical damage and chemical reaction in the external environment. Provide stronger protection while ensuring the functionality of the remaining area. Compared with a lower coverage ratio, this coverage range is more suitable for application scenarios that require enhanced protection, environmental resistance and extended service life.

[0059] Example five

[0060] On the basis of example one, the protective layer 131 covers part of the first conductive film layer 113 near the isolation area.

[0061] The protective layer 131 covers part of the first conductive film layer 113 near the isolation area, achieving protection of part of the first conductive film layer 113. The conductive film layer is generally very weak and prone to failure due to mechanical stress or friction damage. By covering part of the protective layer 131 near the isolation area, the mechanical strength of these thin film layers can be significantly improved, reducing damage from external physical impact, while not excessively affecting the performance of the entire device.

[0062] Example six

[0063] On the basis of example five, the area of the protective layer 131 covering the first conductive film layer 113 accounts for 10% to 20% of the total area of the first conductive film layer 113.

[0064] In a solar cell, the P-type amorphous silicon layer 112 is one of the core parts of the photovoltaic cell, responsible for absorbing photons and generating current. The P-type amorphous silicon layer 112 needs to be exposed to sunlight for efficient photoelectric conversion. If the coverage layer is too large, it will block light from entering the P-type amorphous silicon layer 112, thereby reducing the photoelectric conversion efficiency. Therefore, controlling the coverage area of the protective layer 131 within the range of 10% to 20% can ensure that most of the light can penetrate to the silicon layer, minimizing the obstruction of light and ensuring the conversion efficiency of the cell.

[0065] Example seven

[0066] On the basis of example one, the protective layer 131 covers part of the second conductive film layer 123 near the isolation area.

[0067] The protective layer 131 covers part of the second conductive film layer 123 near the isolation area, achieving protection of part of the second conductive film layer 123. The conductive film layer is generally very weak and prone to failure due to mechanical stress or friction damage. By covering part of the protective layer 131 near the isolation area, the mechanical strength of these thin film layers can be significantly improved, reducing damage from external physical impact, while not excessively affecting the performance of the entire device.

[0068] Embodiment Eight

[0069] On the basis of Embodiment Five, the area of the protective layer 131 covering the second conductive film layer 123 accounts for 10% to 50% of the total area of the second conductive film layer 123.

[0070] In a solar cell, the N-type polysilicon layer 122 is one of the core parts of the photovoltaic cell, responsible for absorbing photons and generating electric current. The N-type polysilicon layer 122 needs to be exposed to sunlight for efficient photoelectric conversion. If the cover layer is too large, it will block light from entering the N-type polysilicon layer 122, thereby reducing the photoelectric conversion efficiency. Therefore, controlling the coverage area of the protective layer 131 within the range of 10% to 50% can ensure that most of the light can penetrate to the silicon layer, minimizing the obstruction of light and ensuring the conversion efficiency of the cell.

[0071] Embodiment Nine

[0072] On the basis of Embodiment One, the thickness of the protective layer 131 is less than 1 μm.

[0073] On the one hand, a thinner protective layer 131 can minimize the obstruction of light, ensuring that light can effectively penetrate the protective layer 131 to the underlying light-sensitive layer (such as the P-type amorphous silicon layer 112), thereby improving the photoelectric conversion efficiency. A protective layer 131 with a thickness of less than 1 μm ensures high light transmittance, making it suitable for use in photovoltaic cells and other devices that require light transmission. On the other hand, a thinner protective layer 131 helps to reduce the generation of parasitic capacitance or parasitic resistance, especially in high-frequency circuits and optoelectronic devices, where such parasitic effects can affect the efficiency of current transmission. A protective layer 131 with a thickness of less than 1 μm can avoid these problems, ensuring the integrity of the electrical performance.

[0074] Embodiment Ten

[0075] The present embodiment provides a battery assembly comprising the solar cell of the above-mentioned embodiments.

[0076] The battery assembly of the present embodiment has the same beneficial effects as the above-mentioned solar cell, which will not be repeated here.

[0077] Embodiment Eleven

[0078] The present embodiment provides a photovoltaic system comprising the battery assembly of the above-mentioned embodiments.

[0079] The photovoltaic system of the present embodiment has the same beneficial effects as the above-mentioned solar cell assembly, which will not be repeated here.

[0080] The above merely preferred embodiments of the present disclosure and are not intended to limit the present disclosure. Therefore, any modification, equivalent replacement and improvement made without departing from the spirit and principle of the present disclosure shall fall within the protection scope of the present disclosure.

Claims

1. A solar cell, comprising: a silicon substrate having a back surface and a front surface disposed oppositely, a first region, a second region and an isolation region disposed on the back surface of the silicon substrate, the isolation region being disposed between the first region and the second region; a first passivation layer, a P-type amorphous silicon layer and a first conductive film layer included in the first region, the first conductive film layer being disposed at an outermost layer, the P-type amorphous silicon layer being disposed at a next outer layer; a tunneling oxide layer, an N-type polycrystalline silicon layer and a second conductive film layer included in the second region, the second conductive film layer being disposed at an outermost layer, the N-type polycrystalline silicon layer being disposed at a next outer layer; a protective layer included in the isolation region, the protective layer being disposed at an outermost layer, the protective layer being a discontinuous structure.

2. A solar cell as claimed in claim 1, wherein, An area of the protective layer covering the isolation region accounts for 10% to 80% of a total area of the isolation region.

3. A solar cell as claimed in claim 2, wherein, An area of the protective layer covering the isolation region accounts for 30% to 80% of a total area of the isolation region.

4. A solar cell as claimed in claim 3, wherein, An area of the protective layer covering the isolation region accounts for 50% to 80% of a total area of the isolation region.

5. A solar cell as claimed in claim 1, wherein, The protective layer covers a part of the first conductive film layer near the isolation region.

6. A solar cell as claimed in claim 5, wherein, An area of the protective layer covering the first conductive film layer accounts for 10% to 20% of a total area of the first conductive film layer.

7. A solar cell as claimed in claim 1 or 5, wherein, The protective layer covers a part of the second conductive film layer near the isolation region.

8. A solar cell as claimed in claim 7, wherein, An area of the protective layer covering the second conductive film layer accounts for 10% to 50% of a total area of the second conductive film layer.

9. A solar cell as claimed in claim 1, wherein, A thickness of the protective layer is less than 1μm. 10.A battery assembly, comprising the solar cell according to any one of claims 1 to 9. 11.A photovoltaic system, comprising the battery assembly according to claim 10.

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