Display panel and projection device

Abstract

A display panel (300) and a projection device. The display panel (300) has a display area (AA). The display panel (300) comprises a plurality of first sub-pixels (10). The plurality of first sub-pixels (10) are located in the display area (AA). The display panel (300) comprises a first substrate (331), a plurality of gate lines (334), and a black matrix (34). The plurality of gate lines (334) are located on one side of the first substrate (331). The plurality of gate lines (334) extend in a first direction (X) and are arranged at intervals in a second direction (Y). Two adjacent gate lines (334) are located between two adjacent rows of first sub-pixels (10), and there is a gap between the two gate lines (334). The black matrix (34) is located on the side of the plurality of gate lines (334) distant from the first substrate (331). The black matrix (34) comprises a first black matrix portion (341). In the display area (AA) and in the orthographic projection onto the first substrate (331), the first black matrix portion (341) is located between two boundaries, distant from each other, of two gate lines (334) between two adjacent rows of first sub-pixels (10), and covers the gap between the two gate lines (334).

Description

Display panel and projection device TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular, to a display panel and a projection device. BACKGROUND

[0002] A projection device is a kind of display device that enlarges micro image information to a screen through a lens. The projection system has a wide application potential due to its excellent picture presentation mode, and thus has been paid more and more attention. With the development of projection technology, the projection equipment has been more and more applied in daily work and life. For example, the projection equipment can be connected with a computer, a video disc, a digital versatile disc, a game machine and the like through different interfaces to enlarge and display corresponding image or video content, so as to meet the display requirements of image information in different places. For example, the projection equipment can be applied in meeting, teaching, entertainment and the like.

[0003] SUMMARY

[0004] In one aspect, a display panel is provided. The display panel has a display area. The display panel includes a plurality of first sub-pixels. The plurality of first sub-pixels are located in the display area, and the plurality of first sub-pixels are arranged into a plurality of rows and a plurality of columns; each row includes at least two first sub-pixels arranged along a first direction, and each column includes at least two first sub-pixels arranged along a second direction, the first direction and the second direction intersecting. The display panel includes a first substrate, a plurality of gate lines and a black matrix. The plurality of gate lines are located on a first side of the first substrate; the plurality of gate lines extend along the first direction and are spaced apart along the second direction; two adjacent gate lines are located between two adjacent rows of the first sub-pixels, and the two gate lines have a gap therebetween; the black matrix is located on the first side of the first substrate; the black matrix includes a first black matrix portion; in the display area and in a orthographic projection onto the first substrate, the first black matrix portion is located between two boundaries of the two gate lines away from each other between two adjacent rows of the first sub-pixels, and covers the gap between the two gate lines.

[0005] In some embodiments, the first sub-pixel includes a first transistor; the black matrix includes a second black matrix portion, and an orthographic projection of the second black matrix portion onto the substrate covers an orthographic projection of the first transistor onto the first substrate.

[0006] In some embodiments, the plurality of gate lines are divided into groups, each group of gate lines including two of the gate lines, a row of the first sub-pixels is located between the two gate lines included in a group of the gate lines, a row of the first sub-pixels is located between two adjacent gate lines, a first transistor in an odd column of the first sub-pixels in a row of the first sub-pixels is connected to one of the two gate lines included in a group of the gate lines, and a first transistor in an even column of the first sub-pixels is connected to the other one of the two gate lines. The display panel further includes a plurality of data lines, the plurality of data lines are located on the first side of the first substrate, the plurality of data lines extend along the second direction and are spaced apart along the first direction, two columns of the first sub-pixels are located between two adjacent data lines, and a data line is located between two adjacent columns of the first sub-pixels, the data line is connected to the first transistors of the two columns of the first sub-pixels located on both sides of the data line; the second black matrix portion extends along the first direction, the orthogonal projection of the second black matrix portion on the first substrate also overlaps with, the orthogonal projection on the first substrate of the data line connected to the first transistor corresponding to the second black matrix portion, and the orthogonal projection on the first substrate of the first transistor corresponding to the second black matrix portion; wherein no black matrix is provided between the second black matrix portion corresponding to the first target transistor and the second black matrix portion corresponding to the second target transistor; the first target transistor and the second target transistor are connected to the same data line, and the first target transistor is connected to one of the two gate lines included in a group of the gate lines, and the second target transistor is connected to the other one of the two gate lines.

[0007] In some embodiments, the display panel further includes a plurality of light filtering portions, the plurality of light filtering portions are located on the first side of the first substrate, one of the light filtering portions corresponds to one of the first sub-pixels, the plurality of light filtering portions are divided into groups of light filtering portions, one group of the light filtering portions includes a first light filtering portion, a second light filtering portion, a third light filtering portion, and a fourth light filtering portion arranged in sequence along the first direction, the first light filtering portion transmits light of a first color, the second light filtering portion transmits light of a second color, the third light filtering portion transmits light of a third color, and the fourth light filtering portion can transmit light of any color, the first color, the second color, and the third color constitute three primary colors. The black matrix includes a third black matrix portion. The third black matrix portion extends along the second direction; along the first direction, the first sub-pixel corresponding to the fourth light filtering portion is located between two adjacent third black matrix portions, and the fourth light filtering portion partially overlaps with the third black matrix portion; and / or, the first light filtering portion and the second light filtering portion partially overlap, and the overlapping part of the first light filtering portion and the second light filtering portion is located between the first sub-pixel corresponding to the first light filtering portion and the first sub-pixel corresponding to the second light filtering portion, the second light filtering portion and the third light filtering portion partially overlap, and the overlapping part of the second light filtering portion and the third light filtering portion is located between the first sub-pixel corresponding to the second light filtering portion and the first sub-pixel corresponding to the third light filtering portion.

[0008] In some embodiments, the first filter portion and the third filter portion overlap and are staggered with the fourth filter portion, and / or the third filter portion and the third filter portion overlap and are staggered with the fourth filter portion.

[0009] In some embodiments, the display panel further comprises a plurality of first pixel electrodes, the plurality of first pixel electrodes are located on the first side of the first substrate, the first pixel electrode comprises a first main body portion and a first connecting portion connected with each other, a projection of the first connecting portion on the first substrate overlaps with a projection of the first transistor on the first substrate, and the first connecting portion is connected with the first transistor; the first main body portion extends along the second direction and is a strip structure, and along the second direction, the first main body portion is located on a side of the first connecting portion away from the gate line corresponding to the first connecting portion.

[0010] In some embodiments, a width dimension of the first main body portion along the first direction is 3.5 μm to 4.5 μm.

[0011] In some embodiments, the display panel further comprises a common electrode, the common electrode is located on the first side of the first substrate close to the plurality of gate lines, and the common electrode is located on a different layer from the first pixel electrode; along a third direction, a distance between the first pixel electrode and the common electrode is less than or equal to 2000 angstroms; wherein the third direction is perpendicular to the first substrate.

[0012] In some embodiments, the display panel further comprises a plurality of second pixel electrodes, one second pixel electrode is connected with one first pixel electrode; the first pixel electrode and the second pixel electrode are located on different layers.

[0013] In some embodiments, a width dimension of the first main body portion along the first direction is 2.5 μm to 3.5 μm.

[0014] In some embodiments, the display panel further comprises a common electrode, the common electrode is located on the first side of the first substrate, and the common electrode is located on a different layer from the first pixel electrode; along a third direction, a distance between the first pixel electrode and the common electrode is greater than 2000 angstroms. Wherein the third direction is perpendicular to the first substrate.

[0015] In some embodiments, the first main body portion of the first pixel electrode between two adjacent data lines is located on a side of a first axis close to the data line corresponding to the first pixel electrode; wherein the first axis extends along the second direction and passes through the center of the first connecting portion.

[0016] In some embodiments, the second pixel electrode comprises a second main portion and a second connecting portion connected with each other, the second connecting portion and the first connecting portion partially overlap and connect with each other in the orthogonal projection onto the first substrate, the second main portion extends along the second direction, and along the first direction, the second main portion is located on the side of the second connecting portion away from the data line corresponding to the second connecting portion.

[0017] In some embodiments, the two second main portions between two adjacent data lines are located between the two first main portions, and the two second main portions between two adjacent data lines overlap.

[0018] In some embodiments, the distance between one of the two first main portions and the second main portion and the distance between the other of the two first main portions and the second main portion are equal.

[0019] In some embodiments, the display panel further comprises a data line, and the second pixel electrode and the data line are made of the same material and are arranged in the same layer.

[0020] In some embodiments, two adjacent columns of the first pixel electrodes are located between two adjacent data lines, and the display panel further comprises a plurality of first isolation lines, the plurality of first isolation lines extend along the second direction and are arranged at intervals along the first direction, the first isolation lines are made of the same material as the first pixel electrodes and are arranged in the same layer, and one of the first isolation lines is located between two columns of the first pixel electrodes between two adjacent data lines.

[0021] In some embodiments, the display panel further comprises a common electrode, the common electrode is located between the first pixel electrodes and the first substrate, and the common electrode is connected with the first isolation lines.

[0022] In some embodiments, the display panel further has a peripheral area surrounding the display area, and the display panel further comprises an electrode block, the electrode block is located in the peripheral area and is connected with the common electrode, the electrode block is made of the same material as the first isolation lines and is arranged in the same layer, and the plurality of first isolation lines further extend to the peripheral area and are connected with the electrode block.

[0023] In some embodiments, the display panel further comprises a plurality of second transistors, the plurality of second transistors are located between the first transistors and the electrode blocks, and are located on both sides of the display area along the second direction; the second transistors are adjacent to the first transistors close to the peripheral area, and are electrically insulated from the first pixel electrodes; the first isolation line comprises a first trace segment and a second trace segment, the first trace segment is at least partially located in the display area, the second trace segment is located in the peripheral area, and the first trace segment is connected to the electrode blocks through the second trace segment; along the first direction, a width dimension of the second trace segment is greater than a width dimension of the first trace segment.

[0024] In some embodiments, a distance between one of the two first pixel electrodes between the two adjacent data lines and the first isolation line is equal to a distance between the other of the two first pixel electrodes and the first isolation line.

[0025] In some embodiments, along the first direction, a distance between the two first pixel electrodes between the two adjacent data lines is less than or equal to 9 μm.

[0026] In some embodiments, the display panel comprises an array substrate, a liquid crystal layer, and a counter substrate; the array substrate and the counter substrate are oppositely arranged, and the liquid crystal layer is located between the array substrate and the counter substrate; the array substrate comprises a first substrate, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first conductive layer is located on a first side of the first substrate, and the first conductive layer comprises gate lines; the second conductive layer is located on a side of the first conductive layer away from the first substrate, and the second conductive layer comprises data lines and / or second pixel electrodes; the third conductive layer is located on a side of the second conductive layer away from the first substrate, and the third conductive layer comprises common electrodes; the fourth conductive layer is located on a side of the third conductive layer away from the first substrate, and the fourth conductive layer comprises first pixel electrodes and / or first isolation lines; the counter substrate comprises a second substrate, a black matrix, and a plurality of filter portions; the black matrix is located on a side of the second substrate close to the array substrate; and the plurality of filter portions are located on a side of the plurality of black matrices away from the second substrate.

[0027] In another aspect, a projection device is provided. The projection device comprises a housing and a display panel as described in any of the above embodiments. The housing has a receiving cavity; and the display panel is located in the receiving cavity. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the present disclosure, the following will briefly introduce the drawings needed to be used in some embodiments of the present disclosure. Obviously, the drawings in the following description only represent some of the embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art according to these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams, and are not limited to the actual size, actual process, actual timing of signals, etc. of the products involved in the embodiments of the present disclosure.

[0029] FIG. 1 is a structural diagram of a projection device according to some embodiments;

[0030] FIG. 2 is a structural diagram of a projection device including a backlight source and a display panel according to some embodiments;

[0031] FIG. 3 is a structural diagram of a display panel according to some embodiments;

[0032] FIG. 4 is a structure of a display panel including an array substrate, an opposite substrate and a liquid crystal layer according to some embodiments;

[0033] FIG. 5 is a structural diagram of an opposite substrate according to some embodiments;

[0034] FIG. 6 is another structural diagram of an opposite substrate according to some embodiments;

[0035] FIG. 7 is a structural diagram of a first pixel electrode including a first main body part and a first connecting part according to some embodiments;

[0036] FIG. 8 is a sectional view along the section line C-C in FIG. 7 according to some embodiments;

[0037] FIG. 9 is a structural diagram of a display panel including a first black matrix part according to some embodiments;

[0038] FIG. 10 is a partial enlarged view of D in FIG. 9;

[0039] FIG. 11 is a structural diagram of a black matrix including a second black matrix part according to some embodiments;

[0040] FIG. 12 is a sectional view along the section line E-E in FIG. 11 according to some embodiments;

[0041] FIG. 13 is a structural diagram of an array substrate including a second pixel electrode according to some embodiments;

[0042] FIG. 14 is a sectional view along the section line F-F in FIG. 13 according to some embodiments;

[0043] FIG. 15 is a structural diagram of a display panel including a first isolation line according to some embodiments;

[0044] FIG. 16 is a sectional view along the section line G-G in FIG. 15 according to some embodiments;

[0045] FIG. 17 is an electric field diagram of a display panel including a first isolation line, according to some embodiments;

[0046] FIG. 18 is a structural diagram of a display panel including an electrode block, according to some embodiments;

[0047] FIG. 19 is a structural diagram of a display panel including a redundant sub-pixel, according to some embodiments;

[0048] FIG. 20 is a structural diagram of a display panel including a second signal line and a third signal line, according to some embodiments;

[0049] FIG. 21 is an electric field diagram of a display panel including only a first pixel electrode, according to some embodiments;

[0050] FIG. 22 is an electric field diagram of a display panel including only a second pixel electrode, according to some embodiments. DETAILED DESCRIPTION

[0051] The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings. It should be apparent that the described embodiments are only a part of the embodiments of the present disclosure, and not all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by a person of ordinary skill in the art are within the scope of protection of the present disclosure.

[0052] Unless otherwise required by context, the term “comprise” and other forms of the term “comprise”, such as “comprises” and “comprising”, and other forms thereof, are used in an open, inclusive sense, i.e., “including, but not limited to”. In the description of the specification, the terms “one embodiment”, “some embodiments”, “exemplary embodiments”, “example”, “specific example” or “some examples” are intended to indicate that the particular feature, structure, material, or characteristic following such a term is included in at least one embodiment or example of the present disclosure. The illustrative representations of the above terms do not necessarily indicate a reference to the same embodiment or example. In addition, the particular features, structures, materials, or characteristics can be included in any suitable manner in any one or more embodiments or examples.

[0053] The terms "first", "second", etc. are used herein only to describe one ordinal number, and do not imply or suggest a relative importance or an implicit indication of the number of the technical features indicated. Thus, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, the meaning of "a plurality of" is two or more, unless otherwise specified.

[0054] In describing some embodiments, "coupled" and "connected", and variations thereof, can be used. The term "connected" is to be taken in a broad sense and can mean fixedly connected, removably connected, or integral; directly connected, or connected via an intermediary medium. The term "coupled" indicates, for example, that two or more components have direct physical or electrical contact. The term "coupled" or "communicatively coupled" can also mean that two or more components do not have direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited by the content herein.

[0055] "A, B, and C at least one of" has the same meaning as "at least one of A, B, or C", both of which include the following combinations of A, B, and C: only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C.

[0056] "A and / or B" includes the following three combinations: only A, only B, and a combination of A and B.

[0057] As used herein, the term "if' is, optionally, interpreted as meaning "when" or "upon" or "in response to a determination" or "in response to a detection of", depending on the context. Similarly, the phrase "if it is determined" or "if [a stated condition or event] is detected" is, optionally, interpreted as meaning "upon determining" or "in response to a determination" or "upon detecting [the stated condition or event]" or "in response to a detection of [the stated condition or event]", depending on the context.

[0058] The use of "adapted to" or "configured to" herein means open and inclusive language that does not exclude devices adapted to or configured to perform additional tasks or steps.

[0059] In addition, the use of "based on" means open and inclusive, as a process, step, calculation, or other action that is "based on" one or more stated conditions or values can in practice be based on additional conditions or values beyond those stated.

[0060] As used herein, "about," "approximately," or "around" includes the value recited and the average value within an acceptable range of deviation for the particular value being discussed, as determined by one of ordinary skill in the art considering what is being measured and the error inherent in the measuring system (i.e., the limitations of the measuring system).

[0061] As used herein, "parallel," "perpendicular," "equal" includes the recited condition and conditions that approximate the recited condition, the approximation being within an acceptable range of deviation, as determined by one of ordinary skill in the art considering what is being measured and the error inherent in the measuring system (i.e., the limitations of the measuring system). For example, "parallel" includes absolute parallel and near parallel, where near parallel can be within an acceptable deviation of, for example, 5°; "perpendicular" includes absolute perpendicular and near perpendicular, where near perpendicular can also be within an acceptable deviation of, for example, 5°. "Equal" includes absolute equality and near equality, where near equality can be within an acceptable deviation of, for example, less than or equal to 5% of either of the two being compared.

[0062] It should be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present.

[0063] Exemplary embodiments are described herein with reference to cross-sectional and / or plan view illustrations that are idealized examples. In the interest of clarity, not all of the circular features can be shown in the drawings. It will be appreciated that variations in the shapes of the circular features exist. Thus, the examples provided herein are not intended to limit the examples to the shape illustrated herein, but rather the examples are to include a variety of shapes, such as manufactured and accepted variations from the shape illustrated herein. For example, etched regions that are illustrated as rectangular will typically have curved features. As such, the regions illustrated in the drawings are schematic in nature and their shapes are not intended to show the actual shape of a region of a device and are not intended to limit the scope of the examples.

[0064] It should be understood that the orientation terms "upper", "lower", "left", "right", and the like as used herein are described with reference to the orientation shown in the drawings and should not be construed to limit embodiments of the present application. In addition, it should also be understood that when an element is referred to as being "on" or "under" another element, it can be directly on or under the other element or indirectly connected by intervening elements.

[0065] As shown in FIG. 1, some embodiments of the present disclosure provide a display device 1000, which can be any device displaying anything whether moving (e.g., video) or fixed (e.g., still image) and whether text or image.

[0066] Exemplarily, the display device 1000 can be any product or component having display function such as television, notebook computer, tablet computer, mobile phone, personal digital assistant (PDA), navigator, wearable device, augmented reality (AR) device, virtual reality (VR) device, vehicle-mounted display, flight display, projection device, etc.

[0067] Hereinafter, some embodiments of the present disclosure are exemplarily described with the display device 1000 as a projection device.

[0068] In some embodiments, the projection device includes desktop projection device, portable projection device, floor projection device, reflective projection device, transmissive projection device, single-function projection device, multi-function projection device, smart projection device and touch interactive projection device according to usage mode.

[0069] In some other embodiments, the projection device includes home theater projection device, portable business projection device, education and conference projection device, mainstream engineering projection device, professional theater projection device and measurement projection device according to application environment.

[0070] It can be understood that the display device 1000 described above can be organic light-emitting diode (OLED) display device, quantum dot light-emitting diode (QLED) display device, active matrix organic light-emitting diode (AMOLED) display device, liquid crystal display (LCD) display device or mini / micro light-emitting display (MLED) display device, etc.

[0071] It should be noted that Micro LED refers to an LED with a size (e.g., length) less than 50 pm, and Mini LED refers to an LED with a size (e.g., length) of 50 pm to 200 pm.

[0072] The following exemplary embodiments are described with the display device 1000 as a liquid crystal display device.

[0073] In some embodiments, as shown in FIG. 2, the projection device includes a housing 100, a backlight 200, and a display panel 300.

[0074] As shown in FIG. 2, the backlight 200 is located in the housing 100 and is configured to provide backlight for the display panel 300. The display panel 300 is located in the housing 100, and the display panel 300 is capable of adjusting the light intensity (gray scale) of the light emitted by the backlight 200 to the display panel 300, thereby realizing image display.

[0075] In some embodiments, as shown in FIG. 2, on the basis of the above-mentioned embodiments, the projection device further includes a plurality of optical films 400. The plurality of optical films 400 is located between the display panel 300 and the backlight 200.

[0076] The optical film 400 is configured to modulate the wavelength and / or the propagation direction of the light emitted by the backlight 200 to the display panel 300.

[0077] Exemplarily, the backlight 200 can directly emit white light, and the white light is modulated by the plurality of optical films 400 and then emitted to the outside. Alternatively, the backlight 200 can also emit light of other colors (e.g., blue light), which is then subjected to color conversion and uniform light processing by the plurality of optical films 400 and then emitted to the display panel 300.

[0078] In some examples, the optical film 400 includes a diffusion plate 401 and a composite film 402 arranged in layers, and the diffusion plate 401 is farther away from the backlight 200 than the composite film 402. The diffusion plate 401 performs uniformization processing on the light emitted by the backlight 200, thereby improving the uniformity of the emitted light and reducing the risk of producing shadows.

[0079] Exemplarily, the composite film 402 includes a lower diffusion sheet, a prism sheet, and an upper diffusion sheet arranged in layers, and the upper diffusion sheet is farther away from the diffusion plate 401 than the lower diffusion sheet. The lower diffusion sheet performs uniformization processing on the light emitted by the backlight 200. The prism sheet is configured to improve the brightness of the light emitted by the backlight 200. The upper diffusion sheet is configured to reduce the risk of the backlight 200 being scratched by the display panel 300, and also reduces the risk of the display panel 300 being scratched by the prism sheet.

[0080] In some embodiments, the plurality of optical films 400 further comprises a quantum dot film 403, which is located between the diffusion plate 401 and the composite film 402. The quantum dot film 403 is used to convert the light emitted by the backlight 200. For example, when the light emitted by the backlight 200 is blue light, the quantum dot film 403 can convert the blue light into white light, which can improve the purity of the white light.

[0081] In summary, the light emitted by the backlight 200 is incident on the optical film 400, and the brightness of the light emitted by the optical film 400 is enhanced, and the purity and uniformity of the light emitted by the optical film 400 are improved.

[0082] In some embodiments, as shown in FIG. 3, the display panel 300 has a display area AA and a peripheral area BB disposed on at least one side of the display area AA. In FIG. 3, the peripheral area BB surrounds the display area AA. The peripheral area BB is an area that does not display an image, and the peripheral area BB is configured to dispose display driving circuits, such as scan driving circuits and source driving circuits.

[0083] As shown in FIG. 3, the display panel 300 has a plurality of first sub-pixels 10, which can be arranged in multiple rows and multiple columns. Each row of first sub-pixels 10 includes at least two first sub-pixels 10 arranged along a first direction X, and each column of first sub-pixels 10 includes at least two first sub-pixels 10 arranged along a second direction Y. The first direction X and the second direction Y intersect, for example, the first direction X and the second direction Y are perpendicular.

[0084] In some embodiments, as shown in FIG. 4, the display panel 300 includes an array substrate 33, a liquid crystal layer 32, and a counter substrate 31. The liquid crystal layer 32 is located between the array substrate 33 and the counter substrate 31, and the array substrate 33 and the counter substrate 31 are oppositely disposed.

[0085] In some embodiments, as shown in FIGS. 5 and 6, the counter substrate 31 includes a second substrate 311 and a plurality of light filtering portions 312. The plurality of light filtering portions 312 are located on the second substrate 311, and the plurality of light filtering portions 312 are located on the side of the second substrate 311 close to the liquid crystal layer 32. One light filtering portion 312 corresponds to one first sub-pixel 10. Wherein, one light filtering portion 312 corresponds to one first sub-pixel 10 means that one light filtering portion 312 is oppositely disposed with one first sub-pixel 10.

[0086] In some examples, as shown in FIG. 5, in the case where the backlight 200 emits white light, the plurality of light filtering portions 312 can include a first light filtering portion 3121, a second light filtering portion 3122, and a third light filtering portion 3123. The first light filtering portion 3121 can only allow light rays of a first color among the incident light rays to pass through, the second light filtering portion 3122 can only allow light rays of a second color among the incident light rays to pass through, and the third light filtering portion 3123 can only allow light rays of a third color among the incident light rays to pass through. The first color, the second color, and the third color constitute three primary colors, for example, the first color is red, the second color is green, and the third color is blue.

[0087] In other examples, as shown in FIG. 6, in the case where the backlight 200 emits white light, the plurality of light filtering portions 312 can include a first light filtering portion 3121, a second light filtering portion 3122, a third light filtering portion 3123, and a fourth light filtering portion 3124. The first light filtering portion 3121 can only allow light rays of a first color among the incident light rays to pass through, the second light filtering portion 3122 can only allow light rays of a second color among the incident light rays to pass through, the third light filtering portion 3123 can only allow light rays of a third color among the incident light rays to pass through, and the fourth light filtering portion 3124 can allow light rays of any color among the incident light rays to pass through. The first color, the second color, and the third color constitute three primary colors, for example, the first color is red, the second color is green, and the third color is blue.

[0088] In this way, the fourth light filtering portion 3124 can allow more light rays to pass through the opposing substrate 31, thereby improving the light transmittance of the display panel 300.

[0089] In yet other examples, in the case where the backlight 200 emits blue light, the opposing substrate 31 can include a first light filtering portion 3121 and a second light filtering portion 3122. The first light filtering portion 3121 can only allow light rays of a first color among the incident light rays to pass through, and the second light filtering portion 3122 can only allow light rays of a second color among the incident light rays to pass through. The first color is one of red and green, and the second color is the other of red and green. For example, the first color is red, and the second color is green.

[0090] As shown in FIG. 4, the liquid crystal layer 32 includes a plurality of liquid crystal molecules. The liquid crystal molecules can be deflected under the action of an electric field, thereby changing the amount of light passing through the liquid crystal layer 32, so that the light emitted through the liquid crystal layer 32 reaches a preset brightness.

[0091] As shown in FIG. 7 and FIG. 8, the array substrate 33 includes a first substrate 331, a plurality of first pixel electrodes 332 and a common electrode 333, the plurality of first pixel electrodes 332 and the common electrode 333 are both located on the first substrate 331 and are located on a first side of the first substrate 331. The common electrode 333 and the first pixel electrodes 332 form an electric field, under the action of the electric field, the liquid crystal molecules of the liquid crystal layer 32 are deflected, thereby changing the amount of light passing through the liquid crystal layer 32, so that the light emitted through the liquid crystal layer 32 reaches the preset brightness.

[0092] Exemplarily, the material of the first pixel electrode 332 includes a material with high light transmittance (for example, the light transmittance is greater than or equal to 85%), for example, the material of the first pixel electrode 332 includes indium tin oxide (English: Indium Tin Oxide, for short: ITO).

[0093] Exemplarily, the material of the common electrode 333 includes a material with high light transmittance (for example, the light transmittance is greater than or equal to 85%), for example, the material of the first pixel electrode 332 includes indium tin oxide. The material of the common electrode 333 can be the same as the material of the first pixel electrode 332, or can be different from the material of the first pixel electrode 332, for example, the material of the common electrode 333 and the material of the first pixel electrode 332 are both indium tin oxide.

[0094] It should be noted that the first pixel electrode 332 and the common electrode 333 can be arranged in the same layer or in different layers. Exemplarily, the common electrode 333 is located on the side of the first pixel electrode 332 away from the first substrate 331. Alternatively, exemplarily, the common electrode 333 is located between the first pixel electrode 332 and the first substrate 331.

[0095] Some embodiments of the present disclosure exemplarily illustrate the case that the common electrode 333 is located between the first pixel electrode 332 and the first substrate 331 (as shown in FIG. 8).

[0096] In some embodiments, the array substrate 33 and / or the opposing substrate 31 can be a rigid substrate or a flexible substrate. The first substrate 331 included in the array substrate 33 and / or the second substrate 311 included in the opposing substrate 31 can be a single-layer substrate formed by a layer of substrate material, or a composite substrate composed of multiple layers (two or more layers) of substrate material.

[0097] The material of the substrate (the first substrate 331 or the second substrate 311) can be a rigid material such as glass; the material of the substrate can also be a flexible material such as TAC (Tri-cellulose Acetate), PI (Polyimide), PET (Polyethylene Terephthalate), etc.

[0098] In some examples, as shown in FIG. 8, the array substrate 33 includes a third conductive layer 303 and a fourth conductive layer 304, the fourth conductive layer 304 is located on the side of the third conductive layer 303 away from the first substrate 331. The third conductive layer 303 includes the common electrode 333, and the fourth conductive layer 304 includes the plurality of first pixel electrodes 332.

[0099] Based on the above structure, the light emitted by the backlight source 200 can pass through the opposite substrate 31 or the array substrate 33 and be incident on the liquid crystal molecules of the liquid crystal layer 32. The liquid crystal molecules are deflected under the action of the electric field formed by the first pixel electrode 332 and the common electrode 333, thereby changing the amount of light passing through the liquid crystal layer 32, so that the light emitted through the liquid crystal layer 32 reaches the preset brightness. The color of the light emitted after passing through the different color filter parts 312 in the opposite substrate 31 includes multiple colors, such as red, green, and blue, and the light of various colors cooperates with each other to make the projection device display an image.

[0100] It can be understood that one first sub-pixel 10 includes one first pixel electrode 332, the liquid crystal layer 32 arranged opposite to the first pixel electrode 332, and the common electrode 333.

[0101] In the related art, the display effect of the display panel is poor. The inventors have found that, on the one hand, the larger the pixel resolution (English: Pixels Per Inch: PPI) of the display panel, the higher the fidelity of the projection device, and the better the display effect of the projection device. However, as the pixel resolution increases, the aperture ratio and the light transmittance of the display panel decrease. In the case where the pixel resolution of the display panel is greater than or equal to a first pixel resolution (for example, the first pixel resolution is 400), the light transmittance of the display panel is small, which cannot meet the demand, resulting in poor display effect of the display panel 300. On the other hand, the display panel further includes a plurality of first signal lines, the plurality of first signal lines extend along a second direction and are arranged at intervals along a first direction, the first signal line is connected with the common electrode, and the material of the first signal line includes metal, for example, copper. The first signal line can reflect and / or absorb the light emitted by the backlight source to the display panel, resulting in small aperture ratio and light transmittance of the display panel. In the case where the pixel resolution of the display panel is greater than or equal to the first pixel resolution, the light transmittance of the display panel is small, which cannot meet the demand, resulting in poor display effect of the display panel.

[0102] In order to solve the above technical problems, as shown in FIG. 7, some embodiments of the present disclosure provide an array substrate 33, the array substrate 33 further includes a plurality of gate lines 334.

[0103] As shown in FIG. 7, a plurality of gate lines 334 are located on the first side of the first substrate 331, extend along the first direction X, and are spaced apart along the second direction Y. The gate lines 334 are connected to the first sub-pixels 10, so that signals can be transmitted to the first sub-pixels 10 through the gate lines 334.

[0104] In some examples, as shown in FIG. 3 and FIG. 7, two adjacent gate lines 334 are located between two adjacent rows of the first sub-pixels 10, and have a gap therebetween. One row of the first sub-pixels 10 is located between the two adjacent gate lines 334, and the first sub-pixels 10 in the odd columns of the one row of the first sub-pixels 10 are connected to one of the two adjacent gate lines 334, and the first sub-pixels 10 in the even columns are connected to the other of the two adjacent gate lines 334.

[0105] For example, the first sub-pixels 10 in the odd columns of the one row of the first sub-pixels 10 are connected to the upper gate lines 334 of the one row of the first sub-pixels 10, and the first sub-pixels 10 in the even columns are connected to the lower gate lines 334 of the one row of the first sub-pixels 10.

[0106] Alternatively, for example, as shown in FIG. 3, the first sub-pixels 10 in the odd columns of the one row of the first sub-pixels 10 are connected to the lower gate lines 334 of the one row of the first sub-pixels 10, and the first sub-pixels 10 in the even columns are connected to the upper gate lines 334 of the one row of the first sub-pixels 10.

[0107] In some examples, the array substrate 33 includes a first conductive layer 301 located between the third conductive layer 303 and the first substrate 331, and the first conductive layer 301 includes the plurality of gate lines 334.

[0108] Based on the above-described embodiments, as shown in FIG. 9 and FIG. 10, the display panel 300 further includes a black matrix 34 located on the side of the plurality of gate lines 334 away from the first substrate 331. The black matrix 34 includes a first black matrix portion 341. Within the display area AA, and in the orthographic projection onto the first substrate 331, the first black matrix portion 341 is located between the two boundaries of the two gate lines 334 away from each other between two adjacent rows of the first sub-pixels 10, and covers the gap between the two gate lines 334.

[0109] In this way, the first black matrix 341 covers the gap between the two gate lines 334, so that the first black matrix 341 can reflect or absorb the light emitted by the backlight 200 to the gap between the two gate lines 334 between the two adjacent rows of first sub-pixels 10, thereby reducing the risk of light leakage of the display device 1000. The first black matrix 341 is located between the two boundaries of the two gate lines 334 away from each other between the two adjacent rows of first sub-pixels 10, so that the boundary of the first black matrix 341 extending in the first direction X is within the range of the gate line 334, so that the first black matrix 341 does not block the area on both sides of the two gate lines 334 in the second direction Y, thereby increasing the light transmission area of the display panel 300, improving the light transmission rate of the display panel 300, and improving the display effect of the display panel 300.

[0110] It should be noted that the black matrix 34 is located between the liquid crystal layer 32 and the second substrate 311, or the black matrix 34 is located between the liquid crystal layer 32 and the first substrate 331. For example, as shown in FIG. 12, the opposite substrate 31 includes the black matrix 34, and the black matrix 34 is located between the plurality of filter portions 312 and the second substrate 311, that is, the plurality of filter portions 312 are located between the black matrix 34 away from the second substrate 311.

[0111] In the projection device, most or all of the light in the external environment will be incident on the shell 100 and thus be blocked by the shell 100. Therefore, only a small amount of light or no light in the external environment enters the display panel 300 in the accommodation cavity, so that the metal in the display panel 300 does not reflect the light in the external environment, thereby not affecting the display effect of the projection device, that is, the projection device does not need to consider the technical problem of the metal in the display panel 300 reflecting the ambient light.

[0112] In some embodiments, as shown in FIG. 10, the first sub-pixel 10 includes a first transistor 11, and the first transistor 11 is connected with the first pixel electrode 332. For example, one first transistor 11 is connected with one first pixel electrode 332.

[0113] For example, the first transistor 11 is an oxide thin film transistor, and the carrier mobility of the oxide thin film transistor is relatively high. Alternatively, for example, the first transistor 11 is a low-temperature polysilicon thin film transistor, and the low-temperature polysilicon thin film transistor has high mobility and fast charging.

[0114] For example, the first transistor 11 can include a P-type transistor or an N-type transistor.

[0115] The first transistor 11 includes an active region, a source, a drain and a gate, and the source and the drain are in contact with the active region respectively. The source or the drain of the first transistor 11 can be electrically connected with the first pixel electrode 332. The source and the drain can be interchangeable. The gate of the first transistor 11 is arranged in the same layer as the gate line 334, and the gate of the first transistor 11 is connected with the gate line 334.

[0116] In some examples, the array substrate 33 further includes a first semiconductor layer, the first semiconductor layer is located between the first conductive layer 301 and the third conductive layer 303, and the first semiconductor layer includes the active region of the first transistor 11.

[0117] On the basis of the above-mentioned embodiments, as shown in FIG. 10, the black matrix 34 further includes a second black matrix portion 342, the orthographic projection of the second black matrix portion 342 on the first substrate 331 covers the orthographic projection of the first transistor 11 on the first substrate 331.

[0118] In this way, the second black matrix portion 342 can reflect or absorb the light emitted by the backlight 200 and irradiated to the first transistor 11, and the risk of light leakage at the first transistor 11 can be reduced.

[0119] In some examples, the light emitted by the backlight 200 passes through the opposite substrate 31, the liquid crystal layer 32 and the array substrate 33 in sequence, that is, the backlight 200 is a side-in light.

[0120] In this way, the light emitted by the backlight 200 first irradiates to the second black matrix portion 342, the second black matrix portion 342 reflects or absorbs the light emitted by the backlight 200 and irradiated to the first transistor 11, and the risk of the light emitted by the backlight 200 irradiating to the active region of the first transistor 11 can be reduced. Thus, the temperature rise of the active region of the first transistor 11 can be improved, the performance of the first transistor 11 can be improved, and the display effect of the display panel 300 can be improved.

[0121] In some embodiments, as shown in FIG. 3 and FIG. 7, the plurality of gate lines 334 are divided into a plurality of groups, each group of gate lines 334 includes two gate lines 334, a row of first sub-pixels 10 is located between the two gate lines 334 included in a group of gate lines 334, a row of first sub-pixels 10 is located between adjacent two gate lines 334, the first transistor 11 in the first sub-pixel 10 in the odd column in a row of first sub-pixels 10 is connected with one of the two gate lines 334 included in a group of gate lines 334, and the first transistor 11 in the first sub-pixel 10 in the even column is connected with the other one.

[0122] As shown in FIG. 3, FIG. 3 and FIG. 8, the array substrate 33 further includes a plurality of data lines 335, and the plurality of data lines 335 are located on the first side of the first substrate. As shown in FIG. 3, the plurality of data lines 335 extend along the second direction Y and are arranged at intervals along the first direction X.

[0123] In some examples, as shown in FIG. 8, the array substrate 33 includes a second conductive layer 302, the second conductive layer 302 is located between the third conductive layer 303 and the first substrate 331, and the third conductive layer 303 includes the plurality of data lines 335 described above.

[0124] On the basis of the above-described embodiments, as shown in FIG. 9, the second black matrix part 342 extends along the first direction X, and the orthographic projection of the second black matrix part 342 on the first substrate 331 also overlaps the orthographic projection of the data line 335 connected to the first transistor 11 corresponding to the second black matrix part 342 on the first substrate 331. Among them, the first transistor 11 corresponding to the second black matrix part 342 is provided, and in the orthographic projection on the first substrate 331, the first transistor 11 of the plurality of first transistors 11 overlapping the second black matrix part 342.

[0125] The first target transistor 111 corresponding to the second black matrix part 342 and the second target transistor 112 corresponding to the second black matrix part 342 are not provided with a black matrix 34, the first target transistor 111 and the second target transistor 112 are connected to the same data line 335, and the first target transistor 111 is connected to one of the two gate lines 334 included in the group of gate lines 334, and the second target transistor 112 is connected to the other.

[0126] In this way, in the orthographic projection on the first substrate 331, the part of the data line 335 located between the second black matrix part 342 corresponding to the first target transistor 111 and the second black matrix part 342 corresponding to the second target transistor 112 is not provided with a black matrix 34, so that the part of the data line 335 will not be blocked by the black matrix 34, thereby increasing the light transmission area of the display panel 300 and improving the light transmission rate of the display panel 300, which is conducive to improving the display effect of the display panel 300.

[0127] In some examples, as shown in FIG. 9, the second black matrix part 342 corresponding to a row of first transistors 11 connected to one of the two gate lines 334 on both sides of a row of first sub-pixels 10 is connected to the first black matrix part 341 corresponding to one of the two gate lines 334 on both sides of the row of first sub-pixels 10. The second black matrix part 342 corresponding to a row of first transistors 11 connected to the other of the two gate lines 334 on both sides of a row of first sub-pixels 10 is connected to the first black matrix part 341 corresponding to the other of the two gate lines 334 on both sides of the row of first sub-pixels 10. That is, the second black matrix part 342 corresponding to a row of first transistors 11 connected to the upper gate line 334 is connected to the first black matrix part 341 corresponding to the upper gate line 334, and the second black matrix part 342 connected to a row of first transistors 11 connected to the lower gate line 334 is connected to the first black matrix part 341 corresponding to the lower gate line 334.

[0128] In some embodiments, as shown in FIG. 5, the opposite substrate 31 includes a first filter part 3121, a second filter part 3122, and a third filter part 3123. The plurality of filter parts 312 are divided into a plurality of groups of filter parts 312, and a group of filter parts 312 includes the first filter part 3121, the second filter part 3122, and the third filter part 3123 arranged in sequence along the first direction X. Along the first direction X, the first filter part 3121 and the second filter part 3122 partially overlap, and the overlapping part of the first filter part 3121 and the second filter part 3122 is located between the first sub-pixel 10 corresponding to the first filter part 3121 and the first sub-pixel 10 corresponding to the second filter part 3122. The second filter part 3122 and the third filter part 3123 overlap, and the overlapping part of the second filter part 3122 and the third filter part 3123 is located between the first sub-pixel 10 corresponding to the second filter part 3122 and the first sub-pixel 10 corresponding to the third filter part 3123. The third filter part 3123 and the first filter part 3121 overlap, and the overlapping part of the third filter part 3123 and the first filter part 3121 is located between the first sub-pixel 10 corresponding to the third filter part 3123 and the first sub-pixel 10 corresponding to the first filter part 3121. Among them, the first filter part 3121 can only make light of a first color in incident light pass through, the second filter part 3122 can only make light of a second color in incident light pass through, and the third filter part 3123 can only make light of a third color in incident light pass through.

[0129] In this way, the light emitted by the backlight 200 cannot pass through the overlapping part of the first filter part 3121 and the second filter part 3122, the overlapping part of the second filter part 3122 and the third filter part 3123, and the overlapping part of the third filter part 3123 and the first filter part 3121, i.e., the overlapping part of the first filter part 3121 and the second filter part 3122, the overlapping part of the second filter part 3122 and the third filter part 3123, and the overlapping part of the third filter part 3123 and the first filter part 3121 correspond to the black matrix 34, so that the black matrix 34 does not need to be arranged between the first sub-pixel 10 corresponding to the first filter part 3121 and the first sub-pixel 10 corresponding to the second filter part 3122, between the first sub-pixel 10 corresponding to the second filter part 3122 and the first sub-pixel 10 corresponding to the third filter part 3123, and between the first sub-pixel 10 corresponding to the third filter part 3123 and the first sub-pixel 10 corresponding to the first filter part 3121, and the risk of color mixing of the display panel 300 can also be reduced.

[0130] In some examples, as shown in FIG. 5, the width dimension of the overlapping part of the first filter part 3121 and the second filter part 3122 along the first direction X is 1.5 μm-2.5 μm. For example, the width dimension of the overlapping part of the first filter part 3121 and the second filter part 3122 along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, or 2.5 μm.

[0131] In some examples, as illustrated in FIG. 5, the width dimension of the portion where the second filter portion 3122 and the third filter portion 3123 overlap along the first direction X is 1.5 μm to 2.5 μm. For example, the width dimension of the portion where the second filter portion 3122 and the third filter portion 3123 overlap along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, or 2.5 μm.

[0132] The width dimension of the portion where the second filter portion 3122 and the third filter portion 3123 overlap along the first direction X can be equal to the width dimension of the portion where the first filter portion 3121 and the second filter portion 3122 overlap along the first direction X, or can not be equal to the width dimension of the portion where the first filter portion 3121 and the second filter portion 3122 overlap along the first direction X. For example, the width dimension of the portion where the second filter portion 3122 and the third filter portion 3123 overlap along the first direction X and the width dimension of the portion where the first filter portion 3121 and the second filter portion 3122 overlap along the first direction X are each 2 μm.

[0133] In some examples, as illustrated in FIG. 5, the width dimension of the portion where the third filter portion 3123 and the first filter portion 3121 overlap along the first direction X is 1.5 μm to 2.5 μm. For example, the width dimension of the portion where the third filter portion 3123 and the first filter portion 3121 overlap along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, or 2.5 μm.

[0134] The width dimension of the portion where the third filter portion 3123 and the first filter portion 3121 overlap along the first direction X can be equal to the width dimension of the portion where the first filter portion 3121 and the second filter portion 3122 overlap along the first direction X, or can not be equal to the width dimension of the portion where the first filter portion 3121 and the second filter portion 3122 overlap along the first direction X. For example, the width dimension of the portion where the third filter portion 3123 and the first filter portion 3121 overlap along the first direction X and the width dimension of the portion where the first filter portion 3121 and the second filter portion 3122 overlap along the first direction X are each 2 μm.

[0135] In some embodiments, as shown in FIG. 6, the opposite substrate 31 includes a first filter portion 3121, a second filter portion 3122, a third filter portion 3123, and a fourth filter portion 3124. The plurality of filter portions 312 are divided into a plurality of groups of filter portions 312, and one group of filter portions 312 includes the first filter portion 3121, the second filter portion 3122, the third filter portion 3123, and the fourth filter portion 3124 arranged in sequence along the first direction X. Among them, the first filter portion 3121 can only allow light of a first color among incident light to pass through, the second filter portion 3122 can only allow light of a second color among incident light to pass through, the third filter portion 3123 can only allow light of a third color among incident light to pass through, and the fourth filter portion 3124 can allow light of any color among incident light to pass through.

[0136] As shown in FIGS. 11 and 12, the black matrix 34 includes a third black matrix portion 343 extending along the second direction Y. Along the first direction X, the fourth filter portion 3124 corresponding to the first sub-pixel 10 is located between two adjacent third black matrix portions 343, and the fourth filter portion 3124 partially overlaps the third black matrix portion 343. In this way, light emitted by the backlight 200 cannot pass through the part where the fourth filter portion 3124 and the third black matrix portion 343 overlap, which can reduce the risk of color mixing of the display panel 300.

[0137] In some examples, as shown in FIG. 12, the third black matrix portion 343 has a width dimension of 5 μm to 7 μm along the first direction X. For example, the third black matrix portion 343 has a width dimension of 5 μm, 5.4 μm, 6 μm, 6.5 μm, or 7 μm along the first direction X.

[0138] As shown in FIG. 12, the part where the fourth filter portion 3124 and the third black matrix portion 343 overlap has a width dimension of 1.5 μm to 2.5 μm along the first direction X. For example, the part where the fourth filter portion 3124 and the third black matrix portion 343 overlap has a width dimension of 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, or 2.5 μm along the first direction X.

[0139] In addition, as shown in FIG. 12, along the first direction X, the first filter portion 3121 and the second filter portion 3122 partially overlap, and the overlapping part is located between the first sub-pixel 10 corresponding to the first filter portion 3121 and the first sub-pixel 10 corresponding to the second filter portion 3122; the second filter portion 3122 and the third filter portion 3123 overlap, and the overlapping part is located between the first sub-pixel 10 corresponding to the second filter portion 3122 and the first sub-pixel 10 corresponding to the third filter portion 3123.

[0140] In this way, the light emitted by the backlight 200 cannot pass through the part where the first filter part 3121 and the second filter part 3122 overlap and the part where the second filter part 3122 and the third filter part 3123 overlap, i.e. the part where the first filter part 3121 and the second filter part 3122 overlap and the part where the second filter part 3122 and the third filter part 3123 overlap correspond to the black matrix 34, so that the black matrix 34 does not need to be arranged between the first sub-pixel 10 corresponding to the first filter part 3121 and the first sub-pixel 10 corresponding to the second filter part 3122, and between the first sub-pixel 10 corresponding to the second filter part 3122 and the first sub-pixel 10 corresponding to the third filter part 3123, and the risk of color mixing of the display panel 300 can also be reduced.

[0141] In some examples, as shown in FIG. 12, the width dimension of the part where the first filter part 3121 and the second filter part 3122 overlap along the first direction X is 1.5 μm to 2.5 μm. For example, the width dimension of the part where the first filter part 3121 and the second filter part 3122 overlap along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm or 2.5 μm.

[0142] In some examples, as shown in FIG. 12, the width dimension of the part where the second filter part 3122 and the third filter part 3123 overlap along the first direction X is 1.5 μm to 2.5 μm. For example, the width dimension of the part where the second filter part 3122 and the third filter part 3123 overlap along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm or 2.5 μm.

[0143] The width dimension of the part where the second filter part 3122 and the third filter part 3123 overlap along the first direction X can be equal to the width dimension of the part where the first filter part 3121 and the second filter part 3122 overlap along the first direction X, or can not be equal to the width dimension of the part where the first filter part 3121 and the second filter part 3122 overlap along the first direction X. For example, the width dimension of the part where the second filter part 3122 and the third filter part 3123 overlap along the first direction X and the width dimension of the part where the first filter part 3121 and the second filter part 3122 overlap along the first direction X are both 2 μm.

[0144] On the basis of the above-mentioned embodiments, as shown in FIG. 11 and FIG. 12, the first filter part 3121 and the third black matrix part 343 overlap, and are arranged staggered with the fourth filter part 3124, and / or the third filter part 3123 and the third black matrix part 343 overlap, and are arranged staggered with the fourth filter part 3124.

[0145] In some examples, the width dimension of the portion where the first light filtering part 3121 and the third black matrix part 343 overlap along the first direction X is 1.5 μm to 2.5 μm. For example, the width dimension of the portion where the first light filtering part 3121 and the third black matrix part 343 overlap along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, or 2.5 μm.

[0146] In some examples, the width dimension of the portion where the third light filtering part 3123 and the third black matrix part 343 overlap along the first direction X is 1.5 μm to 2.5 μm. For example, the width dimension of the portion where the third light filtering part 3123 and the third black matrix part 343 overlap along the first direction X is 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, or 2.5 μm.

[0147] In some examples, the width dimension of the portion where the first light filtering part 3121 and the third black matrix part 343 overlap along the first direction X can be equal to the width dimension of the portion where the third light filtering part 3123 and the third black matrix part 343 overlap along the first direction X, or can be different from the width dimension of the portion where the third light filtering part 3123 and the third black matrix part 343 overlap along the first direction X. For example, the width dimension of the portion where the third light filtering part 3123 and the third black matrix part 343 overlap along the first direction X and the width dimension of the portion where the third light filtering part 3123 and the third black matrix part 343 overlap along the first direction X are both 2 μm.

[0148] In some embodiments, as shown in FIG. 7, the first pixel circuit 332 includes a first main body part 3321 and a first connecting part 3322 connected to each other, the first connecting part 3322 is overlapped with the first transistor 11 in the orthographic projection of the first substrate 331, and the first connecting part 3322 is connected to the first transistor 11, the first main body part 3321 extends along the second direction Y and has a strip-shaped structure, along the second direction Y, the first main body part 3321 is located on the side of the first connecting part 3322 away from the gate line 334 corresponding to the first connecting part 3322. In addition, the first main body part 3321 is not provided with any opening.

[0149] In this way, compared with the first main body part provided with an opening, the first main body part 3321 provided by some embodiments of the present disclosure is a continuous whole layer structure, which can reduce the width of the first main body part 3321 along the first direction X, thereby reducing the width dimension of the first sub-pixel 10 along the first direction X and improving the pixel resolution of the display panel 300, while ensuring the size of the storage capacitor of the first sub-pixel 10 unchanged.

[0150] It should be noted that, in the present document, "the first body part 3321 extends along the second direction Y" means that the wiring direction of the first body part 3321 as a whole extends along the second direction Y, but is not limited to that each position of the first body part 3321 strictly extends along the second direction Y. That is, "extends along the second direction Y" here not only includes the first body part 3321 that each position strictly extends along the second direction Y, but also includes the first body part 3321 that locally bends to avoid interference with other structures.

[0151] As can be seen from the above, as the pixel resolution increases, the width dimension of the first sub-pixel 10 along the first direction X is smaller (in the case where the opposite substrate 31 includes the first filter part 3121, the second filter part 3122, and the third filter part 3123, the width dimension of the first sub-pixel 10 along the first direction X is 18.4 μm, and in the case where the opposite substrate 31 includes the first filter part 3121, the second filter part 3122, the third filter part 3123, and the fourth filter part 3124, the width dimension of the first sub-pixel 10 along the first direction X is 13.8 μm), that is, the width dimension of the first body part 3321 along the first direction X is smaller, thereby resulting in a smaller storage capacitor of the first sub-pixel 10 and a poorer display effect of the display panel 300.

[0152] According to the formula C = εS / (4πkd) (wherein ε is the dielectric constant between the two plates of the capacitor, C is the capacitance value of the capacitor, S is the facing area of the two plates of the capacitor, k is the electrostatic force constant, and d is the distance between the two plates of the capacitor), the capacitance value C of the capacitor is proportional to the dielectric constant ε between the two plates of the capacitor, that is, the smaller the dielectric constant ε between the two plates of the capacitor, the smaller the capacitance value C of the capacitor.

[0153] In some embodiments, as shown in FIG. 7, the width dimension of the first body part 3321 along the first direction X is 3.5 μm to 4.5 μm.

[0154] In this way, the width dimension of the first body part 3321 along the first direction X is larger, which can increase the facing area of the two plates of the capacitor and improve the size of the storage capacitor of the first sub-pixel 10, thereby being conducive to improving the display effect of the display panel 300.

[0155] In some examples, the width dimension of the first body part 3321 along the first direction X is 3.5 μm, 3.6 μm, 3.7 μm, 3.8 μm, 3.9 μm, 4.0 μm, 4.1 μm, 4.2 μm, 4.3 μm, 4.4 μm, or 4.5 μm.

[0156] According to the formula C = εS / (4πkd), the capacitance value C of the capacitor and the distance d between the two plates of the capacitor are inversely proportional, that is, the greater the distance d between the two plates of the capacitor, the smaller the capacitance value C of the capacitor.

[0157] In some embodiments, as shown in FIG. 8, the common electrode 333 is located in a different layer from the first pixel electrode 332 along a third direction Z, and the distance between the first pixel electrode 332 and the common electrode 333 along the third direction Z is less than or equal to 2000 angstroms, where the third direction Z is perpendicular to the first substrate 331.

[0158] In this way, the distance between the first pixel electrode 332 and the common electrode 333 is small, which can reduce the distance between the two plates of the capacitor and increase the size of the storage capacitor of the first sub-pixel 10, thereby improving the display effect of the display panel 300.

[0159] In some examples, the distance between the first pixel electrode 332 and the common electrode 333 is 1500 angstroms, 1600 angstroms, 1700 angstroms, 1800 angstroms, 1900 angstroms, or 2000 angstroms.

[0160] In yet other embodiments, as shown in FIGS. 13 and 14, the array substrate 33 further includes a plurality of second pixel electrodes 336, one second pixel electrode 336 is connected to one first pixel electrode 332, and the first pixel electrode 332 is located in a different layer from the second pixel electrode 336 and the common electrode 333.

[0161] In this way, the second pixel electrode 336 and the common electrode 333 form a storage capacitor, and the storage capacitor formed by the second pixel electrode 336 and the common electrode 333 is connected in parallel with the storage capacitor formed by the first pixel electrode 332 and the common electrode 333, and the two together form the storage capacitor of the first sub-pixel 10, thereby increasing the size of the storage capacitor of the first sub-pixel 10 and improving the display effect of the display panel 300.

[0162] At this time, there is no need to additionally increase the width dimension of the first main body portion 3321 along the first direction X and reduce the distance between the first pixel electrode 332 and the common electrode 333.

[0163] In some examples, as shown in FIG. 13, the width dimension of the first main body portion 3321 along the first direction X is 2.5 μm to 3.5 μm. For example, the width dimension of the first main body portion 3321 along the first direction X is 2.5 μm, 2.6 μm, 2.7 μm, 2.8 μm, 2.9 μm, 3.0 μm, 3.1 μm, 3.2 μm, 3.3 μm, 3.4 μm, or 3.5 μm.

[0164] In some examples, as shown in FIG. 14, the distance between the first pixel electrode 332 and the common electrode 333 is greater than 2000 angstroms. For example, the distance between the first pixel electrode 332 and the common electrode 333 is 2050 angstroms, 2100 angstroms, 2200 angstroms, 2300 angstroms, 2400 angstroms, or 2500 angstroms.

[0165] In some embodiments, as shown in FIG. 13, the first main body part 3321 of the first pixel electrode 332 between the two adjacent data lines 335 is located on the side of the first axis X1 close to the data line 335 corresponding to the first pixel electrode 332; wherein the first axis X1 extends along the second direction Y and passes through the center of the first connecting part 3322.

[0166] In this way, the first main body part 3321 is closer to the data line 335 corresponding to the first main body part 3321 than the first connecting part 3322, which can increase the distance between the two first main body parts 3321 between the two adjacent data lines 335 and reduce the coupling capacitance between the two first main body parts 3321 between the two adjacent data lines 335.

[0167] It can be understood that the first connecting part 3322 in the left first pixel electrode 332 of the two first pixel electrodes 332 between the two adjacent data lines 335 is connected to the left data line 335, and the first connecting part 3322 in the right first pixel electrode 332 is connected to the right data line 335.

[0168] The data line 335 corresponding to the first main body part 3321 refers to the data line 335 connected to the first main body part 3321.

[0169] In some embodiments, on the basis of the above-mentioned embodiments, as shown in FIG. 13, the second pixel electrode 336 includes a second main body part 3361 and a second connecting part 3362 connected to each other. In the orthographic projection to the first substrate 331, the second connecting part 3362 and the first connecting part 3322 partially overlap and are connected, the second main body part 3361 extends along the second direction Y, and along the first direction X, the second main body part 3361 is located on the side of the second connecting part 3362 away from the data line 335 corresponding to the second connecting part 3362.

[0170] As can be seen from the above, the distance between the two first main body parts 3321 between the two adjacent data lines 335 is large, and the second main body part 3361 can be placed, so that the risk of the first main body part 3321 protruding due to the overlap of the first main body part 3321 and the second main body part 3361 can be reduced, which is conducive to improving the display effect of the display panel 300.

[0171] In some embodiments, as shown in FIG. 13, two second main body portions 3361 between two adjacent data lines 335 are located between two first main body portions 3321, and the extensions of the two second main body portions 3361 between two adjacent data lines 335 overlap, and a gap is present between the two second main body portions 3361.

[0172] In some examples, the array substrate 33 includes second electrode strips and a plurality of second openings, which cut the second electrode strips to form a plurality of the above-mentioned second main body portions 3361 along the first direction X.

[0173] In some embodiments, as shown in FIG. 13, along the second direction Y, the distance between the two second main body portions 3361 between two adjacent data lines 335 is greater than or equal to 3 μm. For example, the distance between the two second main body portions 3361 between two adjacent data lines 335 is 3 μm, 3.2 μm, 3.4 μm, 3.7 μm, 4 μm, 4.1 μm, 4.5 μm, 4.9 μm, or 5.1 μm.

[0174] In some examples, no black matrix 34 is provided at the gap between the two second main body portions 3361 between two adjacent data lines 335. Alternatively, the black matrix 34 further includes a fourth black matrix portion, which covers the gap between the two second main body portions 3361 between two adjacent data lines 335.

[0175] In some embodiments, as shown in FIG. 13, the distance between one of the two first main body portions 3321 and the second main body portion 3361 between two adjacent data lines 335 is equal to the distance between the other of the two first main body portions 3321 and the second main body portion 3361.

[0176] In this way, the difference in the width dimension of the two second connecting portions 3362 along the first direction X between two adjacent data lines 335 can be reduced, thereby the difference in the storage capacitor of the two first sub-pixels 10 between two adjacent data lines 335 can be reduced, which is conducive to improving the display effect of the display panel 300.

[0177] In some embodiments, as shown in FIG. 14, the second pixel electrode 336 and the data line 335 are of the same material and are provided in the same layer. In this way, the uniformity of the materials in the display panel 300 can be improved, and the manufacturing cost of the display panel 300 can be reduced.

[0178] In some embodiments, as shown in FIGS. 15 and 16, the display panel 300 further includes a plurality of first isolation lines 36. The plurality of first isolation lines 36 extend along the second direction Y and are arranged at intervals along the first direction X. The first isolation line 36 is of the same material as the first pixel electrode 332 and is provided in the same layer, and one first isolation line 36 is located between two columns of first pixel electrodes 332 between two adjacent data lines 335.

[0179] In this way, as shown in FIG. 17, the first isolation lines 36 can reduce the coupling capacitance of the two columns of first pixel electrodes 332 between the two adjacent data lines 335, which is conducive to improving the display effect of the display panel 300.

[0180] In this document, "the first isolation lines 36 extend along the second direction Y" means that the running direction of the first isolation lines 36 as a whole is along the second direction Y, but it is not limited that each position of the data line 335 strictly extends along the second direction Y. That is, "extend along the second direction Y" here not only includes the first isolation lines 36 that strictly extend along the second direction Y at each position, but also includes the first isolation lines 36 that locally bend to avoid interference from other structures.

[0181] In some examples, as shown in FIG. 15, along the second direction Y, the first isolation lines 36 include third body parts 363 and third connecting parts 364 connected alternately. The third body parts 363 extend along the second direction Y and are located between the two adjacent first pixel electrodes 332, and the third connecting parts 364 extend along the first direction X and connect the two adjacent third body parts 363.

[0182] Exemplarily, as shown in FIG. 15, one of the two first pixel electrodes 332 is a first target pixel electrode 3323, and the other is a second target pixel electrode 3324. The third body part 363 includes a first sub-part 3631, a second sub-part 3632 and a third sub-part 3633 connected. The first sub-part 3631 extends along the second direction Y and is located between the first body part 3321 of the first target pixel electrode 3323 and the first connecting part 3322 of the second target pixel electrode 3324. The second sub-part 3632 extends along the second direction Y and is located between the first body part 3321 of the first target pixel electrode 3323 and the first body part 3321 of the second target pixel electrode 3324, and along the first direction X, the second sub-part 3632 is located on the side of the first sub-part 3631 close to the second target pixel electrode 3324. The third sub-part 3633 extends along the second direction Y and is located between the first connecting part 3322 of the first target pixel electrode 3323 and the first body part 3321 of the second target pixel electrode 3324, and along the first direction X, the third sub-part 3633 is located on the side of the second sub-part 3632 close to the second target pixel electrode 3324.

[0183] In some embodiments, as shown in FIG. 18, the common electrode 333 is located between the first pixel electrode 332 and the first substrate 331, and the common electrode 333 and the first isolation line 36 are connected. For example, the common electrode 333 and the first isolation line 36 are connected through a via hole.

[0184] In this way, the first isolation line 36 and the common electrode 333 are in parallel, and the resistance of the common electrode 333 can be reduced, that is, the first isolation line 36 can replace the first signal line in the related art. As known from the above, the material of the first pixel electrode 332 has a high light transmittance, that is, the material of the first isolation line 36 also has a high light transmittance. In this way, the light emitted by the backlight source 200 can pass through the first isolation line 36 and be emitted, so that the transmittance of the display panel 300 can be improved, and the display effect of the display panel 300 can be improved.

[0185] In some embodiments, on the basis of the above-mentioned embodiments, as shown in FIG. 18, the array substrate further includes an electrode block 37. The electrode block 37 is located in the peripheral area BB and is connected with the common electrode 333. The electrode block 37 is made of the same material as the first isolation line 36 and is arranged in the same layer, and the plurality of first isolation lines 36 further extend to the peripheral area BB and are connected with the electrode block 37. In this way, the first isolation line 36 and the common electrode 333 are connected to reduce the resistance of the common electrode 333.

[0186] In some examples, the electrode block 37 and the common electrode 333 are connected through a via hole.

[0187] In some embodiments, as shown in FIG. 18, the display panel 300 further includes a plurality of second transistors 1. The plurality of second transistors 1 are located between the first transistor 11 and the electrode block 37 and are located on both sides of the display area AA along the second direction Y. The second transistor 1 is adjacent to the first transistor 11 close to the peripheral area BB, and the second transistor 1 is electrically insulated from the first pixel electrode 332, that is, the second transistor 1 does not control the voltage on any first pixel electrode 332 and does not control the deflection degree of any liquid crystal. Even if the second transistor 1 has a poor uniformity problem, it will not affect the light emission of any light emitting device.

[0188] In this way, the edges of the plurality of transistors (the first transistor 11 and the second transistor 1) are transferred from the first transistor 11 to the second transistor 1, which can improve the uniformity of the plurality of first transistors 11, so that the first pixel electrode 332 connected with the first transistor 11 close to the peripheral area BB can work normally, and the second transistor 1 is electrically insulated from the first pixel electrode 332, that is, the second transistor 1 does not control the voltage on any first pixel electrode 332 and does not control the deflection degree of any liquid crystal. Even if the second transistor 1 has a poor uniformity problem, it will not affect the deflection degree of the liquid crystal molecules of the liquid crystal layer 32 and will not affect the display effect of the display panel 300.

[0189] In some examples, as shown in FIG. 18, the width-length ratio of the second transistor 1 is greater than the width-length ratio of the size of the first transistor 11.

[0190] In some examples, the semiconductor layer ACT further includes active portions of the plurality of second transistors 1. In this way, the edge of the semiconductor layer ACT is transferred from the active portion of the first transistor 11 to the active portion of the second transistor 1. In this way, the problem of poor uniformity of the active portion of the first transistor 11 is avoided, and the display effect of the display panel 30020 is improved.

[0191] In some embodiments, as shown in FIGS. 18 and 19, the electrode block 37 surrounds the plurality of first transistors 11 and the plurality of second transistors 1. At this time, the first isolation line 36 includes a first wire segment 361 and a second wire segment 362, the first wire segment 361 is at least partially located in the display area AA, and the second wire segment 362 is located in the peripheral area. The first wire segment is connected to the electrode block 37 through the second wire segment 362. The plurality of second transistors 1 are provided with the first isolation line 36 away from one side of the first substrate 331, and the first pixel electrode 332 is not provided. In this way, the second wire segment 362 can be set to be wider, thereby reducing the resistance of the first isolation line 36, further reducing the resistance of the common electrode 333, and reducing the voltage drop on the common electrode 333.

[0192] In some examples, as shown in FIG. 18, in the first direction X, the width dimension of the second wire segment 362 is greater than the width dimension of the first wire segment 361.

[0193] In this way, the resistance of the first isolation line 36 can be reduced, thereby further reducing the resistance of the common electrode 333 and reducing the voltage drop on the common electrode 333.

[0194] In some embodiments, as shown in FIG. 19, the display panel 300 further includes a plurality of redundant sub-pixels 20, and the plurality of redundant sub-pixels 20 are located between the electrode block 37 and the plurality of first sub-pixels 10. The plurality of redundant sub-pixels 20 are adjacent to the first sub-pixels 10 close to the peripheral area BB, and the pixel electrode in the redundant sub-pixel 20 is connected to the common electrode 333. That is, the voltage difference between the pixel electrode in the redundant sub-pixel 20 and the common electrode 333 is a certain value (0 and / or the voltage value received at the common electrode 333), the pixel electrode in the redundant sub-pixel 20 and the common electrode 333 do not form an electric field or form a constant electric field, that is, the pixel electrode in the redundant sub-pixel 20 does not control the deflection degree of any liquid crystal molecule, or the deflection degree of the liquid crystal molecule controlled by the pixel electrode in the redundant sub-pixel 20 is the same. Even if the redundant sub-pixel 20 has poor uniformity, it will not affect the deflection degree of the liquid crystal molecule of the liquid crystal layer 32, and will not affect the display of the display panel 300.

[0195] In this way, the edges of the plurality of first sub-pixels 10 (the first sub-pixels 10 and the redundant sub-pixels 20) are transferred from the first sub-pixels 10 to the redundant sub-pixels 20, which can improve the uniformity of the plurality of first sub-pixels 10, so that the first sub-pixels 10 near the peripheral area BB can work normally, and the redundant sub-pixels 20 are connected to the common electrode 333, so that even if the redundant sub-pixels 20 have poor uniformity, the deflection degree of the liquid crystal molecules of the liquid crystal layer 32 will not be affected, and the display of the display panel 300 will not be affected.

[0196] In some examples, as shown in FIG. 19, the plurality of redundant sub-pixels 20 are arranged in multiple rows and multiple columns, each row of first sub-pixels 10 includes at least two first sub-pixels 10 arranged along the first direction X, each row of first sub-pixels 10 includes at least two first sub-pixels 10 arranged along the first direction X, and each column of first sub-pixels 10 includes at least two first sub-pixels 10 arranged along the second direction Y.

[0197] In some examples, as shown in FIG. 20, the display panel 300 further includes a plurality of second signal lines 38, the plurality of second signal lines 38 extend from the display area AA to the peripheral area BB along the first direction X, and the plurality of second signal lines 38 are located on both sides of the plurality of gate lines 334 along the second direction Y. The second signal lines 38 are connected to the common electrode 333 and the redundant sub-pixels 20 located on both sides of the plurality of first sub-pixels 10 along the second direction Y. In this way, the signal received at the first signal line can keep the transistor of the redundant sub-pixel 20 closed, so that the voltage difference between the pixel electrode of the redundant sub-pixel 20 and the common electrode 333 is the voltage value received at the common electrode 333, the pixel electrode of the redundant sub-pixel 20 and the common electrode 333 form a constant electric field, and the deflection degree of the liquid crystal molecules controlled by the pixel electrode of the redundant sub-pixel 20 is the same, so that even if the redundant sub-pixel 20 has poor uniformity, the deflection degree of the liquid crystal molecules of the liquid crystal layer 32 will not be affected, and the display of the display panel 300 will not be affected.

[0198] Exemplarily, the second signal lines 38 and the gate lines 334 are made of the same material and arranged in the same layer.

[0199] It should be noted that the redundant sub-pixels 20 located on both sides of the plurality of first sub-pixels 10 along the first direction X are connected to the gate lines 334, so that the first sub-pixels 10 located between the redundant sub-pixels 20 can work normally.

[0200] In some examples, as shown in FIG. 20, the display panel 300 further comprises a third signal line 39 extending from the display area AA to the peripheral area BB along the second direction Y, and the third signal line 39 is located on both sides of the plurality of data lines 335 along the first direction X. The third signal line 39 is connected with the common electrode 333 and the redundant sub-pixel 20 located on both sides of the plurality of first sub-pixels 10 along the first direction X, so that the signal received at the pixel electrode of the redundant sub-pixel 20 is the signal received at the common electrode 333, the voltage difference between the pixel electrode in the redundant sub-pixel 20 and the common electrode 333 is 0, the pixel electrode in the redundant sub-pixel 20 and the common electrode 333 do not form an electric field, that is, the pixel electrode in the redundant sub-pixel 20 does not control the deflection degree of any liquid crystal molecule, and even if the redundant sub-pixel 20 has a poor uniformity problem, it will not affect the deflection degree of the liquid crystal molecules of the liquid crystal layer 32, and will not affect the display of the display panel 300.

[0201] Exemplarily, the third signal line 39 and the data line 335 are made of the same material and arranged in the same layer.

[0202] It should be noted that the redundant sub-pixel 20 located on both sides of the plurality of first sub-pixels 10 along the second direction Y is connected with the data line 335, so that the first sub-pixel 10 located between the redundant sub-pixels 20 can work normally.

[0203] In some embodiments, the display panel 300 further comprises a plurality of redundant pixel electrodes located between the electrode block 37 and the plurality of first pixel electrodes 332. The plurality of redundant pixel electrodes are adjacent to the first pixel electrodes 332 close to the peripheral area, and the redundant pixel electrodes are electrically insulated from the first transistor 11, so that the voltage value on the redundant pixel electrode is 0, the voltage difference between the redundant pixel electrode and the common electrode 333 is a certain value, the deflection degree of the liquid crystal molecules controlled by the redundant pixel electrode is the same, and even if the redundant pixel electrode has a poor uniformity problem, it will not affect the deflection degree of the liquid crystal molecules of the liquid crystal layer 32, and will not affect the display effect of the display panel 300.

[0204] In this way, the edges of the plurality of pixel electrodes (the first pixel electrode 332 and the redundant pixel electrode) are transferred from the first pixel electrode 332 to the redundant pixel electrode, which can improve the uniformity of the plurality of first pixel electrodes 332, so that the first pixel electrode 332 close to the peripheral area works normally, and the redundant pixel electrode is electrically insulated from the first transistor 11, so that the voltage value on the redundant pixel electrode is 0, the voltage difference between the redundant pixel electrode and the common electrode 333 is a certain value, the deflection degree of the liquid crystal molecules controlled by the redundant pixel electrode is the same, and even if the redundant pixel electrode has a poor uniformity problem, it will not affect the deflection degree of the liquid crystal molecules of the liquid crystal layer 32, and will not affect the display effect of the display panel 300.

[0205] In some examples, the first conductive layer 301 further comprises a redundant pixel electrode. In this way, the edge of the first conductive layer 301 is transferred from the first pixel electrode 332 to the redundant pixel electrode. In this way, the problem of poor uniformity of the first pixel electrode 332 is avoided, and the display effect of the display panel 300 is improved.

[0206] In some embodiments, as shown in FIG. 15, the distance between one of the two first pixel electrodes 332 between the two adjacent data lines 335 and the first isolation line 36 is equal to the distance between the other and the first isolation line 36.

[0207] In this way, the difference between the coupling capacitance between one of the two first pixel electrodes 332 between the two adjacent data lines 335 and the first isolation line 36 and the coupling capacitance between the other and the first isolation line 36 can be reduced, which is beneficial to improve the display effect of the display panel 300.

[0208] In some embodiments, as shown in FIG. 15, the display panel 300 comprises the first isolation line 36. As known from the above, the first isolation line 36 can reduce the coupling capacitance between the two first pixel electrodes 332 between the two adjacent data lines 335. Therefore, it is not necessary to additionally increase the two first pixel electrodes 332 between the two adjacent data lines 335, and the coupling capacitance between the two first pixel electrodes 332 between the two adjacent data lines 335 can also be small.

[0209] In some examples, as shown in FIG. 15, the distance between the two first pixel electrodes 332 between the two adjacent data lines 335 along the first direction X is less than or equal to 9 μm. For example, the distance between the two first pixel electrodes 332 between the two adjacent data lines 335 along the first direction X is 5 μm, 5.6 μm, 6 μm, 7.1 μm, 7.7 μm, 8 μm, 8.5 μm, 8.9 μm or 9 μm.

[0210] In other embodiments, as shown in FIGS. 21 and 22, the two adjacent columns of first pixel electrodes 332 are located between the two adjacent data lines 335, and the distance between the two first pixel electrodes 332 between the two adjacent data lines 335 along the first direction X is greater than 9 μm. For example, the distance between the two first pixel electrodes 332 between the two adjacent data lines 335 along the first direction X is 9 μm, 9.6 μm, 10 μm, 10.1 μm, 10.7 μm, 11 μm, 11.5 μm, 11.9 μm or 12 μm.

[0211] In this way, as shown in FIGS. 21 and 22, the distance between the two first pixel electrodes 332 between two adjacent data lines 335 is large, so that the coupling capacitance between the two first pixel electrodes 332 between two adjacent data lines 335 can be reduced, and the display effect of the display panel 300 is improved.

[0212] In some embodiments, the display panel 300 further comprises a spacer, the spacer is located between the array substrate 33 and the opposite substrate 31. One end of the spacer is based on the array substrate 33, and the other end is in contact with the opposite substrate 31. The spacer is used to support the array substrate 33 and the opposite substrate 31.

[0213] In addition, as shown in FIG. 11, the black matrix 34 further comprises a fifth black matrix part 345, and the orthogonal projection of the fifth black matrix part 345 on the first substrate 331 covers the orthogonal projection of the spacer on the first substrate 331.

[0214] In this way, the risk of light emitted by the backlight source 200 leaking from the spacer to the display panel 300 can be reduced.

[0215] In some embodiments, as shown in the drawings, the first black matrix part 341 and the fifth black matrix part 345 partially overlap.

[0216] In the description of this specification, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0217] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

A display panel has a display area, the display panel comprising: a plurality of first sub-pixels located in the display area, the plurality of first sub-pixels arranged in a plurality of rows and a plurality of columns; each row comprising at least two first sub-pixels arranged along a first direction, and each column comprising at least two first sub-pixels arranged along a second direction, the first direction and the second direction intersecting; the display panel comprising: a first substrate; a plurality of gate lines located on a first side of the first substrate; the plurality of gate lines extending along the first direction and being spaced apart along the second direction; two adjacent gate lines being located between two adjacent rows of the first sub-pixels, and having a gap therebetween; a black matrix located on the first side of the first substrate; the black matrix comprising a first black matrix part; in the display area and in a projection onto the first substrate, the first black matrix part being located between two boundaries of the two gate lines away from each other between two adjacent rows of the first sub-pixels, and covering the gap between the two gate lines. The display panel of claim 1, wherein, the first sub-pixel comprising a first transistor; the black matrix comprising: a second black matrix part, a projection of the second black matrix part onto the substrate covering a projection of the first transistor onto the first substrate. The display panel according to claim 2, wherein, the plurality of gate lines being divided into a plurality of groups, each group of gate lines comprising two gate lines, one row of the first sub-pixels being located between the two gate lines comprised by one group of the gate lines, one row of the first sub-pixels being located between two adjacent gate lines, a first transistor in the first sub-pixel in an odd column of the one row of the first sub-pixels being connected to one of the two gate lines comprised by one group of the gate lines, and a first transistor in the first sub-pixel in an even column being connected to the other gate line; the display panel further comprising a plurality of data lines located on the first side of the first substrate, the plurality of data lines extending along the second direction and being spaced apart along the first direction, two columns of the first sub-pixels being located between two adjacent data lines, and one data line being located between two adjacent columns of the first sub-pixels, the data line being connected to the first transistors of the two columns of the first sub-pixels located on both sides of the data line; the second black matrix part extending along the first direction, a projection of the second black matrix part onto the first substrate further overlapping with a projection onto the first substrate of a data line to which the first transistor corresponding to the second black matrix part is connected; wherein no black matrix is provided between a second black matrix part corresponding to a first target transistor and a second black matrix part corresponding to a second target transistor; the first target transistor and the second target transistor being connected to the same data line, and the first target transistor being connected to one of the two gate lines comprised by one group of the gate lines, and the second target transistor being connected to the other gate line. The display panel according to any one of claims 1 to 3, wherein further comprising: A plurality of filter portions are located on the first side of the first substrate, one of the filter portions corresponds to one of the first sub-pixels, the plurality of filter portions are divided into a plurality of groups of filter portions, one group of the filter portions includes a first filter portion, a second filter portion, a third filter portion and a fourth filter portion arranged in sequence along the first direction, the first filter portion transmits light of a first color, the second filter portion transmits light of a second color, the third filter portion transmits light of a third color, and the fourth filter portion can transmit light of any color, the first color, the second color and the third color constitute three primary colors; The black matrix includes: A third black matrix portion extends along the second direction; Along the first direction, the first sub-pixel corresponding to the fourth filter portion is located between two adjacent third black matrix portions, and the fourth filter portion partially overlaps the third black matrix portion; and / or, the first filter portion and the second filter portion partially overlap, and the overlapping part of the first filter portion and the second filter portion is located between the first sub-pixel corresponding to the first filter portion and the first sub-pixel corresponding to the second filter portion, the second filter portion and the third filter portion partially overlap, and the overlapping part of the second filter portion and the third filter portion is located between the first sub-pixel corresponding to the second filter portion and the first sub-pixel corresponding to the third filter portion. The display panel according to claim 4, wherein The first filter portion and the third black matrix portion overlap, and are arranged staggered with the fourth filter portion, and / or, the third filter portion and the third black matrix portion overlap, and are arranged staggered with the fourth filter portion. The display panel according to any one of claims 2-5, further comprising: A plurality of first pixel electrodes are located on the first side of the first substrate, the first pixel electrode includes a first main body portion and a first connecting portion connected to each other, a projection of the first connecting portion on the first substrate overlaps a projection of the first transistor on the first substrate, and the first connecting portion is connected to the first transistor; the first main body portion extends along the second direction and has a strip structure, and along the second direction, the first main body portion is located on a side of the first connecting portion away from a gate line corresponding to the first connecting portion. The display panel according to claim 6, wherein, The width of the first main body portion along the first direction is 3.5-4.5 μm. The display panel according to any one of claims 6 or 7, further comprising: A common electrode is located on the first side of the first substrate and is located on a different layer from the first pixel electrode; Along a third direction, a distance between the first pixel electrode and the common electrode is less than or equal to 2000 angstroms; wherein the third direction is perpendicular to the first substrate. The display panel according to claim 6, wherein Further comprising: A plurality of second pixel electrodes, one of the second pixel electrodes is connected to one of the first pixel electrodes; The first pixel electrode and the second pixel electrode are located on different layers. The display panel according to claim 9, wherein, The width of the first main body portion along the first direction is 2.5-3.5 μm. The display panel according to claim 9, further comprising: A common electrode is located on the first side of the first substrate and is located on a different layer from the first pixel electrode; The distance between the first pixel electrode and the common electrode is greater than 2000 angstroms in a third direction perpendicular to the first substrate. The display panel according to claim 6, wherein The first main body part of the first pixel electrode between two adjacent data lines is located on the side of the first axis close to the data line corresponding to the first pixel electrode, wherein the first axis extends along the second direction and passes through the center of the first connecting part. The display panel according to claim 12, wherein, The second pixel electrode comprises a second main body part and a second connecting part connected to each other, and in the orthogonal projection onto the first substrate, the second connecting part and the first connecting part partially overlap and are connected, the second main body part extends along the second direction, and along the first direction, the second main body part is located on the side of the second connecting part away from the data line corresponding to the second connecting part. The display panel according to claim 13, wherein, The two second main body parts between two adjacent data lines are located between the two first main body parts, and the extension lines of the two second main body parts between two adjacent data lines overlap. The display panel of claim 14, wherein, The distance between one of the two first main body parts and the second main body part between two adjacent data lines is equal to the distance between the other and the second main body part. The display panel according to claim 10 further comprises a data line, and the second pixel electrode and the data line are made of the same material and are arranged in the same layer. The display panel according to any one of claims 6-16, wherein Two adjacent columns of the first pixel electrode are located between two adjacent data lines. The display panel further comprises: A plurality of first isolation lines extend along the second direction and are arranged at intervals along the first direction; the first isolation lines are made of the same material as the first pixel electrode and are arranged in the same layer, and one of the first isolation lines is located between two columns of the first pixel electrode between two adjacent data lines. The display panel of claim 17, wherein, Further comprising A common electrode is located between the first pixel electrode and the first substrate; the common electrode is connected to the first isolation line. The display panel according to claim 18 further has a peripheral area surrounding the display area. The display panel further comprises: An electrode block is located in the peripheral area and is connected to the common electrode; the electrode block is made of the same material as the first isolation line and is arranged in the same layer; The plurality of first isolation lines further extend to the peripheral area and are connected to the electrode block. The display panel according to claim 19 further comprises a plurality of second transistors, which are located between the first transistors and the electrode block and are located on both sides of the display area along the second direction; the second The second transistor is adjacent to the first transistor close to the peripheral area and is electrically insulated from the first pixel electrode; The first isolation line comprises a first wire segment and a second wire segment, the first wire segment is at least partially located in the display area, and the second wire segment is located in the peripheral area; the first wire segment is connected to the electrode block through the second wire segment; along the first direction, the width dimension of the second wire segment is greater than that of the first wire segment. The display panel according to any one of claims 17 to 20, wherein The distance between one of the two first pixel electrodes between two adjacent data lines and the first isolation line is equal to the distance between the other and the first isolation line. The display panel according to any one of claims 17 to 21, wherein In the first direction, a distance between two first pixel electrodes between two adjacent data lines is less than or equal to 9 μm. The display panel according to any one of claims 6-16, wherein In the first direction, a distance between two pixel electrodes between two adjacent data lines is greater than 9 μm. The display panel according to any one of claims 1-23, comprising an array substrate, a liquid crystal layer and a counter substrate; the array substrate and the counter substrate are oppositely arranged, and the liquid crystal layer is located between the array substrate and the counter substrate; The array substrate comprises: a first substrate; a first conductive layer located on a first side of the first substrate, the first conductive layer comprising gate lines; a second conductive layer located on a side of the first conductive layer away from the first substrate, the second conductive layer comprising data lines and / or second pixel electrodes; a third conductive layer located on a side of the second conductive layer away from the first substrate, the third conductive layer comprising common electrodes; a fourth conductive layer located on a side of the third conductive layer away from the first substrate, the fourth conductive layer comprising first pixel electrodes and / or first isolation lines; The counter substrate comprises: a second substrate; a black matrix located on a side of the second substrate close to the array substrate; a plurality of filter portions located on a side of the plurality of black matrices away from the second substrate. A projection device, comprising: a housing having a receiving cavity; the display panel according to any one of claims 1-24, the display panel being located in the receiving cavity.

Images