Preparation method for TBC solar cell having double interdigitated back contact structure

Abstract

The present invention relates to the field of solar cells. Disclosed is a preparation method for a TBC solar cell having a double interdigitated back contact structure. A TBC solar cell prepared by means of the present invention has a (p-p-n-n-p-p-n-n) or (p-p-n-p-p-n) or (p-n-n-p-n-n) double interdigitated back contact structure, which can increase the width of a p-region or n-region during initial patterning design and reduce the number of fine fingers designed on a surface of an initial silicon wafer, thereby reducing the complexity and difficulty of pattern design. In addition, even if, in subsequent processing, an isolation region between fine fingers of the same doping type (between p-p or between n-n) is relatively narrow or partial conduction occurs between the fine fingers, the effect of short circuiting can be ignored, and the risk of short circuiting between a p-region and an n-region can be reduced, thereby improving the battery performance.

Description

Preparation method of a TBC solar cell with a double-cross contact structure TECHNICAL FIELD

[0001] The present application relates to the field of solar cells, and in particular to a preparation method of a TBC solar cell with a double-cross contact structure. BACKGROUND

[0002] An IBC cell, i.e., an interdigitated back contact solar cell, is a structural technology that can be compatible with various interface passivation technologies to form TBC, HBC, HPBC, etc. solar cells. The biggest feature is that the metal cell contact is placed on the back of the cell, and the front surface is not blocked by metal electrodes, so it has a higher short-circuit current J sc , and the back surface can allow wider metal grid lines to reduce the series resistance R s , thereby improving the fill factor FF, so BC solar cells often have higher conversion efficiency. In addition, IBC cell modules are more convenient and flexible to package, changing from the conventional "Z" shape welding to full-back "I" shape welding, avoiding the complex packaging process of conventional modules, and effectively improving the anti-cracking ability of the modules. As a TOPCon+ technology, the TBC cell combines the excellent tunneling silicon oxide / doped amorphous silicon interface passivation technology of the TOPCon cell, has higher conversion efficiency potential, and is expected to become the next generation of mass-produced solar cells.

[0003] The most critical process for preparing a TBC solar cell is back patterning design, and the rationality of the patterning design is directly related to the performance of the subsequent cell. The traditional TBC solar cell back electrode contact form is a conventional p-n-p-n-p-n single-cross contact structure, in order to maximize the current and improve the FF of the cell, the entire sub-grid patterning design is very close. Among them, the width of the p region (boron diffusion layer region) and the n region (phosphorus diffusion layer region) is generally 100-600 mu m, and the width of the isolation region is generally 40-300 mu m. Due to the small spacing of the patterning design, the p region and the n region are easily connected, causing the entire cell to short circuit, which makes the TBC solar cell back patterning design process very complex and requires high precision.

[0004] Therefore, how to reduce the patterning design difficulty of the TBC solar cell and reduce the short circuit risk of the p region and the n region is a problem to be solved. SUMMARY

[0005] To solve the above technical problems, the application provides a preparation method of a TBC solar cell with a double-cross contact structure. The TBC solar cell prepared by the application has a (p-p-n-n-p-p-n-n) or (p-p-n-p-p-n) or (p-n-n-p-n-n) double-cross contact structure, which can expand the width of the p region or the n region in the initial patterning design, reduce the number of the auxiliary grid roots on the surface of the initial silicon wafer, and thus reduce the complexity and difficulty of the pattern design. In addition, even if the isolation region between the auxiliary grids with the same doping type (between p-p or between n-n) is narrow or partially conductive, the influence of short circuit can be ignored, the risk of short circuit between the p region and the n region is reduced, and the performance of the cell is improved. At the same time, since the width (10-100 μm) of the isolation region between the auxiliary grids with the same doping type (between p-p or between n-n) is narrower than the width (40-300 μm) of the isolation region between the auxiliary grids with different doping types (between p-n), the area of the poly-Si collector on the whole surface of the silicon substrate is also larger, which helps to improve the FF value.

[0006] The specific technical scheme of the application is as follows: a preparation method of a TBC solar cell with a double-cross contact structure, specifically comprising the following steps: S1, polishing both sides of a silicon wafer.

[0007] S2, sequentially forming a tunneling oxide layer, an intrinsic poly-Si layer and a mask layer on the back surface of the silicon wafer.

[0008] The purpose of setting the mask layer is to block the doping atoms from entering the intrinsic poly-Si layer at the bottom thereof during subsequent boron diffusion and phosphorus diffusion processes.

[0009] S3, laser one-time patterning and slotting to remove the mask layer in the design region of the boron diffusion layer (p region).

[0010] S4, alkali cleaning to remove the residual mask layer in the slotting region, so that the intrinsic poly-Si layer is exposed.

[0011] S5, boron diffusion, so that the inner layer and the surface layer of the intrinsic poly-Si layer in the slotting region are respectively converted into a boron diffusion layer and a BSG layer.

[0012] During the above boron diffusion process, the unslotted region in S3 is protected by the mask layer, so that the boron atoms can be effectively blocked from entering the intrinsic poly-Si layer, and only the inner layer and the surface layer of the exposed intrinsic poly-Si layer are respectively converted into a boron diffusion layer and a BSG layer.

[0013] S6, laser two-time patterning and slotting to the remaining mask layer region.

[0014] The slotting to remove the remaining mask layer region is to expose the surface of the remaining intrinsic poly-Si layer by subsequent alkali cleaning.

[0015] S7, the residual mask layer in the slot area of S6 is removed by alkaline cleaning, so that the surface of the remaining intrinsic polysilicon layer is exposed, and the boron diffusion layer is protected by the BSG layer on its surface and is not corroded.

[0016] S8, phosphorus diffusion, so that the inner layer and the surface layer of the remaining intrinsic polysilicon layer are respectively converted into phosphorus diffusion layer and PSG layer.

[0017] In the above phosphorus diffusion process, since the surface of the boron diffusion layer is protected by the BSG layer, the phosphorus atoms cannot effectively diffuse into the boron diffusion layer, and only the inner layer and the surface layer of the remaining intrinsic polysilicon layer are respectively converted into phosphorus diffusion layer and PSG layer.

[0018] S9, the BSG layer and the PSG layer at the junction (i.e. the isolation area design region between the n region and the p region) are three times patterned and grooved by laser, and the BSG layer and the PSG layer in the grooved area are removed.

[0019] Grooving at the junction of the BSG layer (i.e. the boron diffusion layer region) and the PSG layer (i.e. the phosphorus diffusion layer region) can lay the foundation for the subsequent formation of the insulating isolation area.

[0020] S10, the middle area (i.e. the isolation area design region between the n region or the p region) of each remaining BSG layer and PSG layer is four times patterned and grooved by laser, forming a double-symmetrical double-crossed p-p-n-n-p-p-n-n contact structure prototype.

[0021] Or the middle area (i.e. the isolation area design region between the n region or the p region) of each remaining BSG layer is four times patterned and grooved by laser, forming a single-symmetrical double-crossed p-p-n-p-p-n contact structure prototype.

[0022] Or the middle area (i.e. the isolation area design region between the n region or the p region) of each remaining PSG layer is four times patterned and grooved by laser, forming a single-symmetrical double-crossed p-n-n-p-n-n contact structure prototype.

[0023] Through the above three grooving methods, three different double-crossed contact structure prototypes can be obtained.

[0024] S11, remove the front and side wrap plating layers of the silicon wafer.

[0025] S12, clean and texturize.

[0026] First, the silicon wafer is wet cleaned and textured in an alkaline solution on the front and back surface of the laser grooving area. Since the front surface of the silicon wafer has been removed from the plating layer without oxidation area, an effective light trapping texture (i.e. pyramid texture) can be formed during the texturing process. The back surface is laser three times patterned and grooved, and the alkaline solution can effectively corrode the bottom deposition layer to form an insulating isolation area, and a pyramid texture is also generated on the surface of the isolation area. The non-laser area can be further blocked by the alkaline corrosion due to the presence of PSG layer / BSG layer. For the laser four times patterned and grooved BSG layer middle groove area and PSG layer middle groove area, the corresponding area of the boron diffusion layer and the phosphorus diffusion layer can also be removed during the alkaline texturing process, so that the initial boron diffusion layer and the phosphorus diffusion layer are divided into two parts at equal intervals, and three different double cross contact structures can be formed according to different grooving methods. Subsequently, the self-acid cleaning groove after texturing can further remove the residual PSG layer and BSG layer on the surface of the silicon wafer.

[0027] S13, double-sided film plating. After double-sided film plating, a passivation anti-reflection layer is generated on the front / back surface of the silicon wafer.

[0028] S14, screen printing, sintering, light injection, to obtain a double cross contact structure TBC solar cell.

[0029] As described in the background section of the present application, the conventional TBC solar cell back electrode contact form is a conventional p-n-p-n-p-n single cross contact structure. In order to induce current to the greatest extent and improve the FF of the cell, the entire secondary grid pattern design is very close. The width of the p region and the n region is generally 100-600 μm, and the width of the isolation region is generally 40-300 μm. Due to the small pattern design pitch, the p region and the n region are easily connected, which causes the entire cell to short circuit, which makes the TBC solar cell back pattern design process very complex and requires high precision. In order to reduce the difficulty of TBC solar cell pattern design and reduce the risk of short circuit between the p region and the n region, the present application can obtain a new TBC solar cell with p-p-n-n-p-p-n-n or p-p-n-p-p-n or p-n-n-p-n-n three different double cross contact structures according to the above method (as shown in FIG. 1(b-d)). The new structure can expand the width of the p region or the n region during the initial pattern design, reduce the number of secondary grid on the surface of the initial silicon wafer, and thus reduce the complexity and difficulty of the pattern design. In addition, even if the isolation area between the same doping type secondary grids (p-p or n-n) is narrow or partially connected, the influence of short circuit can be ignored, the risk of short circuit between the p region and the n region is reduced, and the performance of the cell is improved.

[0030] As preferred, in the single symmetric double-cross p-p-n-p-p-n contact structure embryo, the width of the single p region is 600-2000 μm, the width of the single n region is ≤600 μm; the width of the single isolation region between the p regions or between the n regions is 10-100 μm, and the width of the single isolation region between the p and n regions is 40-300 μm.

[0031] As preferred, in the single symmetric double-cross p-p-n-p-p-n contact structure embryo, the width of the single p region is 600-2000 μm, the width of the single n region is ≤600 μm; the width of the single isolation region between the p regions or between the n regions is 10-100 μm, and the width of the single isolation region between the p and n regions is 40-300 μm.

[0032] As preferred, in the single symmetric double-cross p-p-n-p-p-n contact structure embryo, the width of the single p region is 600-2000 μm, the width of the single n region is ≤600 μm; the width of the single isolation region between the p regions or between the n regions is 10-100 μm, and the width of the single isolation region between the p and n regions is 40-300 μm.

[0033] In the above three different schemes of the present application, the width (10-100 μm) of the isolation region between the same-doping-type sub-gates (between p-p or between n-n) is narrower than the width (40-300 μm) of the isolation region between the different-doping-type sub-gates (between p-n), so that the poly-Si collecting carrier area of the whole surface of the silicon substrate is also larger, which helps to improve the FF value and the like.

[0034] As preferred, in S2, the mask layer is formed by ultraviolet oxidation laser treatment: first, generate a mask layer embryo under the condition of oxygen concentration 20-30% (volume concentration) and ultraviolet laser wavelength 300-400 nm; and then form a denser mask layer under the condition of oxygen concentration 30-80% (volume concentration) and ultraviolet laser wavelength 200-300 nm.

[0035] The present application found in the previous test that the compactness of the mask layer obtained by using conventional one-step ultraviolet laser oxidation process is not ideal, which will increase the risk of boron atoms and phosphorus atoms diffusing to the intrinsic polysilicon layer during subsequent boron diffusion and phosphorus diffusion, thereby causing battery leakage or performance degradation. Therefore, the present application designs the above-mentioned special distributed differential ultraviolet laser oxidation process, the principle of which is that different laser wavelengths penetrate to different depths inside the silicon. The wavelength is larger in the first step of the above-mentioned process of the present application, and the penetration depth is deeper, which can preliminarily form a relatively thick mask layer prototype; the wavelength is shorter in the second step, and the penetration depth is shallower, which can make the mask layer prototype become more dense in texture without changing the thickness; at the same time, different oxygen concentration treatment environments can make the formed mask layer more effectively block the internal diffusion of boron atoms and phosphorus atoms.

[0036] Further preferably, in S2, the conditions of the ultraviolet oxidation laser treatment are specifically: first generate a mask layer prototype under the conditions of O2 flow rate of 10-100 sccm, environmental oxygen concentration of 20-30% (volume concentration), ultraviolet laser wavelength of 300-400 nm, power of 10-500 W, and treatment time of 1-20 s; then form a more dense mask layer under the conditions of O2 flow rate of 100-500 sccm, environmental oxygen concentration of 30-80% (volume concentration), ultraviolet laser wavelength of 200-300 nm, power of 2-50 W, and treatment time of 1-20 s.

[0037] As a preferred, in S2, the thickness of the mask layer is 20-300 nm.

[0038] As a preferred, in S2, the deposition conditions of the tunneling oxide layer are: O2 flow rate of 10000-80000 sccm, reaction temperature of 400-800℃, time of 200-1000 s, and tunneling oxide layer thickness of 2-10 nm.

[0039] As a preferred, in S2, the deposition conditions of the intrinsic polysilicon layer are: SiH4 flow rate of 300-2000 sccm, reaction temperature of 500-700℃, time of 2-4 h, working pressure of 100-500 mTorr, and intrinsic polysilicon layer thickness of 100-300 nm. As a preferred, in S3, S6, S9 and S10, the conditions for slotting are: laser wavelength of 400-600 nm, frequency of 500-700 KHz, marking speed of 40000-50000 mm / s, power of 10-50 W, and treatment time of 1-5 s.

[0040] As preferred, in S5, the diffusion conditions of boron are: temperature 800-950℃, diffusion time 5-50min, BCl3 flow rate 50-500sccm, O2 flow rate 500-2000sccm; oxidation advancing temperature 900-1050℃, O2 flow rate 5000-30000sccm, advancing time 30-80min.

[0041] As preferred, in S5, the thickness of the BSG layer is 30-70nm.

[0042] As preferred, in S8, the diffusion conditions of phosphorus are: temperature 750-850℃, diffusion time 5-30min, POCl3 carried by nitrogen flow rate 500-1200sccm, O2 flow rate 500-1000sccm; oxidation advancing temperature 850-950℃, O2 flow rate 1000-10000sccm, advancing time 20-60min.

[0043] As preferred, in S8, the thickness of the PSG layer is 30-70nm.

[0044] Compared with the prior art, the present application has the following beneficial effects: (1) The TBC solar cell prepared by the present application has three different double-cross contact structures of p-p-n-n-p-p-n-n, p-p-n-p-p-n or p-n-n-p-n-n. The new structure can expand the width of the p region or n region in the initial patterning design, reduce the number of auxiliary grid roots on the surface of the initial silicon wafer, and thus reduce the complexity and difficulty of the pattern design. In addition, even if the isolation region between the auxiliary grids of the same doping type (between p-p or between n-n) is narrow or partially conductive, the influence of short circuit can be ignored, the risk of short circuit between the p region and the n region is reduced, and the performance of the cell is improved. At the same time, since the width of the isolation region between the auxiliary grids of the same doping type (between p-p or between n-n) is narrower (10-100μm) than the width of the isolation region between the auxiliary grids of different doping types (between p-n) (40-300μm), the poly-Si collector area of the silicon substrate is also larger, which helps to improve the FF value.

[0045] (2) The present application uses ultraviolet laser oxidation process to construct a mask layer on the surface of the intrinsic poly-Si layer. Compared with conventional deposition processes such as LPCVD, the mask layer construction time can be greatly shortened, and the preparation efficiency and accuracy of the mask layer can be improved. The ultraviolet laser oxidation process of the present application has a distributed differentiation feature. Compared with one-step process, the obtained mask layer has higher density, which can more effectively block the internal diffusion of boron atoms and phosphorus atoms, thereby improving the performance of the cell. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 is a structure comparison diagram of a conventional single-cross TBC solar cell (a: p-n-p-n-p-n structure) and three different double-cross contact structure TBC solar cells (b: p-p-n-n-p-p-n-n structure, c: p-p-n-p-p-n structure, d: p-n-n-p-n-n structure) of the present application.

[0047] Figure 2 is a structure schematic diagram of a silicon wafer after double-side polishing.

[0048] Figure 3 is a structure schematic diagram of a silicon wafer after forming a tunneling oxide layer, an intrinsic polysilicon layer and a mask layer.

[0049] Figure 4 is a structure schematic diagram of a silicon wafer after laser one-time patterned slotting + cleaning.

[0050] Figure 5 is a structure schematic diagram of a silicon wafer after boron diffusion.

[0051] Figure 6 is a structure schematic diagram of a silicon wafer after laser two-time patterned slotting + cleaning.

[0052] Figure 7 is a structure schematic diagram of a silicon wafer after phosphorus diffusion.

[0053] Figure 8 is a structure schematic diagram of a silicon wafer after laser three-time patterned slotting and laser four-time patterned slotting + cleaning texturing.

[0054] Figure 9 is a structure schematic diagram of a double-cross contact structure TBC solar cell.

[0055] The reference signs are: N-type monocrystalline silicon wafer 1, tunneling oxide layer 2, intrinsic polysilicon layer 3, mask layer 4, boron diffusion layer 5, BSG layer 6, phosphorus diffusion layer 7, PSG layer 8, pyramid texturing 9, passivation anti-reflection layer 10, electrode layer 11. DETAILED DESCRIPTION

[0056] The present application will be further described below in combination with examples.

[0057] A preparation method of a double-cross contact structure TBC solar cell, specifically comprising the following steps: S1, polishing both sides of a silicon wafer.

[0058] In some specific implementation cases, an N-type monocrystalline silicon wafer 1 after diamond wire cutting is selected, and the thickness is about 150 μm. The silicon wafer is placed into an alkali polishing tank, and the temperature is maintained at 75-85°C, and the time for double-side polishing is 6-8 min, the polishing thickness is 3-7 μm, and the thinning amount is 0.35-0.45 g, as shown in Figure 2.

[0059] S2, forming a tunneling oxide layer 2 (adopting an LPCVD method), an intrinsic polysilicon layer 3 (adopting an LPCVD method) and a mask layer 4 on the back of the N-type monocrystalline silicon wafer 1 in sequence, as shown in Figure 3.

[0060] The purpose of the mask layer is to block the dopant atoms from entering the intrinsic polysilicon layer at the bottom during the subsequent boron diffusion and phosphorus diffusion processes.

[0061] In some specific embodiments, the thickness of the mask layer is 20-300 nm.

[0062] In some specific embodiments, the deposition conditions of the tunneling oxide layer are as follows: O2 flow rate 10000-80000 sccm, reaction temperature 400-800℃, time 200-1000 s, and tunneling oxide layer thickness 2-10 nm.

[0063] In some specific embodiments, the deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate 300-2000 sccm, reaction temperature 500-700℃, time 2-4 h, working pressure 100-500 mTorr, and intrinsic polysilicon layer thickness 100-300 nm.

[0064] In some specific embodiments, the mask layer is formed by ultraviolet oxidation laser treatment: first, generate a mask layer prototype under the conditions of oxygen concentration 20-30% (volume concentration) and ultraviolet laser wavelength 300-400 nm; then, form a denser mask layer under the conditions of oxygen concentration 30-80% (volume concentration) and ultraviolet laser wavelength 200-300 nm.

[0065] In some more preferred embodiments, S2, the conditions of the ultraviolet oxidation laser treatment are as follows: first, generate a mask layer prototype under the conditions of O2 flow rate 10-100 sccm, ambient oxygen concentration 20-30% (volume concentration), ultraviolet laser wavelength 300-400 nm, power 10-500 W, and processing time 1-20 s; then, form a denser mask layer under the conditions of O2 flow rate 100-500 sccm, ambient oxygen concentration 30-80% (volume concentration), ultraviolet laser wavelength 200-300 nm, power 2-50 W, and processing time 1-20 s.

[0066] S3, laser one-time patterning slotting to remove the mask layer in the design area of the boron diffusion layer region (p region).

[0067] In some specific embodiments, the slotting conditions are as follows: laser wavelength 400-600 nm, frequency 500-700 KHz, marking speed 40000-50000 mm / s, power 10-50 W, and processing time 1-5 s.

[0068] S4, alkaline cleaning to remove the residual mask layer 4 in the slotting area, so that the intrinsic polysilicon layer 3 is exposed, as shown in FIG. 4.

[0069] In some specific embodiments, the silicon wafer is placed in an alkaline solution for cleaning, at a temperature of 75-85°C. During the experiment, different cleaning times and other parameters are adjusted, and the thickness of the mask layer after cleaning is tested by an ellipsometer. The mask layer in the patterned region can be accurately removed without excessive removal of the intrinsic polysilicon layer at the bottom during the alkaline cleaning process.

[0070] S5, boron diffusion, the inner layer and the surface layer of the intrinsic polysilicon layer 3 in the slotted area are respectively converted into a boron diffusion layer 5 and a BSG layer 6. During the above boron diffusion process, the S3 unslotted area is effectively blocked from boron atoms entering the intrinsic polysilicon layer 3 due to the protection of the mask layer 4, and only the exposed inner layer and surface layer of the intrinsic polysilicon layer 3 are respectively converted into a boron diffusion layer 5 and a BSG layer 6, as shown in Figure 5.

[0071] In some specific embodiments, the boron diffusion conditions are: temperature 800-950°C, diffusion time 5-50min, BCl3 flow rate 50-500sccm, O2 flow rate 500-2000sccm; oxidation advancing temperature 900-1050°C, O2 flow rate 5000-30000sccm, advancing time 30-80min. The thickness of the obtained BSG layer is 30-70nm.

[0072] S6, laser secondary patterning and slitting of the remaining mask layer 4 area. The purpose of slitting the remaining mask layer 4 area is to expose the surface of the remaining intrinsic polysilicon layer 3 during subsequent alkaline cleaning.

[0073] In some specific embodiments, the slitting conditions are: laser wavelength 400-600nm, frequency 500-700KHz, marking speed 40000-50000mm / s, power 10-50W, processing time 1-5s.

[0074] S7, alkaline cleaning to remove the residual mask layer 4 in the slotted area S6, so as to expose the surface of the remaining intrinsic polysilicon layer 3, while the boron diffusion layer 5 is protected by the BSG layer 6 on its surface and is not corroded, as shown in Figure 6.

[0075] In some specific embodiments, the silicon wafer is placed in an alkaline solution for cleaning, at a temperature of 75-85°C. During the experiment, different cleaning times and other parameters are adjusted, and the thickness of the mask layer after cleaning is tested by an ellipsometer. The mask layer in the patterned region can be accurately removed without excessive removal of the intrinsic polysilicon layer at the bottom during the alkaline cleaning process.

[0076] S8, phosphorus diffusion, the inner layer and the surface layer of the remaining intrinsic polysilicon layer 3 are converted into phosphorus diffusion layer 7 and PSG layer 8 respectively. In the above phosphorus diffusion process, because the surface of the boron diffusion layer 5 is protected by the BSG layer 6, the phosphorus atoms cannot effectively diffuse into the boron diffusion layer 5, and only the exposed inner layer and surface layer of the remaining intrinsic polysilicon layer 3 are converted into phosphorus diffusion layer 7 and PSG layer 8 respectively, as shown in Figure 7.

[0077] In some specific embodiments, the conditions for phosphorus diffusion are: temperature 750-850℃, diffusion time 5-30min, POCI3 carried by nitrogen flow at 500-1200sccm, O2 flow 500-1000sccm; oxidation advancing temperature 850-950℃, O2 flow 1000-10000sccm, advancing time 20-60min. The thickness of the obtained PSG layer is 30-70nm.

[0078] S9, laser three times patterning slotting at the junction of BSG layer 6 and PSG layer 8, removing BSG layer 6 and PSG layer 8 in the slotting area. Slotting at the junction of BSG layer 6 (i.e. boron diffusion layer 5) and PSG layer 8 (i.e. phosphorus diffusion layer 7) can lay the foundation for the subsequent formation of insulating isolation area.

[0079] In some specific embodiments, the conditions for slotting are: laser wavelength 400-600nm, frequency 500-700KHz, marking speed 40000-50000mm / s, power 10-50W, processing time 1-5s.

[0080] S10, laser four times patterning slotting in the middle area of each remaining BSG layer and PSG layer (i.e. the isolation area design area between n area or p area), forming a double symmetric double cross p-p-n-n-p-p-n-n contact structure prototype.

[0081] In some specific embodiments, the single p area width in the double symmetric double cross p-p-n-n-p-p-n-n contact structure prototype is 600-2000μm, the single n area width is 600-2000μm; the single isolation area width between p area and p area or n area and n area is 10-100μm, and the single isolation area width between p area and n area is 40-300μm.

[0082] Or laser four times patterning slotting in the middle area of each remaining BSG layer (i.e. the isolation area design area between n area or p area), forming a single symmetric double cross p-p-n-p-p-n contact structure prototype.

[0083] In some specific embodiments, the single symmetrical double-cross p-p-n-p-p-n contact structure embryo has a single p-region width of 600-2000 μm and a single n-region width of ≤600 μm; a single isolation region width between p-regions or between n-regions is 10-100 μm, and a single isolation region width between p-regions and n-regions is 40-300 μm.

[0084] In some specific embodiments, the single symmetrical double-cross p-p-n-p-p-n contact structure embryo has a single p-region width of 600-2000 μm and a single n-region width of ≤600 μm; a single isolation region width between p-regions or between n-regions is 10-100 μm, and a single isolation region width between p-regions and n-regions is 40-300 μm.

[0085] In some specific embodiments, the single symmetrical double-cross p-p-n-p-p-n contact structure embryo has a single p-region width of 600-2000 μm and a single n-region width of ≤600 μm; a single isolation region width between p-regions or between n-regions is 10-100 μm, and a single isolation region width between p-regions and n-regions is 40-300 μm.

[0086] In some specific embodiments, the slotting conditions are as follows: laser wavelength 400-600 nm, frequency 500-700 KHz, marking speed 40000-50000 mm / s, power 10-50 W, and processing time 1-5 s.

[0087] S11. Removing the front and side wrap layers of the silicon wafer.

[0088] In some specific embodiments, the silicon wafer is removed from the front and side wrap layers of the silicon wafer, such as the boron diffusion layer and the phosphorus diffusion layer, by using a chain machine (acid etching).

[0089] S12. Cleaning the texturing, removing the BSG layer and the PSG layer.

[0090] In some specific embodiments, the silicon wafer is subjected to wet cleaning and texturing integration treatment in the alkaline solution on the front and back laser slotting regions. Since the front of the silicon wafer has been removed from the wrap layer without the presence of the oxidation region, an effective light trapping texture (i.e., the pyramid texture 9) can be formed in the texturing process. The back laser three times patterned slotting region can be effectively etched by the alkaline solution, thereby forming an isolation region and a pyramid texture 9 on the surface of the isolation region. The non-laser region can be further blocked by the alkaline etching due to the presence of the PSG layer / BSG layer. For the BSG layer middle slotting region and the PSG layer middle slotting region subjected to laser four times patterned slotting, the boron diffusion layer and the phosphorus diffusion layer in the corresponding regions can be washed away in the alkaline texturing process, so that the initial boron diffusion layer and the phosphorus diffusion layer are divided into two parts with equal intervals, thereby forming three different contact structures. Subsequently, the subsequent self-acid (HF / HCl) cleaning tank of the texturing tank can further remove the residual PSG layer and BSG layer on the surface of the silicon wafer, as shown in FIG. 8.

[0091] S13, double-sided coating. After double-sided coating, a passivation anti-reflective layer 10 is formed on the front / back surface of the silicon wafer.

[0092] S14, screen printing and sintering to form an electrode layer 11, light injection, to obtain a double-cross contact structure TBC solar cell, as shown in FIG. 1(b) and FIG. 9.

[0093] Specific embodiments and comparative examples.

[0094] Example 1 (double symmetric double-cross p-p-n-n-p-p-n-n contact structure) A method for preparing a double-cross contact structure TBC solar cell, specifically comprising the following steps: S1, double-sided polishing of a silicon wafer: select a N-type monocrystalline silicon wafer 1 after wire sawing, with a thickness of 150 μm. Place the silicon wafer into an alkaline polishing tank, maintain the temperature at 75°C, and polish for 6 min to obtain a polishing thickness of 4 μm and a thinning amount of 0.42 g, as shown in FIG. 2.

[0095] S2, sequentially form a tunneling oxide layer 2 (using an LPCVD method), an intrinsic polysilicon layer 3 (using an LPCVD method), and a mask layer 4 on the back surface of the N-type monocrystalline silicon wafer 1, as shown in FIG. 3. The deposition conditions of the tunneling oxide layer are as follows: O2 flow rate 40000 sccm, reaction temperature 600°C, time 600 s, and tunneling oxide layer thickness about 3 nm.

[0096] The deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate 920 sccm, reaction temperature 550°C, time 3.3 h, working pressure 300 mTorr, and intrinsic polysilicon layer thickness about 290 nm.

[0097] The mask layer is formed by ultraviolet oxidation laser treatment: first, form a mask layer prototype under the following conditions: O2 flow rate 50 sccm, ambient oxygen concentration 25% (volume concentration), ultraviolet laser wavelength 355 nm, power 11 W, and processing time 10 s; then, form a denser mask layer (thickness about 50 nm) under the following conditions: O2 flow rate 200 sccm, ambient oxygen concentration 50% (volume concentration), ultraviolet laser wavelength 266 nm, power 3 W, and processing time 17 s.

[0098] S3, laser one-time patterning and slotting to remove the mask layer in the design region of the boron diffusion layer. The slotting conditions are as follows: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 25 W, and processing time 2.7 s.

[0099] S4, the residual mask layer 4 in the grooving area is removed by alkali cleaning, and the intrinsic polysilicon layer 3 is exposed, as shown in FIG. 4. The specific steps are as follows: the silicon wafer is placed in an alkali solution for cleaning, the temperature is 75°C, and during the experiment, different cleaning time parameters are adjusted, and the thickness of the mask layer after cleaning is tested by an ellipsometer, so that the mask layer in the patterned area can be accurately removed without excessive removal of the bottom intrinsic polysilicon layer during the alkali cleaning process.

[0100] S5, boron diffusion, the inner layer and the surface layer of the intrinsic polysilicon layer 3 in the grooving area are respectively converted into a boron diffusion layer 5 and a BSG layer 6. The boron diffusion conditions are as follows: the temperature is 850°C, the diffusion time is 10 min, the BCl3 flow rate is 200 sccm, and the O2 flow rate is 1200 sccm; the oxidation promotion temperature is 950°C, the O2 flow rate is 7000 sccm, and the promotion time is 30 min. The thickness of the BSG layer is about 45 nm. During the above boron diffusion process, the S3 area without grooving can effectively block boron atoms from entering the intrinsic polysilicon layer 3 due to the protection of the mask layer 4, and only the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are respectively converted into a boron diffusion layer 5 and a BSG layer 6, as shown in FIG. 5.

[0101] S6, the remaining mask layer 4 area is laser patterned and grooved. The purpose of grooving the remaining mask layer 4 area is to expose the remaining intrinsic polysilicon layer 3 surface in subsequent alkali cleaning. The grooving conditions are as follows: the laser wavelength is 532 nm, the frequency is 600 KHz, the marking speed is 45000 mm / s, the power is 25 W, and the processing time is 2.7 s.

[0102] S7, alkali cleaning removes the residual mask layer 4 in the S6 grooving area, and the remaining intrinsic polysilicon layer 3 surface is exposed, while the boron diffusion layer 5 is protected by the BSG layer 6 on its surface and is not corroded, as shown in FIG. 6. The specific steps are as follows: the silicon wafer is placed in an alkali solution for cleaning, the temperature is 75°C, and during the experiment, different cleaning time parameters are adjusted, and the thickness of the mask layer after cleaning is tested by an ellipsometer, so that the mask layer in the patterned area can be accurately removed without excessive removal of the bottom intrinsic polysilicon layer during the alkali cleaning process.

[0103] S8, phosphorus diffusion, the inner layer and the surface layer of the remaining intrinsic polysilicon layer 3 are respectively converted into a phosphorus diffusion layer 7 and a PSG layer 8. The phosphorus diffusion conditions are as follows: the temperature is 790°C, the diffusion time is 20 min, the POCl3 is carried by nitrogen with a flow rate of 1100 sccm, and the O2 flow rate is 700 sccm; the oxidation promotion temperature is 890°C, the O2 flow rate is 3000 sccm, and the promotion time is 40 min. The thickness of the PSG layer is about 42 nm. During the above phosphorus diffusion process, the boron diffusion layer 5 is protected by the BSG layer 6 on its surface, so the phosphorus atoms cannot diffuse to the boron diffusion layer 5, and only the inner layer and the surface layer of the exposed remaining intrinsic polysilicon layer 3 are respectively converted into a phosphorus diffusion layer 7 and a PSG layer 8, as shown in FIG. 7.

[0104] S9, laser three times patterning groove at the junction of BSG layer 6 and PSG layer 8, remove the groove area of BSG layer 6 and PSG layer 8, groove width 80 μm. Grooving at the junction of BSG layer 6 (i.e. boron diffusion layer 5) and PSG layer 8 (i.e. phosphorus diffusion layer 7) can lay the foundation for the subsequent formation of insulating isolation region. The grooving conditions are: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 50 W, processing time 3 s.

[0105] S10, laser four times patterning groove in each remaining BSG layer 6 and PSG layer 8 middle area (i.e. isolation area design area between n area or p area), forming double symmetric double cross p-p-n-n-p-p-n-n contact structure prototype. Among them, the single p area width of the double symmetric double cross p-p-n-n-p-p-n-n contact structure prototype is 800 μm, the single n area width is 800 μm; the single isolation area width between p area and p area or n area and n area is 30 μm, and the single isolation area width between p area and n area is 80 μm. The grooving conditions are: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 50 W, processing time 3 s.

[0106] S11, remove the front and side wrap layers of the silicon wafer: remove the boron diffusion layer and phosphorus diffusion layer and other wrap layers on the front and side of the silicon wafer by using chain machine (acid etching).

[0107] S12, clean the texturing, remove the BSG layer and PSG layer.

[0108] In some specific implementation cases, the silicon wafer is first subjected to wet cleaning and texturing integrated processing in the alkaline solution on the front and back laser grooving areas. Since the front of the silicon wafer has been removed from the wrap layer without the existence of the oxidation area, an effective light trapping textured surface (i.e. pyramid textured surface 9) can be formed in the texturing process; while the back laser three times patterning groove area, the alkaline solution can effectively etch the bottom deposition layer, thereby forming an insulating isolation area textured surface (i.e. pyramid textured surface 9) area, and the non-laser area can be further blocked by the PSG layer / BSG layer. For the BSG layer middle groove area and the PSG layer middle groove area subjected to laser four times patterning groove, the boron diffusion layer and the phosphorus diffusion layer in the corresponding area can be washed away in the alkaline texturing process, so that the initial boron diffusion layer and the phosphorus diffusion layer are divided into two parts at equal intervals, forming a double symmetric double cross p-p-n-n-p-p-n-n contact structure. Subsequently, the subsequent self-acid (HF / HCl) cleaning tank of the texturing groove can further remove the residual PSG layer and BSG layer on the surface of the silicon wafer, as shown in FIG. 8.

[0109] S13, double-sided coating. After double-sided coating, a passivation anti-reflective layer 10 is formed on the front / back surface of the silicon wafer, specifically comprising: using atomic layer deposition (ALD) to first deposit AlO x thin film, which is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of about 8 nm, and the process temperature is controlled at 250°C. Subsequently, a SiN x thin film, SiN x The thickness of the thin film is about 90 nm, and the refractive index is 2.0. SiN x thin film, the reaction gas in the tube cavity is SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440°C, the flow rate of SiH4 gas is 980 sccm, the flow rate of NH3 gas is 8000 sccm, the silicon-nitrogen ratio is 1:5, and the deposition time is 10 min.

[0110] S14, screen printing, sintering to form an electrode layer 11, light injection: after coating, the silicon wafer is subjected to screen printing to form a metal contact on the back surface, and then sintered at 770°C to form an Ag-Si ohmic contact (i.e. electrode layer 11), and finally subjected to light injection repair to obtain a double-cross contact structure TBC solar cell, as shown in FIG. 1(b) and FIG. 9.

[0111] Example 2 (single symmetric double-cross p-p-n-p-p-n contact structure) The difference between Example 2 and Example 1 is only that in S10, the middle region (i.e. the isolation region designed between the n region or the p region) of each remaining BSG layer is patterned and slotted four times by laser to form a single symmetric double-cross p-p-n-p-p-n contact structure prototype (as shown in FIG. 1(c)). In the single symmetric double-cross p-p-n-p-p-n contact structure prototype, the width of a single p region is 800 μm, the width of a single n region is 400 μm, the width of a single isolation region is 30 μm, and the width of a single isolation region between the p region and the n region is 80 μm.

[0112] Example 3 (single symmetric double-cross p-n-n-p-n-n contact structure prototype) The difference between Example 3 and Example 1 is only that in S10, the middle region (i.e. the isolation region designed between the n region or the p region) of each remaining PSG layer is patterned and slotted four times by laser to form a single symmetric double-cross p-n-n-p-n-n contact structure prototype (as shown in FIG. 1(d)). In the single symmetric double-cross p-n-n-p-n-n contact structure prototype, the width of a single p region is 400 μm, the width of a single n region is 800 μm, the width of a single isolation region between the p region and the p region or between the n region and the n region is 30 μm, and the width of a single isolation region between the p region and the n region is 80 μm.

[0113] The structure of the TBC solar cell of Comparative Example 1 is shown in Fig. 1(a), which is a conventional single-cross structure TBC solar cell, specifically a p-n-p-n-p-n-p-n contact structure, wherein the width of a single p region is 400 μm, the width of a single n region is 400 μm, and the width of all isolation regions is 80 μm.

[0114] Example 4 The difference between Example 4 and Example 1 is only in S2, wherein the mask layer is generated by a conventional LPCVD method: the O2 flow rate is 50000 sccm, the temperature is 650°C, the time is 2800 s, and the thickness of the deposited mask layer is about 50 nm.

[0115] Example 5 The difference between Example 5 and Example 1 is only in S2, wherein the mask layer is generated by a one-step ultraviolet laser oxidation process: the ultraviolet laser used has a wavelength of 355 nm and a power of 11 W, the O2 flow rate through the tube is 50 sccm, the oxygen concentration in the environment is 25% (by volume), and the oxidation treatment time is 10 s, forming a mask layer with a thickness of about 50 nm.

[0116] Performance testing The TBC solar cells obtained in the above examples and comparative examples were subjected to various performance tests, and the results are shown in the following table. From the data in the above table, it can be seen that: first, Examples 1-5 use three different forms of double-cross contact structures, and compared with Comparative Example 1, the number of isolation regions between the overall p regions and n regions of the examples is smaller, and the risk of short circuit leakage between the same-doping-type subgrids (p-p or n-n) is negligible, so that the short circuit leakage value of the overall example cell is lower, and the electrical performance is better.

[0117] Secondly, compared with Examples 2-3, Example 1 uses a double-symmetrical double-cross contact structure, which has fewer isolation regions between the p regions and n regions, fewer initial patterned subgrids, and lower design technical complexity and difficulty; in addition, the isolation region width (10-100 μm) between the same-doping-type subgrids (p-p or n-n) is narrower than the isolation region width (40-300 μm) between the different-doping-type subgrids (p-n), so that the poly-Si collecting carrier area of the silicon substrate of Example 1 is larger than that of Examples 2-3, and thus the J sc , FF, etc. values of the cell are higher.

[0118] As for Examples 2 and 3, since the p region Au / half-contact performance is often weaker than the n region Au / half-contact performance, increasing the proportion of the initial p region is more conducive to the overall cell carrier collection probability; thus, compared with Example 3, Example 2 has a higher p region proportion, and thus has better contact performance, making the overall performance of the cell better.

[0119] For example 4, compared with example 1, the process time is longer and the temperature is higher in the process of forming the mask layer by LPCVD, it is difficult to accurately control the process stability, and the front side wrap problem caused by LPCVD still exists, so that the battery performance is low.

[0120] For example 5, compared with example 1, the difference of generating the mask layer by one-step ultraviolet laser oxidation process is not obvious, part of the mask layer is not dense enough, which leads to the risk of over-inward diffusion of part of the doping atoms during the high-temperature process, so that the electrical performance is also reduced (but overall still better than example 4).

[0121] The raw materials and equipment used in the present application are conventional raw materials and equipment in the art unless otherwise specified; the methods used in the present application are conventional methods in the art unless otherwise specified.

[0122] The above is only a preferred embodiment of the present application, not any limitation on the present application, any simple modification, change and equivalent transformation of the above embodiment according to the technical essence of the present application still belongs to the protection scope of the technical solution of the present application.

Claims

1. A method for fabricating a double-cross contact structure TBC solar cell, characterized in that... Comprise: S1, silicon wafer polishing; S2, backside forming tunneling oxide layer, intrinsic polysilicon layer, mask layer; S3, laser slotting boron diffusion layer region design region mask layer; S4, alkali cleaning; S5, boron diffusion, making the intrinsic polysilicon layer in the slot region into boron diffusion layer and BSG layer; S6, laser slotting removing the remaining mask layer; S7, alkali cleaning; S8, phosphorus diffusion, making the remaining intrinsic polysilicon layer into phosphorus diffusion layer and PSG layer; S9, laser slotting at the junction of BSG layer and PSG layer; S10, laser slotting in the middle region of BSG layer and / or PSG layer, forming the outline of double cross contact structure; S11, removing the scribe; S12, cleaning and texturing; S13, double side film plating; S14, screen printing, sintering and photo injection.

2. The method of claim 1, wherein: In S10, laser slotting in the middle region of each remaining BSG layer and PSG layer, forming the outline of double symmetric double cross p-p-n-n-p-p-n-n contact structure, wherein the width of single p region is 600-2000μm, the width of single n region is 600-2000μm; the width of single isolation region between p region and p region or n region and n region is 10-100μm, the width of single isolation region between p region and n region is 40-300μm.

3. The method of claim 1, wherein: In S10, laser slotting in the middle region of each remaining BSG layer, forming the outline of single symmetric double cross p-p-n-p-p-n contact structure, wherein the width of single p region is 600-2000μm, the width of single n region is ≤600μm; the width of single isolation region between p region and p region or n region and n region is 10-100μm, the width of single isolation region between p region and n region is 40-300μm.

4. The method of claim 1, wherein: In S10, laser slotting in the middle region of each remaining PSG layer, forming the outline of single symmetric double cross p-n-n-p-n-n contact structure, wherein the width of single p region is ≤600μm, the width of single n region is 600-2000μm; the width of single isolation region between p region and p region or n region and n region is 10-100μm, the width of single isolation region between p region and n region is 40-300μm.

5. The method of claim 1, wherein: In S2, the mask layer is formed by ultraviolet oxidation laser treatment: First, generate the outline of mask layer under the condition of oxygen concentration 20-30%, ultraviolet laser wavelength 300-400nm; Then, form a denser mask layer under the condition of oxygen concentration 30-80%, ultraviolet laser wavelength 200-300nm.

6. The method of claim 5, wherein: In S2, the condition of ultraviolet oxidation laser treatment is as follows: First, generate the outline of mask layer under the condition of O2 flow 10-100sccm, environmental oxygen concentration 20-30%, ultraviolet laser wavelength 300-400nm, power 10-500W, processing time 1-20s; Then, form a denser mask layer under the condition of O2 flow 100-500sccm, environmental oxygen concentration 30-80%, ultraviolet laser wavelength 200-300nm, power 2-50W, processing time 1-20s.

7. The method of claim 1, wherein: In S2, the deposition conditions of the tunneling oxide layer are as follows: O2 flow rate 10000-80000 sccm, reaction temperature 400-800 ℃, time 200-1000 s, and tunneling oxide layer thickness 2-10 nm.

8. The method of claim 1, wherein: In S2, the deposition conditions of the intrinsic polysilicon layer are as follows: SiH4 flow rate 300-2000 sccm, reaction temperature 500-700 ℃, time 2-4 h, working pressure 100-500 mTorr, and intrinsic polysilicon layer thickness 100-300 nm.

9. The method of claim 1, wherein: In S5, the diffusion conditions of boron are as follows: temperature 800-950 ℃, diffusion time 5-50 min, BCl3 flow rate 50-500 sccm, and O2 flow rate 500-2000 sccm; oxidation advancing temperature 900-1050 ℃, O2 flow rate 5000-30000 sccm, and advancing time 30-80 min; and the BSG layer thickness is 30-70 nm.

10. The method of claim 1, wherein: In S8, the diffusion conditions of phosphorus are as follows: temperature 750-850 ℃, diffusion time 5-30 min, POCl3 carried by nitrogen flow rate 500-1200 sccm, and O2 flow rate 500-1000 sccm; oxidation advancing temperature 850-950 ℃, O2 flow rate 1000-10000 sccm, and advancing time 20-60 min; and the PSG layer thickness is 30-70 nm.

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