Testing of transistor devices

Abstract

A method and a circuit arrangement are disclosed. The method includes connecting a series circuit (1) including a plurality of series connected transistor devices (11-1N) between output nodes (31, 32) of a current source arrangement (3); driving a test current (I3) provided by the current source arrangement (3) through the series circuit (1) such that a reverse current flows through each of the plurality of transistor devices (11-1N); and repeatedly operating each of the plurality of transistor devices (11-1N) in a diode mode for a predefined time period (T11-T1N).

Description

[0001] Infineon Technologies AG 2024P05211 WO

[0002] 1

[0003] TESTING OF TRANSISTOR DEVICES

[0004] TECHNICAL FIELD

[0005] This disclosure relates in general to a method for testing transistor devices and a corresponding circuit arrangement.

[0006] BACKGROUND

[0007] A transistor device, such as MOSFET (metal-oxide semiconductor field-effect transistor), may be operated in a diode mode. In this operating mode, a conducting channel in a body region along a gate electrode and gate dielectric is interrupted and a voltage applied between drain and source nodes is such that a PN junction between the body region and a drift region is forward biased so that a current can flow between the drain and source nodes. In the diode mode, a charge carrier plasma including majority charge carriers and minority charge carriers, such as electrons (N-type charge carriers) and holes (P-type charge carriers) is present in the drift region. Electrons and holes may recombine, wherein a high recombination rate is particularly critical at positions where a crystal lattice of the drift region has crystal defects. Charge carrier recombination is associated with energy released into the crystal lattice, which may cause crystal defects to further grow and propagate, wherein such propagation of the crystal defects may result in an increase of the on-resistance of the transistor device. This mechanism may be referred to as bipolar degradation, and is particularly relevant for silicon carbide (SiC) based transistor devices. The “on-resistance” is the electrical resistance of the transistor device in an on-state, which is an operating state in which there is a conductive channel in the body region along the gate electrode and the gate dielectric so that, different from the diode mode, the transistor device operates in a unipolar conducting mode.

[0008] In the production of SiC transistor devices it is desirable to test samples in view of bipolar degradation. This may include repeatedly operating the sample device in the diode mode and determining the on-resistance after repeatedly operating the sample device in the diode mode.

[0009] Operating the transistor device in the diode mode may include driving a current with predefined current level through the device. The current may be provided by a current source that Infineon Technologies AG 2024P05211 WO

[0010] 2 is repeatedly activated and deactivated. The current source usually includes a current regulator. A current regulator is relatively slow when it comes to switching the current between zero and the predefined current value, which makes this kind of method slow and inefficient.

[0011] There is a need for an improved method for testing transistor devices, such as SiC transistor devices.

[0012] SUMMARY

[0013] One example relates to a method. The method includes connecting a series circuit including a plurality of series connected transistor devices between output nodes of a current source arrangement, driving a current provided by the current source arrangement through the series circuit such that a reverse current flows through each of the plurality of transistor devices, repeatedly operating each of the plurality of transistor devices in a diode mode for a predefined time period.

[0014] Another example relates to a circuit arrangement. The circuit arrangement includes a current source arrangement including output nodes and configured to provide a current, a series circuit including a plurality of transistor devices connected in series between the output nodes of a current source arrangement such that a reverse current can flow through each of the plurality of transistor devices when the current is provided by the current source arrangement, and a controller configured to repeatedly operate each of the plurality of transistor devices in a diode mode for a predefined time period.

[0015] Examples are explained below with reference to the drawings. The drawings serve to illustrate certain principles, so that only aspects necessary for understanding these principles are illustrated. The drawings are not to scale. In the drawings the same reference characters denote like features.

[0016] BRIEF DESCRIPTIONS OF THE DRAWINGS

[0017] The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. The features of the various illustrated embodiments can be combined unless they exclude each other. Embodiments are depicted in the drawings and are detailed in the description which follows. Infineon Technologies AG 2024P05211 WO

[0018] 3

[0019] Figure 1 illustrates one example of a test arrangement that includes a current source arrangement, a series circuit with a plurality of transistor devices connected in series between output nodes of the current source arrangement, and a controller configured to repeatedly operate the transistor devices in a diode mode;

[0020] Figure 2 shows signal diagrams that illustrate one example of a method for operating the transistor devices repeatedly in the diode mode;

[0021] Figures 3-4 shows signal diagrams that illustrate a transition between an end of operating one of the transistor devices in a diode mode and a beginning of another one of the transistor devices operating in the diode mode;

[0022] Figure 5 shows signal diagrams that illustrate another example of a method for operating the transistor devices repeatedly in the diode mode;

[0023] Figure 6 shows a test arrangement according to another example;

[0024] Figure 7 shows signal diagrams that illustrate one example of operating the test arrangement illustrated in Figure 6;

[0025] Figure 8 illustrates one example of a temperature sensor;

[0026] Figure 9 illustrates another example of a temperature sensor;

[0027] Figure 10 shows one example of a test arrangement that includes several transistor series circuits connected in parallel;

[0028] Figure 11 shows signal diagrams that illustrate one example of operating the test arrangement illustrated in Figure 10;

[0029] Figure 12 shows one example of a test arrangement that includes a dummy transistor device connected in series with the transistor devices;

[0030] Figure 13 illustrates one example of a logic circuit that is configured to provide a control signal of the dummy transistor device; and Infineon Technologies AG 2024P05211 WO

[0031] 4

[0032] Figure 14 shows one example of a test arrangement that includes a plurality of dummy transistor devices connected in series with the transistor devices.

[0033] DETAILED DESCRIPTION

[0034] In the following detailed description, reference is made to the accompanying drawings. The drawings form a part of the description and for the purpose of illustration show examples of how the invention may be used and implemented. It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.

[0035] Figure 1 illustrates one example of a circuit arrangement that includes a series circuit 1 with a plurality of series connected transistor devices 11-1 N. The series circuit 1 is connected between output nodes 31 , 32 of a current source arrangement 3. The current source arrangement 3 is configured to provide a current I3. The circuit arrangement further includes a controller 4 that is configured to generate control signals to repeatedly operate each of the transistor devices 11-1 N in a diode mode for a respective predefined time period.

[0036] The controller 4 can be implemented in hardware and / or software. In a hardware implementation, the controller can be embodied, for example, as a computer, as a microprocessor, or as dedicated circuitry. In a software implementation, the controller can be embodied as a computer program product, as a function, as a routine, as an algorithm, as part of a program code or as an executable object that may be executed by a computer or microcontroller.

[0037] The transistor devices 11 -1 N of the series circuit may also be referred to as devices under test (DUTs). The current I3 provided by the current source arrangement 3 may also be referred to as test current.

[0038] Each of the transistor devices 11-1 N includes a gate node for controlling an operating state of the transistor device and a load path between first and second load path nodes. Furthermore, the transistor device internally includes a gate-controlled channel and an internal diode and is configured to operate in an on-state or an off-state. In the on-state, the gate-controlled channel is conducting. In the off-state, the gate-controlled channel is blocking. The internal diode bypasses the gate-controlled channel, so that the transistor device can conduct a current when the transistor device is in the off-state and a current is driven through the load path that forward biases the internal diode. The "diode mode" is the operating mode in which the transistor device is in the off-state and the internal diode is conducting a current. Infineon Technologies AG 2024P05211 WO

[0039] 5

[0040] According to one example, the transistor devices 11-1 N are MOSFETs (Metal Oxide Field- Effect Transistors). In a MOSFET, a drain and source nodes are the first and second load path nodes. The MOSFETs can be N-type MOSFETs or P-type MOSFETs. In an N-type MOSFET, a polarity of the internal diode is such that an anode of the diode is connected to the source node and a cathode of the diode is connected to the drain node of the MOSFET, so that the internal diode conducts when a voltage between the source and drain nodes is positive and has a magnitude that is higher than a forward voltage of the internal diode. In a P-type MOSFET, a polarity of the internal diode is such that the cathode of the diode is connected to the source node and the anode of the diode is connected to the drain node of the MOSFET, so that the internal diode conducts when the voltage between the source and drain nodes is negative and has a magnitude that is higher than a forward voltage of the internal diode.

[0041] In a MOSFET, the gate-controlled channel is an internal channel in a body region along a gate dielectric and a gate electrode. The gate electrode is connected to the gate node and the conducting channel is controlled by a drive voltage (gate-source voltage) between the gate node and the source node. This is commonly known, so that no further explanation is required in this regard.

[0042] The MOSFETs can be enhancement (normally-off) MOSFETs or depletion (normally-on) MOSFETs. An N-type enhancement MOSFET, for example, has a positive threshold voltage and is in the on-state when the drive voltage is higher (more positive) than the threshold voltage. An N-type depletion MOSFET, for example, has a negative threshold voltage, and is in the on-state when the drive voltage is higher (more positive) than the threshold voltage.

[0043] It should be noted that the transistor devices 11-1 N are not restricted to be implemented as MOSFETs. Instead, any other type of transistor device that includes an integrated diode and that can be operated in a diode mode can be used as well. According to another example, the transistor devices 11-1 N are JFETs (Junction Field-Effect Transistors) with an integrated body diode. Just for the purpose of illustration, the circuit symbols of the transistor devices illustrated in Figure 1 represent N-type enhancement MOSFETs.

[0044] Referring to the above, an operating state in which the transistor device is in the off-state and the internal diode is conducting is referred to as diode mode. In the diode mode, N-type charge carriers (electrons) and P-type charge carriers (holes) contribute to the current flow through the transistor device. Thus, the diode mode may also be referred to as bipolar operating mode of the transistor device. Infineon Technologies AG 2024P05211 WO

[0045] 6

[0046] An operating state in which the transistor device is in the on-state, so that the gate-controlled channel bypasses the internal diode, and the current through the transistor device has a current direction that is suitable to forward bias the internal diode is referred to as reverse conducting state in the following. In the reverse conducting state, essentially only one type of charge carriers contributes to the current flow through the transistor device when a voltage across the transistor device is lower than the forward voltage of the internal diode, so that this operating mode can be unipolar operating mode of the transistor device. In an N-type transistor device, for example, the charge carriers contributing to the current flow in the unipolar mode are N-type charge carriers (electrons). The reverse conducting mode, however, is not restricted to be unipolar mode. When the transistor device is in the reverse conducting mode and a current through the device is high enough to cause a voltage across the transistor device that forward biases the internal diode, a charge carrier plasma may also occur in the reverse conducting mode. Thus, the reverse conducting mode is not necessarily a pure unipolar mode

[0047] In the following, "reverse current" denotes a current with a current direction that, when the transistor device is in the off-state, forward biases the internal diode. In an N-type transistor device, for example, the reverse current is a positive source-drain (negative drain-source) current. This type of operation mode may also be referred to as "third quadrant operation," as the current flowing in this operation is conventionally shown in the third quadrant of a cartesian coordinate system that illustrates the current through the transistor device over the voltage applied to the transistor device.

[0048] For the purpose of illustration, in Figure 1 , the internal diodes of the transistor devices 11-1 N are represented by their circuit symbols. The transistor devices are connected in series such that the internal diodes are connected in series (as opposed to some of the internal diodes being connected in anti-series).

[0049] For controlling the operating states of the transistor devices 11-1 N, the circuit arrangement includes a drive circuit 2 with a plurality of drivers 21-2N, wherein each of the drivers 21-2N is configured to control operation of a respective one of the transistor devices 11-1 N. "To control operation" includes operating the respective transistor device in the on-state or the off-state. For controlling operation of a respective transistor device 11-1 N each of the drivers 21-2N is configured to provide a drive voltage Vdrvl 1-Vdrv1N that either switches on or switches off the respective transistor device 11-1N. Infineon Technologies AG 2024P05211 WO

[0050] 7

[0051] The polarity and magnitude of the drive voltages Vdrvl 1-Vdrv1 N is dependent on the specific type of the transistor devices 11-1 N. Having N-type transistor devices 11-1 N, for example, drive voltages Vdrvl 1 -Vdrvl N for operating the transistor devices 11-1N in the on-state are positive and higher than a respective threshold voltage, and drive voltages Vdrvl 1- Vdrvl N for operating the transistor devices in the off-state are lower than the respective threshold and may be positive, zero or even negative. Having N-type SiC transistor devices, for example, drive voltages Vdrvl 1 -Vdrvl N for operating the transistor devices 11-1 N in the on-state are selected from between the threshold voltage and 25 volts (V) or 30 V, for example, and drive voltages Vdrvl 1 -Vdrvl N for operating the transistor devices 11-1 N in the off- state are selected from between 0 V and -20 V, for example.

[0052] The drivers 21 -2N are controlled by control signals S11-S1N provided by the controller 4. Each of the control signals S11-S1N is configured to control operation of the respective driver 21-2N to switch on or switch off the respective transistor device 11-1N. According to one example, the drive circuit 2 is a single monolithic circuit in which the individual drivers 21-2N are integrated. According to another example, the drive circuit 2 includes two or more monolithic circuits in which the individual drivers 21-2N are integrated. According to one example, each of the drivers 21-2N is integrated in an individual single monolithic circuit. According to yet another example, the drive circuit 2 with the drivers 21-2N is implemented as an electronic circuit with discrete devices.

[0053] The transistor series circuit 1 is connected to the current source arrangement 3 such that the current I3 provided by the current source arrangement 3 to the transistor series circuit 1 is a reverse current of the individual transistor devices 11-1 N. Thus, the transistor devices 11- I N, either operate in the diode mode (when the respective transistor device is in the off- state) or the reverse conducting mode (when the respective transistor device is in the on- state).

[0054] According to one example, the transistor devices 11-1 N are silicon carbide (SiC) transistor devices. SiC transistor devices may suffer from bipolar degradation. Bipolar degradation may occur when the transistor devices 11-1 N are operated in the diode mode. For test purposes it is desirable to operate each of the transistor devices 11-1 N repeatedly in the diode mode. This may include driving a reverse current through the respective transistor device and alternatingly operating the transistor device in the off-state and the on-state. When a transistor device is in the off-state, it operates in the diode mode (bipolar mode), and when the transistor device is in the on-state it operates in the reverse conducting mode. The reverse conducting mode is a unipolar mode, for example. However, as outlined above, when Infineon Technologies AG 2024P05211 WO

[0055] 8 the transistor devices 11-1 N are operated in the reverse conducting mode at high current densities such that the internal diodes are forward biased, a charge carrier plasma may also occur in the reverse conducting mode. Thus, the reverse conducting mode is not necessarily a pure unipolar mode.

[0056] When a reverse current with a given current level flows through the transistor series circuit 1 , a voltage V11-V1 N across each transistor device 11-1 N is dependent on whether the transistor device 11-1 N is in the diode mode or the reverse conducting mode. Usually, the voltage in the diode mode is higher than in the reverse conducting mode. This, however, is only an example. It is also possible to operate the transistor devices 11-1 N in the reverse conducting mode such that the voltage across each transistor device 11-1 N in the reverse conducting mode essentially equals the voltage in the diode mode.

[0057] In each case, the transistor devices 11-1 N, for testing purposes, are alternatingly operated in the diode mode and the reverse conducting mode. Transistor devices are often used in electronic circuits in which they are operated alternatingly in the diode mode and the reverse conducting mode. The testing process is therefore similar to an actual operating scenario of transistor devices.

[0058] By connecting several transistor devices 11-1 N in series each of the transistor devices 11- I N can repeatedly be operated in the diode mode and, at the same time, an overall voltage drop V1 across the transistor series circuit 1 can be kept essentially constant. The overall voltage drop V1 across the series circuit is given by the sum of the voltage drops V11-V1N across the individual transistor devices 11-1 N.

[0059] Referring to the above, when a current with a given current level flows through a respective transistor device, the voltage drop across the transistor device can be different when the transistor device is in the diode mode or the reverse conducting mode. According to one example, operation of the transistor devices 11-1 N in the series circuit 1 is controlled such that at each time a predefined number of transistor devices is in the diode mode and the remainder of the transistor devices is in the reverse conducting mode. According to one example, the transistor devices 11-1 N in the series circuit 1 are implemented such that, when a test current I3 with a given current level flows through the transistor series circuit 1 , the voltages across the transistor devices operated in the diode mode are at least approximately equal and the voltages across the transistor devices operated in the reverse conducting mode are at least approximately equal. In this case, the overall voltage V1 across the series circuit 1 , at each time, is approximately the same. Infineon Technologies AG 2024P05211 WO

[0060] 9

[0061] This makes it possible for the current source arrangement 3 to steadily operate in the same operating state. Referring to Figure 1, the current source arrangement 3 may include a current source 35 with first and second circuit nodes 351 , 352 and configured to generate an essentially constant test current I3. The magnitude of the test current may be selected based on a nominal current (e.g., a nominal current as provided by the manufacturer of the transistor device in a datasheet of the transistor device) of the transistor devices in the test. For example, the magnitude of the test current may have a value that is equal to the nominal current of at least one of the transistor devices 11-1 N in the test. According to one example, the magnitude of the test current is larger than the nominal current, 1.5 times the nominal current, at least two times the nominal current, or at least three times the nominal current. The larger the test current, the more the bipolar degradation will be triggered in each time unit. Thus, in order to evaluate the tendency or the risk of the transistor devices with regards to bipolar degradation in an acceptable timeframe, a higher test current may be used. However, if the test current is increased too much, the transistor devices may degrade too fast and / or may be destroyed. Then, the test results would not be useful for obtaining a statistic to evaluate the bipolar degradation for the tested transistor devices.

[0062] The current source 35 may include a current regulator that is configured to control a voltage V35 between the first and second circuit nodes 351 , 352 such that the test current I3 has the predefined current level. If the electric resistance of the series circuit 1 connected to the current source arrangement 3 were to change, the current source 35 would have to readjust the voltage between the circuit nodes 351 , 352 in order to readjust the test current I3 to the predefined current level. Such readjustment of the current is time-consuming and is not necessary when the transistor series circuit 1 is operated such that the same predefined number of transistor devices operates in the diode mode at the same time and the remainder operates in the reverse conducting mode, so that the overall voltage V1 is essentially constant. Furthermore, providing the test current with a predefined current level allows to precisely set and control the electrical testing conditions, allowing a high degree of reproducibility. Reproducibility is of high importance to be able to compare results obtained in different test runs, on different test devices (DUTs), different test setups, or different technology nodes. Thus, the test results may have a higher significance in contrast to a case where the actual current is changing a lot, such that the devices under test (DUTs) are exposed to a range of different electrical testing conditions during the test. Further, changes in the current may lead to more unpredictable stress.

[0063] Optionally, the current source arrangement 3 includes an inductor 34 connected in series with the current source 35. A freewheeling element 33, such as a diode, may be connected Infineon Technologies AG 2024P05211 WO

[0064] 10 in parallel with the inductor 34. The freewheeling element 33 may take over a portion of the current through the inductor 34 when the current provided by the current source 35 changes. The inductor 34 keeps the current I3 through the series circuit 1 essentially constant when slight fluctuations or changes of the resistance or impedance provided by the transistor series circuit 1 to the current source arrangement 3 occur.

[0065] Figure 2 shows signal diagrams that illustrate one example of a method for repeatedly operating the transistor devices 11-1 N in the diode mode. More specifically, Figure 2 shows signal diagrams of the control signals S11-S1N received by the drivers 21-2N and the voltages V11-V1 N across the individual transistor devices 11-1 N. Each of the control signals SUSI N can have a first signal level that causes the respective driver 21-2N to switch on the respective transistor device 11-1 N, so that the respective transistor device 11-1 N operates in the reverse conducting mode, or a second signal level that causes the respective driver 21- 2N to switch off the respective transistor device 11-1 N, so that the respective transistor device 11-1 N operates in the diode mode. Just for the purpose of illustration, the first signal level is a high signal level (logic 1 ) and the second signal level is a low signal level (logic 0) in the example illustrated in Figure 2.

[0066] According to one example, each of the transistor devices 11-1 N is operated in the diode mode for a predefined time period T11 -T1 N. According to one example, these time periods T11-T1 N are at least approximately equal. This, however, is only an example. The time periods T11-T1 N for which the individual transistor devices 11-1 N are operated in the diode mode may be different. Furthermore, the duration of these time periods T11-T1N may vary over subsequent switching cycles.

[0067] Referring to the above, operating a transistor device in the diode mode includes operating the transistor device in the off-state and driving the test current I3 through the transistor device such that the test current I3 forward biases the internal diode and flows through the internal diode. According to one example, the predefined time periods T11-T1N are long enough for a charge carrier plasma including P-type and N-type charge carriers to be created within the respective transistor device.

[0068] In the example illustrated in Figure 2, one of the transistor devices 11-1 N is in the diode mode and the remainder of the transistor devices 11 -1 N is in the reverse conducting mode at the same time. For this, the transistor devices 11 -1 N may be operated in the diode mode successively. According to one example, the transistor devices 11-1 N are operated in the diode mode in a same predefined order. Infineon Technologies AG 2024P05211 WO

[0069] 11

[0070] According to one example, the transistor series circuit 1 is operated in a plurality of successive test cycles, wherein in each of these test cycles each of the transistor devices 11-1N is operated in the diode mode once. According to one example, the order in which the transistor devices are operated in the diode mode is the same in each of the test cycles. According to another example, the order in which the transistor devices are operated in the diode mode in the test cycles varies over the time.

[0071] Just for the purpose of illustration, in the example illustrated in Figure 2, the voltage V11- V1N across each of the transistor devices 11-1 N is lower in the reverse conducting mode than in the diode mode. Thus, in this example, the voltage increases when the respective transistor device 11-1 N changes from the reverse conducting mode to the diode mode and decreases when the transistor device 11-1 N changes back from the diode mode to the reverse conducting mode. This, however, is only an example. As outlined above, it is also possible that the voltage across each transistor device in the reverse conducting mode essentially equals the voltage in the diode mode.

[0072] Figure 2 schematically illustrates an ideal scenario in which each time the operating state of one of the transistor devices 11-1 N changes from the diode mode to the reverse conducting mode the operating state of another one of the transistor devices 11-1 N changes from the reverse conducting mode to the diode mode, so that the overall voltage V1 across the series circuit 1 is at least approximately constant throughout the time period in which the transistor devices 11-1 N are repeatedly operated in the diode mode.

[0073] In a non-ideal operating scenario, the overall voltage V1 may include short voltage spikes or short voltage drops, which is schematically illustrated in Figures 3 and 4. Each of Figures 4 and 5 shows signal diagrams of drive signals Si, Sii for controlling two of the transistor devices 11-1 N and corresponding voltages Vi, Vii across the two transistor devices. The two transistor devices are transistor devices that are successively operated in the diode mode.

[0074] In the example illustrated in Figure 3, the transistor device represented by control signal Si and voltage Vi changes from the diode mode to the reverse conducting mode at a first time instance t1 before, at a second time instance t2, the transistor device represented by control signal Sii and voltage Vii changes from the reverse conducting mode to diode mode. Thus, time periods T1 i, T1 ii in which the two transistor devices operate in the diode mode are timely spaced apart from each other, which may result in a temporarily reduced resistance of the transistor series circuit 1 . Infineon Technologies AG 2024P05211 WO

[0075] 12

[0076] In the example illustrated in Figure 4, the transistor device represented by control signal Si and voltage Vi changes from the diode mode to the reverse conducting mode before the transistor device represented by control signal Sii and voltage Vii has changed from the reverse conducting mode to diode mode. Thus, time periods T1 i, T1 ii in which the two transistor devices operate in the diode mode overlap, which may result in temporarily increased resistance of the transistor series circuit 1.

[0077] To avoid the non-ideal operation as much as possible, the timing of the drive signals S11- S1N as well as the gate driving performed by the gate drivers 21-2N may be adjusted accordingly. For example, the timing of the drive signals S11-S1 N may be adjusted such that there is a small temporal overlap of second signal levels in the consecutive drive signals Sii, Si, or there is a small temporal gap between second signal levels in the consecutive signals. The gate driving by the gate drivers 21-2N may be adjusted by adjusting a gate driving voltage, a gate driving current, and / or a gate resistor, for example.

[0078] Referring to the above, the current source 35 may be implemented as a current regulator that adjusts the voltage V35 between its circuit nodes 351 , 352 such that the test current I3 is essentially constant. The temporarily reduced resistance of the series circuit 1 in the scenario illustrated in Figure 3 may therefore result in an increase of the current I3 before the current source 35 readjusts the voltage V35 in order to regulate the current I3, and the temporarily increased resistance of the series circuit 1 in the scenario illustrated in Figure 4 may result in a decrease of the current I3 before the current source 35 readjusts the voltage V35 in order to regulate the current I3. The inductor 34, however, may help to keep the current I3 essentially constant during those time periods of increased or reduced resistance (which may result in the voltage drop / increase of the overall voltage V1 in the scenario illustrated in Figure 3 and the voltage spike in the scenario illustrated in Figure 4) and may help to prevent the current source 35from starting to readjust the voltage V35 during those short time periods.

[0079] In the following, an operating mode of the transistor series circuit 1 in which the test current I3 is driven through the transistor series circuit 1 is referred to as test mode. A duration in which the transistor series circuit 1 is operated in the test mode is referred to as test mode duration. According to one example, operating the same number of transistor devices in the diode mode at the same time includes operating the same number of transistor devices in the diode mode over 95% or even 98% of the test mode duration. Infineon Technologies AG 2024P05211 WO

[0080] 13

[0081] Operating only one of the transistor devices 11-1 N in the diode mode at the same time, as illustrated in Figure 2, is only an example. Any number of transistor devices less than an overall number N of the transistor devices 11 -1 N may be operated in the diode mode at the same time. Usually, in the diode mode, more power is dissipated in the transistor devices than in the reverse conducting mode, so that the transistor devices may heat up during operation in the diode mode. Operating each transistor device in the reverse conducting mode for certain time periods may help to maintain the temperature of the transistor devices under a temperature threshold, such as a predefined upper temperature limit, or within a predefined temperature range.

[0082] For illustration purposes, Figure 5 shows signal diagrams that illustrate one example of a method for operating the transistor devices 11 -1 N such that more than one of the transistor devices 11-1 N are operated in the diode mode at the same time. In the example illustrated in Figure 5 two of the transistor devices 11-1 N are operated in the diode mode at the same time. In Figure 5 T11-T1 N denote time periods in which the respective transistor devices are operated in the diode mode. As explained before, these time periods T11-T1 N can be essentially equal or can be different from each other. Furthermore, the time period for which a respective transistor device is repeatedly operated in the diode mode may be fixed or may vary over subsequent switching cycles.

[0083] In each case, the durations T11-T1 N for which the individual transistor devices 11-1 N are operated in the diode mode may range from between a few umpteen nanoseconds (Ds) to several seconds, for example.

[0084] Referring to the above, operating the transistor devices 11-1 N in the diode mode may cause the transistor devices 11-1 N to heat up. According to one example, in order to prevent the transistor devices 11-1 N from overheating or to prevent a temperature of the transistor devices from exceeding a predefined upper temperature limit, the duration of operating the transistor series circuit 1 in the test mode may be limited to a predefined time duration, which may range from between a few hundreds of nanoseconds to several minutes. According to one example, the transistor devices are allowed to cool down in a pause period before the series circuit 1 is operated in the test mode for a predefined time period for the next time. During the pause period, the test current I3 is not driven through the transistor series circuit 1 . This type of operating mode is referred to as pause mode in the following.

[0085] According to one example, in order to be able to steadily operate the current source arrangement 3 when operation of the transistor series circuit 1 changes from the test mode to the Infineon Technologies AG 2024P05211 WO

[0086] 14 pause mode and back from the pause mode to the test mode, the circuit arrangement includes a bypass circuit connected in parallel with the transistor series circuit 1 and configured to take over the test current I3 during the pause periods. One example of a circuit arrangement that includes a bypass circuit is illustrated in Figure 6.

[0087] Referring to Figure 6, the bypass circuit includes a first electronic switch 61 and a load Z connected in series with the first electronic switch 61. A second electronic switch 62 is connected in series with the transistor series circuit 1 . The bypass circuit with the load Z and the first electronic switch 61 is connected in parallel with the series circuit including the second electronic switch 62 and the transistor series circuit 1 . The first and second electronic switches 61 , 62 are controlled by the controller 4 through respective control signals S61 , S62.

[0088] One example for operating the first and second electronic switches 61 , 62 is illustrated in Figure 7 that shows signal diagrams of the control signals S61 , S62 received by the first and second electronic switches 61 , 62. Each of these control signals S61 , S62 can have an on- level that switches on the respective switch 61 , 62 or an off-level that switches off the respective switch 61 , 62. Just for the purpose of illustration, the on-level is a high signal level and the off-level is a low signal level in the example illustrated in Figure 7.

[0089] In the test mode, the second electronic switch 62 is in the on-state and the first electronic switch 61 is in the off-state, so that the test current I3 flows through the transistor series circuit 1 . At the end of the test mode and the beginning of the pause mode, the second electronic switch 62 switches off and the first electronic switch 61 switches on, so that the bypass circuit takes over the test current I3. As illustrated in dashed lines in Figure 7, time periods in which the first and second electronic switches 61 , 62 are in the on-state may slightly overlap at the end of the test mode in order to ensure that there is always a conducting current path for the test current I3.

[0090] According to one example, the load Z is implemented to have an electrical resistance that at least approximately equals the electrical resistance provided by the transistor series circuit 1 to the current source arrangement 3 in the test mode. In this example, there is no need for the current source arrangement to readjust the voltage V35 across the current source 35.

[0091] Even if the resistance of the load Z is different from the resistance of the transistor series circuit 1 , there is always a current path for the test current I3, so that there is no need for the Infineon Technologies AG 2024P05211 WO

[0092] 15 current source arrangement 3 to newly ramp up the test current I3 at the beginning of the next time period in which the series circuit 1 operates in the test mode.

[0093] According to one example, the method further includes measuring the temperature of at least one of the transistor devices 11-1 N during the pause period. For this, a temperature detector is connected to at least one of the transistor devices 11-1 N and is configured to provide a temperature signal that is representative of the temperature of the at least one of the transistor devices 11-1 N.

[0094] Figure 8 illustrates one example of a temperature detector 5 connected to a respective one 1 i of the transistor devices 11-1 N. In this example, the temperature sensor 5 includes a current source 51 that is configured to drive a measurement current 151 through the internal diode of the transistor device 1 i. During the pause period, the transistor device 1 i is in the off- state, so that the measurement current 151 operates the transistor device in the diode mode. A voltage sensor 52 senses a voltage across the internal diode of the transistor device 1 i as caused by the measurement current 151 and outputs a measurement signal S52 that is representative of the voltage. The voltage across the internal diode caused by the measurement current is dependent on the temperature, wherein the voltage decreases as the temperature increases. Thus, the measurement signal S52 output by the voltage sensor 52 is representative of the temperature of the transistor devices 1 i.

[0095] According to another example illustrated in Figure 9, the temperature detector 5 is connected to the overall series circuit 1 . In this example, during the pause period, the measurement current 151 operates each of the transistor devices 11-1 N in the diode mode and the voltage sensor 52 measures the overall voltage V1 across the series circuit 1. Here, the measurement signal S52 may be representative of a mean value of the temperature of all of the transistor devices 11-1 N. According to one example, the voltage sensor 52 is connected in parallel to only a subset of the transistor devices 11 -1 N of the series circuit 1 , and the current source 51 drives the measurement current 151 though at least the subset of transistor devices. In this case, the measurement signal S52 may be representative of a mean value of the temperature of the subset of transistor devices. For example, the measurement current 151 may be driven through all of the transistor devices 11 -1 N of the series circuit 1 , and the voltage sensor 52 is connected in parallel to only one of the transistor devices. According to one example, the temperature detector 5 may include a plurality of current sources 51 and / or a plurality of voltage sensors 52 (not shown). For example, the temperature detector 5 includes a plurality of voltage sensors 52, wherein each of the plurality voltage sensors 52 is connected in parallel to a different subset transistor devices 11-1 N of the series circuit 1. In Infineon Technologies AG 2024P05211 WO

[0096] 16 one example, the temperature detector 5 includes one current source 51 that drives the measurement current 151 through all transistor devices 11-1 N of the series circuit 1 , and includes one voltage sensor 52 corresponding to each transistor device 11 -1 N of the series circuit 1 and being connected in parallel to the corresponding transistor device. Thus, an individual temperature measurement for each of the transistor devices is possible. The circuit arrangement according to Figure 9 may include a bypass circuit. Such bypass circuit, however, is not illustrated in Figure 9.

[0097] According to one example, the temperature sensor 5 is configured to drive the measurement current 151 through the at least one transistor device only for a short measurement time period that enables the temperature sensor to measure the voltage across the at least one transistor device, so that measuring the temperature does not result in an increase of the temperature of the at least one transistor device. According to one example, the measurement current is selected from between 1 milliampere (mA) and 100 mA. According to one example, the measurement current 151 is smaller than the test current, such as at most 10%, at most 2%, or at most 1 % of the test current I3.

[0098] It should be noted that the temperature sensor 5 illustrated in Figures 8 and 9 is only an example. Any type of temperature sensor configured to measure the temperature of the transistor device 1i can be used as well.

[0099] It should be noted that the circuit arrangement may include several temperature sensors. Thus, the circuit arrangement may include two or more temperature sensors connected to respective ones of the transistor devices 11-1 N. In addition to the two or more temperature sensors connected to respective ones of the transistor devices 11-1 N, the circuit arrangement may include a temperature sensor of the type illustrated in Figure 9.

[0100] According to one example, the temperature information provided by the at least one temperature sensor 5 is used to adjust the duration of the pause period. According to one example, the transistor series circuit 1 is repeatedly operated in the test mode, wherein consecutive test mode periods are separated by pause periods. According to one example, the duration of the pause periods is adjusted dependent on the temperature information provided by the at least one temperature sensor. According to one example, the duration of each pause period is variable and the pause period ends when the temperature information provided by the at least one temperature sensor indicates that the temperature provided by the at least one temperature sensor is lower than a predefined temperature threshold. According to one example, the circuit arrangement includes several temperature sensors and the pause period Infineon Technologies AG 2024P05211 WO

[0101] 17 ends when each of the temperatures sensed by the temperature sensors is lower than the predefined temperature threshold.

[0102] According to one example, not only durations of the pause periods but also durations of the test mode periods are adjusted based on the temperature information provided by the at least one temperature sensor 5. According to one example, based on the temperature information provided by the at least one temperature sensor 5, the durations of the pause periods and the test mode periods are adjusted such that the temperature of the transistor devices 11-1 N, throughout the test mode periods and the pause periods, is maintained within a given temperature range such as, for example, between 100 °C and 200 °C, in particular between 140 °C and 170 °C. Maintaining the temperature in a given temperature range can help to reproduce testing conditions in different tests and can be useful when comparing test results from different tests.

[0103] For example, the relation between the duration of the test mode periods and the pause mode periods may define a duty cycle of the test. The duty cycle may be adjusted based on the temperature information provided by the at least one temperature sensor 5 in order to maintain the temperature of the transistor devices 11 -1 N in a predefined temperature range throughout the test. The duty cycle may be adjusted by adjusting only the test mode periods and keeping the pause mode periods fixed, or by adjusting only the pause mode periods and keeping the test mode periods fixed, or by adjusting both the test mode periods and the pause mode periods.

[0104] According to one example, the durations of the pause periods are long enough to enable measuring the temperature of at least one of the transistor device during the pause periods.

[0105] As explained with reference to Figure 6, providing a bypass circuit in parallel with the transistor series circuit 1 may offer the advantage of steadily operating the current source arrangement 3 with an essentially constant voltage V35 and an essentially constant test current I3 throughout test mode periods and pause periods. In the example according to Figure 6, the power provided by the current source arrangement 3 during the pause period is dissipated in the load Z.

[0106] According to one example illustrated in Figure 10, the circuit arrangement includes at least two transistor series circuits 1a, 1 b that are connected in parallel and each connected to the current source arrangement 3. "Connected in parallel" in this regard includes that each of the two transistor series circuits 1a, 1 b is connected in series with a respective electronic switch Infineon Technologies AG 2024P05211 WO

[0107] 18

[0108] 63, 64 and the series circuits each including one of the transistor series circuits 1 a, 1 b and the respective switch 63, 64 are connected in parallel.

[0109] In the example illustrated in Figure 10, the circuit arrangement includes two transistor series circuits 1a, 1 b. This, however, is only an example. According to another example, the circuit arrangement includes more than two transistor series circuits each connected in series with a respective electronic switch, wherein the series circuits that each include a transistor series circuit and a respective electronic switch are connected in parallel and connected to the current source arrangement 3.

[0110] Each of the transistor series circuits 1 a, 1 b includes a plurality of transistor devices 11 a-1 Na, 11 b-1 Nb that are connected in series. Everything explained herein before with regard to the implementation of the transistor series circuit 1 and the transistor devices 11 -1 N included therein applies to each of the at least two transistor series circuits 1 a, 1 b illustrated in Figure 10 accordingly. According to one example, the at least two transistor series circuits 1 a, 1 b are implemented with the same number of transistor devices and implemented with the same type of transistor devices. This, however, is only an example. It is also possible to implement the at least two transistor series circuits 1a, 1 b with different numbers of transistor devices and with different transistor devices.

[0111] According to one example, each of the at least two transistor series circuits 1 a, 1 b is repeatedly operated in the test mode. Operating a respective one of the transistor series circuits 1 a, 1 b in the test mode includes switching on the electronic switch 63, 64 connected in series with the respective transistor series circuit 1a, 1 b, so that the test current I3 flows as a reverse current through the respective transistor series circuit 1a, 1 b. During the test mode of one of the transistor series circuits 1 a, 1 b, the electronic switches connected in series with the remainder of the transistor series circuits are in the off-state, so that no test current flows through the remainder of the transistor series circuits and the remainder of the transistor series circuit are in the pause mode.

[0112] Everything explained herein before with regard to operating the transistor series circuit 1 explained above in the test mode applies to operating one of the at least two transistor series circuits 1a, 1 b in the test mode accordingly. The electronic switches 63, 64 which determine which of the transistor series circuits 1 a, 1 b is operated in the test mode are controlled by the controller 4 through respective control signals S63, S64. Furthermore, operation of the transistor series circuits 1 a, 1 b in the test mode is controlled by the controller 4 that is configured to generate control signals S11a-S1 Na, S11 b-S1 Nb for the transistor devices 11 a-1 Na, Infineon Technologies AG 2024P05211 WO

[0113] 19

[0114] 11 b-1 Nb included in the transistor series circuits 1a, 1 b. The drive signals S11 a-S1 Na, S11 b-S1 Nb are received by drive circuits 2a, 2b that control operation of the transistor devices 11a-1 Na, 11 b-1 Nb dependent on the drive signals S11a-S1 Na, S11 b-S1 Nb.

[0115] According to one example, repeatedly operating the at least two transistor series circuits 1a, 1 b in the test mode includes operating only one of the at least two transistor series circuits 1 a, 1 b in the test mode at the same time. According to one example, repeatedly operating the at least two transistor series circuits 1a, 1 b in the test mode includes, in each of the at least two transistor series circuits 1 a, 1 b, operating the same number of transistor devices in the diode mode at the same time. In this example, if the at least two transistor series circuits 1 a, 1 b are implemented with transistor devices of the same type and the same number of transistor devices, the voltages Via, V1 b across the at least two transistor series circuits 1 a, 1 b in the test mode are at least approximately equal. Thus, there is no need for the current source arrangement 3 to readjust the voltage V35 across the current source 35 when the circuit arrangement switches from the test mode of one of the transistor series circuits 1 a, 1 b to the test mode of another one of the transistor series circuits 1a, 1 b.

[0116] The switches 63, 64 connected in series with the transistor series circuits 1a, 1 b are controlled such that when one of the electronic switches 63, 64 switches off in order to terminate the test mode of the transistor series circuit 1a, 1 b connected in series thereto, the electronic switch connected in series to the transistor series circuit that is to be operated in the test mode next immediately switches on or already switches on a short time period before. This helps to avoid voltage overshoots caused by the inductor 32 and is schematically illustrated in Figure 11 that shows examples of signal diagrams of the drive signals S63, S64 received by the electronic switches 63, 64.

[0117] Figure 12 illustrates a circuit arrangement according to another example. In the circuit arrangement according to Figure 12, a further transistor device 70, which may also be referred to as the dummy transistor device or sacrificial transistor device, is connected in series with the transistor series circuit 1 , wherein the series circuit including the transistor series circuit 1 and the dummy transistor device 70 is connected to the current source arrangement 3.

[0118] The dummy transistor device 70 includes an internal diode, so that the dummy transistor device 70 can be operated in the diode mode. The dummy transistor device 70 is connected in series with the transistor series circuit 1 such that the internal diode of the dummy transistor device 70 is connected in series with the internal diodes of the transistor devices 11 -1 N of the transistor series circuit 1 . According to one example, the dummy transistor device 70 is a Infineon Technologies AG 2024P05211 WO

[0119] 20 transistor device of the same type as the transistor devices 11-1 N of the transistor series circuit 1 , so that a voltage drop across the dummy transistor device 70 when operated in the diode mode at least approximately equals the voltage drop across one of the transistor devices 11-1 N of the transistor series circuit 1 when operated in the diode mode.

[0120] The dummy transistor device 70 is operated by a driver 80 which is configured to switch on or off the dummy transistor device 70 dependent on a control signal S70 received from the controller 4.

[0121] According to one example, operating the transistor series circuit 1 according to Figure 12 includes operating the transistor series circuit 1 such that at each time at most one of the transistor devices 11-1 N is operated in the diode mode and the remainder of the transistor devices is operated in the reverse conducting mode. During time periods in which none of the transistor devices 11-1 N of the transistor series circuit 1 is in the diode mode the dummy transistor device 70 is operated in the diode mode, so that throughout the time period in which the test current I3 flows through the series circuit including the transistor series circuit 1 and the dummy transistor device 70 the overall voltage V1 across the series circuit is essentially the same. During time periods in which one of the transistor devices 11-1 N of the transistor series circuit 1 is in the diode mode the dummy transistor device is operated in the reverse conducting mode.

[0122] The control signal S70 that controls operation of the dummy transistor device is dependent on the control signals S11-S1 N for controlling operation of the transistor devices 11-1 N of the transistor series circuit 1 . One example of a circuit 41 included in the controller 4 and configured to generate the control signal S70 of the dummy transistor device 70 is illustrated in Figure 13. In this example, the control signal S70 is obtained by negating (by a NOT gate 412) an output signal of an OR gate 411 that receives the control signals S11-S1 N of the transistor devices 11-1 N of the transistor series circuit 1. In this example, the dummy transistor device 70 switches off, in order to operate in the diode mode, when each of the transistor devices 11-1 N of the transistor series circuit 1 is in the on-state in order to operate in the reverse conducting mode.

[0123] Figure 14 shows a circuit arrangement that is based on the circuit arrangement according to Figure 13. In the example illustrated in Figure 14, each of the transistor devices 11-1 N of the transistor series circuit 1 has a dummy transistor device 71-7N associated thereto. The transistor device 11-1 N and the associated dummy transistor device 71-7N are operated complementary, so that each time one of the transistor device 11-1 N and the corresponding Infineon Technologies AG 2024P05211 WO

[0124] 21 dummy transistor device 71-7N is in the diode mode. Thus, at each time, a number of transistor devices that equals the number of transistor devices 11-1 N included in the transistor series circuit 1 is operated in the diode mode at the same time, so that the overall voltage V1 across the circuit including the transistor series circuit 1 and the respective dummy transistor devices 71-7N is at least approximately the same at each time. The way in which the transistor devices 11-1 N are repeatedly operated in the diode mode is arbitrary. That is, in particular, the number of transistor devices of the transistor series circuit 1 that are operated in the diode mode at the same time is arbitrary and may even change over the time.

[0125] In the example illustrated in Figure 14, the transistor circuit connected to the current source arrangement 3 includes the transistor series circuit 1 with the transistor devices 11-1 N to be tested and the dummy transistor series circuit 7 with the dummy transistor devices 71-7N connected in series. This, however, is only for illustration purposes. The way in which the transistor devices 11-1 N and the dummy transistor devices 71-7N are connected in series is arbitrary. According to one example, not illustrated, the transistor devices 11-1 N to be tested and the dummy transistor devices 71-7N are alternatingly arranged in the series circuit connected to the current source arrangement 3.

[0126] Some of the aspects explained above are briefly summarized in the following with reference to numbered examples.

[0127] Example 1 . A method, including: connecting a series circuit including a plurality of series connected transistor devices between output nodes of a current source arrangement; driving a test current provided by the current source arrangement through the series circuit such that a reverse current flows through each of the plurality of transistor devices; and repeatedly operating each of the plurality of transistor devices in a diode mode for a predefined time period.

[0128] Example 2. The method according to example 1 , wherein the transistor devices are MOSFETs.

[0129] Example 3. The method according to example 1 or 2, wherein the predefined time period is selected such that a charge carrier plasma is created during the diode mode operation within the predefined time period, and wherein a time duration between two successive predefined time periods is selected such that the charge carrier plasma can completely recombine within the time duration. Infineon Technologies AG 2024P05211 WO

[0130] 22

[0131] Example 4. The method according to any one of examples 1 to 3, wherein repeatedly operating each of the plurality of transistor devices in the diode mode includes operating a predefined first number of transistor devices in the diode mode at the same time.

[0132] Example 5. The method according to example 4, wherein the predefined first number is 1 .

[0133] Example 6. The method according to example 4, wherein the predefined first number is greater than 1 and less than an overall number of the plurality of transistor devices.

[0134] Example 7. The method according to example 4, wherein operating the predefined first number of transistor devices in the diode mode at the same time includes operating the predefined first number of transistor devices in the diode mode throughout at least 95% of a duration of driving the current through the series circuit.

[0135] Example 8. The method according to example 4, wherein operating the predefined first number of transistor devices in the diode mode at the same time includes operating the first number of transistor devices in the diode mode at the same time such that a voltage across the series circuit is at least approximately constant throughout the time period of driving the current through the series circuit.

[0136] Example 9. The method according to example 4, wherein at each time instance during the driving of the test current through the series circuit, it is exactly the predefined first number of transistor devices that are operated in the diode mode.

[0137] Example 10. The method according to any one of examples 1 to 9, wherein repeatedly operating each of the plurality of transistor devices in the diode mode includes operating the series circuit in a plurality of successive test cycles, wherein in each of the test cycles each of the plurality of transistor devices is operated in the diode mode for the predefined time period at least once.

[0138] Example 11. The method according to example 10, wherein in each test cycle the plurality of transistor devices are operated in the diode mode in the same order.

[0139] Example 12. The method according to any one of examples 1 to 7, wherein the predefined time period is at least approximately the same for each of the plurality of transistor devices. Infineon Technologies AG 2024P05211 WO

[0140] 23

[0141] Example 13. The method of any one of examples 1 to 12, wherein driving the test current through the series circuit includes driving the current through the series circuit during a test mode of the series circuit, and wherein the method further includes bypassing the series circuit by the test current during a pause mode of the series circuit.

[0142] Example 14. The method of example 13, wherein bypassing the series circuit by the test current including driving the test current through a bypass circuit.

[0143] Example 15. The method according to example 13, wherein the series circuit is one of at least two series circuits connected in parallel between the output nodes of the current source arrangement, and wherein bypassing the series circuit by the test current includes driving the test current through another one of the at least two series circuits.

[0144] Example 16. The method according to example 15, further including: alternatingly driving the test current through the at least two series circuits.

[0145] Example 17. The method according to any one of examples 13 to 16, further including: measuring the temperature of at least one of the plurality of transistor devices.

[0146] Example 18. The method of example 17, wherein measuring the temperature of at least one of the plurality of transistor devices includes measuring the temperature when the series circuit is in the pause mode.

[0147] Example 19. The method of example 17 or 18, further including: adjusting a duration of at least one of the pause mode or the test mode dependent on the measured temperature.

[0148] Example 20. The method according to any one of examples 1 to 19, further including: connecting at least one dummy transistor device in series with the plurality of transistor devices; and, operating the at least one dummy transistor device in the diode mode such that at each time a predefined second number of devices that include the plurality of transistor devices and the at least one further transistor device is operated in the diode mode.

[0149] Example 21. The method according to example 20, wherein the at least one dummy transistor device includes a plurality of dummy transistor devices, and wherein the number of the plurality of dummy transistor devices equals the number of the plurality of transistor devices. Infineon Technologies AG 2024P05211 WO

[0150] 24

[0151] Example 22. The method according to any one of examples 1 to 21 , wherein the current source arrangement includes a current regulator and an inductor connected in series with the current regulator.

[0152] Example 23. A circuit arrangement, including: a current source arrangement including output nodes and configured to provide a current; a series circuit including a plurality of transistor devices connected in series between the output nodes of a current source arrangement such that a reverse current can flow through each of the plurality of transistor devices when the current is provided by the current source arrangement; and a controller configured to repeatedly operate each of the plurality of transistor devices in a diode mode for a predefined time period.

Claims

Infineon Technologies AG 2024P05211 WO25CLAIMS1 . A method, comprising: connecting a series circuit (1) including a plurality of series connected transistor devices (11-1N) between output nodes (31 , 32) of a current source arrangement (3); driving a test current (I3) provided by the current source arrangement (3) through the series circuit (1) such that a reverse current flows through each of the plurality of transistor devices (11-1 N); and repeatedly operating each of the plurality of transistor devices (11 -1 N) in a diode mode for a predefined time period (T11-T1 N).

2. The method according to claim 1 , wherein the transistor devices are MOSFETs.

3. The method according to claim 1 or 2, wherein the predefined time period is selected such that a charge carrier plasma is created during the diode mode operation within the predefined time period, and wherein a time duration between two successive predefined time periods is selected such that the charge carrier plasma can completely recombine within the time duration.

4. The method according to any one of claims 1 to 3, wherein repeatedly operating each of the plurality of transistor devices (11-1N) in the diode mode comprises operating a predefined first number of transistor devices (11-1N) in the diode mode at the same time.

5. The method according to claim 4, wherein the predefined first number is 1.

6. The method according to claim 4, wherein the predefined first number is greater than 1 and less than an overall number of the plurality of transistor devices (11 -1 N).

7. The method according to claim 4, wherein operating the predefined first number of transistor devices in the diode mode at the same time comprises operating the predefined first number of transistor devices in the diode mode throughout at least 95% of a duration of driving the current (I3) through the series circuit.Infineon Technologies AG 2024P05211 WO268. The method according to claim 4, wherein operating the predefined first number of transistor devices (11-1 N) in the diode mode at the same time comprises operating the first number of transistor devices (11- 1 N) in the diode mode at the same time such that a voltage across the series circuit (1 ) is at least approximately constant throughout the time period of driving the current (I3) through the series circuit (1 ).

9. The method according to claim 4, wherein at each time instance during the driving of the test current (I3) through the series circuit (1 ), it is exactly the predefined first number of transistor devices that are operated in the diode mode.

10. The method according to any one of claims 1 to 9, wherein repeatedly operating each of the plurality of transistor devices (11-1 N) in the diode mode comprises operating the series circuit (1 ) in a plurality of successive test cycles, wherein in each of the test cycles each of the plurality of transistor devices (11-1 N) is operated in the diode mode for the predefined time period (T11-T1 N) at least once.11 . The method according to any one of claims 1 to 7, wherein the predefined time period (T11 -T1 N) is at least approximately the same for each of the plurality of transistor devices (11-1 N).

12. The method of any one of claims 1 to 11 , wherein driving the test current (I3) through the series circuit (1 ) comprises driving the current (I3) through the series circuit (1 ) during a test mode of the series circuit (1 ), and wherein the method further comprises bypassing the series circuit (1 ) by the test current (I3) during a pause mode of the series circuit.

13. The method of claim 12, wherein bypassing the series circuit (1 ) by the test current (I3) comprising driving the test current through a bypass circuit.

14. The method according to claim 12, wherein the series circuit is one of at least two series circuits (1 a, 1 b) connected in parallel between the output nodes (31 , 32) of the current source arrangement (3), and wherein bypassing the series circuit by the test current (I3) comprises driving the test current (I3) through another one of the at least two series circuits (1 a, 1 b).Infineon Technologies AG 2024P05211 WO2715. The method according to claim 14, further comprising: alternatingly driving the test current (I3) through the at least two series circuits (1a, 1 b).

16. The method according to any one of claims 12 to 15, further comprising: measuring a temperature of at least one of the plurality of transistor devices (11-1 N).

17. The method of claim 16, wherein measuring the temperature of at least one of the plurality of transistor devices (11-1 N) comprises measuring the temperature when the series circuit (1a, 1 b) is in the pause mode.

18. The method of claim 16 or 17, further comprising: adjusting a duration of at least one of the pause mode or the test mode dependent on the measured temperature.

19. The method according to any one of claims 1 to 18, further comprising: connecting at least one dummy transistor device (7; 71-7N) in series with the plurality of transistor devices (11 -1 N); and operating the at least one dummy transistor device (7; 71-7N) in the diode mode such that at each time a predefined second number of devices that include the plurality of transistor devices (11-1 N) and the at least one further transistor device (70; 71-7N) is operated in the diode mode.

20. A circuit arrangement, comprising: a current source arrangement (3) comprising output nodes (31 , 32) and configured to provide a current (I3); a series circuit (1) including a plurality of transistor devices (11-1N) connected in series between the output nodes (31 , 32) of the current source arrangement (3) such that a reverse current can flow through each of the plurality of transistor devices (11 -1 N) when the current (I3) is provided by the current source arrangement (3); and a controller (4) configured to repeatedly operate each of the plurality of transistor devices (11-1N) in a diode mode for a predefined time period (T11-T1N).

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