Printed wiring board
The printed circuit board design with a metal particle sintered body layer on through-hole walls addresses connection reliability issues in fine-pitch circuits by enhancing adhesion and conductivity, ensuring stable connections.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2026-04-02
AI Technical Summary
Printed wiring boards face issues with maintaining connection reliability in fine-pitch circuits due to resist residue and partial loss of conductive carbon coating during plasma treatment, leading to poor conductivity and reliability.
A printed circuit board design featuring an insulating layer, a first conductive layer, and a second conductive layer with a first metal particle sintered body layer on the through-hole walls, enhancing adhesion and conductivity by anchoring effects.
The design maintains good connection reliability in fine-pitch circuits by preventing cracks and fractures during plasma treatment, improving conductivity and adhesion between layers.
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Figure JP2024034421_02042026_PF_FP_ABST
Abstract
Description
Printed wiring board
[0001] The present disclosure relates to a printed wiring board.
[0002] In recent years, miniaturization of electronic devices has advanced, and higher-density wiring of printed wiring boards used in electronic devices has been demanded. In response to such demands, multilayer printed wiring boards having a plurality of patterned conductive layers are widely used. In a multilayer printed wiring board, in order to connect patterns between different conductive layers, for example, via holes penetrating a base material having conductive layers laminated on the front and back sides are provided.
[0003] In Patent Document 1, as a conductive layer of a via hole, a conductive carbon coating is formed on the wall surface portion of a through hole penetrating a base material.
[0004] Japanese Patent Application Laid-Open No. 2022-36992
[0005] The printed wiring board of the present disclosure includes an insulating layer, a first conductive layer disposed on the main surface of the insulating layer, and a second conductive layer including at least an electrolytic plating layer disposed on the first conductive layer. A through hole penetrating the insulating layer and the first conductive layer in the thickness direction is formed in the base material composed of the insulating layer and the first conductive layer. A first metal particle sintered body layer is disposed on the insulating layer on the wall surface portion of the through hole, and the second conductive layer is further disposed on the first metal particle sintered body layer.
[0006] FIG. 1 is a cross-sectional view of a printed wiring board according to Embodiment 1. FIG. 2 is a cross-sectional view for explaining a method of measuring the average thickness of the first metal particle sintered body layer. FIG. 3 is a manufacturing process diagram of the printed wiring board of Embodiment 1. FIG. 4 is a cross-sectional view for explaining the preparation step S1. FIG. 5 is a cross-sectional view for explaining the through hole forming step S2. FIG. 6 is a cross-sectional view for explaining the conductive ink coating step S31 and shows a state where the conductive ink is filled in the through hole. FIG. 7 is a cross-sectional view for explaining the excess particle removing step S32. FIG. 8 is a cross-sectional view for explaining the firing step S34. FIG. 9 is a cross-sectional view for explaining the resist pattern forming step S41. FIG. 10 is a cross-sectional view for explaining the electrolytic plating step S42. FIG. 11 is a cross-sectional view for explaining the resist pattern removing step S43.
[0007] [Problems this disclosure aims to solve] Printed wiring boards need to be miniaturized and lightweight, and multilayer construction is required. When the conductive carbon coating described in Patent Document 1 is used for fine-pitch circuits, resist residue tends to remain, so resist removal by plasma treatment is used. In this plasma treatment, the conductive carbon coating peels off, the electroplated layer on the wall surface of the holes is partially lost, resulting in poor conductivity and a decrease in the connection reliability of the printed wiring board.
[0008] Therefore, the present disclosure aims to provide a printed circuit board that can maintain good connection reliability even in fine-pitch circuits.
[0009] [Effects of this disclosure] According to this disclosure, it is possible to provide a printed circuit board that can maintain good connection reliability even in fine-pitch circuits.
[0010] [Description of Embodiments of the Disclosure] Embodiments of the Disclosure will be described first by listing them. (1) The printed circuit board of the Disclosure comprises an insulating layer, a first conductive layer disposed on the main surface of the insulating layer, and a second conductive layer disposed on the first conductive layer, the substrate consisting of the insulating layer and the first conductive layer having through holes formed that penetrate the insulating layer and the first conductive layer in the thickness direction, a first metal particle sintered body layer disposed on the insulating layer on the wall surface of the through holes, and the second conductive layer further disposed on the first metal particle sintered body layer.
[0011] According to this disclosure, it is possible to provide a printed circuit board that can maintain good connection reliability even in fine-pitch circuits. This is because, in the printed circuit board of this disclosure, the insulating layer on the wall surface of the through-hole and the first metal particle sintered body layer are in sufficient contact with each other, so that cracks or fractures do not occur even when plasma treatment is performed.
[0012] (2) In (1) above, the first metal particle sintered body layer may be further disposed between the first conductive layer and the second conductive layer disposed on the first conductive layer. This improves the adhesion between the first conductive layer and the second conductive layer due to the anchoring effect of the metal sintered body layer.
[0013] (3) In (1) or (2) above, the first conductive layer may contain copper as its main component. This improves connection reliability.
[0014] (4) In any of (1) to (3) above, the thickness of the first conductive layer may be 0.03 μm or more and 5 μm or less. If the thickness of the first conductive layer is 0.03 μm or more, the conductivity is improved. If the thickness of the first conductive layer is 5 μm or less, the circuit formation ability is improved.
[0015] (5) In any of (1) to (4) above, the thickness of the second conductive layer may be 1 μm or more and 100 μm or less. If the thickness of the second conductive layer is 1 μm or more, the conductivity is improved. If the thickness of the second conductive layer is 100 μm or less, the circuit formation ability is improved.
[0016] (6) In any of (1) to (5) above, the average particle size of the metal particles contained in the first metal particle sintered body layer may be 1 nm or more and 900 nm or less. When the average particle size of the metal particles is 1 nm or more, the dispersibility and stability of the metal particles in the conductive ink containing the metal particles used when forming the first metal particle sintered body layer are good. When the average particle size of the metal particles is 900 nm or less, the precipitation of metal particles in the conductive ink is suppressed, and the uniformity of the density of metal particles is improved when the conductive ink is applied. In this disclosure, the average particle diameter means the particle diameter at which the volume integrated value in the particle diameter distribution measured by laser diffraction is 50%.
[0017] (7) In any of (1) to (6) above, the thickness of the first metal particle sintered body layer on the insulating layer of the wall surface of the through hole may be 10 nm or more and 1000 nm or less. If the thickness of the first metal particle sintered body layer 41 is 10 nm or more, the conductivity is further improved. If the thickness of the first metal particle sintered body layer 41 is 1000 nm or less, productivity is improved.
[0018] (8) In any of (1) to (7) above, the metal particles contained in the first metal particle sintered body layer may be made of copper. This suppresses ion migration.
[0019] (9) In any of (1) to (8) above, the first metal particle sintered body layer may further be placed on at least a portion of the first conductive layer on the wall surface of the through hole. This further improves connection reliability.
[0020] (10) In the above (6) or (8), the metal particles may be placed on at least a portion of the first conductive layer on the wall surface of the through hole. This improves the adhesion between the first conductive layer and the second conductive layer due to the fine anchoring effect of the metal particles.
[0021] [Details of Embodiments of the Disclosure] Specific examples of the printed circuit board of the Disclosure will be described below with reference to the drawings. In the drawings of the Disclosure, the same reference numerals represent the same or corresponding parts. In addition, dimensional relationships such as length, width, thickness, and depth have been modified as appropriate for clarity and simplification of the drawings and do not necessarily represent actual dimensional relationships.
[0022] In this disclosure, the notation "A to B" means A or greater and B or less. If no unit is specified for A, and only a unit is specified for B, then the unit for A and the unit for B are the same.
[0023] In this disclosure, if one or more numerical values are listed as the lower and upper limits of a numerical range, any combination of any one numerical value listed as the lower limit and any one numerical value listed as the upper limit shall also be disclosed.
[0024] In this disclosure, “equipment,” “includes,” “possesses,” and variations thereof are open-ended terms. Open-ended terms may or may not include additional elements in addition to the essential elements. The statement “consists of” is a closed term. However, even a configuration expressed in closed terms may include additional elements that are usually incidental or irrelevant to the subject technology.
[0025] [Embodiment 1: Printed Wiring Board] A printed wiring board 100 of one embodiment of the present disclosure (hereinafter also referred to as "Embodiment 1") will be described with reference to Figure 1. As shown in Figure 1, the printed wiring board 100 of Embodiment 1 comprises an insulating layer 10, a first conductive layer 21 disposed on the main surface of the insulating layer 10, and a second conductive layer 31 disposed on the first conductive layer 21, which includes at least an electroplated layer. A substrate 1 consisting of the insulating layer 10 and the first conductive layer 21 has through holes 2 that penetrate the insulating layer 10 and the first conductive layer 21 along the thickness direction. A first metal particle sintered body layer 41 is disposed on the insulating layer 10 of the wall surface 2a of the through holes 2. The second conductive layer 31 is further disposed on the first metal particle sintered body layer 41.
[0026] <Insulating Layer> The insulating layer 10 has a main surface consisting of a first main surface 10a and a second main surface 10b. The first main surface 10a and the second main surface 10b are end faces in the thickness direction of the insulating layer 10. The second main surface 10b is the opposite surface of the first main surface 10a.
[0027] The insulating layer 10 may be formed from, for example, polyimide, liquid crystal polymer, fluororesin, etc. However, the constituent materials of the insulating layer 10 are not limited to these.
[0028] The thickness of the insulating layer 10 may be 5 μm or more and 100 μm or less, or 10 μm or more and 50 μm or less. If the thickness of the insulating layer 10 is 5 μm or more, the strength of the insulating layer 10 is sufficient. If the thickness of the insulating layer 10 is 100 μm or less, the insulating layer 10 can have good flexibility. In this disclosure, thickness means the average of the thickness measured at any five locations on the cross section in the direction along the normal to the main surface of the printed wiring board 100. The same applies to the thicknesses of the first conductive layer 21 and the second conductive layer 31 described later.
[0029] <First conductive layer> The first conductive layer 21 is laminated on the main surface of the insulating layer 10. The first conductive layer 21 may be a metal foil such as rolled foil or electrolytic foil, or a layer formed by electroless plating, electrolytic plating, vapor deposition, or sputtering, or a layer formed by a combination of these. The metal foil may be copper foil.
[0030] The first conductive layer 21 may contain copper as its main component. In this disclosure, "the first conductive layer 21 contains copper as its main component" means that the first conductive layer 21 contains 60% by mass or more of copper. As long as the effects of this disclosure are not impaired, the first conductive layer 21 may contain, along with copper, at least one selected from the group consisting of nickel, chromium, silver, and titanium. The first conductive layer 21 may also be configured such that a layer made of at least one selected from the group consisting of nickel, chromium, silver, and titanium is placed directly above the insulating layer 10, and the copper layer is placed on top of that.
[0031] The thickness of the first conductive layer 21 may be 0.03 μm or more and 5 μm or less, 0.1 μm or more and 3 μm or less, or 0.2 μm or more and 1 μm or less.
[0032] Metal particles may be placed on at least a portion of the first conductive layer 21 on the wall surface 2a of the through hole 2 that penetrates the insulating layer 10 and the first conductive layer 21 along the thickness direction. The composition and average particle size of the metal particles may be the same as those of the metal particles contained in the first metal particle sintered body layer 41 described later.
[0033] <Second conductive layer> The second conductive layer 31 is laminated on the main surface of the first conductive layer 21 opposite to the main surface close to the substrate 1. The second conductive layer 31 may be placed directly above the first conductive layer 21. The second conductive layer is further placed on the first metal particle sintered body layer.
[0034] The second conductive layer 31 includes at least an electroplated layer. The second conductive layer 31 may also include an electroplated layer. The second conductive layer 31 consists of an electroplated layer, and metal particles may be present inside the second conductive layer 31. The second conductive layer 31 consists of an electroplated layer, and metal particles may be present in the region of the second conductive layer 31 that is close to the first conductive layer 21. The composition and average particle size of the metal particles may be the same as those of the metal particles contained in the first metal particle sintered body layer 41 described later.
[0035] The main component of the second conductive layer 31 may be, but is not limited to, copper, silver, nickel, or gold. From the viewpoint of cost and conductivity, the main component of the second conductive layer may be silver or copper.
[0036] The thickness of the second conductive layer 31 may be 1 μm or more and 200 μm or less, 5 μm or more and 100 μm or less, or 10 μm or more and 50 μm or less.
[0037] <Substrate> The substrate 1 consists of an insulating layer 10 and a first conductive layer 21 disposed on the main surface of the insulating layer 10. The substrate 1 has through holes 2 that penetrate the insulating layer 10 and the first conductive layer 21 along the thickness direction. The wall portion 2a of the through holes 2 includes the insulating layer 10 and the first conductive layer 21.
[0038] <First Metal Particle Sintered Layer> A first metal particle sintered layer 41 is arranged on the insulating layer 10 of the wall surface 2a of the through hole 2. The first metal particle sintered layer 41 has a structure in which multiple metal particles are fixed together by a metal oxide or the like. Examples of metals that make up the metal particles include copper, silver, nickel, and gold. From the viewpoint of cost and conductivity, the metal may be silver or copper. From the viewpoint of suppressing ion migration, the metal may be copper. That is, the metal particles may be made of copper.
[0039] The first metal particle sintered body layer 41 may further be placed on at least a portion of the first conductive layer 21 on the wall surface 2a of the through hole 2.
[0040] The first metal particle sintered body layer 41 may further be placed between the first conductive layer 21 and the second conductive layer 31, which are located on the first main surface 10a of the insulating layer 10. The first metal sintered body layer is placed between the first conductive layer 21 and the second conductive layer 31, which are located on the first main surface 10a of the insulating layer 10, and does not need to be placed between the first conductive layer 21 and the second conductive layer 31, which are located on the second main surface 10b of the insulating layer 10.
[0041] The first metal particle sintered body layer 41 is not positioned between the main surface of the insulating layer 10, including the first main surface 10a and the second main surface 10b, and the first conductive layer 21. As a result, the interface between the insulating layer and the first conductive layer is smooth, improving high-frequency characteristics.
[0042] No electroless plating layer is placed on the insulating layer 10 of the wall portion 2a of the through hole 2. This improves etching performance and the formability of fine-pitch circuits. When a cross-section of the printed circuit board 100 in the direction along the normal to the main surface is analyzed with an energy-dispersive X-ray spectrometer attached to a scanning electron microscope, and palladium (Pd) is not present on the insulating layer 10 of the wall portion 2a of the through hole 2, it is determined that no electroless plating layer is placed on the insulating layer 10 of the wall portion 2a of the through hole 2.
[0043] The average particle size of the metal particles contained in the first metal particle sintered layer 41 may be between 1 nm and 900 nm, between 10 nm and 500 nm, or between 30 nm and 100 nm. In this disclosure, the average particle size of the metal particles is measured by observing a cross-section of the printed circuit board 100 in a direction along the normal to the main surface with a scanning electron microscope at 100,000x magnification. A rectangular measurement field of view of 0.85 μm × 1.2 μm is set in the scanning electron microscope image, and the arithmetic mean of the equivalent circle diameters of all metal particles within the measurement field is calculated. In this disclosure, this arithmetic mean corresponds to the average particle size of the first metal particles.
[0044] The thickness of the first metal particle sintered body layer 41 on the insulating layer 10 of the wall surface portion 2a of the through hole 2 may be 10 nm or more and 1000 nm or less, may be 50 nm or more and 700 nm or less, or may be 100 nm or more and 500 nm or less. When the thickness of the first metal particle sintered body layer 41 is 10 nm or more, the conductivity is further improved. When the thickness of the first metal particle sintered body layer 41 is 1000 nm or less, the productivity is improved. In the present disclosure, the thickness of the first metal particle sintered body layer 41 is measured by observing with a scanning electron microscope at 30,000 times the cross section in the direction along the normal of the main surface of the printed wiring board 100. As shown in FIG. 2, the measurement locations are the upper region 41a close to the first main surface 10a of the insulating layer 10 of the through hole 2, the lower region 41c close to the second main surface 10b of the insulating layer 10 of the through hole 2, and the central region 41b between the upper region 41a and the lower region 41c. At each measurement location, three thicknesses of the first metal particle sintered body layer 41, that is, a total of nine thicknesses are measured, and the average is calculated. In the present disclosure, the average corresponds to the thickness of the first metal particle sintered body layer 41. The thickness of the first metal particle sintered body layer 41 provided outside the insulating layer 10 of the wall surface portion 2a of the through hole 2 may be in the same range as the thickness of the first metal particle sintered body layer 41 on the insulating layer 10 of the wall surface portion 2a of the through hole 2 described above.
[0045] <Method for manufacturing a printed wiring board> The method for manufacturing the printed wiring board of Embodiment 1 will be described.
[0046] FIG. 3 is a manufacturing process diagram using the semi-additive process of the printed wiring board of Embodiment 1. As shown in FIG. 3, the method for manufacturing the printed wiring board 100 includes a preparation step S1, a through hole forming step S2, a first metal particle sintered body layer forming step S3, and a second conductive layer forming step S4.
[0047] <<Preparation Step S1>> As shown in FIG. 4, in the preparation step S1, a base material 1 is prepared, which consists of an insulating layer 10 and a first conductive layer 21 disposed on a main surface including the first main surface 10a and the second main surface 10b of the insulating layer 10. The base material 1 may be a metal foil with resin on which the first conductive layer 21 made of a metal foil is adhered on the insulating layer 10. The base material 1 may be formed by laminating the metal constituting the first conductive layer 21 on the insulating layer 10 by electroless plating, electroplating, vapor deposition, or sputtering. The metal constituting the first conductive layer 21 is the same as the metal described in the first conductive layer 21 of Embodiment 1. No through-hole 2 is formed in the base material 1 prepared in the preparation step S1.
[0048] <<Through-Hole Forming Step S2>> In the through-hole forming step S2, a through-hole 2 is formed in the base material 1 prepared in the preparation step S1. A laser L is irradiated onto the first conductive layer 21 from above the main surface of the first conductive layer 21 (hereinafter, also referred to as the fourth main surface 21b of the base material) disposed on the first main surface 10a of the insulating layer 10. As a result, as shown in FIG. 5, through-holes 2 are formed in the insulating layer 10 and the first conductive layer 21.
[0049] <<First Metal Particle Sintered Body Layer Forming Step S3>> In the first metal particle sintered body layer forming step S3, a first metal particle sintered body layer 41 is formed on the insulating layer 10 on the wall surface portion 2a of the through-hole 2 of the base material 1. In the first metal particle sintered body layer forming step S3, first, a conductive ink 61 containing metal particles is applied to the fourth main surface 21b of the base material 1 and the third main surface 21a opposite to the fourth main surface 21b (hereinafter, also referred to as "conductive ink application step S31"). As the coating method, conventionally known coating methods such as spin coating method, spray coating method, bar coating method, die coating method, slit coating method, roll coating method, dip coating method, etc. can be used. As a result, the conductive ink 61 penetrates into the through-hole 2 of the base material 1, and as shown in FIG. 6, the conductive ink 61 is applied to the wall surface portion 2a of the through-hole 2. The conductive ink 61 may be filled in the through-hole 2 or may be applied to the wall surface portion 2a of the through-hole 2.
[0050] The average particle size of the metal particles contained in the conductive ink 61 may be between 1 nm and 900 nm. Examples of metals that make up the metal particles include copper, silver, nickel, gold, and aluminum.
[0051] The metal particle content of the conductive ink 61 may be 5% by mass or more and 50% by mass or less. If the metal particle content of the conductive ink 61 is 5% by mass or more, a denser first metal particle sintered body layer 41 can be formed. If the metal particle content of the conductive ink 61 is 50% by mass or less, the film thickness of the first metal particle sintered body layer 41 can be made more uniform.
[0052] The solvent in the conductive ink 61 described above is not particularly limited, and various solvents that can disperse metal particles well can be used. Examples of solvents include water and various water-soluble organic solvents. Specific examples of organic solvents include alcohols such as methyl alcohol, ethyl alcohol, n-propyl alcohol, isopropyl alcohol, n-butyl alcohol, isobutyl alcohol, sec-butyl alcohol, and tert-butyl alcohol; ketones such as acetone and methyl ethyl ketone; polyhydric alcohols such as ethylene glycol and glycerin, and other esters; and glycol ethers such as ethylene glycol monoethyl ether and diethylene glycol monobutyl ether.
[0053] The conductive ink 61 may contain a dispersant in addition to metal particles. The dispersant is not particularly limited, and various dispersants that can effectively disperse metal particles can be used. Examples of dispersants include amine-based polymer dispersants such as polyethyleneimine and polyvinylpyrrolidone, hydrocarbon-based polymer dispersants having a carboxyl group in the molecule such as polyacrylic acid and carboxymethylcellulose, and polymer dispersants having polar groups such as polyvinyl alcohol (PVA), styrene-maleic acid copolymer, olefin-maleic acid copolymer, and copolymers having a polyethyleneimine portion and a polyethylene oxide portion in the molecule.
[0054] Secondly, the substrate 1 coated with conductive ink 61 is washed with sulfuric acid and then with water (hereinafter also referred to as the "excess particle removal step S32"). As a result, as shown in Figure 7, at least a portion of the conductive ink 61 applied to the fourth main surface 21b of the first conductive layer 21 is removed. At least a portion of the conductive ink 61 applied to the first conductive layer 21 of the wall surface 2a of the through hole 2 may also be removed. As long as the effects of this disclosure are not impaired, a portion of the conductive ink 61 applied to the fourth main surface 21b may remain on the fourth main surface 21b without being removed. As long as the effects of this disclosure are not impaired, a portion of the conductive ink 61 applied to the first conductive layer 21 of the wall surface 2a of the through hole 2 may remain on the first conductive layer 21 without being removed.
[0055] Thirdly, the solvent contained in the applied conductive ink 61 is dried (hereinafter also referred to as "drying step S33"). The drying method can be, for example, blowing air at a temperature of room temperature (23°C) or higher. The upper limit of the drying temperature may be 100°C from the viewpoint of suppressing crack formation due to rapid drying.
[0056] Fourth, the dried conductive ink 61 is fired (hereinafter also referred to as "firing process S34"). As a result, the metal particles contained in the dried conductive ink 61 are sintered with each other, and the first metal particle sintered body layer 41 is formed as shown in Figure 8. The firing temperature may be 150°C or higher and 500°C or lower. If the firing temperature is 150°C or higher, the adhesion between the insulating layer 10 and the first metal particle sintered body layer 41 can be improved. If the firing temperature is 500°C or lower, deformation of the insulating layer 10 can be suppressed. The firing time is not particularly limited, but may be, for example, 30 minutes or higher and 600 minutes or lower. The firing atmosphere may be a nitrogen atmosphere, or a reducing atmosphere such as nitrogen containing hydrogen. Other firing methods such as light firing and plasma irradiation are also possible.
[0057] <<Second conductive layer formation step S4>> In the second conductive layer formation step S4, a second conductive layer 31 is formed on the first conductive layer 21 and the first metal particle sintered body layer 41. In the second conductive layer formation step S4, as shown in Figure 9, firstly, a resist pattern 71 is formed on the first conductive layer 21 (hereinafter also referred to as the "resist pattern formation step S41").
[0058] The resist pattern 71 has an opening 71a. The opening 71a penetrates the resist pattern 71 along the thickness direction. The first conductive layer 21 is exposed through the opening 71a. The resist pattern 71 is not formed on the first metal particle sintered layer 41 on the wall portion 2a of the through hole 2.
[0059] In the resist pattern formation process, a resist is first applied to the first conductive layer 21 and the first metal particle sintered layer 41. Next, the applied resist is exposed to light and developed. As a result, the remaining resist that was not removed becomes the resist pattern 71, and the removed resist becomes an opening 71a. In the case of a fine-pitch circuit, a very thin resist residue tends to remain on the surface of the first conductive layer 21 in the areas where the resist has been removed, so the resist is removed by plasma treatment. If there is resist residue, when the resist is peeled off after plating, a gap will form at the bottom of the wiring, causing etching to proceed intensively at the bottom of the wiring, which can cause the wiring to collapse or detach.
[0060] In the second conductive layer formation step S4, following the resist pattern formation step S41, electroplating is performed as shown in Figure 10 (hereinafter also referred to as the "electroplating step S42"). In the electroplating step, the second conductive layer 31 is formed on the first conductive layer 21 and the first metal particle sintered body layer 41 that are exposed from the opening 71a. The second conductive layer 31 is formed by electroplating the first conductive layer 21 and the first metal particle sintered body layer 41 by passing an electric current through the plating solution.
[0061] In the second conductive layer formation step S4, following the electroplating step, the resist pattern 71 is removed as shown in Figure 11 (hereinafter also referred to as the "resist pattern removal step S43"). In the resist pattern removal step, the resist pattern 71 is removed from the first conductive layer 21. As a result, the first conductive layer 21 is exposed between two adjacent second conductive layers 31.
[0062] In the second conductive layer formation step S4, etching is performed following the resist pattern removal step (hereinafter also referred to as the "etching step S44"). In the etching step, the first conductive layer 21 exposed between two adjacent second conductive layers 31 is removed by etching. As a result, a printed circuit board 100 with the structure shown in Figure 1 is formed. The circuit width may be 100 μm or less, 50 μm or less, or 30 μm or less. The land diameter may be 300 μm or less, 200 μm or less, or 100 μm or less.
[0063] This embodiment will be described in more detail by reference to examples. However, this embodiment is not limited by these examples.
[0064] [Samples 1 to 6] A substrate 1 was prepared in which a copper layer was formed as a first conductive layer 21 by sputtering on an insulating layer 10 made of polyimide (see Figure 4). The average thickness of the insulating layer 10 was 25 μm, and the average thickness of the first conductive layer 21 was 0.4 μm.
[0065] A UV-YAG laser was irradiated onto the first conductive layer 21 of the substrate 1 from the upper side of one main surface with a power of 1W to form multiple through holes 2 in the insulating layer 10 and the first conductive layer 21 (see Figure 5). The diameters of the through holes 2 in each sample are shown in Table 1.
[0066] Next, conductive ink 61 containing copper particles with an average particle size of 63 nm was applied to both main surfaces of the substrate 1 using a bar coater, filling the through-holes 2 with conductive ink 61 (see Figure 6). The application speed was 0.6 m / min. Next, the substrate 1 coated with conductive ink 61 was washed with sulfuric acid and then with water (see Figure 7). Next, the substrate 1 was air-dried at room temperature (23°C). Finally, the dried conductive ink 61 was fired at 300°C for 60 minutes to form the first metal particle sintered body layer 41 (see Figure 8).
[0067] Next, a resist was applied to the first conductive layer 21 and the first metal particle sintered layer 41. Then, the applied resist was exposed to light and developed to remove a portion of the resist and form a resist pattern 71 (see Figure 9). Since a very thin resist residue remained on the surface of the first conductive layer 21 in the area where the resist had been removed, the resist residue was removed by plasma treatment. The plasma treatment conditions were 1000W for 1 minute.
[0068] Next, a second conductive layer 31 (material: copper) was formed on the first conductive layer 21 and the first metal particle sintered body layer 41 exposed from the opening 71a by electroplating (see Figure 10). The second conductive layer 31 was formed by electroplating the first conductive layer 21 and the first metal particle sintered body layer 41 in a plating solution. The thickness of the second conductive layer 31 was 7 μm.
[0069] Next, after removing the resist pattern 71 (see Figure 11), the first conductive layer 21 exposed between two adjacent second conductive layers 31 was removed by etching. This resulted in a printed circuit board 100 having the cross-sectional structure shown in Figure 1. The printed circuit board 100 has lands made of the second conductive layer 31 and first through holes 22 penetrating the printed circuit board 100. In the printed circuit board 100, 10,000 via holes are connected in a daisy-chain structure.
[0070] In all samples of the printed circuit board 100, the circuit width d1 (see Figure 1) of the wiring including the first conductive layer 21 and the second conductive layer 31 was 18 μm, and the space width d2 (see Figure 1) between circuits was 18 μm. In all samples of the printed circuit board 100, no circuit collapse or delamination occurred in the wiring portions.
[0071] The land diameter d3 (see Figure 1) and the diameter d4 of the first through hole 22 (see Figure 1) on the printed circuit board 100 of each sample are as shown in Table 2. No circuit peeling occurred in the land areas of the printed circuit board 100 of any of the samples.
[0072] [Samples 7 to 12] For Samples 7 to 12, the same substrate as Samples 1 to 6 was prepared, and through holes were formed in the substrate using the same method as for Samples 1 to 6. The diameters of the through holes in each sample are shown in Table 1.
[0073] Next, a carbon coating was formed on the wall surface of the through hole using the same method as in Example 1 of Patent Document 1 (Japanese Patent Application Publication No. 2022-36992). Specifically, the substrate was immersed in a liquid carbon-based dispersion for 1 minute. The graphite colloid content of the liquid carbon-based dispersion was 5% by mass.
[0074] Next, a printed circuit board was obtained by forming a second conductive layer, removing the resist pattern, and etching the first conductive layer, using the same method as for samples 1 to 6, except that the step of removing resist residue by plasma treatment was omitted. In the printed circuit board, 10,000 via holes are connected in a daisy-chain structure.
[0075] In all samples of the printed circuit board, the circuit width d1 was 18 μm, and the space width d2 between circuits was 18 μm. Circuit collapse occurred in the wiring area in all samples of the printed circuit board.
[0076] The land diameter d3 (see Figure 1) and through-hole diameter d4 (see Figure 1) of the printed circuit boards for each sample are shown in Table 2. Circuit delamination at the land areas did not occur in the printed circuit boards of Samples 7 to 10. Circuit delamination at the land areas occurred in the printed circuit boards of Samples 11 and 12.
[0077] [Samples 13 to 18] Samples 13 to 18 were obtained using the same method as samples 7 to 12, except that a step was performed to remove resist residue by plasma treatment after forming a carbon coating. The plasma treatment conditions were 1000W for 1 minute. In the printed circuit board, 10,000 via holes are connected in a daisy-chain structure.
[0078] In all printed circuit board samples, the circuit width d1 was 18 μm, and the space width d2 between circuits was 18 μm. No circuit tilting or delamination occurred in the wiring areas of any of the printed circuit board samples.
[0079] The land diameter d3 (see Figure 1) and through-hole diameter d4 (see Figure 1) of the printed circuit boards for each sample are shown in Table 2. Circuit delamination at the land areas did not occur in the printed circuit boards of samples 13 to 16. Circuit delamination at the land areas occurred in the printed circuit boards of samples 17 to 18.
[0080] <Evaluation of connection resistance> Continuity was checked at both ends of the daisy chain on the printed circuit board of each sample. As a result, samples 1 to 10 showed good continuity, while samples 11 to 18 showed disconnections.
[0081]
[0082]
[0083] <Discussion> The printed circuit boards of Samples 1 to 6 correspond to the examples. These printed circuit boards had fine-pitch circuits with good connection reliability, without circuit collapse, circuit peeling, or disconnection.
[0084] The printed circuit boards of samples 7 to 18 are comparative examples. These printed circuit boards exhibited at least one of the following: circuit collapse, circuit peeling, and disconnection, making it impossible to achieve both good connection reliability and fine-pitch circuits.
[0085] While embodiments and examples of this disclosure have been described above, it is intended from the outset that the configurations of each of the embodiments and examples described above may be combined or modified in various ways as appropriate. The embodiments and examples disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than the embodiments and examples described above, and all modifications within the scope of the claims are intended to be included in the meaning of equivalences.
[0086] 1 Substrate, 2 Through hole, 2a Wall surface, 10 Insulating layer, 10a First main surface, 10b Second main surface, 21 First conductive layer, 21a Third main surface, 21b Fourth main surface, 22 First through hole, 31 Second conductive layer, 41 First metal particle sintered layer, 41a Upper region, 41b Central region, 41c Lower region, 61 Conductive ink, 71 Resist pattern, 71a Opening, 100 Printed wiring board.
Claims
1. A printed circuit board comprising: an insulating layer; a first conductive layer disposed on the main surface of the insulating layer; and a second conductive layer disposed on the first conductive layer, the substrate comprising the insulating layer and the first conductive layer having through holes formed that penetrate the insulating layer and the first conductive layer in the thickness direction; a first metal particle sintered body layer disposed on the insulating layer on the wall surface of the through holes; and the second conductive layer further disposed on the first metal particle sintered body layer.
2. The printed circuit board according to claim 1, wherein the first metal particle sintered body layer is further disposed between the first conductive layer and the second conductive layer disposed on the first conductive layer.
3. The printed circuit board according to claim 1 or claim 2, wherein the first conductive layer mainly comprises copper.
4. The printed circuit board according to any one of claims 1 to 3, wherein the thickness of the first conductive layer is 0.03 μm or more and 5 μm or less.
5. The printed circuit board according to any one of claims 1 to 4, wherein the thickness of the second conductive layer is 1 μm or more and 100 μm or less.
6. The printed circuit board according to any one of claims 1 to 5, wherein the average particle size of the metal particles contained in the first metal particle sintered layer is 1 nm or more and 900 nm or less.
7. The printed circuit board according to any one of claims 1 to 6, wherein the thickness of the first metal particle sintered body layer on the insulating layer of the wall surface of the through hole is 10 nm or more and 1000 nm or less.
8. The printed circuit board according to any one of claims 1 to 7, wherein the metal particles contained in the first metal particle sintered layer are made of copper.
9. The printed circuit board according to any one of claims 1 to 8, wherein the first metal particle sintered body layer is further disposed on at least a portion of the first conductive layer on the wall surface of the through hole.
10. The printed circuit board according to claim 6 or claim 8, wherein the metal particles are arranged on at least a portion of the first conductive layer on the wall surface of the through hole.
Citation Information
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