Printed wiring board
The printed circuit board design with a metal particle sintered body and conductive layers addresses the challenge of thin conductive layers and adhesion issues, enabling fine-pitch circuits and enhanced durability.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2026-04-02
AI Technical Summary
Existing printed circuit boards face challenges in achieving thinner conductive layers on the substrate surface while maintaining good conductivity and adhesion, which affects the formation of fine-pitch circuits and longevity under harsh conditions, particularly in applications like artificial satellites.
The printed circuit board structure includes an insulating layer with a first metal particle sintered body layer and a first conductive layer, featuring through holes, and a second metal particle sintered body on the through-hole walls with a second conductive layer, eliminating the need for electroless plating on the substrate surface, thereby reducing conductive layer thickness and enhancing adhesion.
This structure allows for thinner conductive layers, enabling the formation of fine-pitch circuits and improving connection reliability and lifespan under harsh conditions.
Smart Images

Figure JP2024034422_02042026_PF_FP_ABST
Abstract
Description
Printed wiring board
[0001] The present disclosure relates to a printed wiring board.
[0002] In recent years, electronic devices have been miniaturized, and there is a demand for high-density wiring of printed wiring boards used in electronic devices. In response to such a demand, multilayer printed wiring boards having a plurality of patterned conductive layers are widely used. In a multilayer printed wiring board, in order to connect patterns between different conductive layers, for example, via holes penetrating a base material having conductive layers laminated on the front and back surfaces are provided (Patent Document 1).
[0003] WO 2023 / 189744
[0004] The printed wiring board of the present disclosure includes an insulating layer, a first metal particle sintered body layer disposed on the main surface of the insulating layer, a first conductive layer disposed on the first metal particle sintered body layer, and a second conductive layer disposed on the first conductive layer. In the base material composed of the insulating layer, the first metal particle sintered body layer, and the first conductive layer, through holes penetrating along the thickness direction of the insulating layer, the first metal particle sintered body layer, and the first conductive layer are formed. A second metal particle sintered body is disposed on the insulating layer on the wall surface portion of the through hole, and the second conductive layer is further disposed on at least a part of the second metal particle sintered body.
[0005] FIG. 1 is a cross-sectional view of a printed wiring board according to Embodiment 1. FIG. 2 is a cross-sectional view for explaining a method of measuring the average thickness of the first metal particle sintered body layer. FIG. 3 is a manufacturing process diagram of the printed wiring board of Embodiment 1. FIG. 4 is a cross-sectional view for explaining the preparation step S1. FIG. 5 is a cross-sectional view for explaining the through hole forming step S2. FIG. 6 is a cross-sectional view for explaining the conductive ink coating step S31. FIG. 7 is a cross-sectional view for explaining the excess particle removing step S32. FIG. 8 is a cross-sectional view for explaining the firing step S34. FIG. 9 is a cross-sectional view for explaining the resist pattern forming step S41. FIG. 10 is a cross-sectional view for explaining the electroplating step S42. FIG. 11 is a cross-sectional view for explaining the resist pattern removing step S43. FIG. 12 is a cross-sectional view of a conventional printed wiring board.
[0006] [Problems to be Solved by This Disclosure] In Patent Document 1, as shown in Figure 12, in order to form a via hole, a conductive layer (hereinafter also referred to as electroless plating layer 33) is formed on the wall surface 2a of a through hole 2 of a substrate 1 consisting of an insulating layer 10 and a first conductive layer 21 by electroless plating. At the same time, an electroless plating layer 33 is also formed on the first main surface 10a and the second main surface 10b of the insulating layer 10 of the substrate 1. The thickness of the electroless plating layer 33 on the first main surface 10a and the second main surface 10b of the insulating layer 10 depends on the thickness of the electroless plating layer 33 formed on the wall surface 2a of the through hole 2. For this reason, if the electroless plating layer 33 on the wall surface 2a of the through hole 2 is made thicker in order to obtain good conductivity within the through hole 2, the electroless plating layer 33 on the first main surface 10a and the second main surface 10b of the insulating layer 10 also becomes thicker. In Patent Document 1, the insulating layer 10 of the substrate 1 has a conductive layer on the first main surface 10a and the second main surface 10b side, which consists of a first conductive layer 21 contained in the substrate 1 itself and an electroless plating layer 33. If the conductive layer is thick, the etching time becomes longer when the conductive layer is etched to form a circuit after the second conductive layer 31 is formed on the conductive layer by electroplating. A long etching time is disadvantageous for forming fine-pitch circuits, as it can result in a narrower circuit width or more pronounced undercuts. For this reason, there is a need for a printed circuit board with a structure that can reduce the thickness of the conductive layer on the main surface side of the substrate.
[0007] Furthermore, printed circuit boards, as equipment for artificial satellites, need to be small and lightweight, and also need to have a long lifespan even in harsh environments.
[0008] In Patent Document 1, as shown in Figure 12, a conductive layer (hereinafter also referred to as the electroless plating layer 33) is formed by electroless plating on the wall surface 2a of the through hole 2 of the substrate 1, which consists of an insulating layer 10 and a first conductive layer 21, in order to form a via hole. However, the adhesion between the inner wall of the via hole and the electroless plating layer is low, making it prone to distortion due to thermal shock, which raises concerns about a reduced lifespan.
[0009] Therefore, the present disclosure aims to provide a printed wiring board having a structure that allows for a thinner conductive layer on the main surface side of the substrate and enables a longer lifespan under harsh conditions.
[0010] [Effects of this disclosure] According to this disclosure, it is possible to reduce the thickness of the conductive layer on the main surface side of the substrate and to provide a printed wiring board having a structure that allows for a longer lifespan in harsh environments.
[0011] [Description of Embodiments of the Disclosure] Embodiments of the Disclosure will be described first by listing them. (1) The printed circuit board of the Disclosure comprises an insulating layer, a first metal particle sintered body layer disposed on the main surface of the insulating layer, a first conductive layer disposed on the first metal particle sintered body layer, and a second conductive layer disposed on the first conductive layer, wherein the substrate comprising the insulating layer, the first metal particle sintered body layer, and the first conductive layer has through holes formed that penetrate the insulating layer, the first metal particle sintered body layer, and the first conductive layer along the thickness direction, the second metal particle sintered body is disposed on the insulating layer on the wall surface of the through holes, and the second conductive layer is further disposed on at least a part of the second metal particle sintered body, making it a printed circuit board.
[0012] In the printed circuit board of this disclosure, a second metal particle sintered body is arranged on the wall surface of the through-hole. Therefore, as in Patent Document 1, there is no need to form a conductive layer on the wall surface of the through-hole by electroless plating, and a conductive layer is not formed on the main surface of the substrate by electroless plating. In the printed circuit board of this disclosure, the conductive layer on the main surface side of the substrate before the second conductive layer is arranged consists of the first conductive layer. Therefore, compared to Patent Document 1, where the conductive layer on the main surface side of the substrate includes an electroless plating layer in addition to the first conductive layer, the thickness of the conductive layer on the main surface side of the substrate can be reduced. The printed circuit board of this disclosure has a structure that allows for a reduced thickness of the conductive layer on the main surface side of the substrate, and fine-pitch circuits can be advantageously formed in the printed circuit board of this disclosure. Furthermore, the printed circuit board of this disclosure has a structure that enables a longer lifespan in harsh environments.
[0013] (2) In (1) above, either the second metal particle sintered body or the second metal particles contained in the second metal particle sintered body may be placed on at least a portion of the first conductive layer on the wall surface of the through hole. This improves connection reliability.
[0014] (3) In (1) or (2) above, the second metal particle sintered body may be placed in at least a portion between the first conductive layer and the second conductive layer. This improves the adhesion to the resist due to the anchoring effect of the second metal particle sintered body, making it less likely for the resist to collapse even in the case of a fine pitch. Furthermore, the adhesion between the first conductive layer and the second conductive layer is improved. Therefore, even if the circuit formed on the printed circuit board is of a fine pitch, delamination of the circuit at the interface between the first conductive layer and the second conductive layer is suppressed.
[0015] (4) In any of (1) to (3) above, the thickness of the first metal particle sintered body layer may be 0.01 μm or more and 2 μm or less. If the thickness of the first metal particle sintered body layer is 0.01 μm or more, the conductivity is improved. If the thickness of the first metal particle sintered body layer is 2 μm or less, the circuit formation ability is improved.
[0016] (5) In (4) above, the average particle size of the first metal particles contained in the first metal particle sintered body layer is 1 nm or more and 900 nm or less, and the average particle size of the second metal particles contained in the second metal particle sintered body may be 1 nm or more and 900 nm or less. When the average particle size of the first and second metal particles is 1 nm or more, the dispersibility and stability of the metal particles in the conductive ink containing the metal particles used when forming the first metal particle sintered body layer and the second metal particle sintered body are good. When the average particle size of the first and second metal particles is 900 nm or less, the precipitation of metal particles in the conductive ink is suppressed, and the uniformity of the density of metal particles is improved when the conductive ink is applied. In this disclosure, the average particle diameter means the particle diameter at which the volume integrated value in the particle diameter distribution measured by laser diffraction is 50%.
[0017] (6) In (5) above, the thickness of the second metal particle sintered body on the insulating layer of the wall surface of the through hole may be 10 nm or more and 1000 nm or less. If the thickness of the second metal particle sintered body layer is 10 nm or more, the conductivity is further improved. If the thickness of the second metal particle sintered body layer is 1000 nm or less, productivity is improved.
[0018] (7) In any of (1) to (6) above, the thickness of the first conductive layer may be 0.01 μm or more and 5 μm or less. If the thickness of the first conductive layer is 0.1 μm or more, the conductivity is improved. If the thickness of the first conductive layer is 5 μm or less, the circuit formation ability is improved.
[0019] (8) In (6) above, the first conductive layer may contain copper as its main component. This improves connection reliability.
[0020] (9) In any of (1) to (8) above, the thickness of the second conductive layer may be 1 μm or more and 100 μm or less. If the thickness of the second conductive layer is 1 μm or more, the conductivity is improved. If the thickness of the second conductive layer is 100 μm or less, the circuit formation ability is improved.
[0021] [Details of Embodiments of the Disclosure] Specific examples of the printed circuit board of the Disclosure will be described below with reference to the drawings. In the drawings of the Disclosure, the same reference numerals represent the same or corresponding parts. In addition, dimensional relationships such as length, width, thickness, and depth have been modified as appropriate for clarity and simplification of the drawings and do not necessarily represent actual dimensional relationships.
[0022] In this disclosure, the notation "A to B" means A or greater and B or less. If no unit is specified for A, and only a unit is specified for B, then the unit for A and the unit for B are the same.
[0023] In this disclosure, when compounds and the like are represented by chemical formulas, unless otherwise specified, the atomic ratios should include all conventionally known atomic ratios and should not necessarily be limited to those within the stoichiometric range.
[0024] In this disclosure, if one or more numerical values are listed as the lower limit and upper limit of a numerical range, any combination of any one numerical value listed as the lower limit and any one numerical value listed as the upper limit shall also be disclosed.
[0025] In this disclosure, “equipment,” “includes,” “possesses,” and variations thereof are open-ended terms. Open-ended terms may or may not include additional elements in addition to the essential elements. The statement “consists of” is a closed term. However, even a configuration expressed in closed terms may include additional elements that are usually incidental or irrelevant to the subject technology.
[0026] [Embodiment 1: Printed Wiring Board] A printed wiring board 100 of one embodiment of the present disclosure (hereinafter also referred to as "Embodiment 1") will be described with reference to Figure 1. The printed wiring board 100 of Embodiment 1 comprises an insulating layer 10, a first metal particle sintered body layer 42 disposed on the main surface of the insulating layer 10, a first conductive layer 21 disposed on the first metal particle sintered body layer 42, and a second conductive layer 31 disposed on the first conductive layer 21. The substrate 1, consisting of the insulating layer 10, the first metal particle sintered body layer 42, and the first conductive layer 21, has through holes 2 that penetrate the insulating layer 10, the first metal particle sintered body layer 42, and the first conductive layer 21 along the thickness direction. The second metal particle sintered body 41 is disposed on the insulating layer 10 of the wall surface 2a of the through holes 2. The second conductive layer 31 is further disposed on at least a part of the second metal particle sintered body 41, making it a printed wiring board.
[0027] In the printed circuit board shown in Figure 1, a configuration is shown in which the second metal particle sintered body 41 is arranged on a portion of the first conductive layer 21, but the printed circuit board of this disclosure is not limited to this configuration. In the printed circuit board of this disclosure, the second metal particle sintered body 41 does not have to be arranged on the first conductive layer 21.
[0028] <Insulating Layer> The insulating layer 10 has a main surface consisting of a first main surface 10a and a second main surface 10b. The first main surface 10a and the second main surface 10b are end faces in the thickness direction of the insulating layer 10. The second main surface 10b is the opposite surface of the first main surface 10a.
[0029] The insulating layer 10 may be formed from, for example, polyimide, liquid crystal polymer, fluororesin, etc. However, the constituent materials of the insulating layer 10 are not limited to these.
[0030] The thickness of the insulating layer 10 may be 5 μm or more and 100 μm or less, or 10 μm or more and 50 μm or less. If the thickness of the insulating layer 10 is 5 μm or more, the strength of the insulating layer 10 is sufficient. If the thickness of the insulating layer 10 is 100 μm or less, the insulating layer 10 can have good flexibility. In this disclosure, thickness means the average of the thickness measured at any five locations in the cross section in the direction along the normal to the main surface of the printed wiring board 100. The same applies to the thickness of the first metal particle sintered body layer, the first conductive layer 21 and the second conductive layer 31 described later.
[0031] <First Metal Particle Sintered Body Layer> The first metal particle sintered body layer 42 is arranged on the main surface of the insulating layer 10, which consists of the first main surface 10a and the second main surface 10b. The first metal particle sintered body layer 42 has a structure in which a plurality of first metal particles are fixed to each other by a metal oxide or the like.
[0032] Examples of metals that constitute the first metal particles contained in the first metal particle sintered body layer 42 include copper, silver, nickel, and gold. From the viewpoint of cost and conductivity, the metal may be silver or copper. From the viewpoint of suppressing ion migration, the metal may be copper. That is, the first metal particles may be made of copper.
[0033] The average particle size of the first metal particles contained in the first metal particle sintered layer 42 may be 1 nm to 900 nm, 10 nm to 500 nm, or 30 nm to 100 nm. In this disclosure, the average particle size of the first metal particles is measured by observing a cross-section of the printed circuit board 100 in a direction along the normal to the main surface with a scanning electron microscope at 100,000x magnification. A rectangular measurement field of view of 0.85 μm × 1.2 μm is set in the scanning electron microscope image, and the arithmetic mean of the equivalent circle diameters of all first metal particles within the measurement field is calculated. In this disclosure, this arithmetic mean corresponds to the average particle size of the first metal particles. The average particle size of the second metal particles, described later, is measured using the same procedure.
[0034] The thickness of the first metal particle sintered body layer 42 may be 0.01 μm or more and 2 μm or less, 0.05 μm or more and 1 μm or less, or 0.1 μm or more and 0.5 μm or less.
[0035] <First conductive layer> The first conductive layer 21 is placed on the main surface of the first metal particle sintered body layer 42 opposite to the main surface in contact with the insulating layer 10. The first conductive layer 21 may be a layer formed by electroless plating or electrolytic plating.
[0036] The first conductive layer 21 may contain copper as its main component. In this disclosure, "the first conductive layer 21 contains copper as its main component" means that the first conductive layer 21 contains 60% by mass or more of copper.
[0037] The thickness of the first conductive layer 21 may be 0.01 μm or more and 5 μm or less, 0.1 μm or more and 2 μm or less, or 0.2 μm or more and 1 μm or less.
[0038] A second metal particle sintered body or second metal particles contained in the second metal particle sintered body may be placed on at least a portion of the first conductive layer 21 of the wall surface 2a of the through hole 2 that penetrates the substrate 1 along the thickness direction.
[0039] <Second conductive layer> The second conductive layer 31 is placed on the main surface of the first conductive layer 21 opposite to the main surface of the first conductive layer 21 that is close to the substrate 1. The second conductive layer 31 may be placed directly above the first conductive layer 21. The second conductive layer 31 is placed directly above a portion of the first conductive layer 21, and at least a portion between the first conductive layer 21 and the second conductive layer 31 may contain one or both of the second metal particle sintered body 41 and the second metal particles contained in the second metal particle sintered body 41.
[0040] The second conductive layer 31 is further disposed on at least a portion of the second metal particle sintered body 41. An electroless plating layer may be disposed between at least a portion of the second metal particle sintered body 41 and the second conductive layer 31.
[0041] The thickness of the second conductive layer 31 may be 1 μm or more and 200 μm or less, 1 μm or more and 100 μm or less, 3 μm or more and 100 μm or less, or 10 μm or more and 50 μm or less.
[0042] <Substrate>The substrate 1 includes an insulating layer 10, a first metal particle sintered body layer 42 disposed on the main surface of the insulating layer 10, and a first conductive layer 21 disposed on the first metal particle sintered body layer 42. A through hole 2 penetrating the insulating layer 10, the first metal particle sintered body layer 42, and the first conductive layer 21 in the thickness direction is formed in the substrate 1. The wall surface portion 2a of the through hole 2 includes the insulating layer 10, the first metal particle sintered body layer 42, and the first conductive layer 21.
[0043] <Second Metal Particle Sintered Body>A second metal particle sintered body 41 is disposed on the insulating layer 10 of the wall surface portion 2a of the through hole 2. The second metal particle sintered body 41 has a structure in which a plurality of second metal particles are fixed to each other by a metal oxide or the like. The second metal particle sintered body 41 has a layer structure and may cover all or part of the insulating layer 10 of the wall surface portion 2a of the through hole 2 as the second metal particle sintered body layer. The second metal particle sintered body 41 may be continuous in the in-plane direction of the insulating layer 10 of the wall surface portion 2a of the through hole 2. The second metal particle sintered body 41 may be discontinuous in the in-plane direction of the insulating layer 10 of the wall surface portion 2a of the through hole 2. That is, a plurality of second metal particle sintered bodies 41 may be arranged apart from each other in the in-plane direction of the insulating layer 10.
[0044] Examples of the metal constituting the second metal particles included in the second metal particle sintered body 41 include copper, silver, nickel, gold, and aluminum. From the viewpoints of cost and conductivity, the metal may be silver or copper. From the viewpoint of suppressing ion migration, the metal may be copper. That is, the second metal particles may be made of copper.
[0045] The second metal particle sintered body 41 may be further disposed on at least a part of the first conductive layer 21 of the wall surface portion 2a of the through hole 2. The second metal particle sintered body 41 does not have to be disposed on the first conductive layer 21 of the wall surface portion 2a of the through hole 2.
[0046] The second metal particle sintered body 41 may be further disposed on at least a part between the first conductive layer 21 and the second conductive layer 31. The second metal particle sintered body 41 does not have to be disposed between the first conductive layer 21 and the second conductive layer 31.
[0047] No electroless plating layer is disposed on the insulating layer 10 of the wall surface portion 2a of the through hole 2. According to this, in the manufacturing process of the printed wiring board, since the conductive layer on the main surface of the base material can be made thinner, the etching property of the conductive layer is improved, and a fine pitch circuit is advantageously formed. When analyzing a cross section in the direction along the normal of the main surface of the printed wiring board 100 with an energy dispersive X-ray spectrometer attached to a scanning electron microscope and no palladium (Pd) exists on the insulating layer 10 of the wall surface portion 2a of the through hole 2, it is determined that no electroless plating layer is disposed on the insulating layer 10 of the wall surface portion 2a of the through hole 2.
[0048] The average particle diameter of the second metal particles included in the second metal particle sintered body 41 may be 1 nm or more and 900 nm or less, may be 10 nm or more and 500 nm or less, or may be 30 nm or more and 100 nm or less.
[0049] When the second metal particle sintered body 41 has a layer structure, the thickness of the second metal particle sintered body layer on the insulating layer 10 of the wall surface portion 2a of the through hole 2 may be 10 nm or more and 1000 nm or less, may be 50 nm or more and 700 nm or less, or may be 100 nm or more and 500 nm or less. When the thickness of the second metal particle sintered body layer is 10 nm or more, the conductivity is further improved. When the thickness of the second metal particle sintered body layer is 1000 nm or less, the productivity is improved. In the present disclosure, the thickness of the second metal particle sintered body layer is measured by observing with a scanning electron microscope at 20,000 times magnification in a cross section in the direction along the normal of the main surface of the printed wiring board 100. As shown in FIG. 2, the measurement locations are the upper region 41a close to the first main surface 10a of the insulating layer 10 of the through hole 2, the lower region 41c close to the second main surface 10b of the insulating layer 10 of the through hole 2, and the central region 41b between the upper region 41a and the lower region 41c. At each measurement location, the thickness of the second metal particle sintered body layer is measured three times, that is, a total of nine locations, and the average is calculated. In the present disclosure, the average corresponds to the thickness of the second metal particle sintered body layer. The thickness of the second metal particle sintered body layer provided outside the insulating layer 10 of the wall surface portion 2a of the through hole 2 may be in the same range as the thickness of the second metal particle sintered body layer on the insulating layer 10 of the wall surface portion 2a of the through hole 2.
[0050] <Manufacturing Method of Printed Wiring Board> The manufacturing method of the printed wiring board of Embodiment 1 will be described.
[0051] Figure 3 is a diagram illustrating the manufacturing process of a printed circuit board according to Embodiment 1. As shown in Figure 3, the manufacturing method of the printed circuit board 100 comprises a preparation step S1, a through-hole formation step S2, a second metal particle sintered body formation step S3, and a second conductive layer formation step S4.
[0052] <<Preparation Step S1>> As shown in Figure 4, in preparation step S1, a substrate 1 is prepared, comprising an insulating layer 10, a first metal particle sintered body layer 42 disposed on the main surface including the first main surface 10a and the second main surface 10b of the insulating layer 10, and a first conductive layer 21 disposed on the first metal particle sintered body layer 42. The substrate 1 may be formed by laminating the metal constituting the first conductive layer 21 on the first metal particle sintered body layer 42 by electroless plating or electroplating. The first metal particles constituting the first metal particle sintered body layer 42 and the metal constituting the first conductive layer 21 are as described in the first conductive layer 21 of Embodiment 1. The substrate 1 prepared in preparation step S1 does not have through holes 2 formed therein.
[0053] <Through-hole formation process S2> In the through-hole formation process S2, through-holes 2 are formed in the substrate 1 prepared in the preparation process S1. A laser L is irradiated onto the first conductive layer 21 from the upper side of the main surface of the first conductive layer 21 (hereinafter also referred to as the fourth main surface 21b of the substrate), which is placed on the first main surface 10a of the insulating layer 10. As a result, through-holes 2 are formed in the insulating layer 10, the first metal particle sintered body layer 42, and the first conductive layer 21, as shown in Figure 5.
[0054] ≪Second Metal Particle Sintered Body Formation Process S3≫ In the second metal particle sintered body formation process S3, a second metal particle sintered body 41 is formed on the insulating layer 10 of the wall surface 2a of the through hole 2 of the substrate 1 in which the through hole 2 is formed. In the second metal particle sintered body formation process S3, firstly, conductive ink 61 containing metal particles is applied to the third main surface 21a and the fourth main surface 21b opposite to the third main surface 21a of the substrate 1 (hereinafter also referred to as the "conductive ink application process S31"). Conventional known application methods such as spin coating, spray coating, bar coating, die coating, slit coating, roll coating, and dip coating can be used as the application method. As a result, the conductive ink 61 penetrates into the through hole 2 of the substrate 1, and the conductive ink 61 is applied to the wall surface 2a of the through hole 2, as shown in Figure 6. The conductive ink 61 may be filled into the through hole 2, or it may be applied to the wall surface 2a of the through hole 2.
[0055] The average particle size of the metal particles contained in the conductive ink 61 may be between 1 nm and 900 nm.
[0056] The metal particle content of the conductive ink 61 may be 5% by mass or more and 50% by mass or less. If the metal particle content of the conductive ink 61 is 5% by mass or more, a denser second metal particle sintered body 41 can be formed. If the metal particle content of the conductive ink 61 is 50% by mass or less, the film thickness of the second metal particle sintered body 41 can be made more uniform.
[0057] The solvent in the conductive ink 61 described above is not particularly limited, and various solvents that can disperse metal particles well can be used. Examples of solvents include water and various water-soluble organic solvents. Specific examples of organic solvents include alcohols such as methyl alcohol, ethyl alcohol, n-propyl alcohol, isopropyl alcohol, n-butyl alcohol, isobutyl alcohol, sec-butyl alcohol, and tert-butyl alcohol; ketones such as acetone and methyl ethyl ketone; polyhydric alcohols such as ethylene glycol and glycerin, and other esters; and glycol ethers such as ethylene glycol monoethyl ether and diethylene glycol monobutyl ether.
[0058] The conductive ink 61 may contain a dispersant in addition to metal particles. The dispersant is not particularly limited, and various dispersants that can effectively disperse metal particles can be used. Examples of dispersants include amine-based polymer dispersants such as polyethyleneimine and polyvinylpyrrolidone, hydrocarbon-based polymer dispersants having a carboxyl group in the molecule such as polyacrylic acid and carboxymethylcellulose, and polymer dispersants having polar groups such as polyvinyl alcohol (PVA), styrene-maleic acid copolymer, olefin-maleic acid copolymer, and copolymers having a polyethyleneimine portion and a polyethylene oxide portion in the molecule.
[0059] Secondly, the substrate 1 coated with conductive ink 61 is washed with sulfuric acid and then with water (hereinafter also referred to as the "excess particle removal step S32"). As a result, as shown in Figure 7, at least a portion of the conductive ink 61 applied to the third main surface 21a and the fourth main surface 21b of the first conductive layer 21 is removed. At least a portion of the conductive ink 61 applied to the first conductive layer 21 of the wall surface 2a of the through hole 2 may also be removed. As long as the effects of this disclosure are not impaired, a portion of the conductive ink 61 applied to the third main surface 21a and the fourth main surface 21b may remain on the third main surface 21a and the fourth main surface 21b without being removed. As long as the effects of this disclosure are not impaired, a portion of the conductive ink 61 applied to the first conductive layer 21 of the wall surface 2a of the through hole 2 may remain on the first conductive layer 21 without being removed.
[0060] Thirdly, the solvent contained in the applied conductive ink 61 is dried (hereinafter also referred to as "drying step S33"). The drying method can be, for example, blowing air at a temperature of room temperature (23°C) or higher. The upper limit of the drying temperature may be 100°C from the viewpoint of suppressing crack formation due to rapid drying.
[0061] Fourth, the dried conductive ink 61 is fired (hereinafter also referred to as "firing process S34"). As a result, the metal particles contained in the dried conductive ink 61 are sintered with each other, and a second metal particle sintered body 41 is formed as shown in Figure 8. The firing temperature may be 150°C or higher and 500°C or lower. If the firing temperature is 150°C or higher, the adhesion between the insulating layer 10 and the second metal particle sintered body 41 can be improved. If the firing temperature is 500°C or lower, deformation of the insulating layer 10 can be suppressed. The firing time is not particularly limited, but may be, for example, 30 minutes or higher and 600 minutes or lower. The firing atmosphere may be a nitrogen atmosphere, or a reducing atmosphere such as nitrogen containing hydrogen. The firing method may be light firing, plasma irradiation, etc.
[0062] <<Second conductive layer formation step S4>> In the second conductive layer formation step S4, a second conductive layer 31 is formed on the first conductive layer 21 and the second metal particle sintered body 41. In the second conductive layer formation step S4, as shown in Figure 9, firstly, a resist pattern 71 is formed on the first conductive layer 21 (hereinafter also referred to as the "resist pattern formation step S41").
[0063] The resist pattern 71 has an opening 71a. The opening 71a penetrates the resist pattern 71 along the thickness direction. The first conductive layer 21 and the second metal particle sintered body 41 on the main surface of the substrate 1 are exposed through the opening 71a. The resist pattern 71 is not formed on the second metal particle sintered body 41 on the wall portion 2a of the through hole 2.
[0064] In the resist pattern formation process, first, a resist is applied to the first conductive layer 21 and the second metal particle sintered body 41. Next, the applied resist is exposed to light and developed. As a result, the remaining resist that was not removed becomes the resist pattern 71, and the removed resist becomes an opening 71a.
[0065] In the second conductive layer formation step S4, following the resist pattern formation step S41, electroplating is performed as shown in Figure 10 (hereinafter also referred to as the "electroplating step S42"). In the electroplating step, the second conductive layer 31 is formed on the first conductive layer 21 and the second metal particle sintered body 41 that are exposed from the opening 71a. The second conductive layer 31 is formed by electroplating the first conductive layer 21 and the second metal particle sintered body 41 by passing an electric current through the plating solution.
[0066] In the second conductive layer formation step S4, following the electroplating step, the resist pattern 71 is removed as shown in Figure 11 (hereinafter also referred to as the "resist pattern removal step S43"). In the resist pattern removal step, the resist pattern 71 is removed from the first conductive layer 21. As a result, the first conductive layer 21 is exposed between two adjacent second conductive layers 31.
[0067] In the second conductive layer formation step S4, etching is performed following the resist pattern removal step (hereinafter also referred to as the "etching step S44"). In the etching step, the first conductive layer 21 exposed between two adjacent second conductive layers 31 and the first metal particle sintered body layer 42 placed between the first conductive layer 21 and the substrate 1 are removed by etching. If the second metal particle sintered body 41 is placed on the first conductive layer 21, the second metal particle sintered body 41 is also removed by etching. As a result, a printed circuit board 100 with the structure shown in Figure 1 is formed.
[0068] This embodiment will be described in more detail by reference to examples. However, this embodiment is not limited by these examples. [Sample 1 to Sample 4] A substrate 1 was prepared in which a first metal particle sintered body layer 42 made of copper particles and a first conductive layer 21 made of copper were arranged in this order on an insulating layer 10 made of polyimide (see Figure 4). The average thickness of the insulating layer 10 was 25 μm, the average thickness of the first metal particle sintered body layer 42 was 0.08 μm, and the average thickness of the first conductive layer 21 was 0.1 μm.
[0069] A UV-YAG laser was irradiated onto the first conductive layer 21 of the substrate 1 from the upper side of one main surface with a power of 1W to form multiple through holes 2 in the insulating layer 10, the first metal particle sintered body layer 42, and the first conductive layer 21 (see Figure 5). The diameters of the through holes 2 in each sample are shown in Table 1.
[0070] Next, conductive ink 61 containing copper particles with an average particle size of 63 nm was applied to both main surfaces of the substrate 1 using a bar coater. This allowed the conductive ink 61 to penetrate the through holes 2 of the substrate 1, and the conductive ink 61 was applied to the wall surface 2a of the through holes 2 (see Figure 6). The application speed was 0.6 m / min. Next, the substrate 1 coated with conductive ink 61 was washed with sulfuric acid and then with water (see Figure 7). Next, the substrate 1 was air-dried at room temperature (23°C). Next, the dried conductive ink 61 was fired at 300°C for 60 minutes to form a layered second metal particle sintered body 41 (see Figure 8). The average thickness of the second metal particle sintered body 41 on the main surface of the substrate 1 and the average thickness of the second metal particle sintered body 41 on the wall surface 2a are shown in Table 1.
[0071] Next, a resist was applied to the first conductive layer 21 and the second metal particle sintered body 41. Then, the applied resist was exposed to light and developed to remove a portion of the resist and form a resist pattern 71 (see Figure 9).
[0072] Next, a second conductive layer 31 (material: copper) was formed on the first conductive layer 21 and the second metal particle sintered body 41 exposed from the opening 71a by electroplating (see Figure 10). The second conductive layer 31 was formed by electroplating the first conductive layer 21 and the second metal particle sintered body 41 in a plating solution by passing an electric current through them. The average thickness of the second conductive layer 31 was 3 μm.
[0073] Next, after removing the resist pattern 71 (see Figure 11), the first conductive layer 21 exposed between two adjacent second conductive layers 31 and the first metal particle sintered body layer 42 placed between the first conductive layer 21 and the substrate 1 were removed by etching. If the second metal particle sintered body 41 was placed on the first conductive layer 21, the second metal particle sintered body 41 was also removed by etching. As a result, a printed circuit board 100 having the cross-sectional structure shown in Figure 1 was obtained.
[0074] [Samples 1-1 to 1-4] A substrate 1 was prepared in which a first metal particle sintered body layer 42 made of copper particles and a first conductive layer 21 made of copper were arranged in this order on an insulating layer 10 made of polyimide (see Figure 4). The average thickness of the insulating layer 10 was 25 μm, the average thickness of the first metal particle sintered body layer 42 was 0.08 μm, and the average thickness of the first conductive layer 21 was 0.3 μm.
[0075] Next, through holes (see Figure 5) were formed in the substrate using the same method as for samples 1 to 4. The diameters of the through holes in each sample are shown in Table 1.
[0076] Next, an electroless plating layer was formed on the first conductive layer and on the walls of the through-holes by electroless plating. The average thickness of the electroless plating layer was 0.3 μm.
[0077] Next, a resist was applied to the electroless plating layer. Then, the applied resist was exposed to light and developed to remove a portion of the resist and form a resist pattern.
[0078] Next, a second conductive layer (material: copper) was formed on the electroless plating layer exposed from the opening by electroplating. The second conductive layer was formed by electroplating the first conductive layer in the plating solution. The thickness of the second conductive layer was 3 μm.
[0079] Next, after removing the resist pattern, the first conductive layer exposed between two adjacent second conductive layers was removed by etching. This resulted in obtaining a printed circuit board.
[0080] In the printed circuit board of each sample, a first region was formed in which the circuit width of the wiring including the first conductive layer 21 and the second conductive layer 31 was 6 μm and the space width between circuits was 6 μm, and a second region was formed in which the circuit width of the wiring was 8 μm and the space width between circuits was 8 μm.
[0081]
[0082] The printed circuit boards of Samples 1 to 4 correspond to the examples. The printed circuit boards of Samples 1-1 to 1-4 correspond to the comparative examples. The printed circuit boards of Samples 1-1 to 1-4 correspond to conventional printed circuit boards. In the printed circuit boards of Samples 1 to 4, the thickness of the conductive layer on the main surface side of the substrate (total thickness of the first conductive layer and the second conductive layer) was thinner than the thickness of the conductive layer on the main surface side of the substrate of the printed circuit boards of Samples 1-1 to 1-4 (total thickness of the first conductive layer, electroless plating layer and second conductive layer).
[0083] The maximum strain at the through-hole ends of each printed circuit board sample was measured from -120°C to +125°C. The reference value was the strain at the through-hole ends at 25°C. The insulating layer was polyimide, with a thermal expansion coefficient of 132 ppm / K in the radial direction and 30 ppm / K in the thickness direction. The first metal particle sintered body layer, first conductive layer, second conductive layer, and second metal particle sintered body layer were made of copper, with a thermal expansion coefficient of 16.7 ppm / K. When the temperature of the printed circuit board was changed from -120°C to +125°C, stress concentrated at the through-hole ends due to the difference in thermal expansion coefficients between polyimide and copper, causing strain and resulting in wire breakage. The strain at -120°C and +125°C was calculated by simulation, and the strain fluctuation range (the difference in strain between -120°C and +125°C) was defined as the maximum strain, as shown in Table 2. The smaller the maximum strain, the less stress is applied to the end of the through hole, making fracture less likely at the through hole and resulting in a longer lifespan in harsh environments. The printed circuit boards of Samples 1 to 4 had a longer lifespan in harsh environments than the printed circuit boards of Samples 1-1 to 1-4.
[0084] In the printed circuit boards of Sample 1 and Sample 2, no circuit collapse or delamination occurred in the first and second regions. The reason for this is as follows: In the printed circuit boards of Sample 1 and Sample 2, a second metal particle sintered body 41 is formed on the main surface of the substrate 1. Due to the anchoring effect of the second metal particle sintered body, the adhesion to the resist is improved, making resist collapse less likely even in the case of fine pitch. Furthermore, the adhesion between the first conductive layer and the second conductive layer is improved. Therefore, even when the circuit formed on the printed circuit board is fine pitch, delamination of the circuit at the interface between the first conductive layer and the second conductive layer is suppressed.
[0085]
[0086] While embodiments and examples of this disclosure have been described above, it is intended from the outset that the configurations of each of the embodiments and examples described above may be combined or modified in various ways as appropriate. The embodiments and examples disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than the embodiments and examples described above, and all modifications within the scope of the claims are intended to be included in the meaning of equivalences.
[0087] 1 Substrate, 2 Through hole, 2a Wall surface, 10 Insulating layer, 10a First main surface, 10b Second main surface, 21 First conductive layer, 21a Third main surface, 21b Fourth main surface, 31 Second conductive layer, 33 Electroless plating layer, 41 Second metal particle sintered body, 41a Upper region, 41b Central region, 41c Lower region, 42 First metal particle sintered body layer, 61 Conductive ink, 71 Resist pattern, 71a Opening, 100, 200 Printed wiring board.
Claims
The device comprises an insulating layer, a first metal particle sintered body layer disposed on the main surface of the insulating layer, a first conductive layer disposed on the first metal particle sintered body layer, and a second conductive layer disposed on the first conductive layer. The substrate comprising the insulating layer, the first metal particle sintered body layer, and the first conductive layer has through holes formed that penetrate the insulating layer, the first metal particle sintered body layer, and the first conductive layer along the thickness direction. A second metal particle sintered body is placed on the insulating layer of the wall surface of the through hole. A printed circuit board further comprising the second conductive layer, which is disposed on at least a portion of the second metal particle sintered body. The printed circuit board according to claim 1, wherein at least a portion of the first conductive layer on the wall surface of the through hole is disposed on either or both of the second metal particle sintered body and the second metal particles contained in the second metal particle sintered body. The printed circuit board according to claim 1 or claim 2, wherein the second metal particle sintered body is disposed in at least a portion between the first conductive layer and the second conductive layer. The printed circuit board according to any one of claims 1 to 3, wherein the thickness of the first metal particle sintered body layer is 0.01 μm or more and 2 μm or less. The average particle size of the first metal particles contained in the first metal particle sintered layer is 1 nm or more and 900 nm or less. The printed circuit board according to claim 4, wherein the average particle size of the second metal particles contained in the second metal particle sintered body is 1 nm or more and 900 nm or less. The printed circuit board according to claim 5, wherein the thickness of the second metal particle sintered body on the insulating layer of the wall surface of the through hole is 10 nm or more and 1000 nm or less. The printed circuit board according to any one of claims 1 to 6, wherein the thickness of the first conductive layer is 0.01 μm or more and 5 μm or less. The printed circuit board according to claim 7, wherein the first conductive layer mainly contains copper. The printed circuit board according to any one of claims 1 to 8, wherein the thickness of the second conductive layer is 1 μm or more and 100 μm or less.
Citation Information
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