Battery current control via a hardware controller for semiconductor devices

Abstract

Aspects of battery current control via a hardware controller for semiconductor devices are disclosed. For example, a hardware-based control architecture enables real time monitoring and control of current drawn from a battery coupled with a semiconductor device. The hardware controller is configured to continuously monitor and control the current drawn from the battery. A total current drawn from the battery is communicated to the hardware controller to compare the total current draw n to a target current and generate a controller output based on the comparison. Operation points, for elements of the semiconductor device that draw current from the battery, are determined based on the controller output. The operation points are communicated to the elements to control, in real time, the current drawn from the battery by the elements.

Description

BATTERY CURRENT CONTROL VIA A HARDWARE CONTROLLER FOR SEMICONDUCTOR DEVICESBACKGROUND

[0001] Semiconductor devices are widely used throughout the world in various electronic devices. For example, it is estimated that almost 80% of the world’s adult population owns a mobile phone. One semiconductor device used within electronic devices is a system-on-a-chip (SoC), which may include various elements, such as a central processing unit (CPU), a graphic processing unit (GPU), an accelerated processing unit (APU). an audio processing unit, and a tensor processing unit (TPU).

[0002] The various elements of a semiconductor device (e.g., CPU, GPU) within an electronic device draw and receive current from a battery within the electronic device. The battery current draw by the element of a semiconductor device needs to be monitored as excessive draw of current from the battery by the elements may result in battery health and / or battery degradation issues. Additionally, the excessive draw of current from the battery by the elements of a semiconductor device may cause a rise in temperature, which may apply stress to the semiconductor device. The rise in temperature over time within the semiconductor device may reduce the overall performance of the semiconductor device.SUMMARY

[0003] This document describes systems and techniques directed at battery' current control via a hardware controller for semiconductor devices, which may overcome or reduce the disadvantages discussed herein.

[0004] Aspects of battery current control via a hardware controller for semiconductor devices are disclosed. For example, a hardware-based control architecture enables real time monitoring and control of current drawn from a battery coupled with a semiconductor device. The hardware controller is configured to monitor and control the current drawn from the battery. A total current drawn from the battery is communicated to the hardware controller to compare the total current draw n to a target current and generate a controller output based on the comparison. Operation points, for elements of the semiconductor device that draw current from the battery, may be determined based on the controller output. The operation points are communicated to the elements to control, in real time, the current drawn from the battery by the elements.

[0005] In some aspects, the techniques described herein relate to a method including receiving at a hardware controller a first current value from a first sensor, the first current value measuring a first current received from a battery by a first element associated with asemiconductor device. The method includes comparing, by the hardware controller, the first current value to a target current value. The method includes determining, by the hardware controller, a first controller output based on the comparison of the first current value to the target current value. The method includes applying the first controller output to the first element, the applying effective to control, in real time, the first current received from the battery by the first element.

[0006] In some aspects, the techniques described herein relate to a system including a battery and a first element associated with a semiconductor device. The first element is coupled with the battery and configured to receive a first current from the battery. A first sensor is coupled with the first element and configured to monitor the first current received from the battery by the first element. The system includes a hardware controller coupled with the first sensor. The hardware controller is configured to compare the first current value to a target current value, provide a first controller output based on the comparison of the first current value to the target current value, and apply the first operation point to the first element. The application of the first operation point to the first element effective to control, in real time, the first current received from the batterv by the first element.

[0007] This Summary is provided to introduce simplified concepts of systems and methods for battery current control via a hardware controller for semiconductor devices, the concepts of which are further described below in the Detailed Description and Drawings. This Summary is not intended to identify essential features of the claimed subject matter, nor is it intended for use in determining the scope of the claimed subject matter.BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The details of one or more aspects of systems and techniques directed at battery current control via a hardware controller for semiconductor devices are described in this document with reference to the following drawings, in which the use of same numbers in different instances may indicate similar features or components.

[0009] FIGs. 1-1 and 1-2 illustrate an example system having a single element in which aspects of battery current control via a hardware controller for semiconductor devices can be implemented.

[0010] FIGs. 2-1 and 2-2 illustrate an example system having more than one element in w hich aspects of battery cunent control via a hardw are controller for semiconductor devices can be implemented.

[0011] FIG. 3 illustrates an example controller that may be implemented in a system in which aspects of battery current control via a hardware controller for semiconductor devices can be implemented.

[0012] FIG. 4 illustrates an example controller that may be implemented in a system in which aspects of battery cunent control via a hardware controller for semiconductor devices can be implemented.

[0013] FIG. 5 illustrates an example operating environment in which aspects of battery current control via a hardware controller for semiconductor devices can be implemented.

[0014] FIG. 6 illustrates an integrated circuit component in which aspects of battery current control via a hardware controller for semiconductor devices can be implemented.

[0015] FIG. 7 illustrates an example electronic device having internal hardware configurations for battery' current control via a hardware controller for semiconductor devices in accordance with one or more implementations.

[0016] FIG. 8 is a flow chart of a method of an aspect of battery current control via a hardware controller for semiconductor devices.

[0017] FIG. 9 is a flow chart of a method of an aspect of battery' current control via a hardware controller for semiconductor devices.DETAILED DESCRIPTIONOverview

[0018] The various elements (e.g., CPU, GPU, TPU) of a semiconductor device draw (e.g., demands, consumes) current from a battery’ coupled with the semiconductor device. If the current demands are not controlled, or limited, the elements may uselessly consume power from the battery. Additionally, excessive draw of current from the battery by the elements of a semiconductor device may result in degradation of the battery' and / or may cause a rise in temperature within the semiconductor device, which may apply stress to the semiconductor device. A battery control algorithm may extend the lifetime of a battery by managing battery’ power consumption via controlling current flow from the battery to various components of a semiconductor device. A battery’ controller may limit useless power consumption and enable efficient dynamic voltage and frequency scaling techniques that may lead to dynamic performance optimization based on available battery power.

[0019] Such software-based controllers may be used to control current drawn from a battery coupled within a semiconductor device. However, an intrinsic drawback of softwarebased battery' current control is the execution speed of the softw are-based controller. The demand for current of a semiconductor device can rapidly change, requiring real time monitoring andcontrol of the current drawn from the battery. A software-based controller is bounded by its reliance on a processor to execute instructions, causing latency or delay in reaction time. To monitor current demand in real time, a software-based controller may need to be running continuously, which may lead to consuming processor cycles inefficiently and potentially impacting the efficiency of the semiconductor device. The software-based controller may be programmed to be activated periodically to improve the efficiency, but the software-based controller may then not be able to monitor and control current drawn from the battery in real time.

[0020] To this end, this document describes systems and techniques directed at battery' current control via a hardware controller for semiconductor devices.

[0021] In aspects, the techniques described herein relate to a hardware-based control architecture that enables real time monitoring and control of current drawn from a battery coupled with a semiconductor device. The hardware controller is configured to continuously monitor and control current drawn and received from the battery by various elements of the semiconductor device. The total current drawn and received from the battery by elements of the semiconductor device is communicated to the hardware controller. The hardware controller is configured to compare the total current draw to a target current and generates a controller output based on the comparison. Operation points for the various elements are determined based on the controller output and applied individually to each of the elements.

[0022] In one implementation, the controller output may be applied to a mapping table (e.g., a lookup table) that may be coupled with the controller to determine the operation points for the elements of the semiconductor device. The mapping table may include various operating frequencies determined based on the controller output. Values for the mapping table may be stored within a memory coupled with the controller and the values (e.g., operating frequencies) of the mapping table may7be varied depending on the application.

[0023] If the total current drawn from the battery exceeds the value of the target current, the operation points determined by the controller output may decrease the demand for current from the battery by the elements of the semiconductor device. If the total current drawn from the battery is less than the value of the target current, the operation points determined by the controller output may allow an increase in the demand for current from the battery by the elements of the semiconductor device.

[0024] The following discussion describes operating environments, techniques that may be employed in the operating environments, and example methods. Although techniques using and apparatuses for battery current control via a hardware controller for semiconductor devices are described, it is to be understood that the subject of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methodsare disclosed as example implementations and reference is made to the operating environment by way of example only.Example Systems and Operational Schemes

[0025] FIGs. 1-1 and 1-2 illustrate an example system 100 in which aspects of battery’ current control via a hardware controller for semiconductor devices can be implemented. The system 100 includes a battery’ 102 coupled to an element 104 of a semiconductor device. The element 104 may be any component (e.g., CPU, GPU, TPU, or the like) of the semiconductor device that draws and receives current 106 from the battery 102. The battery 102 may be any energy source internal to an electronic device coupled with the semiconductor device or any external energy source that is connected to the electronic device coupled with the semiconductor device. The energy’ source may be a battery', battery’ pack, or plurality of batteries coupled with the semiconductor device. The energy source may be a power supply, solar energy device, or the like coupled with the semiconductor device.

[0026] The element 104 may be any component of the semiconductor device that draws current from an energy’ source coupled with the element 104. For example, the element 104 may be a processor that draws current from the battery 102. The processor may be a CPU, GPU, TPU, or the like. The element 104 may instead be anon-processing element, such as a sensor or display. For example, the sensor may be an optical sensor, radar sensor, proximity sensor, or the like. The element 104 may be any component of a semiconductor device that draws current from an energy' source coupled w ith the semiconductor device.

[0027] The amount of current 106 drawn and received from the battery’ 102 by the element 104 is based on a current demand (e.g., consumption) 108, of the element 104, on the battery 102 or intervening pow er distribution circuitry disposed between the element 104 and the battery 102. A hardware controller 110 is configured to control the current demand 108 of the element 104 as discussed herein. By controlling the current demand 108, the hardware controller 110 is configured to control the current 106 drawn from or received from the battery 102. The hardware controller 110 may be coupled with the element 104 and located within the semiconductor device or, alternatively, coupled with the semiconductor device but physically located external to the semiconductor device. The hardware controller 110 may be various controllers configured to provide an output based on an input of current and comparison to a target current. For example, the hardware controller 110 may be a proportional controller, a proportional-integral-derivative controller, an integral controller, a derivative controller, a proportional -integral controller, a closed-loop controller, or the like.

[0028] The system 100 includes a sensor 112 coupled to the element 104, and the battery 102 is configured to monitor the current 106 drawn and received from the battery7102 by the element 104. The sensor 112 may be any component configured to measure the current 106 draw n and received from the battery 102. The sensor 112 may be a shunt resistor, a Hall effect current sensor, a cunent transformer, a flux gate current sensor, a fiber-optic current sensor, an open-loop Hall effect sensor, a closed-loop Hall effect sensor, a Rogowski coil, or the like. The sensor 112 may be any sensor configured to determine an amount of electrical current.

[0029] The sensor 112 is coupled to a comparator 114 of the hardw are controller 110. The sensor 112 is configured to send an indication 116 (e.g., a current value) of the current 106, drawn and received from the battery 102 by the element 104, to the comparator 114. The comparator 114 is configured to compare the indication 116 of the current 106, draw n and received from the battery 102 by the element 104, with a target current 118 stored w ithin a memory7120 coupled to the hardware controller 110. The memory7120 may be an internal memory within the hardware controller 110 or may be an external memory coupled with the hardware controller 110. The memory 120 may be a memoir element internal to the semiconductor device or may be an external memory' element coupled with the semiconductor device. The memory' 120 may be any component configured to store values that may be used by the hardware controller 110. For example, the memory 120 may be any component configured to store any kind of data such as a bit sequence or individual characters. For example, the memory 120 may be a register, volatile memory, non-volatile memory7, a data buffer, a data cache, or the like.

[0030] Based on the comparison of the target current 118 to the current 106 drawn and received from the battery 102 by the element 104, the hardware controller 110 produces, or generates, a controller output 122. The controller output 122 determines an operation point for the element 104. For example, a mapping table 124 (e.g., lookup table) containing values for various operating frequencies may be coupled with the hardware controller 110. An operation value of the mapping table 124 is selected based on the value of the controller output 122. The mapping table 124 may also be coupled with the memory7120. Mapping table (MT) values 126 (e.g., operating frequencies) stored within the memory 120 may be transmitted 128 from the memory' 120 to the mapping table 124 to populate the mapping table 124 with the mapping table values 126. The memory 120 enables the mapping table values 126 to be programmed (e.g., changed) depending on the application as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure.

[0031] The target current 118 may be determined by monitoring usage of the semiconductor device over a predetermined timescale. The usage of the semiconductor device may be monitored for various timescales (e.g., an hour, a twenty-four (24) hour period, a forty-eight (48) hour period, a week, a month, or the like) or for various timescales in the past. A machine-learned model may be used to monitor the usage of the semiconductor device over a predetermined timescale and set the target current 118. The machine-learned model may be a standard neural-network-based model with corresponding layers required for processing input features like fixed-side vectors, text embeddings, or variable length sequences. The machine- learned model may be implemented as one or more of a support vector machine (SVM), a recurrent neural network (RNN), a convolutional neural network (CNN), a dense neural network (DNN), one or more heuristics, other machine-learning techniques, a combination thereof, and so forth.

[0032] As shown in FIG. 1-2, an operation point 130 is determined based on the received controller output 122 and the mapping table values 126 and is applied to the element 104. The operation point 130 sets an operating frequency of the element 104. The operating frequency determines a new current draw (e.g., new current budget) 108', sent from the element 104, to the battery 102. The new current draw 108' may be the same as the prior current draw 108 if the operation point 130 does not change the present operating frequency of the element 104. Real time current 106' (shown in FIG. 1-2) drawn and received by the element 104 is based on the new current draw 108'. This process can be repeated to continuously change, in real time, the current 106 drawn and received from the battery 102. The use of the hardware controller 110 enables the real time control of current 106' drawn and received by the element 104.

[0033] If the value of the target current 118 and / or the mapping table values (e.g., operating frequencies) 126 within the mapping table 124 are changed, the determined operation point 130 will also change as would be appreciated by one of ordinary skill in the art having the benefit of this disclosure. Thus, the value of the target current 118 and the mapping table values 126 may be programmed to tune the system 100 depending on the application. A machine-learned model monitoring the usage of an electronic device may be used to tune the system 100.

[0034] If the hardware controller 110 determines the current 106 presently being draw n and received from the battery 102 by the element 104 is below the target current 118, the operation point 130 may cause the element 104 to increase the new current draw 108'. Likewise, if the hardware controller 110 determines the current 106 presently being drawn and received from the battery 102 by the element 104 is above the target current 118, the operation point 130 may cause the element 104 to decrease the new current draw 108'. In this way, the hardware controller 110 is configured to control the current 106 drawn from the battery 102 by the element 104. Controlling the current 106 drawn from the battery 102 in real time is one benefit of the hardware controller 110 as opposed to using a so Pl ware-based controller, which may only be able to control current drawn from a battery' during operation of the software. For efficiency, the software-based controller would be configured to operate at predetermined timescales, whereas the hardwarecontroller 110 may be configured to continuously monitor and control the cunent 106 drawn from the battery 102. The number, size, and / or configuration of the system 100 may be varied as would be appreciated by one of ordinary7skill in the art. For example, the hardware controller 110 may be configured to monitor and control the current 106 drawn and received from the battery7102 by more than one element 104 as shown in FIGs. 2-1 and 2-2.

[0035] FIGs. 2-1 and 2-2 illustrate an example system 200 in which aspects of battery current control via a hardware controller for semiconductor devices can be implemented. The system 200 includes a battery7102 coupled to a first element 104-1 of a semiconductor device and a second element 104-2 of the semiconductor device. An amount of current 106-1 drawn and received from the battery 102 by the first element 104-1 is based on a first current draw 108-1, from the first element 104-1, received by the battery 102. Likew ise, an amount of current 106-2 drawn and received from the battery7102 by the second element 104-2 is based on a second current draw 108-2, from the second element 104-2, received by the battery 102. A hardware controller 110 is configured to control the current draws 108-1, 108-2 of the first and second elements 104- 1, 104-2 as discussed herein.

[0036] The system 200 includes a first sensor 112-1 coupled to the first element 104-1 and a second sensor 112-2 coupled to the second element 104-1. The first and second sensors 112-1, 112-2 are also coupled to the battery 102. The first sensor 112-1 is configured to monitor the first current 106-1 drawn and received from the battery 102 by the first element 104-1. Likewise, the second sensor 112-2 is configured to monitor the second current 106-2 draw n and received from the battery 102 by the second element 104-2. The first sensor 112-1 is coupled to a summation node 202 and the first sensor 112-1 sends a first indication 116-1 (e.g., a first current value) to the summation node 202. Likewise, the second sensor 112-2 is coupled to the summation node 202 and sends a second indication 116-2 (e.g., a second current value) to the summation node 202. The summation node 202 configured to sum the value 116-1 of the first current 106-1 with the value 116-2 of the second current 106-2 to determine a total current drawn and received from the battery 102 by the first and second elements 104-1, 104-2. In one implementation, the hardware controller 110 may include multiple inputs and the first sensor 112-1 may send, directly to the hardware controller 110, the first current 106-1 drawn and received from the battery 102 by the first element 104-1 and the second sensor 112-2 may send, directly to the hardware controller 110, the second cunent 106-2 drawn and received from the battery 102 by the second element 104-2.

[0037] The two elements 104-1 and 104-2 are shown in FIG. 2 for illustration purposes. The summating node 202 may be coupled to more or less than two elements 104 that draw7and receive current 106 from the battery7102 and may be configured to sum all of the currents 106 to determine a total current drawn and received from the battery 102 as would be appreciated by oneof ordinary skill in the art having the benefit of this disclosure. The summing node 202 is coupled to a comparator 114 of the hardware controller 110 and is configured to send to the comparator 114 an indication 204 (e.g., total current value ) of the total current (e.g., the sum of the first current 106-1 and the second current 106-2) drawn and received from the battery 102 by the elements 104-1, 104-2.

[0038] The comparator 114 is configured to compare the indication 204 of the total current (e.g., first current 106-1 and second current 106-2) drawn and received from the battery 102 by the elements 104-1, 104-2, with a target current 118 stored within a memory 120 coupled to the hardware controller 110. Based on the comparison of the target current 118 to the indication 204 of the total current drawn and received from the battery 102, the hardware controller 110 produces, or generates, a controller output 122-1. In one instance, the controller output 122-1 may be a first controller output. For example, the controller output 122-1 may be a first instance in which the hardware controller 110 monitors and controls the current 106 drawn and received from the battery’ 102. In another instance, the controller output 122-1 may be a second controller output as the hardware controller 110 may be monitoring and controlling the current 106 drawn and received from the battery 102 for a second time. In yet another instance, a single element 104 may draw' 108 current 106 from the battery' 102 and the hardware controller 110 provides a first controller output 122 as discussed regarding FIG. 1. FIG. 2 may represent an application where two elements 104-1, 104-2 draws 108-1, 108-2 simultaneously, or nearly simultaneously, current 106-1, 106-2 from the battery 102 after the prior draw’ of a single element 104 shown in FIG. 1. The hardware controller 110 may provide a second controller output 122-1 in response to the additional draws 108-1, 108-2 for cunent 106-1, 106-2 from the battery 102.

[0039] The controller output 122- 1 from the hardw are controller 110 determines operating points for the elements 104-1, 104-2. For example, the controller output 122-1 in combination with a mapping table 124 provides a first operation point 130-1 to the first element 104-1 and a second operation point 130-2 to the second element 104-2.

[0040] As shown in FIG. 2-2, a first operation point 130-1, based on the received controller output 122-1 and the mapping table values 126, is applied to the first element 104-1. Likewise, a second operation point 130-2, based on the received controller output 122-1 and the mapping table values 126, is applied to the second element 104-2. The first operation point 130- 1 sets an operating frequency of the first element 104-1, which determines a new first current draw (e.g., new first current budget) 108-1 ', sent from the first element 104-1, to the battery 102. Real time first current 106-1 ' drawn and received by the first element 104-1 is based on the new’ first current draw7108-1 '. Likewise, the second operation point 130-2 sets an operating frequency of the second element 104-2, which determines anew second current draw (e.g., new second currentbudget) 108-2', sent from the second element 104-2, to the battery 102. Real time second current 106-2' drawn and received by the second element 104-2 is based on the new second current draw 108-2'. This process may be repeated to continuously control the current 106-1, 106-2 drawn and received from the battery 102 in real time. The mapping table values 126 may be configured, in combination with the controller output 122-1, to control the cunent draw for the various elements (e.g., element 104, first element 104-1, second element 104-2, etc.) of the semiconductor device. Alternatively, the current drawn by the various elements (e.g., element 104, first element 104-1, second element 104-2, etc.) of the semiconductor device may be individually communicated to one or more hardware controllers 110 configured to provide multiple outputs 122 to individually control the current to the various elements (e.g., element 104, first element 104-1, second element 104-2, etc.) of the semiconductor device. Various hardware controllers 110 may be configured to control current drawn and received from the battery' 102. For example, the hardw are controller 110 may be a proportional -integral controller 110- 1 as shown in FIG. 3 or a proportional controller 110-2 as shown in FIG. 4.

[0041] FIG. 3 illustrates an example system 300 that includes a proportional-integral controller 110-1 coupled with a memory' 120 and a mapping table 124. A total current indication 302 is received by a comparator 114 of the proportional-integral controller 110-1. The total current indication 302 provides the value of a total current drawn and received from a battery 102 (shown in FIGs. 1-1, 1-2, 2-1, and 2-2) by elements 104 of a semiconductor device. The comparator 114 compares the total current indication 302 to a target current 118 stored in a memory' 120.

[0042] The proportional -integral controller 110-1 includes a proportional multiplier 304, an error accumulator 306, an accumulator multiplier 308, a summation saturation 310, a summing block 312, and a control saturation 314. The integral portion of the proportional-integral controller 110-1 may saturate at an upper or lower bound for an extended period of time. The integral saturation of the proportional-integral controller 110-1 may be reduced by the summation saturation 310 when saturated. The proportional -integral controller 110-1 provides a controller output 122 to the mapping table 124. One or more operation points 130 (shown in FIG. 1-2) are determined based on the controller output 122 and values of the mapping table 124 as discussed herein. Mapping table values 126 are stored in the memory 120 and communicated 128 to the mapping table 124 as discussed herein. The operation points 130 control the current drawn and received from the battery 102 to the elements 104 of the semiconductor device as discussed herein.

[0043] The proportional multiplier 304 of the proportional-integral controller 110-1 produces an output that is proportional to an error signal. In other words, the larger the error the larger the output. The proportional multiplier 304 may be tuned by programming a proportionalgain (P Gain) 316 stored in the memory 120. Integral components of the proportional-integral controller 110-1 include the error accumulator 306, the accumulator multiplier 308, and the summation saturation 310. The integral components (e.g., error accumulator 306, accumulator multiplier 308, summation saturation 310) are configured to produce an output that is proportional to the integral of the error signal. In other words, the integral components (e.g.. error accumulator 306, accumulator multiplier 308, summation saturation 310) accumulate the error over time and adjust the output accordingly. The integral components (e.g., error accumulator 306, accumulator multiplier 308, summation saturation 310) may be tuned by programming an integral gain 318 stored in the memory 120. The output of the proportional multiplier 304 and the integral components (e.g., error accumulator 306, accumulator multiplier 308, summation saturation 310) are combined via the summing block 312. The control saturation 314 prevents the integral output from accumulating if the output is saturated at an upper or lower limit.

[0044] FIG. 4 illustrates an example system 400 that includes a proportional controller 110-2 coupled with a memory 120 and a mapping table 124. A total current indication 402 is received by a comparator 114 of the proportional controller 110-2. The total current indication 402 provides the value of a total current drawn and received from a battery' 102 (shown in FIGs. 1-1, 1-2, 2-1, and 2-2) by elements 104 of a semiconductor device. The comparator 114 compares the total current indication 402 to the value of a target cunent 118 stored in the memory 120 as discussed herein.

[0045] The proportional controller 110-2 includes a proportional multiplier 304 that produces an output that is proportional to an error signal. In other words, the larger the error the larger the output. The proportional multiplier 304 may be tuned by programming a proportional gain (P Gain) 316 stored in the memory' 120. The proportional controller 110-2 provides a controller output 122 to the mapping table 124. As discussed herein, one or more operation points 130 (shown in FIG. 1-2) are determined based on the controller output 122 and values of the mapping table 124. Mapping table values 126 are stored in the memory 120 and communicated 128 to the mapping table 124 as discussed herein. As discussed herein, the operation points 130 control the current drawn and received from the battery 102 to the elements 104 of the semiconductor device.Example Environments and Electronic Devices

[0046] FIG. 5 illustrates an example operating environment 500 in which aspects of battery current control via a hardware controller for semiconductor devices can be implemented. As illustrated, an SoC integrated circuit (IC) device 502 is mounted to a printed circuit board (PCB) 504, which may be included as part of a computing device that implements one or moresecurity protocols. As non-limiting examples, the computing device may be a smartphone 506, a personal digital assistant 508, a tablet 510, a laptop 512, or a workstation 514.

[0047] The SoC IC device 502 may include various elements 104 (e.g., GPU, CPU, TPU) that may draw excessive current from a battery 102 (shown in FIGs. 1-1, 1-2, 2-1, and 2-2), which may cause deterioration of the battery 102 and / or a temperature event (e.g., a sudden increase in temperature) within the SoC IC device 502. The SoC IC device 502 may include one or more sensors 112 configured to monitor current drawn and received from the battery 102 by elements 104 of the SoC IC device 502.

[0048] The SoC IC device 502 may include a hardware controller 110 configured to continually monitor and control cunent drawn and received from the battery 102. The hardware controller 110 may be coupled with a memory 120 and a mapping table 124. The memory 120 stores a target current 118 and mapping table values 126. The hardware controller 110 generates a controller output 122 (shown in FIGs. 1-1 and 1-2) that the mapping table 124 utilizes to calculate one or more operation points 130 (shown in FIG. 1-2). The one or more operation points 130 are communicated to the elements 104 of the SoC IC device 502 to control, in real time, the current draw n and received from the battery7102 by the one or more elements 104.

[0049] Although the SoC IC device 502 is described in the context of a single SoC IC device including the elements 104, sensors 112, hardware controller 110, memory 120, and mapping table 124, a combination of discrete IC devices may perform the same functions. For example, a discrete processor IC device (e.g., a processor IC device having elements 104, sensors 112, a hardware controller 110, a memory7120, and a mapping table 124) may work in combination with a discrete non-volatile memory IC device having the elements 104 to perform one or more functions described herein.

[0050] FIG. 6 illustrates an integrated circuit component implemented as an SoC 600 that can implement various aspects of battery current control via a hardware controller for semiconductor devices. The SoC 600 may be a single chip including components that are fabricated on the same semiconductor substrate. Alternatively, the SoC 600 may be a number of such chips that are epoxied together. The SoC 600 can be implemented in any suitable device, such as a smartphone, a cellular phone, a netbook, a tablet computer, a server, a wireless router, a network-attached storage, a camera, a smart appliance, a printer, a set-top box, or any other suitable type of device. Although described with reference to an SoC, the entities of FIG. 6 may also be implemented as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or the like.

[0051] The SoC 600 can be integrated with electronic circuitry7, including the components described in the operating system listed herein. The SoC 600 can also include an integrated databus (not shown) that couples the various components of the SoC 600 for data communication between the components. The integrated data bus or other components of the SoC 600 may be exposed or accessed through an external port, such as a joint test action group (JTAG) port. For example, components of the SoC 600 may be tested, configured, or programmed (e.g., flashed) through the external port at different stages of manufacture.

[0052] In this example, the SoC 600 includes computer-readable media 602, one or more processors 604, one or more elements 104, one or more sensors 112, a hardware controller 110, a memory' 120, a mapping table 124, and input / output units 606. The hardware controller 110, memory 120, and mapping table 124 are configured for battery current control via a hardware controller for semiconductor devices as described herein. The computer-readable media 602 may be stored in computer-readable storage media, including one or more non-transitory storage devices such as a random-access memory' (RAM), dynamic random-access memory (DRAM), non-volatile random-access memory (NVRAM), or static random-access memory (SRAM), readonly memory' (ROM), or flash memory, a hard drive, a solid-state drive (SSD), or any type of media suitable for storing electronic instructions, each coupled with a computer system bus.

[0053] FIG. 7 illustrates an example environment 700 of an example electronic device 702 that includes battery current control via a hardware controller for semiconductor devices in accordance with one or more implementations. The electronic device 702 may include additional components and interfaces omitted from FIG. 7 for the sake of clarity. The electronic device 702 is illustrated with various non-limiting example electronic devices 702, including wireless earbuds 702-1, a smart display associated with a home-automation and control system 702-2, a desktop computer 702-3, a tablet 702-4, a laptop 702-5, a television 702-6, a computing watch 702-7, computing glasses 702-8, a gaming system 702-9, a microwave 702-10, a smart thermostat interface 702-11, and an automobile having computing capabilities 702-12. Other devices may also be used, such as w ired earbuds, a security' camera, a trackpad, a drawing pad, a netbook, an e-reader, other forms of home-automation and control systems, a wall display, a virtual -reality' headset, another vehicle (e.g., an e-bike or plane), and other home appliances, to name just a few examples. Note that the electronic device 702 may be wearable, non-wearable but mobile, or relatively immobile (e.g., desktops and appliances), all without departing from the scope of the present teachings.

[0054] The electronic device 702 includes a housing 704, which defines at least one internal cavity within which one or more of a plurality of electronic components may be disposed. In implementations, a mechanical frame may define one or more portions of the housing 704. As an example, a mechanical frame can include plastic or metallic w alls that define portions of the housing 704. In additional implementations, a mechanical frame may support one or moreportions of the housing 704. As an example, one or more exterior housing components (e.g., plastic panels) can be attached to the mechanical frame (e.g., a chassis). In so doing, the mechanical frame physically supports the one or more exterior housing components, which define portions of the housing 704. In implementations, the mechanical frame and / or the exterior housing components may be composed of crystalline or non-crystalline solids. In implementations, the housing 704 may be sealed through the inclusion of one or more displays (e.g., at least one display 716), defining at least one internal cavity.

[0055] The electronic device 702 may further include one or more processors 706. The processor(s) 706 can include, as non-limiting examples, an SoC, an application processor (AP), a CPU, or a GPU. The processor(s) 706 generally execute commands and processes utilized by the electronic device 702 and an operating system installed thereon. For example, the processor(s) 706 may perform operations to display graphics of the electronic device 702 on the one or more displays 716 and can perform other specific computational tasks.

[0056] The electronic device 702 may also include computer-readable storage media (CRM) 708. The CRM 708 may be a suitable storage device configured to store device data of the electronic device 702, user data, and multimedia data. The CRM 708 may store an operating system 710 that generally manages hardware and software resources (e.g., the applications) of the electronic device 702 and provides common services for applications stored on the CRM 708. The operating system 710 and the applications are generally executable by the processor(s) 706 to enable communications and user interaction with the electronic device 702. One or more processors 706, such as a GPU, perform operations to display graphics of the electronic device 702 on the one or more displays 716 and can perform other specific computational tasks. The processors 706 can be single-core or multiple-core processors.

[0057] The electronic device 702 may also include input / output (I / O) ports 712. The I / O ports 712 allow the electronic device 702 to interact with other devices or users. The I / O ports 712 may include any combination of internal or external ports, such as universal serial bus (USB) ports, audio ports, serial advanced technology attachment (SATA) ports, peripheral component interconnect standard (PCI)-express based ports or card-slots, secure digital input / output (SDIO) slots, and / or other legacy ports.

[0058] The electronic device 702 may further include one or more sensors 714. The sensor(s) 714 can include any of a variety of sensors, such as an audio sensor (e.g., a microphone), a touch-input sensor (e.g., a touchscreen), an image-capture device (e.g., a camera, video-camera), proximity sensors (e.g., capacitive sensors), an under-display fingerprint sensor, or an ambient light sensor (e.g., photodetector). In implementations, the electronic device 702 includes one or more of a front-facing sensor(s) and a rear-facing sensor(s).

[0059] The electronic device 702 may include the one or more displays 716, one or more cover layers 718, and one or more display panels 720. The cover lay er(s) 718 may be implemented as any of a variety of transparent materials including polymers (e.g., plastic, acrylic) or glasses.

[0060] The electronic device 702 further includes a battery 102. In implementations, the battery 102 is a rechargeable battery that is configured to store and supply electrical energy. The rechargeable battery 102 may be any suitable rechargeable battery, such as a lithium-ion (Li-ion) battery.Example Methods

[0061] Example methods are described below with reference to the flow charts of FIG. 8 and FIG. 9. Although example method aspects are described separately below, they may be implemented together in any combination or permutation.

[0062] FIG. 8 is a flow chart that illustrates a method 800 for battery current control via a hardware controller for semiconductor devices, which includes operations 802 through 808. At step 802, a first current value, from a first sensor, is received at a hardware controller, the first current value measuring a first current received from a battery by a first element associated with a semiconductor device. For example, a hardware controller (e g., hardware controller 110) receives a first current value (e.g., indication 116) of a first current (e.g., cunent 106) received from a battery (e.g., battery 102) by a first element (e.g., element 104). A first sensor (e.g., sensor 112) is coupled to the first element (e.g., element 104) and provides the first current value (e.g., indication 116).

[0063] At step 804, the hardware controller compares the first current value to a target current value. For example, the hardware controller (e.g., hardware controller 110) compares the first current value (e g., indication 116) of the first current (e.g., current 106) drawn by the first element (e.g., element 104) to the target current value (e.g., target current 118).

[0064] At step 806, the hardware controller determines a first controller output based on the comparison of the first current value to the target current value. For example, the hardware controller (e.g., hardware controller 110) provides a controller output (e.g., controller output 122) based on the comparison of the first current value (e.g., indication 116) to the value of the target current (e.g., target current 118).

[0065] At step 808, the first controller output is applied to the first element, the applying effective to control, in real time, the first cunent received from the battery by the first element. For example, the first controller output (e.g., controller output 122) is applied to the first element (e.g., element 104). The first controller output (e.g., first controller output 122) is effective tocontrol, in real time, the first current received (e.g., current 106') by the first element (e.g., element 104) by the battery (e.g., battery 102).

[0066] FIG. 9 is a flow chart that illustrates a method 900 for battery current control via a hardware controller for semiconductor devices, which includes operations 902 through 910. The method 900 may be a continuation of the method 800 of FIG. 8. At step 902, a total current value from the first sensor and a second sensor is received by the hardware controller, the total current value measuring a total current received from the battery by the first element and a second element associated with the semiconductor device, the second element receiving a second current from the battery. For example, the total current value (e.g.. indication 204), from a first sensor (e.g. sensor 1 12-1) and a second sensor (e.g., sensor 112-2), of the total current received by the first element (e.g., first element 104-1) and a second element (e.g., second element 104-2) from the battery' (e.g., battery 102) is received by a hardware controller (e.g., hardware controller 110).

[0067] At step 904, the hardware controller compares the target current value to the total current value. For example, the hardware controller (e.g., hardware controller 110) compares the value of a target current (e.g., target current 118) to the value of the total current (e.g., indication of total current 204), which is the value of a first current (e.g., current indication 116-1) added to the value of a second current (e.g., current indication 116-2).

[0068] At step 906, the hardware controller detennines a second controller output based on the comparison of the target current value to the total current value. For example, the hardware controller (e.g., hardware controller 110) provides a second controller output (e.g., controller output 122-1) based on the comparison of the total current (e.g., indication of total current 204) to the value of the target current (e.g., target current 118).

[0069] At step 908, the second controller output is applied to the first element, the applying effective to control, in real time, the first current received from the battery by' the first element. For example, the second controller output (e.g., controller output 122-1) is applied to the first element (e.g., first element 104-1). The second controller output (e.g., controller output 122-1) is effective to control, in real time, the first current received (e.g., current 106-1 ') by the first element (e g., element 104-1) by the battery (e.g., battery' 102).

[0070] At step 910, the second controller output is applied to the second element, the applying effective to control, in real time, the second current received from the battery' by the second element. For example, the second controller output (e.g., controller output 122-1) is applied to the second element (e.g., second element 104-2). The second controller output (e.g., second controller output 122-1) is effective to control, in real time, the second current received (e.g., second current 106-2') by the second element (e.g., element 104-2) by the battery (e.g., battery 102).

[0071] For the methods described herein and the associated flow chart(s) and flow diagram(s), the orders in which operations are shown and / or described are not intended to be construed as a limitation. Instead, any number or combination of the described method operations can be combined in any order to implement a given method or an alternative method, including by combining operations from the flow chart or diagram and the earlier-described techniques into one or more methods. Operations may also be omitted from or added to the described methods. Further, described operations can be implemented in fully or partially overlapping manners.Example Aspects and Implementations of Battery Current Control Via a Hardware Controller for Semiconductor Devices

[0072] In the following, some example aspects and implementations are described:

[0073] Example aspect 1. A method comprising receiving, at a hardware controller, a first current value from a first sensor, the first current value measuring a first current drawn from a battery by a first element associated with a semiconductor device; comparing, by the hardware controller, the first current value to a target current value; determining, by the hardw are controller, a first controller output based on the comparison of the first current value to the target current value; applying the first controller output to the first element, the applying effective to control, in real time, the first current drawn from the battery by the first element.

[0074] Example aspect 2. The method of example aspect 1, wherein the determining comprises determining from a lookup table, based on the comparison of the first current value to the target current value, a first operation point, the first operation point specifying a first operating frequency of the first element and apply the first controller output comprises setting the first operating frequency of the first element.

[0075] Example aspect 3. The method of example aspects 1 or 2, wherein, after the first operating frequency of the first element is set, the first current drawn from the battery by the first element is varied based on the first operating frequency of the first element.

[0076] Example aspect 4. The method of any one of example aspects 1 to 3, wherein determining the first operation point further comprises selecting, based on the first controller output, the first operating frequency from the lookup table.

[0077] Example aspect 5. The method of any one of example aspects 1 to 4, comprising receiving, at the hardware controller, a total current value from the first sensor and a second sensor, the total current value measuring a total current drawn from the battery by the first element and a second element associated with the semiconductor device and coupled with the second sensor, the second element drawing a second current from the battery; comparing, by the hardware controller, the target current value to the total current value; determining, by the hardware controller, a secondcontroller output based on the comparison of the target current value to the total current value; applying the second controller output to the first element, the applying effective to control, in real time, the first current drawn from the battery by the first element; and applying the second controller output to the second element, the applying effective to control, in real time, the second current drawn from the battery by the second element.

[0078] Example aspect 6. The method of any one of example aspects 1 to 5, wherein the hardware controller comprises multiple inputs and the multiple sensors send, directly to the hardware controller, the current drawn and received from the battery' by the element(s) associated with each sensor of the multiple sensors.

[0079] Example aspect 7. The method of any one of example aspects 1 to 6, w herein the determining comprises determining from a lookup table, based on the comparison of the target current value to the total current value, a revised first operation point and a second operation point, the revised first operation point specifying a revised first operating frequency of the first element and the second operation point specifying a second operating frequency of the second element.Example aspect 8. The method of any one of example aspects 1 to 7, w herein: after the revised first operation point is set, the first current drawn from the battery by the first element is varied based on the revised first operating frequency; and after the second operation point is set, the second current drawn from the battery’ by the second element is varied based on the second operating frequency.

[0080] Example aspect 9. The method of any one of example aspects 1 to 8, yvherein the target current value and values of the lookup table are stored in a memory coupled with the hardware controller.Example aspect 10. The method of any one of example aspects 1 to 9, further comprising monitoring usage of the semiconductor device over a predetermined timescale and setting the target current value based on the usage of the semiconductor device over the predetermined timescale.

[0081] Example aspect 11. The method of any one of example aspects 1 to 10, further comprising using a machine-learned model to monitor usage of the semiconductor device and set the target current based on the usage of the semiconductor device.

[0082] Example aspect 12. The method of any one of example aspects 1 to 11, wherein the hardware controller further comprises a proportional-integral controller having a proportional gain and an integral gain.

[0083] Example aspect 13. The method of any one of example aspects 1 to 12, wherein values for the proportional gain and the integral gain are stored within the memory' and furthercomprising altering the values for the proportional gain and the integral gain to tune the proportional-integral controller.

[0084] Example aspect 14. The method of any one of example aspects 1 to 13, wherein the hardware controller further comprises a proportional controller having a proportional gain.

[0085] Example aspect 15. A non-transitory computer-readable memory storing instructions, which, when executed by one or more processors, cause the one or more processors to execute any one of the methods of example aspects 1 to 14.

[0086] Example aspect 16. An apparatus configured to perform the method of any one of example aspects 1 to 14.

[0087] Example aspect 17. A system comprising a battery; a first element associated with a semiconductor device, the first element coupled with the battery and configured to draw a first current from the battery7; a first sensor coupled with the first element and configured to monitor the first current drawn from the battery by the first element; and a hardware controller coupled with the first sensor and configured to compare the first current value to a target current value; and determine an output of a first controller based on the comparison of the first current value to the target current value; the first controller configured to apply the output of the first controller control, in real time, to control the first current received from the battery by the first element.

[0088] Example aspect 18. The system of example aspect 17, further comprising a lookup table. Wherein a first operation point is determined, based on the output of the first controller, from the lookup table, the first operation point setting a first operating frequency.

[0089] Example aspect 19. The system of example aspects 17 or 18, wherein the first operating frequency of the first element determines the first current drawn from the battery by the first element after the first operation point is set.

[0090] Example aspect 20. The system of any one of example aspects 17 to 19, further comprising a register coupled with the hardw are controller and a mapping table, wherein the target current and values of the mapping table are stored in the register.

[0091] Example aspect 21. The system of any one of example aspects 17 to 20, wherein the register is configured to enable the target current and the values of the mapping table to be varied.

[0092] Example aspect 22. The system of any one of example aspects 17 to 21, further comprising a second element associated with the semiconductor device, the second element coupled with the battery and configured to draw a second current from the battery; a second sensor coupled with the second element and configured to monitor the second current drawn from the battery7by the second element; the hardware controller being coupled with the first sensor and second sensor and configured to compare the target current value to a total current value, the totalcurrent value being the first current added to the second current; determine a second controller output based on the comparison of the total current value to the target current value; the hardware controller configured to determine a revised first operation point, based on the second controller output; apply the revised first operation point to the first element; determine a second operation point, based on the second controller output; and apply the second operation point to the second element.

[0093] Example aspect 23. The system of any one of example aspects 17 to 22, wherein the hardware controller includes multiple inputs and the and the first sensor may send, directly to the hardware controller, the first current drawn from the battery by the first element and the second sensor may send, directly to the hardware controller, the second current drawn and received from the battery by the second element.

[0094] Example aspect 24. The system of any one of example aspects 17 to 23, wherein the revised first operation point sets a revised first operating frequency’ of the first element and the second operation point sets a second operating frequency of the second element.

[0095] Example aspect 25. The system of any one of example aspects 17 to 24, wherein the revised first operating frequency of the first element determines the first current draw n from the battery by the first element after the revised first operation point is set; and the second operating frequency of the second element determines the second current drawn from the battery by the second element after the second operation point is set.

[0096] Example aspect 26. The system of any one of example aspects 17 to 25, wherein the target current is based on usage of the semiconductor device over a predetermined timescale.

[0097] Example aspect 27. The system of any one of example aspects 17 to 26, wherein a machine-learned model, based on usage of the semiconductor device, sets the target current value.

[0098] Example aspect 28. The system of any one of example aspects 17 to 27, wherein the hardware controller comprises a proportional-integral controller.

[0099] Example aspect 29. The system of any one of example aspects 17 to 28, wherein a proportional gain and integral gain, corresponding to the hardw are controller, are stored in the register.

[0100] Example aspect 30. The system of any one of example aspects 17 to 29, wherein the register is configured to enable programming of the proportional gain and the integral gain.

[0101] Example aspect 31. The system of any one of example aspects 17 to 30, wherein the hardware controller comprises a proportional controller.

[0102] Example aspect 32. The system of any one of example aspects 17 to 27 and 31, wherein a proportional gain, corresponding to the hardw are controller, is stored in the register.

[0103] Example aspect 33. The system of any one of example aspects 17 to 27, 31, and 32, wherein the register is configured to enable programming of the proportional gain.Conclusion

[0104] Unless context dictates otherwise, use herein of the word “or” may be considered use of an “inclusive or,” or a term that permits inclusion or application of one or more items that are linked by the word “or” (e.g., a phrase “A or B” may be interpreted as permitting just “A,” as permitting j ust “B,” or as permitting both “A” and “B”). Also, as used herein, a phrase referring to “at least one of’ a list of items refers to any combination of those items, including single members. For instance, “at least one of a, b, or c” can cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c, or any other ordering of a, b, and c). Further, items represented in the accompanying figures and terms discussed herein may be indicative of one or more items or terms, and thus reference may be made interchangeably to single or plural forms of the items and terms in this written description.

[0105] Although implementations for battery current control via a hardware controller for semiconductor devices have been described in language specific to certain features and / or methods, the subject of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as example implementations for battery current control via a hardware controller for semiconductor devices.

Claims

CLAIMSWhat is claimed is:

1. A method comprising: receiving, at a hardware controller, a first current value from a first sensor, the first current value measuring a first current drawn from a battery by a first element associated with a semiconductor device; comparing, by the hardware controller, the first current value to a target current value; determining, by the hardware controller, a first controller output based on the comparison of the first current value to the target current value; and applying the first controller output to the first element, the applying effective to control, in real time, the first current drawn from the battery by the first element.

2. The method of claim 1, wherein: the determining comprises determining from a lookup table, based on the comparison of the first current value to the target current value, a first operation point, the first operation point specifying a first operating frequency of the first element; and the applying the first controller output comprises setting the first operating frequency of the first element.

3. The method of claim 2, wherein, after the first operating frequency of the first element is set, the first current drawn from the battery’ by the first element is varied based on the first operating frequency of the first element.

4. The method of claim 2 or 3, wherein determining the first operation point further comprises selecting, based on the first controller output, the first operating frequency from the lookup table.

5. The method of any preceding claim, comprising: receiving, at the hardware controller, a total current value from the first sensor and a second sensor, the total current value measuring a total current drawn from the battery by the first element and a second element associated with the semiconductor device and coupled to the second sensor, the second element drawing a second current from the battery; comparing, by the hardware controller, the target current value to the total current value; determining, by the hardware controller, a second controller output based on the comparison of the target current value to the total current value; applying the second controller output to the first element, the applying effective to control, in real time, the first current drawn from the battery by the first element; and applying the second controller output to the second element, the applying effective to control, in real time, the second current drawn from the battery7by the second element.

6. The method of claim 5, wherein the determining comprises determining from a lookup table, based on the comparison of the target current value to the total current value, a revised first operation point and a second operation point, the revised first operation point specifying a revised first operating frequency of the first element and the second operation point specifying a second operating frequency of the second element.

7. The method of claim 6, wherein: after the revised first operation point is set, the first current drawn from the battery by the first element is varied based on the revised first operation frequency; and after the second operation point is set, the second current drawn from the battery by the second element is varied based on the second operation frequency.

8. The method of claim 2. or any preceding claim as dependent thereon, wherein the target current value and values of the lookup table are stored in a memory coupled with the hardware controller.

9. The method of any preceding claim, further comprising: monitoring usage of the semiconductor device over a predetermined timescale; and setting the target current value based on the usage of the semiconductor device over the predetermined timescale.

10. The method of claim 9, further comprising using a machine-learned model to monitor usage of the semiconductor device and set the target current value based on the usage of the semiconductor device.

11. The method of any preceding claim, wherein the hardware controller further comprises a proportional-integral controller having a proportional gain and an integral gain.

12. The method of claim 11, wherein values for the proportional gain and the integral gain are stored within the memory and further comprising altering the values for the proportional gain and the integral gain to tune the proportional-integral controller.

13. The method of any one of claims 1 to 10, wherein the hardware controller further comprises a proportional controller having a proportional gain.

14. A non-transitory computer-readable memory storing instructions, which, when executed by one or more processors, cause the one or more processors to execute any one of the methods of claims 1 to 13.

15. An apparatus configured to perform the method of any one of claims 1 to 13.

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