Server and server management method

By introducing a three-stage management architecture, node management tasks are delegated to the main processor, solving the problem of tight coupling between data center operation and maintenance and business in existing technologies, and achieving standardization and efficiency improvement of operation and maintenance processes.

WO2026077017A1PCT designated stage Publication Date: 2026-04-16BEIJING YOUZHUJU NETWORK TECH CO LTD
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Patent Information

Application Number
PCT/CN2025/104702
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-10-09
Filing Date
2025-06-27
Publication Date
2026-04-16

AI Technical Summary

Technical Problem

In the existing server management architecture, data center operations and maintenance are tightly coupled with business operations, resulting in high complexity and inconsistency in operations and maintenance work, which affects operational efficiency.

Method used

A three-stage management architecture of baseboard management controller-main processor-node is introduced. The main processor manages multiple nodes, shielding the data center operation and maintenance personnel from direct perception of node resources and achieving standardization of operation and maintenance processes.

Benefits of technology

This decouples data center operations from business operations, simplifies operations processes, and improves operational efficiency and consistency.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided in the embodiments of the present disclosure are a server and a server management method. The server comprises a baseboard management controller, a main processor, and a plurality of nodes. The baseboard management controller is connected to the main processor and is configured to monitor and manage the main processor. The main processor is indirectly connected to the plurality of nodes and is configured to monitor and manage the plurality of nodes. The plurality of nodes are configured to execute computing tasks under the management of the main processor. By means of a three-tier management architecture including the baseboard management controller, the main processor and the nodes, the server provided in the embodiments of the present disclosure can allow complex node management tasks to be processed by the main processor, thereby decoupling data center operation and maintenance from a service, and the server can effectively shield a data center operation and maintenance team from the direct perception of node resources, thereby realizing the standardization of an operation and maintenance process.
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Description

Servers and Server Management Methods

[0001] This application claims priority to Chinese Patent Application No. 202411404915.9, filed on October 9, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] Embodiments of this disclosure relate to a server and a server management method. Background Technology

[0003] Currently, the demand for computing power in artificial intelligence (AI) technology is growing rapidly, and this growth rate is intensifying. Simultaneously, the energy consumption required to train AI models is also showing an exponential growth trend. In the field of chip design, "Performance-Power-Area (PPA)" is commonly used as a metric, representing the energy consumption per unit area. To address the ever-increasing computing power demands of AI applications, there is an urgent need for a computing solution with high performance, high density, and low power consumption. Summary of the Invention

[0004] This summary section is provided to briefly introduce the concepts, which will be described in detail in the detailed description section below. This summary section is not intended to identify key or essential features of the claimed technical solution, nor is it intended to limit the scope of the claimed technical solution.

[0005] At least one embodiment of this disclosure provides a server, including: a baseboard management controller, a main processor, and multiple nodes, wherein the baseboard management controller is connected to the main processor and configured to monitor and manage the main processor; the main processor is indirectly connected to the multiple nodes and configured to monitor and manage the multiple nodes; the multiple nodes are configured to perform computing tasks under the management of the main processor.

[0006] At least one embodiment of this disclosure provides a server management method, including: monitoring and managing a main processor connected to the baseboard management controller through a baseboard management controller; and monitoring and managing multiple nodes indirectly connected to the main processor through the main processor, so that the multiple nodes perform computing tasks under the management of the main processor. Attached Figure Description

[0007] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0008] Figure 1 is a schematic block diagram of a server provided in at least one embodiment of this disclosure;

[0009] Figure 2 is a schematic diagram of a control link provided in at least one embodiment of this disclosure;

[0010] Figure 3 is a schematic diagram of a network link provided in at least one embodiment of this disclosure;

[0011] Figure 4 is a schematic block diagram of a server provided in at least one embodiment of this disclosure;

[0012] Figure 5A is a front view of a single server chassis provided in at least one embodiment of this disclosure;

[0013] Figure 5B is a rear view of a single server chassis provided in at least one embodiment of this disclosure;

[0014] Figure 6 is a flowchart of a server management method provided in at least one embodiment of the present disclosure;

[0015] Figure 7 is a schematic block diagram of an electronic device provided in at least one embodiment of the present disclosure. Detailed Implementation

[0016] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0017] It should be understood that the steps described in the method embodiments of this disclosure may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of this disclosure is not limited in this respect.

[0018] The term "comprising" and its variations as used herein are open-ended inclusions, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the description below.

[0019] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are used only to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0020] It should be noted that the terms "a" and "a plurality of" used in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0021] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.

[0022] The inventors of this disclosure noted that in existing server management architectures, a Baseboard Manager Controller (BMC) is typically used to directly manage multiple nodes. This means that the data center operations team needs to be directly involved in node-level management, leading to a tight coupling between data center operations and specific business operations. Specifically, when business requirements change, operations strategies need to be frequently updated to adapt to the new business needs, increasing the complexity of operations work. Furthermore, in existing server management architectures, data center operations teams need to manage a large number of nodes, and different nodes may be based on different architectural designs, leading to inconsistencies in operations tools or processes, affecting operational efficiency.

[0023] At least one embodiment of this disclosure provides a server, which includes a baseboard management controller, a main processor, and multiple nodes. The baseboard management controller is connected to the main processor and configured to monitor and manage the main processor. The main processor is indirectly connected to the multiple nodes and configured to monitor and manage the multiple nodes. The multiple nodes are configured to perform computing tasks under the management of the main processor.

[0024] The server provided in at least one embodiment of this disclosure introduces a three-stage management architecture of baseboard management controller-main processor-nodes, wherein the baseboard management controller is responsible for managing the main processor, and the main processor further manages multiple nodes. This three-stage management architecture allows complex node management tasks to be handled by the main processor, decoupling data center operations and maintenance from business operations, and effectively shielding the data center operations and maintenance team from direct access to node resources, thus standardizing operations and maintenance processes. From the perspective of the data center operations and maintenance team, they only need to interact with the baseboard management controller.

[0025] Figure 1 is a schematic block diagram of a server provided in at least one embodiment of the present disclosure.

[0026] For example, as shown in FIG1, a server 100 provided in at least one embodiment of this disclosure includes a baseboard management controller 101, a main processor 102, and multiple nodes 103. The baseboard management controller 101 is connected to the main processor 102 and is configured to monitor and manage the main processor 102. The main processor 102 is indirectly connected to the multiple nodes 103 and is configured to monitor and manage the multiple nodes. The multiple nodes 103 are configured to perform computing tasks under the management of the main processor 102.

[0027] For example, the server provided in at least one embodiment of this disclosure can be used independently or as part of a server cluster to provide more powerful processing capabilities, meeting various application scenarios. For instance, the server can be applied in the cloud computing field, supporting Infrastructure as a Service (IaaS), Platform as a Service (PaaS), and Software as a Service (SaaS). For example, the server can also be applied in high-performance computing, big data analytics, data centers, and other fields.

[0028] For example, one of the main functions of a baseboard management controller is to automatically monitor the server's operating status, primarily including the health status of each hardware component. By monitoring the health status of each hardware component and acquiring its information, the baseboard management controller helps maintenance personnel understand the server's operational status in a timely manner, ensuring its normal operation. When server problems occur, it sends fault information to maintenance personnel through logs, assisting them in fault location. The baseboard management controller can also support server bandwidth management to ensure the stability and performance of server network connections. Furthermore, the baseboard management controller can provide installation capabilities, supporting the initial configuration and installation process of servers. For instance, the baseboard management controller is managed by the data center operations team, enabling the monitoring and management of server hardware. A data center refers to the physical space used to house servers, storage devices, and other network infrastructure.

[0029] For example, the baseboard management controller can connect to the main processor via a physical link such as a low pin count (LPC) bus or an inter-integrated circuit (I2C) bus, which can be selected according to different design requirements. This disclosure does not limit the specific physical link used. For example, the baseboard management controller also supports interaction with the main processor via the Intelligent Platform Management Interface (IPMI) protocol and the Redfish protocol, enabling remote access and control of server hardware, control of power status, and execution of system resets.

[0030] IPMI is a standard protocol for remote management and monitoring of computer systems. It allows system administrators to remotely control and monitor systems such as servers and network devices over a network, including access to and operation of hardware status, sensor monitoring, power management, event logging, and more.

[0031] Redfish is a management standard based on HTTPS services, utilizing RESTful interfaces for device management. Each HTTPS operation submits or returns a resource or result in UTF-8 encoded JSON format. This technology offers advantages such as reduced development complexity, ease of implementation and use, scalability, and design flexibility.

[0032] For example, the main processor can be a Central Processing Unit (CPU) or System on Chip (SoC) based on ARM, RISC-V, or x86 architectures, and the choice can be made according to different design requirements. This disclosure does not impose any limitations on this. For example, the main processor is managed by a platform and requires the development of corresponding drivers and applications based on the hardware design. For example, a platform refers to a software layer built on top of the hardware in a data center, used to manage and provide computing resources to tenants. For example, a platform could be a cloud service platform.

[0033] For example, nodes can be central processing units or systems-on-a-chip based on ARM, RISC-V, or x86 architectures, and can be selected according to different design requirements. Multiple nodes can be selected in the same or different ways; this disclosure does not limit this. For example, nodes can provide necessary computing resources and perform computing tasks. It should be noted that this disclosure does not limit the number of nodes; more or fewer nodes can be selected based on the specific needs of the computing task. For example, nodes are managed by tenants, who can configure and use nodes according to their own needs to run their own applications and services. For example, a tenant refers to an individual user or organization that registers an account on the platform and uses the resources and services provided by the platform.

[0034] The server provided in at least one embodiment of this disclosure introduces a three-stage management architecture of baseboard management controller-main processor-nodes, wherein the baseboard management controller is responsible for managing the main processor, and the main processor further manages multiple nodes. This three-stage management architecture allows complex node management tasks to be handled by the main processor, decoupling data center operations and maintenance from business operations, and effectively shielding the data center operations and maintenance team from direct access to node resources, thus standardizing operations and maintenance processes. From the perspective of the data center operations and maintenance team, they only need to interact with the baseboard management controller.

[0035] In at least one embodiment of this disclosure, the main processor is connected to multiple nodes via control links, which include a first link, a second link, and a third link.

[0036] For example, the main processor is configured to send initialization information to multiple nodes via a first link. In some examples, the first link includes a serial asynchronous communication controller, and the main processor is further configured to connect to the serial asynchronous communication controller, which connects to multiple nodes to send initialization information to them. For example, the main processor can connect to the serial asynchronous communication controller via a Peripheral Component Interconnect Express (PCIE) bus, and the serial asynchronous communication controller has multiple output ports, each connected to a different node. For example, the serial asynchronous communication controller could be a Universal Asynchronous Receiver Transmitter (UART) controller.

[0037] For example, the main processor is configured to load the operating system to multiple nodes via a second link. In some examples, the second link includes a multilevel universal serial bus (USB) switch, and the main processor is further configured to connect to the USB switch, which is connected to multiple nodes to load the operating system to those nodes. For example, the main processor can be connected to the USB switch via a USB bus.

[0038] For example, the main processor is configured to control the power and state switching of multiple nodes via a third link. In some examples, the third link includes a Complex Programmable Logic Device (CPLD), and the main processor is further configured to connect to the CPLD, which connects to multiple nodes to control the power and state switching of those nodes. For example, the main processor can connect to the CPLD via an I2C bus, and the CPLD has multiple output ports, each connected to a different node.

[0039] Figure 2 is a schematic diagram of a control link provided in at least one embodiment of this disclosure.

[0040] For example, as shown in Figure 2, the main processor connects to multiple nodes via a first link, a second link, and a third link. It should be noted that the number of nodes shown in Figure 2 is only an example; in practice, there may be more or fewer nodes.

[0041] The first link includes a serial asynchronous communication controller. The main processor is connected to the serial asynchronous communication controller, which has multiple output ports, each connected to a different node to send initialization information to multiple nodes. The second link includes a multi-level universal serial bus (USB) switch. The main processor is connected to the multi-level USB switch, which is connected to multiple nodes to load the operating system onto the nodes. It should be noted that the number of levels and number of USB switches shown in Figure 2 are only an example and can be set according to actual needs. The third link includes a complex programmable logic device (CPLD). The main processor is connected to the CPLD, which has multiple output ports, each connected to a different node to control the power supply and state switching of multiple nodes.

[0042] The server provided in at least one embodiment of this disclosure enables complete control over the nodes through a control link between the main processor and multiple nodes. This control link is an out-of-band management link, allowing the main processor to perform critical management operations, such as restarting nodes and changing configuration settings, even if a node fails to start normally or network services are interrupted. This is crucial for maintaining the stability and reliability of the system.

[0043] For example, in some cases, multiple nodes can be organized in an array.

[0044] In the server provided in at least one embodiment of this disclosure, by integrating multiple nodes within a single server and organizing them into an array-like computing cluster, high-density computing power can be provided. This array-like organization reduces the number of cables and interfaces used to connect different physical servers in traditional servers, helping to reduce energy loss during signal transmission and thus ensuring lower power consumption. Furthermore, through array-like organization, hardware isolation is achieved between nodes, providing higher isolation and security compared to containers, virtual machines, and other methods.

[0045] Figure 3 is a schematic diagram of a network link provided in at least one embodiment of this disclosure.

[0046] In at least one embodiment of this disclosure, the main processor is connected to multiple nodes via a network link. For example, as shown in FIG3, the network link includes a first switch, multiple second switches, and multiple first physical layer chips. The main processor is configured to connect to the multiple second switches via the first switch; the multiple second switches are connected to multiple nodes via the multiple first physical layer chips. For example, the components in the above network link are connected via Ethernet ports. For example, the main processor and the first switch are also connected via a PCIe physical link.

[0047] It should be noted that the number of the second switch, physical layer chip, and nodes in Figure 3 is only an illustrative example; in reality, the number of these components can be adjusted according to actual needs. For example, the number of the second switch can be increased or decreased based on the system scale and network topology requirements, and the number of physical layer chips can also be adjusted based on the number of nodes and bandwidth requirements.

[0048] For example, the first switch can be an aggregation switch, and the second switch can be an access switch. The first switch and multiple second switches are all integrated within a server chassis. For example, physical layer chips are used to process physical layer data transmission, such as performing signal conversion, modulation, and demodulation. In this embodiment, the multilayer switches form a switching system through Channelization Ethernet Switching (CES), also known as Channelization over Ethernet (COE), facilitating network management.

[0049] For example, as shown in Figure 3, the first switch can also connect to the third switch via a second physical layer chip. For instance, the uplink port of the first switch connects to the second physical layer chip, and high-speed optical communication interface modules such as quad small form-factor pluggable (QSFP) or dual small form-factor pluggable (DSFP) optical modules are connected to the third switch. For instance, the third switch can be a top-of-rack (TOR) switch, enabling connections between multiple servers. For instance, the third switch can be installed in a computer room.

[0050] The server provided in at least one embodiment of this disclosure employs a three-layer switching network to achieve full connectivity between nodes, allowing for flexible arrangement of the network structure to form a neuromorphic computing architecture. This means it can support direct communication between any two nodes, contributing to improved flexibility and scalability of the computing architecture.

[0051] In some embodiments, instead of forming a CES or COE, the network may be configured for the switches individually. For example, a network link may include multiple second switches and multiple first physical layer chips; the main processor may be connected to multiple nodes through the multiple second switches and the multiple first physical layer chips.

[0052] Figure 4 is a schematic block diagram of a server provided in at least one embodiment of the present disclosure.

[0053] For example, as shown in FIG4, at least one embodiment of the present disclosure provides a server 200 including a main processor carrier board module 201, a node carrier board module 202, and a bridge board module 203.

[0054] For example, the main processor carrier module 201 is configured to carry the main processor 102, the baseboard management controller 101, and at least a portion of the network links, and the main processor 102 is configured to support hot-swapping. For example, the first switch and multiple second switches in the network links described in at least one of the above embodiments can be disposed on the main processor carrier module. For example, the main processor can be plugged into the main processor carrier module via a socket connector, and hot-swapping of the main processor does not affect the normal operation of any node.

[0055] For example, node carrier module 202 is configured to carry at least one node 103 and supports hot-swapping. It should be noted that the number of node carrier modules and the number of nodes carried on each node carrier module can be designed according to actual needs, and this disclosure does not impose any limitations on this. For example, the impact of hot-swapping a single node carrier module is limited to all nodes on that node carrier module, while other node carrier modules are unaffected.

[0056] For example, bridge board module 203 is configured to connect main processor carrier board module 201 and node carrier board module 202, and bridge board module 203 is configured to support hot-swapping. For example, multiple first physical layer chips in the control link and network link described in at least one of the above embodiments can be disposed on the bridge board module. It should be noted that each bridge board module can connect to one or more node carrier board modules, and the number of bridge board modules and the number of node carrier board modules connected to each bridge board module can be designed according to actual needs, and the embodiments of this disclosure do not limit this.

[0057] For example, as shown in FIG4, at least one embodiment of the server 200 provided in this disclosure further includes a heat dissipation module 204 and a power supply module 205.

[0058] For example, the heat dissipation module 204 is configured to be controlled by the baseboard management controller 202 and supports hot-swapping. For example, the heat dissipation module includes multiple fans, which are hot-swappable. For example, the baseboard management controller monitors the overall temperature and power consumption information of the server and controls the fan speed in the heat dissipation module based on the temperature and power consumption information.

[0059] For example, power module 205 is configured to supply power to the various modules in server 200 and supports hot-swapping. For example, the power module provides dual / quad-redundant power. For example, the power supplies for the main processor and nodes are isolated, while the switch is powered continuously, meaning that the main processor can be replaced without interrupting power or network access to the nodes.

[0060] The server provided in at least one embodiment of this disclosure features a modular design, facilitating fault maintenance and hardware upgrades for individual modules. For example, the main processor carrier board module, node carrier board module, bridge board module, heat dissipation module, and power supply module can all be modularly replaced and upgraded according to business needs. For instance, if the main processor fails while distributing network configuration information to switches at various levels, it will not affect the service traffic of existing normal nodes, but only the distribution of new network configurations, thus not impacting existing services.

[0061] For example, in some examples, the server provided in at least one embodiment of this disclosure is configured in a single chassis.

[0062] Figure 5A is a front view of a server chassis according to at least one embodiment of the present disclosure. Figure 5B is a rear view of a server chassis according to at least one embodiment of the present disclosure.

[0063] For example, as shown in Figures 5A and 5B, multiple node carrier board modules 202 are arranged sequentially at one end of the server chassis, while a heat dissipation module 204 and a power supply module 205 are located at the other end of the server chassis. The heat dissipation module 204 includes multiple fans, and the power supply module 205 includes multiple power supplies. The main processor carrier board module and the bridge board module are located in the middle of the server chassis (not shown in the figures).

[0064] Figure 6 is a flowchart of a server management method provided in at least one embodiment of this disclosure.

[0065] For example, as shown in Figure 6, the server management method provided in at least one embodiment of this disclosure includes the following steps S301 to S302. This server management method is applicable to the server provided in the above-described at least one embodiment.

[0066] Step S301: Monitor and manage the main processor connected to the baseboard management controller through the baseboard management controller.

[0067] Step S302: Monitor and manage multiple nodes indirectly connected to the main processor through the main processor, so that the multiple nodes perform computing tasks under the management of the main processor.

[0068] For specific details regarding steps S301 to S302, please refer to the description of the foregoing embodiments, which will not be repeated here.

[0069] Figure 7 is a schematic block diagram of an electronic device provided in at least one embodiment of the present disclosure. Referring now to Figure 7, a structural schematic diagram of an electronic device 700 suitable for implementing embodiments of the present disclosure is shown. The electronic devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. The electronic device shown in Figure 7 is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of the present disclosure.

[0070] As shown in Figure 7, the electronic device 700 may include a processing unit (e.g., a central processing unit, a graphics processing unit, etc.) 701, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 702 or a program loaded from a storage device 708 into a random access memory (RAM) 703. The RAM 703 also stores various programs and data required for the operation of the electronic device 700. The processing unit 701, ROM 702, and RAM 703 are interconnected via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0071] Typically, the following devices can be connected to I / O interface 705: input devices 706 including, for example, touchscreens, touchpads, keyboards, mice, cameras, microphones, accelerometers, gyroscopes, etc.; output devices 707 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 708 including, for example, magnetic tapes, hard disks, etc.; and communication devices 709. Communication device 709 allows electronic device 700 to communicate wirelessly or wiredly with other devices to exchange data. Although Figure 7 shows electronic device 700 with various devices, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively.

[0072] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a non-transitory computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication device 709, or installed from storage device 708, or installed from ROM 702. When the computer program is executed by processing device 701, it performs the functions defined in the methods of embodiments of this disclosure.

[0073] It should be noted that the computer-readable medium described in this disclosure can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this disclosure, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus, or device. In this disclosure, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (radio frequency), etc., or any suitable combination thereof.

[0074] In some implementations, clients and servers can communicate using any currently known or future-developed network protocol such as HTTP (Hypertext Transfer Protocol), and can interconnect with digital data communication (e.g., communication networks) of any form or medium. Examples of communication networks include local area networks (“LANs”), wide area networks (“WANs”), the Internet (e.g., the Internet of Things), and end-to-end networks (e.g., ad hoc end-to-end networks), as well as any currently known or future-developed networks.

[0075] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device.

[0076] The aforementioned computer-readable medium carries one or more programs, which, when executed by the electronic device, cause the electronic device to: monitor and manage a main processor connected to the baseboard management controller via a baseboard management controller; and monitor and manage multiple nodes indirectly connected to the main processor via the main processor, so that the multiple nodes perform computing tasks under the management of the main processor.

[0077] Computer program code for performing the operations of this disclosure can be written in one or more programming languages ​​or a combination thereof, including but not limited to object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0078] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0079] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.

[0080] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0081] According to one or more embodiments of this disclosure, Example 1 provides a server including: a baseboard management controller, a main processor, and multiple nodes, wherein the baseboard management controller is connected to the main processor and configured to monitor and manage the main processor; the main processor is indirectly connected to the multiple nodes and configured to monitor and manage the multiple nodes; the multiple nodes are configured to perform computing tasks under the management of the main processor.

[0082] According to one or more embodiments of this disclosure, Example 2 provides the server of Example 1, wherein the main processor is connected to the plurality of nodes via a control link, the plurality of nodes being organized in an array; the control link includes a first link, a second link, and a third link, the main processor being configured to send initialization information to the plurality of nodes via the first link; the main processor being configured to load an operating system to the plurality of nodes via the second link; and the main processor being configured to control the power supply and state switching of the plurality of nodes via the third link.

[0083] According to one or more embodiments of this disclosure, Example 3 provides a server of Example 2, wherein the first link includes a serial asynchronous communication controller, and the main processor is further configured to connect to the serial asynchronous communication controller, the serial asynchronous communication controller being connected to the plurality of nodes to send initialization information to the plurality of nodes.

[0084] According to one or more embodiments of this disclosure, Example 4 provides a server of Example 2, wherein the second link includes a multilevel universal serial bus switch, and the main processor is further configured to be connected to the multilevel universal serial bus switch, the multilevel universal serial bus switch being connected to the plurality of nodes to load an operating system onto the plurality of nodes.

[0085] According to one or more embodiments of this disclosure, Example 5 provides a server of Example 2, wherein the third link includes a complex programmable logic device (CPL), and the main processor is further configured to be connected to the CPL, which is connected to the plurality of nodes to control the power supply and state switching of the plurality of nodes.

[0086] According to one or more embodiments of this disclosure, Example 6 provides a server of Example 1, wherein the main processor is connected to the plurality of nodes via a network link, the network link including a first switch, a plurality of second switches and a plurality of first physical layer chips; the main processor is configured to be connected to the plurality of second switches via the first switch; the plurality of second switches are connected to the plurality of nodes via the plurality of first physical layer chips.

[0087] According to one or more embodiments of this disclosure, Example 7 provides the server of Example 6, wherein the first switch is also connected to a third switch via a second physical layer chip.

[0088] According to one or more embodiments of this disclosure, Example 8 provides the server of Example 1, wherein the main processor is connected to the plurality of nodes via a network link, the network link including a plurality of second switches and a plurality of first physical layer chips; the main processor is connected to the plurality of nodes through the plurality of second switches and the plurality of first physical layer chips.

[0089] According to one or more embodiments of this disclosure, Example 9 provides the server of Example 1, further comprising: a main processor carrier module configured to carry the main processor, a baseboard management controller, and at least a portion of the network links, wherein the main processor is configured to support hot-swapping; a node carrier module configured to carry at least one node and support hot-swapping; and a bridge module configured to connect the main processor carrier module and the node carrier module, wherein the bridge module is configured to support hot-swapping.

[0090] According to one or more embodiments of this disclosure, Example 10 provides a server of Example 1, further comprising: a heat dissipation module configured to be controlled by the baseboard management controller and supporting hot-swapping; and a power supply module configured to supply power to the various modules in the server and supporting hot-swapping.

[0091] According to one or more embodiments of this disclosure, Example 11 provides a server of Example 1, wherein the server is disposed in a single chassis.

[0092] According to one or more embodiments of this disclosure, Example 12 provides a server management method, including: monitoring and managing a main processor through a baseboard management controller; and monitoring and managing multiple nodes through the main processor to enable the multiple nodes to perform computing tasks.

[0093] The above description is merely a preferred embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

[0094] Furthermore, while the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in a sequential order. In certain environments, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0095] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

Claims

1. A server, comprising: The baseboard management controller, main processor, and multiple nodes, among which, The baseboard management controller is connected to the main processor and is configured to monitor and manage the main processor. The main processor is indirectly connected to the plurality of nodes and is configured to monitor and manage the plurality of nodes. The plurality of nodes are configured to perform computing tasks under the management of the main processor.

2. The server according to claim 1, wherein, The main processor is connected to the plurality of nodes via a control link, and the plurality of nodes are organized in an array. The control links include: a first link, a second link, and a third link. The main processor is configured to send initialization information to the plurality of nodes through the first link; The main processor is configured to load the operating system to the plurality of nodes via the second link; The main processor is configured to control the power supply and state switching of the plurality of nodes via the third link.

3. The server according to claim 2, wherein, The first link includes a serial asynchronous communication controller. The main processor is further configured to connect to the serial asynchronous communication controller, which is connected to the plurality of nodes to send initialization information to the plurality of nodes.

4. The server according to claim 2 or 3, wherein, The second link includes a multi-level universal serial bus switch. The main processor is further configured to be connected to the multilevel universal serial bus switch, which is connected to the plurality of nodes to load the operating system onto the plurality of nodes.

5. The server according to any one of claims 2-4, wherein, The third link includes complex programmable logic devices. The main processor is further configured to be connected to the complex programmable logic device, which is connected to the plurality of nodes to control the power supply and state switching of the plurality of nodes.

6. The server according to any one of claims 1-5, wherein, The main processor is connected to the plurality of nodes via a network link, the network link including a first switch, a plurality of second switches, and a plurality of first physical layer chips; The main processor is configured to connect to the plurality of second switches via the first switch; The plurality of second switches are connected to the plurality of nodes through the plurality of first physical layer chips.

7. The server according to claim 6, wherein, The first switch is also connected to the third switch via a second physical layer chip.

8. The server according to any one of claims 1-5, wherein, The main processor is connected to the plurality of nodes via a network link, the network link including a plurality of second switches and a plurality of first physical layer chips; The main processor is connected to the multiple nodes through the multiple second switches and the multiple first physical layer chips.

9. The server according to any one of claims 1-8, further comprising: A main processor carrier board module is configured to carry the main processor, a baseboard management controller, and at least a portion of the network links, wherein the main processor is configured to support hot-swapping; The node carrier board module is configured to carry at least one node and supports hot-swapping. A bridge board module is configured to connect the main processor carrier board module and the node carrier board module. The bridge board module is configured to support hot-swapping.

10. The server according to any one of claims 1-9, further comprising: The heat dissipation module is configured to be controlled by the baseboard management controller and supports hot-swapping. The power module is configured to supply power to the various modules in the server and supports hot-swapping.

11. The server according to any one of claims 1-10, wherein, The server is housed in a single chassis.

12. A server management method, comprising: The main processor connected to the baseboard management controller is monitored and managed by the baseboard management controller. The main processor monitors and manages multiple nodes indirectly connected to it, enabling these nodes to perform computational tasks under its management.

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