Topcon tandem cell and preparation method therefor

Abstract

The present application discloses a TOPCON tandem cell and a preparation method therefor. The TOPCON tandem cell comprises: a crystalline silicon bottom cell (1) and a perovskite top cell (2) disposed on the crystalline silicon bottom cell (1), wherein the crystalline silicon bottom cell (1) comprises, from bottom to top, a crystalline silicon electrode layer (11), a P-type base doped layer (12), a base bottom passivation layer (13), a silicon substrate (14), a base surface passivation layer (15), an N-type base doped layer (16), a stress buffer layer (17) and a tunneling layer (18); and the perovskite top cell (2) comprises: a hole transport layer (21), a perovskite absorber layer (22), a perovskite passivation layer (23), an electron transport layer (24), a perovskite buffer layer (25), a perovskite electrode layer (26) and an anti-reflection layer (27).

Description

A TOPCON stacked battery and its preparation method

[0001] This application claims priority to Chinese Patent Application No. 202411439808.X, filed on October 15, 2024, entitled “A TOPCON Stacked Battery and a Method for Preparing the Same”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of solar cell technology, specifically to a TOPCON tandem cell and a method for preparing the TOPCON tandem cell. Background Technology

[0003] The statements herein are provided only as background information in connection with this application and do not necessarily constitute prior art.

[0004] Stacking a perovskite top cell on a crystalline silicon bottom cell of a TOPCON (Tunnel Oxide Passivated Contact solar cell) tandem solar cell can enable crystalline silicon / perovskite tandem solar cells to have very high photoelectric conversion efficiency.

[0005] However, the current TOPCON tandem solar cells have a polycrystalline silicon selective layer, an intermediate tunneling layer, and a perovskite absorber layer on their upper surface. Due to the different material properties, their coefficients of thermal expansion vary greatly. Moreover, the perovskite absorber layer is a polycrystalline composite structure with numerous grain boundaries and varying crystal sizes. When the TOPCON tandem solar cell operates for a long time, the temperature rises, and the stress on the upper and lower surfaces of the perovskite absorber layer becomes uneven, generating numerous surface or interface defects. This causes deformation degradation in the TOPCON tandem solar cell, leading to a decrease in its stability. Summary of the Invention

[0006] The purpose of this application is to provide a TOPCON tandem solar cell and a method for preparing the TOPCON tandem solar cell, including but not limited to solving the problem that uneven stress on the upper and lower surfaces of the perovskite absorber layer generates a large number of surface or interface defects, causing deformation degradation of the TOPCON tandem solar cell and resulting in a decrease in its stability.

[0007] The technical solution adopted in the embodiments of this application is:

[0008] In a first aspect, a TOPCON tandem solar cell is provided, comprising a crystalline silicon base cell and a perovskite top cell disposed on the crystalline silicon base cell.

[0009] The crystalline silicon base cell includes a crystalline silicon electrode layer, a P-type substrate doped layer disposed on the surface of the crystalline silicon electrode layer, a substrate bottom passivation layer disposed on the surface of the P-type substrate doped layer, a silicon substrate disposed on the surface of the substrate bottom passivation layer, a substrate surface passivation layer disposed on the surface of the silicon substrate, an N-type substrate doped layer disposed on the surface of the substrate surface passivation layer, a stress buffer layer disposed on the surface of the N-type substrate doped layer, and a tunneling layer disposed on the surface of the stress buffer layer.

[0010] The perovskite top solar cell includes a hole transport layer disposed on the surface of the tunneling layer, a perovskite absorber layer disposed on the surface of the hole transport layer, a perovskite passivation layer disposed on the surface of the perovskite absorber layer, an electron transport layer disposed on the surface of the perovskite passivation layer, a perovskite buffer layer disposed on the surface of the electron transport layer, a perovskite electrode layer disposed on the surface of the perovskite buffer layer, and an anti-reflection layer disposed on the surface of the perovskite electrode layer.

[0011] In one embodiment, the stress buffer layer is prepared from a stress buffer material dispersion, which is formed by dissolving a stress buffer material dispersant in a solvent; the stress buffer material dispersant includes indium tin oxide nanoparticles and polymethyl methacrylate, and the solvent includes isopropanol.

[0012] In one embodiment, the concentration of the stress-buffering material dispersion ranges from 5 to 40 mg / ml, and the weight ratio of the indium tin oxide nanoparticles to the polymethyl methacrylate ranges from 1:1 to 5:1.

[0013] In one embodiment, the thickness of the stress buffer layer ranges from 1 to 20 nm.

[0014] Secondly, a method for preparing a TOPCON tandem battery is provided, for preparing the TOPCON tandem battery provided in any of the above embodiments. The method for preparing the TOPCON tandem battery includes the following steps:

[0015] Provide silicon substrates;

[0016] A substrate bottom passivation layer is prepared on the bottom surface of the silicon substrate;

[0017] A substrate surface passivation layer is prepared on the surface of the silicon substrate;

[0018] A P-type substrate doped layer is prepared on the bottom surface of the passivation layer on the substrate bottom surface;

[0019] An N-type substrate doped layer is prepared on the surface of the passivation layer on the substrate surface;

[0020] A crystalline silicon electrode layer is fabricated on the bottom surface of the P-type substrate doped layer;

[0021] A stress buffer layer is prepared on the surface of the N-type substrate doped layer;

[0022] A tunneling layer is prepared on the surface of the stress buffer layer;

[0023] A hole transport layer is prepared on the surface of the tunneling layer;

[0024] A perovskite absorber layer is prepared on the surface of the hole transport layer;

[0025] A perovskite passivation layer is prepared on the surface of the perovskite absorber layer;

[0026] An electron transport layer is prepared on the surface of the perovskite passivation layer;

[0027] A perovskite buffer layer is prepared on the surface of the electron transport layer;

[0028] A perovskite electrode layer is prepared on the surface of the perovskite buffer layer;

[0029] An antireflection layer is prepared on the surface of the perovskite electrode layer.

[0030] In one embodiment, in the step of preparing a stress buffer layer on the surface of the N-type substrate doped layer: a stress buffer material dispersion is coated onto the surface of the N-type substrate doped layer using a spin coating method, and an annealing process is performed after spin coating to form the stress buffer layer.

[0031] In one embodiment, in the step of preparing a stress buffer layer on the surface of the N-type substrate doped layer: the spin coating speed range is 1000-5000 rpm, the spin coating time range is 10-100 s; the annealing temperature range is 50-600℃, and the annealing time range is 10-50 min.

[0032] In one embodiment, the crystalline silicon electrode layer includes a first transparent electrode layer and a first metal electrode layer; the step of fabricating the crystalline silicon electrode layer on the bottom surface of the p-type substrate doped layer includes:

[0033] The first transparent electrode layer is fabricated on the bottom surface of the p-type substrate doped layer;

[0034] The first metal electrode layer is prepared on the bottom surface of the first transparent electrode layer.

[0035] In one embodiment, in the step of preparing a hole transport layer on the surface of the tunneling layer: a hole transport layer dispersion is uniformly coated onto the surface of the tunneling layer using a spin coating method, with a spin coating speed of 1000-5000 rpm and a spin coating time of 10-100 s; after spin coating, an annealing operation is performed, with an annealing temperature of 300-600℃ and an annealing time of 10-50 min.

[0036] In one embodiment, the hole transport layer is at least one of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), poly-3-hexylthiophene (P3HT), nickel oxide (NiOx), molybdenum trioxide (MoO3), cuprous iodide (CuI), and cuprous thiocyanate (CuSCN).

[0037] In one embodiment, in the step of preparing a perovskite absorber layer on the surface of the hole transport layer: a perovskite precursor solution is prepared, and the perovskite precursor solution is uniformly coated on the surface of the hole transport layer. The spin coating speed is 1200-6000 rpm, and the spin coating time is 20-120 s. After spin coating, a nitrogen gun is used for blowing, and the blowing time is 5-60 s. The nitrogen temperature is 0-40℃, and the gas flow rate is controlled at 40-290 L / min. During blowing, the temperature of the sample is controlled at 25-60℃. After blowing, annealing is performed at 80-150℃ for 5-40 min.

[0038] In one embodiment, the perovskite passivation layer is at least one of propylenediamine iodine, propylenediamine bromide, butylamine chloride, butylamine bromide, butylamine iodide, N,N-dimethyl-1,3-propanediamine hydrochloride, dodecylamine bromide, magnesium fluoride, lithium fluoride, and sodium fluoride.

[0039] In one embodiment, the electron transport layer is at least one of zinc oxide, tin dioxide, titanium dioxide, methyl [6,6]-phenyl C61 butyrate, C60, and 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline.

[0040] In one embodiment, the perovskite buffer layer is at least one of zinc oxide, tin dioxide, and titanium dioxide.

[0041] In one embodiment, the thickness of the perovskite buffer layer ranges from 1 to 30 nm.

[0042] In one embodiment, the perovskite electrode layer includes a second transparent electrode layer and a second metal electrode layer; the step of preparing the perovskite electrode layer on the surface of the perovskite buffer layer includes:

[0043] A second transparent electrode layer is prepared on the surface of the perovskite buffer layer;

[0044] The second metal electrode layer is prepared on the surface of the second transparent electrode layer.

[0045] In one embodiment, the antireflective layer is formed from at least one material selected from magnesium fluoride, lithium fluoride, sodium fluoride, and silicon oxide.

[0046] In one embodiment, the thickness of the antireflective layer ranges from 1 to 600 nm.

[0047] The TOPCON tandem solar cell and its fabrication method provided in this application have at least the following beneficial effects: By adding a stress buffer layer between the N-type substrate doped layer and the tunneling layer of the crystalline silicon bottom solar cell, this application can reduce the thermal expansion stress received by the perovskite absorber layer, thereby balancing the stress on the upper and lower surfaces of the perovskite absorber layer, avoiding the generation of a large number of surface and interface defects, improving the stress distribution inside the perovskite film, reducing the compressive stress in the lower part of the perovskite film, and thus reducing the deformation decay of the TOPCON tandem solar cell during long-term operation, which helps to improve the stability of the TOPCON tandem solar cell. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or exemplary technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0049] Figure 1 is a schematic diagram of the TOPCON stacked battery provided in an embodiment of this application;

[0050] Figure 2 is a schematic diagram of the TOPCON stacked battery structure in Figure 1 without the stress buffer layer.

[0051] The main markings in the attached figures are as follows:

[0052] 1. Crystalline silicon base cell; 11. Crystalline silicon electrode layer; 111. First metal electrode layer; 112. First transparent electrode layer; 12. P-type substrate doped layer; 13. Substrate bottom passivation layer; 14. Silicon substrate; 15. Substrate surface passivation layer; 16. N-type substrate doped layer; 17. Stress buffer layer; 18. Tunneling layer;

[0053] 2. Perovskite top cell; 21. Hole transport layer; 22. Perovskite absorber layer; 23. Perovskite passivation layer; 24. Electron transport layer; 25. Perovskite buffer layer; 26. Perovskite electrode layer; 261. Second transparent electrode layer; 262. Second metal electrode layer; 27. Anti-reflection layer. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0055] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly or indirectly attached to that other component. When a component is referred to as "connected to" another component, it can be directly or indirectly connected to that other component. The terms "upper," "lower," "left," "right," etc., indicate orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, and are for ease of description only, not to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Those skilled in the art can understand the specific meaning of the above terms according to the specific circumstances. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features. "A plurality" means two or more, unless otherwise explicitly defined.

[0056] To illustrate the technical solutions provided in this application, the following detailed description is provided in conjunction with specific drawings and embodiments.

[0057] Currently, after long-term operation, the temperature of TOPCON tandem solar cells will rise, and the stress on the upper and lower surfaces of the perovskite absorber layer 22 will be uneven, resulting in a large number of surface or interface defects. This will cause deformation degradation of the TOPCON tandem solar cells, leading to a decrease in their photoelectric and stability performance.

[0058] Based on this, embodiments of this application provide a TOPCON tandem battery and its fabrication method to solve the above-mentioned problems. For ease of description, the specific structure of the TOPCON tandem battery will now be described in detail.

[0059] Please refer to Figure 1. The TOPCON tandem solar cell includes a crystalline silicon base cell 1 and a perovskite top cell 2 disposed on the crystalline silicon base cell 1. The crystalline silicon base cell 1 includes a crystalline silicon electrode layer 11, a P-type substrate doped layer 12 disposed on the surface of the crystalline silicon electrode layer 11, a substrate bottom passivation layer 13 disposed on the surface of the P-type substrate doped layer 12, a silicon substrate 14 disposed on the surface of the substrate bottom passivation layer 13, a substrate surface passivation layer 15 disposed on the surface of the silicon substrate 14, an N-type substrate doped layer 16 disposed on the surface of the substrate surface passivation layer 15, a stress buffer layer 17 disposed on the surface of the N-type substrate doped layer 16, and a tunneling layer 18 disposed on the surface of the stress buffer layer 17.

[0060] The perovskite top solar cell 2 includes a hole transport layer 21 disposed on the surface of the tunneling layer 18, a perovskite absorber layer 22 disposed on the surface of the hole transport layer 21, a perovskite passivation layer 23 disposed on the surface of the perovskite absorber layer 22, an electron transport layer 24 disposed on the surface of the perovskite passivation layer 23, a perovskite buffer layer 25 disposed on the surface of the electron transport layer 24, a perovskite electrode layer 26 disposed on the surface of the perovskite buffer layer 25, and an antireflection layer 27 disposed on the surface of the perovskite electrode layer 26. The perovskite passivation layer 23 separates the perovskite absorber layer 22 from the electron transport layer 24, preventing mutual interference. The electron transport layer 24 plays an important role in electron transport and blocking electron-hole recombination. The perovskite buffer layer 25 separates the electron transport layer 24 from the perovskite electrode layer 26, preventing mutual interference. The antireflection layer 27 enhances the absorption rate of sunlight by the TOPCON tandem solar cell and improves its operational stability.

[0061] In one embodiment, referring to FIG1, the crystalline silicon electrode layer 11 includes a first metal electrode layer 111 and a first transparent electrode layer 112; the first transparent electrode layer 112 is disposed on the surface of the first metal electrode layer 111, and the P-type substrate doped layer 12 is disposed on the surface of the first transparent electrode layer 112. This structure, through the first metal electrode layer 111 and the first transparent electrode layer 112, can improve charge collection efficiency, which helps to improve the fill factor and stability of the TOPCON tandem cell.

[0062] In one embodiment, referring to Figure 1, the perovskite electrode layer 26 includes a second transparent electrode layer 261 and a second metal electrode layer 262; the second transparent electrode layer 261 is disposed on the surface of the perovskite buffer layer 25, the second metal electrode layer 262 is disposed on the surface of the second transparent electrode layer 261, and the anti-reflection layer 27 is disposed on the surface of the second metal electrode layer 262. This structure, through the second metal electrode layer 262 and the second transparent electrode layer 261, can improve charge collection efficiency, which helps to improve the fill factor and stability of the TOPCON tandem solar cell.

[0063] Specifically, please refer to Figure 1. The specific structure of the TOPCON stacked battery provided in this application embodiment, from bottom to top, is as follows: a first metal electrode layer 111, a first transparent electrode layer 112, a P-type substrate doped layer 12, a substrate bottom passivation layer 13, a silicon substrate 14, a substrate surface passivation layer 15, an N-type substrate doped layer 16, a stress buffer layer 17, a tunneling layer 18, a hole transport layer 21, a perovskite absorption layer 22, a perovskite passivation layer 23, an electron transport layer 24, a perovskite buffer layer 25, a second transparent electrode layer 261, a second metal electrode layer 262, and an anti-reflection layer 27.

[0064] Please refer to Figure 1. The fabrication method of the TOPCON tandem solar cell will now be described in detail, taking into account its specific structure. The specific steps are as follows:

[0065] Step 1: On the bottom surface of the silicon substrate 14, a bottom passivation layer 13 and a P-type substrate doped layer 12 are sequentially prepared. On the surface of the silicon substrate 14, a surface passivation layer 15 and an N-type substrate doped layer 16 are sequentially prepared.

[0066] Step 2: Prepare a first transparent electrode layer 112 on the bottom surface of the p-type substrate doped layer 12. Optionally, place the above sample in a magnetron sputtering apparatus using magnetron sputtering, set an ITO (Indium Tin Oxide) target, and control the power between 50-200W.

[0067] Specifically, in this embodiment, magnetron sputtering can be used, with a control power of 60W, an operating time of 1.5h, and a thickness of 100nm for the first transparent electrode layer 112.

[0068] Step 3: Prepare a first metal electrode layer 111 on the bottom surface of the first transparent electrode layer 112. Optionally, using vapor deposition, place the prepared sample on a mask and put it into the vapor deposition chamber, with a vapor deposition vacuum of 5 × 10⁻⁶. -5 -2×10 -4 Pa, evaporation temperature is 500-2000℃, evaporation rate is 0.1-5Å / S.

[0069] Specifically, in the embodiments of this application, the evaporation vacuum degree is 2×10 -4 The silver was deposited onto the film by vapor deposition at Pa, adjusting the vapor deposition voltage to the evaporation temperature and controlling the evaporation rate at 2.5 Å / S. The thickness of the first metal electrode layer 111 was 200 nm.

[0070] Step 4: Prepare a stress buffer layer 17 on the surface of the N-type substrate doped layer 16. The stress buffer layer 17 can be prepared by spin coating. The stress buffer layer 17 is formed by dissolving a stress buffer material dispersion in a solvent. The stress buffer material dispersion includes indium tin oxide nanoparticles and polymethyl methacrylate (PMMA); the solvent includes isopropanol. The concentration of the stress buffer material dispersion ranges from 5 to 40 mg / ml, and the weight ratio of indium tin oxide nanoparticles to PMMA ranges from 1:1 to 5:1. The thickness of the stress buffer layer 17 ranges from 1 to 20 nm.

[0071] Optionally, a stress-buffering material dispersion is uniformly coated onto the surface of the N-type substrate doped layer 16. The spin coating speed ranges from 1000 to 5000 rpm, and the spin coating time ranges from 10 to 100 s. After spin coating, annealing is performed at a temperature range of 50 to 600℃ for a time range of 10 to 50 min.

[0072] Step 5: Prepare a tunneling layer 18 on the surface of the stress buffer layer 17. Optionally, the tunneling layer 18 can be prepared by atomic volume deposition, magnetron sputtering or wet chemical method.

[0073] Specifically, in this embodiment, magnetron sputtering can be used. The sample is placed on a mask and then placed in a magnetron sputtering device with a control power of 60W and a running time of 1 hour. The thickness of the tunneling layer 18 is 40nm.

[0074] Step Six: Prepare a hole transport layer 21 on the surface of the tunneling layer 18. The hole transport layer 21 may be at least one of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), poly-3-hexylthiophene (P3HT), nickel oxide (NiOx), molybdenum trioxide (MoO3), cuprous iodide (CuI), and cuprous thiocyanate (CuSCN).

[0075] Optionally, the hole transport layer dispersion is uniformly coated onto the surface of the tunneling layer 18 using a spin coating method. The spin coating speed is 1000-5000 rpm, and the spin coating time is 10-100 s. After spin coating, an annealing operation is performed at a temperature of 300-600℃ for 10-50 min.

[0076] Alternatively, the above-mentioned sample can be placed in a magnetron sputtering device using a magnetron sputtering method with a controlled power of 30-90W.

[0077] Specifically, in this embodiment, the above-mentioned sample is treated with UV-Ozone (ultraviolet ozone cleaner) for 15 min using spin coating. A hole transport layer dispersion is prepared by dissolving 0.05 mol of NiOx powder in 1 ml of ultrapure water and ultrasonically vibrating for 20 min. The hole transport layer dispersion is then uniformly coated onto the surface of the sample. The spin coating speed is set to 2000 rpm, the spin coating time to 40 s, and the solution volume to 100 μL. After spin coating, an annealing operation is performed at 450°C for 30 min, resulting in a hole transport layer 21 thickness of 20 nm.

[0078] Step 7: Prepare a perovskite absorber layer 22 on the surface of hole transport layer 21.

[0079] Optionally, a perovskite precursor solution is prepared and uniformly coated onto the surface of the hole transport layer 21. The spin-coating speed is 1200-6000 rpm, and the spin-coating time is 20-120 s. After spin-coating, a nitrogen gun is used for blowing to quickly remove the organic solvent inside the perovskite wet film, aiding in perovskite film formation. The blowing time is 5-60 s, the nitrogen temperature is 0-40℃, and the gas flow rate is controlled at 40-290 L / min. During blowing, the sample temperature is controlled at 25-60℃. After blowing, annealing is performed at 80-150℃ for 5-40 min. The perovskite precursor solution can be ABX3 structured perovskite, adjusted using stoichiometry and dissolved in an organic solvent, with a concentration between 1.5-2 M. In the ABX3 structured perovskite, the A-site is an organic cation, including CH3NH3. + (MA + ), NH2CH=NH2 + (FA + CH3CH2NH3 + or Cs + At least one of them; the B site is a metal cation, including Pb 2+ Sn 2+ At least one of them; the X-position is a halide anion, including F - Cl - ,Br - I - At least one of the following. The dissolving solvent for the perovskite precursor solution includes at least one of dimethylformamide (DMF), G-butyrolactone (GBL), dimethyl sulfoxide (DMSO), and N,N-dimethylacetamide (DMA), with a solvent ratio between 0-3:10-7. The antisolvent may include at least one of toluene, chlorobenzene, and ethyl acetate.

[0080] Specifically, a perovskite precursor solution was prepared by dissolving 1.7M perovskite powder in 1 ml of DMF (N,N-Dimethylformamide) and DMSO (Dimethyl sulfoxide) solvents at a ratio of 8:2, and magnetically stirring for 30 min. The sample was then placed on a spin coater platform, with a spin coater speed of 3500 rpm and a spin coat time of 30 s. The volume of the perovskite precursor solution was 120 μL, which was then coated onto the surface of the hole transport layer 21. After spin coat, a nitrogen gun was used for blowing to quickly remove the organic solvent inside the perovskite wet film, aiding in perovskite film formation. The blowing time was 20 s, the nitrogen temperature was 25°C, and the gas flow rate was controlled at 100 L / min. After blowing, annealing was performed at 100°C for 15 min, resulting in a perovskite absorber layer 22 thickness of 500 nm.

[0081] Step 8: Prepare a perovskite passivation layer 23 on the surface of the perovskite absorber layer 22. The perovskite passivation layer 23 may be propylenediamine iodine, including but not limited to at least one of propylenediamine bromide (PDADBr), butylamine chloride (BACl), butylamine bromide (BABr), butylamine iodide (BAI), N,N-dimethyl-1,3-propanediamine hydrochloride (DMePDADCl), and dodecylamine bromide (DDDADBr); or at least one of magnesium fluoride, lithium fluoride, and sodium fluoride.

[0082] Optionally, the above-mentioned sample is immersed in a passivation layer dispersion using an ultrasonic dip-coating method for ultrasonic dissolution and spin-coating. The passivation layer dispersion can be a solution obtained by dissolving propylenediamine iodine in organic solvents including but not limited to methanol, ethanol, or isopropanol. The concentration of propylenediamine iodine is 0.1-6 mg / ml, and the ultrasonic immersion time is 0-600 s. After immersion, the sample is drained and annealed at a temperature of 40-160℃ for 5-40 min.

[0083] Specifically, in this embodiment, a passivation layer dispersion is uniformly coated onto the surface of the perovskite absorber layer 22. Propylene diamine iodine is dissolved in organic solvents including but not limited to methanol, ethanol, or isopropanol, and then ultrasonically dissolved and spin-coated. The concentration of propylene diamine iodine is 2 mg / ml, and the ultrasonic immersion time is 60 seconds. The annealing temperature is 100°C, and the annealing time is 10 minutes.

[0084] Step 9: Prepare an electron transport layer 24 on the surface of the perovskite passivation layer 23. The electron transport layer 24 is composed of zinc oxide (ZnO), tin dioxide (SnO2), titanium dioxide (TiO2), and [6,6]-phenyl C61-butyrate methyl ester (PC). 61 BM), C60 (C 60At least one of ), 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP).

[0085] Optionally, the electron transport layer material is uniformly coated on the surface of the perovskite passivation layer 23 using a spin coating method, with a spin coating speed of 500-4000 rpm and a spin coating time of 10-80 s.

[0086] Alternatively, the electron transport layer material can be evaporated onto the surface of the perovskite passivation layer 23 using a vapor deposition method, with a vapor deposition vacuum degree of 5 × 10⁻⁶. -5 -5×10 -4 Pa, evaporation temperature is 100-400℃, evaporation rate is 0.05-1Å / S.

[0087] Specifically, in this embodiment, the above-mentioned sample can be placed on a mask and placed in the vapor deposition chamber using a vapor deposition method, with the vapor deposition vacuum degree being 1×10⁻⁶. -4 Evaporation is performed at Pa, adjusting the evaporation voltage to the evaporation temperature, and controlling the evaporation rate between 0.1-0.15 Å / s. C 60 The electron transport layer 24 is deposited onto the film and has a thickness of 20 nm.

[0088] Step 10: Prepare a perovskite buffer layer 25 on the surface of electron transport layer 24. The perovskite buffer layer 25 is at least one of zinc oxide (ZnO), tin dioxide (SnO2), and titanium dioxide (TiO2). The thickness of the perovskite buffer layer 25 can range from 1 to 30 nm.

[0089] Optionally, the electron transport layer material is deposited onto the surface of the electron transport layer 24 using atomic volume deposition equipment, with a deposition vacuum degree of 0-1×10⁻⁶. 4 Pa, the temperature of the deposition pipe is between 50-150℃, and the temperature of the deposition chamber is between 40-150℃.

[0090] Alternatively, the electron transport layer material can be evaporated onto the surface of the electron transport layer 24 using a vapor deposition method, with a vapor deposition vacuum degree of 6 × 10⁻⁶. -5 -4×10 -4 Pa, evaporation temperature is 100-500℃, evaporation rate is 0.05-1Å / S.

[0091] Specifically, in this embodiment, atomic volume deposition (ACD) can be used, with the vacuum level of the ACD equipment set to 0.5 × 10⁻⁶. 4 Pa, the deposition channel temperature is between 60℃ and 70℃, SnO2 is evaporated onto the film, and the thickness of the perovskite buffer layer 25 is 15nm.

[0092] Step 11: Fabricate a second transparent electrode layer 261 on the surface of the perovskite buffer layer 25. Optionally, the transparent electrode material can be sputtered onto the surface of the perovskite buffer layer 25 using magnetron sputtering, with a controlled power of 30-200W. Alternatively, the transparent electrode material can be evaporated onto the surface of the perovskite buffer layer 25 using vapor deposition, with a vapor deposition vacuum of 1×10⁻⁶. -5 -5×10 -4 Pa, evaporation temperature is 1000-2000℃, evaporation rate is 0.05-3Å / S.

[0093] Specifically, in this embodiment, magnetron sputtering can be used, similar to the preparation method of the first transparent electrode layer 112 in step two, with an IZO (Indium Zinc Oxide) target, a power of 50W, a running time of 1h, and a thickness of 100nm for the second transparent electrode layer 261.

[0094] Step 12: Prepare a second metal electrode layer 262 on the surface of the second transparent electrode layer 261. Specifically, similar to the preparation of the first metal electrode layer 111, except that the mask is different, and the thickness of the second metal electrode layer 262 is 100 nm. The second metal electrode layer 262 is at least one of silver (Ag), gold (Au), copper (Cu), aluminum (Al), and carbon (C).

[0095] Step 13: Prepare an antireflection layer 27 on the surface of the perovskite electrode layer 26. Optionally, it can be prepared by magnetron sputtering or vapor deposition.

[0096] Specifically, the method for preparing the antireflection layer 27 in this embodiment is similar to that for preparing the perovskite passivation layer 23. The evaporation rate is controlled at 2 Å / s, and magnesium fluoride is deposited onto the film. The thickness of the antireflection layer 27 is 100 nm. The antireflection layer 27 can be at least one of magnesium fluoride, lithium fluoride, sodium fluoride, and silicon oxide.

[0097] Optionally, the first transparent electrode layer 112 and the second transparent electrode layer 261 are at least one of indium tin oxide, indium zinc oxide, and aluminum zinc oxide.

[0098] Optionally, the thicknesses of the hole transport layer 21, the perovskite absorption layer 22, the electron transport layer 24, the second transparent electrode layer 261, the second metal electrode layer 262, and the antireflection layer 27 are all in the range of 1-600 nm.

[0099] To verify the performance of the TOPCON tandem battery prepared by the method provided in this application, four sets of experiments are provided for comparison and demonstration, namely Example 1, Example 2, Example 3 and Example 4.

[0100] Please refer to Figure 2. The difference between the TOPCON tandem cell preparation method provided in Example 1 and the preparation method provided in this application is that in Step 4 and Step 5 of Example 1, the structure of the stress buffer layer 17 is eliminated, and the tunneling layer 18 is directly prepared on the surface of the N-type substrate doped layer 16.

[0101] The TOPCON tandem battery fabrication method provided in Example 2 adopts the fabrication method provided in the above-mentioned embodiments of this application. The specific operation of step four is as follows: Indium tin oxide nanoparticles and polymethyl methacrylate are dissolved in isopropanol at a weight ratio of 1:1 to prepare a stress buffer material dispersion with a concentration of 20 mg / ml. The stress buffer material dispersion is uniformly coated on the surface of the N-type substrate doped layer 16 at a spin coating speed of 5000 rpm for 30 s. After spin coating, annealing is performed at a temperature of 100°C for 10 min, resulting in a stress buffer layer 17 with a thickness of 10 nm.

[0102] The TOPCON tandem battery fabrication method provided in Example 3 adopts the fabrication method provided in the above-mentioned embodiments of this application. The specific operation of step four is as follows: Indium tin oxide nanoparticles and polymethyl methacrylate are dissolved in isopropanol at a weight ratio of 2:1 to prepare a stress buffer material dispersion with a concentration of 20 mg / ml. The stress buffer material dispersion is uniformly coated on the surface of the N-type substrate doped layer 16 at a spin coating speed of 5000 rpm for 30 s. After spin coating, annealing is performed at a temperature of 100°C for 10 min, resulting in a stress buffer layer 17 with a thickness of 10 nm.

[0103] The TOPCON tandem battery fabrication method provided in Example 4 adopts the fabrication method provided in the above-described embodiments of this application. The specific operation of step four is as follows: Indium tin oxide nanoparticles and polymethyl methacrylate are dissolved in isopropanol at a weight ratio of 3:1 to prepare a stress buffer material dispersion with a concentration of 20 mg / ml. The stress buffer material dispersion is uniformly coated onto the surface of the N-type substrate doped layer 16 using a spin-coating speed of 5000 rpm for 30 s. After spin-coating, annealing is performed at a temperature of 100°C for 10 min, resulting in a stress buffer layer 17 with a thickness of 10 nm.

[0104] Four groups of samples were compared in an experiment. A standard solar intensity calibration was performed using a solar simulator, and the calibration was applied to a sample with an area of ​​1.0 cm². 2 The TOPCON tandem battery underwent a long-term IV test, with the starting voltage set at 1.95V, the cutoff voltage at 0V, and the range at 100mA. The test results are shown in the table below.

[0105] Device Open Circuit Voltage (V) Fill Factor Photovoltaic Conversion Efficiency (%) Efficiency Decay Rate (% / month) Example 1 1.95 8 0.2 3 0.1 8.4 Example 2 1.95 7 1.5 2 5.2 0.9 Example 3 1.95 8 0.4 3 0.2 0.6 Example 4 1.92 7 6.8 2 7.8 0.8

[0106] As can be seen from the comparison in the table above:

[0107] 1. This application adds a stress buffer layer 17 between the N-type substrate doped layer 16 and the tunneling layer 18 of the crystalline silicon bottom cell 1. The stress buffer layer 17 can reduce the thermal expansion stress received by the perovskite absorber layer 22, so that the stress on the upper and lower surfaces of the perovskite absorber layer 22 is balanced, avoiding the generation of a large number of surface and interface defects, improving the stress distribution inside the perovskite film, reducing the compressive stress in the lower part of the perovskite film, and thus reducing the deformation decay of the TOPCON tandem cell during long-term operation, which helps to improve the stability of the TOPCON tandem cell.

[0108] 2. Based on the efficiency degradation rate, a comparative analysis of the TOPCON stacked cells provided in Examples 1-4 shows that the TOPCON stacked cells provided in Examples 2-4 have a significantly lower efficiency degradation rate than the TOPCON stacked cells provided in Example 1, which reflects that the stability of the TOPCON stacked cells using the stress buffer layer 17 is greatly improved.

[0109] 3. Comparative analysis of the TOPCON tandem solar cells provided in Examples 1-4 based on photoelectric conversion efficiency shows that the TOPCON tandem solar cell provided in Example 3 has a photoelectric conversion efficiency comparable to that provided in Example 1; simultaneously, the TOPCON tandem solar cell provided in Example 3 has the lowest efficiency degradation rate. Therefore, when indium tin oxide nanoparticles and polymethyl methacrylate are dissolved in isopropanol at a weight ratio of 2:1 to prepare a stress-buffering material dispersion, the resulting TOPCON tandem solar cell with the stress-buffering layer 17 exhibits better performance.

[0110] The above are merely optional embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A TOPCON tandem solar cell, comprising a crystalline silicon base cell and a perovskite top cell disposed on the crystalline silicon base cell, characterized in that: The crystalline silicon base cell includes a crystalline silicon electrode layer, a P-type substrate doped layer disposed on the surface of the crystalline silicon electrode layer, a substrate bottom passivation layer disposed on the surface of the P-type substrate doped layer, a silicon substrate disposed on the surface of the substrate bottom passivation layer, a substrate surface passivation layer disposed on the surface of the silicon substrate, an N-type substrate doped layer disposed on the surface of the substrate surface passivation layer, a stress buffer layer disposed on the surface of the N-type substrate doped layer, and a tunneling layer disposed on the surface of the stress buffer layer. The perovskite top solar cell includes a hole transport layer disposed on the surface of the tunneling layer, a perovskite absorption layer disposed on the surface of the hole transport layer, a perovskite passivation layer disposed on the surface of the perovskite absorption layer, an electron transport layer disposed on the surface of the perovskite passivation layer, a perovskite buffer layer disposed on the surface of the electron transport layer, a perovskite electrode layer disposed on the surface of the perovskite buffer layer, and an anti-reflection layer disposed on the surface of the perovskite electrode layer. The stress buffer layer is prepared from a stress buffer material dispersion, which is formed by dissolving a stress buffer material dispersant in a solvent and mixing it; the stress buffer material dispersant includes indium tin oxide nanoparticles and polymethyl methacrylate, and the solvent includes isopropanol. The concentration range of the stress buffer material dispersion is 5-40 mg / ml, and the weight ratio of the indium tin oxide nanoparticles to the polymethyl methacrylate is between 1:1 and 5:

1.

2. The TOPCON stacked battery as described in claim 1, characterized in that: The thickness of the stress buffer layer ranges from 1 to 20 nm.

3. A method for preparing a TOPCON tandem solar cell, characterized in that: The method for preparing the TOPCON stacked battery as described in claim 1 or 2 includes the following steps: Provide silicon substrates; A substrate bottom passivation layer is prepared on the bottom surface of the silicon substrate; A substrate surface passivation layer is prepared on the surface of the silicon substrate; A P-type substrate doped layer is prepared on the bottom surface of the passivation layer on the substrate bottom surface; An N-type substrate doped layer is prepared on the surface of the passivation layer on the substrate surface; A crystalline silicon electrode layer is fabricated on the bottom surface of the P-type substrate doped layer; A stress buffer layer is prepared on the surface of the N-type substrate doped layer; A tunneling layer is prepared on the surface of the stress buffer layer; A hole transport layer is prepared on the surface of the tunneling layer; A perovskite absorber layer is prepared on the surface of the hole transport layer; A perovskite passivation layer is prepared on the surface of the perovskite absorber layer; An electron transport layer is prepared on the surface of the perovskite passivation layer; A perovskite buffer layer is prepared on the surface of the electron transport layer; A perovskite electrode layer is prepared on the surface of the perovskite buffer layer; An antireflection layer is prepared on the surface of the perovskite electrode layer.

4. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that, In the step of preparing a stress buffer layer on the surface of the N-type substrate doped layer: a stress buffer material dispersion is coated onto the surface of the N-type substrate doped layer by spin coating, and annealing is performed after spin coating to form the stress buffer layer.

5. The method for preparing the TOPCON tandem battery as described in claim 4, characterized in that, In the step of preparing a stress buffer layer on the surface of the N-type substrate doped layer: the spin coating speed range is 1000-5000 rpm, the spin coating time range is 10-100 s; the annealing temperature range is 50-600℃, and the annealing time range is 10-50 min.

6. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The crystalline silicon electrode layer includes a first transparent electrode layer and a first metal electrode layer; The step of fabricating a crystalline silicon electrode layer on the bottom surface of the P-type substrate doped layer includes: The first transparent electrode layer is fabricated on the bottom surface of the p-type substrate doped layer; The first metal electrode layer is prepared on the bottom surface of the first transparent electrode layer.

7. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: In the step of preparing a hole transport layer on the surface of the tunneling layer: the hole transport layer dispersion is uniformly coated on the surface of the tunneling layer by spin coating, the spin coating speed is 1000-5000 rpm and the spin coating time is 10-100 s; after spin coating, annealing is performed, the annealing temperature is 300-600℃ and the annealing time is 10-50 min.

8. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The hole transport layer is at least one of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), poly-3-hexylthiophene (P3HT), nickel oxide (NiOx), molybdenum trioxide (MoO3), cuprous iodide (CuI), and cuprous thiocyanate (CuSCN).

9. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: In the step of preparing a perovskite absorber layer on the surface of the hole transport layer: a perovskite precursor solution is prepared, and the perovskite precursor solution is uniformly coated on the surface of the hole transport layer. The spin coating speed is 1200-6000 rpm, and the spin coating time is 20-120 s. After spin coating, a nitrogen gun is used for blowing, and the blowing time is 5-60 s. The nitrogen temperature is 0-40℃, and the gas flow rate is controlled at 40-290 L / min. During blowing, the temperature of the sample is controlled at 25-60℃. After blowing, annealing is performed at 80-150℃ for 5-40 min.

10. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The perovskite passivation layer is at least one of propylenediamine iodine, propylenediamine bromide, butylamine chloride, butylamine bromide, butylamine iodide, N,N-dimethyl-1,3-propanediamine hydrochloride, dodecylamine bromide, magnesium fluoride, lithium fluoride, and sodium fluoride.

11. The method for preparing the TOPCON tandem solar cell as described in claim 3, characterized in that: The electron transport layer is at least one of zinc oxide, tin dioxide, titanium dioxide, methyl [6,6]-phenyl C61 butyrate, C60, and 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline.

12. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The perovskite buffer layer is at least one of zinc oxide, tin dioxide, and titanium dioxide.

13. The method for preparing the TOPCON tandem solar cell as described in claim 3, characterized in that: The thickness of the perovskite buffer layer ranges from 1 to 30 nm.

14. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The perovskite electrode layer includes a second transparent electrode layer and a second metal electrode layer; The step of preparing a perovskite electrode layer on the surface of the perovskite buffer layer includes: A second transparent electrode layer is prepared on the surface of the perovskite buffer layer; The second metal electrode layer is prepared on the surface of the second transparent electrode layer.

15. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The antireflective layer is formed from at least one material selected from magnesium fluoride, lithium fluoride, sodium fluoride, and silicon oxide.

16. The method for preparing the TOPCON tandem battery as described in claim 3, characterized in that: The thickness of the antireflective layer ranges from 1 to 600 nm.

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