Display device and method for manufacturing same

Abstract

A display device according to one embodiment comprises: a backplane substrate; a light-emitting element layer including first electrodes disposed on the backplane substrate, light-emitting elements disposed on the first electrodes, and a first oxide layer covering the light-emitting elements; and a light conversion layer which is disposed on the light-emitting element layer and includes color conversion layers overlapping the light-emitting elements and a second oxide layer covering the lower surfaces of the color conversion layers, wherein the first oxide layer and the second oxide layer are bonded to each other.

Description

Display device and method of manufacturing the same

[0001] Embodiments of the present invention relate to a display device and a method for manufacturing the same.

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. In response to this, various types of display devices, including light-emitting displays, are being developed. Light-emitting displays include pixels containing individual light-emitting elements.

[0003] The problem that the present invention aims to solve is to provide a display device capable of simplifying the manufacturing process and a method for manufacturing the same.

[0004] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0005] A display device according to one embodiment comprises: a backplane substrate; a light-emitting element layer including first electrodes disposed on the backplane substrate, light-emitting elements disposed on the first electrodes, and a first oxide layer covering the light-emitting elements; and a light-converting layer including color conversion layers disposed on the light-emitting element layer and overlapping with the light-emitting elements, and a second oxide layer covering the lower surface of the color conversion layers, wherein the first oxide layer and the second oxide layer may be bonded.

[0006] In one embodiment, the light-emitting elements may emit ultraviolet or blue light.

[0007] In one embodiment, the color conversion layers may include a first color conversion layer, a second color conversion layer, and a third color conversion layer that convert light emitted from the light-emitting elements into light of a first color, light of a second color, and light of a third color, respectively.

[0008] In one embodiment, the first color light, the second color light, and the third color light may each be red light, green light, and blue light.

[0009] In one embodiment, the first color conversion layer, the second color conversion layer, and the third color conversion layer may comprise a nitride-based semiconductor material and have a multiple quantum well structure.

[0010] In one embodiment, the quantum well layers of the first color conversion layer, the second color conversion layer, and the third color conversion layer each contain indium, and the indium content of the quantum well layers of the first color conversion layer, the indium content of the quantum well layers of the second color conversion layer, and the indium content of the quantum well layers of the third color conversion layer may be different from each other.

[0011] In one embodiment, the light-emitting element layer may include first reflective layers disposed between the first electrodes and the light-emitting elements and covering the lower surface of each of the light-emitting elements; and second reflective layers disposed on the light-emitting elements and covering the upper surface of each of the light-emitting elements.

[0012] In one embodiment, the reflectance of the first reflective layers may be higher than the reflectance of the second reflective layers.

[0013] In one embodiment, the first reflective layers may include a conductive material.

[0014] In one embodiment, each of the second reflective layers may include first layers and second layers that are alternately stacked to form a dispersed Bragg reflector.

[0015] In one embodiment, a second layer containing an oxide may be disposed on the uppermost portion of each of the second reflective layers. The first oxide layer is formed at the same height as the second reflective layers to expose the upper surface of the second reflective layers, and the second oxide layer may be bonded to the first oxide layer and the second reflective layers.

[0016] In one embodiment, the first oxide layer may cover the upper surface of the second reflective layers.

[0017] In one embodiment, the light-emitting element layer may further include second electrodes disposed between the light-emitting elements and the second reflective layers.

[0018] In one embodiment, the distance between the first reflective layers and the second reflective layers may be N (N is a natural number) times the emission wavelength of the light-emitting elements.

[0019] In one embodiment, the light conversion layer may further include third reflective layers that surround the sides of the color conversion layers.

[0020] In one embodiment, the display device may further include color filters and lenses disposed on the light conversion layer and covering the color conversion layers.

[0021] In one embodiment, the first oxide layer and the second oxide layer may include SiO2 or Al2O3.

[0022] A method for manufacturing a display device according to one embodiment may include the steps of: forming a display substrate comprising a backplane substrate and a light-emitting element layer, and a first oxide layer covering the light-emitting elements of the light-emitting element layer; forming a light conversion layer comprising color conversion layers and a second oxide layer covering the color conversion layers; and arranging the display substrate and the light conversion layer facing each other and joining the first oxide layer and the second oxide layer to combine the display substrate and the light conversion layer.

[0023] In one embodiment, the step of forming the light conversion layer may include: sequentially forming a first color conversion layer, a second color conversion layer, and a third color conversion layer by epitaxial growth on different regions of a manufacturing substrate; forming a reflective layer on each side of the first color conversion layer, the second color conversion layer, and the third color conversion layer; and forming a second oxide layer to cover the first color conversion layer, the second color conversion layer, the third color conversion layer, and the reflective layer.

[0024] An electronic device according to one embodiment includes a display device including a display panel, wherein the display panel comprises: a backplane substrate; a light-emitting element layer including first electrodes disposed on the backplane substrate, light-emitting elements disposed on the first electrodes, and a first oxide layer covering the light-emitting elements; and a light-converting layer including color conversion layers disposed on the light-emitting element layer and overlapping with the light-emitting elements, and a second oxide layer covering the lower surface of the color conversion layers, wherein the first oxide layer and the second oxide layer may be bonded.

[0025] Specific details of other embodiments are included in the detailed description and drawings.

[0026] According to the display device and the method of manufacturing the same according to the embodiments, the structure of the display device can be simplified and manufacturing efficiency can be increased.

[0027] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification.

[0028] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0029] FIG. 2 is a cross-sectional view showing a display device according to one embodiment.

[0030] FIG. 3 is a cross-sectional view showing a display device according to one embodiment.

[0031] FIG. 4 is a cross-sectional view showing a display device according to one embodiment.

[0032] FIG. 5 is a cross-sectional view showing a display device according to one embodiment.

[0033] FIG. 6 is a cross-sectional view showing a light-emitting layer according to one embodiment.

[0034] FIG. 7 is a drawing for explaining a resonance structure according to one embodiment.

[0035] FIG. 8 is a cross-sectional view showing a color conversion layer according to one embodiment.

[0036] FIG. 9 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0037] FIG. 10 is a cross-sectional view showing a display substrate according to one embodiment.

[0038] FIGS. 11 to 16 are cross-sectional views sequentially showing a method for forming a light conversion layer according to one embodiment.

[0039] FIGS. 17 and 18 are cross-sectional views sequentially showing a method of combining a display substrate and a light conversion layer according to one embodiment.

[0040] FIG. 19 is a cross-sectional view showing a display device manufactured according to one embodiment.

[0041] FIG. 20 is a drawing showing a smart watch including a display device according to one embodiment.

[0042] FIGS. 21 and 22 are drawings showing a head-mounted display device including a display device according to one embodiment.

[0043] FIG. 23 is a drawing showing a head-mounted display device including a display device according to one embodiment.

[0044] FIG. 24 is a drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment.

[0045] FIG. 25 is a drawing showing a transparent display device including a display device according to one embodiment.

[0046] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0047] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0048] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0049] Specific embodiments will be described below with reference to the attached drawings.

[0050] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0051] Referring to FIG. 1, the display device (10) is a device for displaying video or still images and can be used as a display screen for various electronic devices. For example, the display device (10) can be used as a display screen for various electronic devices such as mobile phones, smartphones, tablet personal computers, smart watches, watch phones, mobile communication terminals, electronic notebooks, e-books, PMPs (portable multimedia players), navigation systems, UMPCs (Ultra Mobile PCs), as well as portable electronic devices such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT). Additionally, the display device (10) can be applied to other electronic devices such as virtual reality (VR) devices or augmented reality (AR) devices. For example, the display device (10) may be included in at least one of the electronic devices exemplified above, or may be included in other types of electronic devices.

[0052] In one embodiment, the display device (10) may be a light-emitting display device including light-emitting elements. For example, the display device (10) may be an organic light-emitting display device including an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, or a micro light-emitting display device including a micro or nano light-emitting diode (micro LED or nano LED).

[0053] Hereinafter, embodiments are disclosed in which the display device (10) is a light-emitting display device including a micro or nano light-emitting diode. However, the type or size of the light-emitting element according to the embodiments is not limited thereto.

[0054] The display device (10) may include a display panel (DPN) including a display area (DA) and a non-display area (NDA). In one embodiment, the display panel (DPN) may have a rectangular planar shape, but is not limited thereto. For example, the display panel (DPN) may have a polygonal, circular, elliptical, or irregular planar shape other than a rectangular shape. FIG. 1 shows a first direction (DR1), a second direction (DR2), and a third direction (DR3). In one embodiment, the first direction (DR1), the second direction (DR2), and the third direction (DR3) may be the horizontal direction, the vertical direction, and the thickness direction of the display panel (DPN), respectively.

[0055] A display device (10) may include pixels (PX) placed in a display area (DA). An image may be displayed in the display area (DA) by the pixels (PX). For example, pixels (PX) and wiring (or parts of wiring) connected to the pixels (PX) may be placed in the display area (DA). In describing the embodiments, the term "connection" may include electrical connections and / or physical connections. Although FIG. 1 illustrates an embodiment in which the planar shape of the display area (DA) is rectangular, the shape of the display area (DA) is not limited thereto.

[0056] Pixels (PX) may have a rectangular planar shape, such as a rectangle or a rhombus, but are not limited thereto. For example, pixels (PX) may have a planar shape of other polygonal shapes (e.g., a hexagon or a rhombus), circular shapes, elliptical shapes, or other shapes.

[0057] Pixels (PX) can be connected (e.g., electrically connected) to a driving circuit and a power supply through wiring and / or pads (PD) formed inside a display panel (DPN) to receive driving signals and driving voltages. For example, pixels (PX) can receive scan signals (or clock signals), data signals (or digital data), a first driving voltage (e.g., a high-potential pixel voltage or anode voltage), and a second driving voltage (e.g., a low-potential pixel voltage or cathode voltage). Pixels (PX) can emit light in response to the driving signals and driving voltages.

[0058] In one embodiment, at least a portion of the driving circuit supplying driving signals to pixels (PX) may be formed within the display panel (DPN) or disposed on the non-display area (NDA) of the display panel (DPN). In another embodiment, the driving circuit may be disposed outside the display panel (DPN) and electrically connected to a plurality of pads (PD) disposed in the pad area (PDA). In one embodiment, a power supply unit supplying driving voltages to pixels (PX) may be disposed outside the display panel (DPN) (for example, a circuit board electrically connected to the display panel (DPN)) and electrically connected to a plurality of pads (PD) disposed in the pad area (PDA). However, the location of the driving circuit and the power supply unit, or the connection structure between the driving circuit and the power supply unit and the pixels (PX), etc., may vary depending on the embodiment.

[0059] In one embodiment, pixels (PX) may include first pixels (PX1) emitting light of a first color (e.g., first color subpixels), second pixels (PX2) emitting light of a second color (e.g., second color subpixels), and third pixels (PX3) emitting light of a third color (e.g., third color subpixels). In one embodiment, the first color may be red, the second color may be green, and the third color may be blue, but is not limited thereto. At least one first pixel (PX1), at least one second pixel (PX2), and at least one third pixel (PX3) adjacent to each other may constitute a unit pixel (UPX). In each unit pixel (UPX), light of the first color, light of the second color, or light of the third color may be emitted alone, or light of at least two colors among the first color, light of the second color, and light of the third color may be emitted. Accordingly, the unit pixel (UPX) can emit light of various colors. The number, type, and / or arrangement structure of the pixels (PX) constituting the unit pixel (UPX) may vary depending on the embodiments.

[0060] Each pixel (PX) may include at least one light-emitting element. Each light-emitting element may have a planar shape that is circular, elliptical, square, a polygonal shape other than a square (e.g., a hexagonal shape or a rhombus shape), or other shapes. For example, the planar shape of the light-emitting element may be varied according to the embodiments.

[0061] In one embodiment, the first pixels (PX1), the second pixels (PX2), and the third pixels (PX3) include light-emitting elements that emit light of the same color or wavelength, and color conversion layers and / or color filters for converting or controlling the color of light emitted from the light-emitting elements disposed in each pixel (PX) may be disposed in the light-emitting regions of the first pixels (PX1), the second pixels (PX2), and / or the third pixels (PX3). In another embodiment, the pixels (PX) may include light-emitting elements that emit light of different colors. For example, the first pixels (PX1), the second pixels (PX2), and the third pixels (PX3) may each include light-emitting elements that emit light of a first color, light of a second color, and light of a third color, respectively.

[0062] Each pixel (PX) may further include a pixel circuit electrically connected to a light-emitting element. Driving signals and a first driving voltage of the pixels (PX) are applied to the pixel circuit of each pixel (PX), and a second driving voltage may be applied to the light-emitting elements through second electrodes (or common electrodes) electrically connected to the light-emitting elements of the pixels (PX). In describing the following embodiments, the second driving voltage applied to the light-emitting elements may also be referred to as a "common voltage."

[0063] The non-display area (NDA) may be an area where the image is not displayed. The non-display area (NDA) may be placed around the display area (DA). For example, the non-display area (NDA) may be placed at the edge of the display panel (DPN) to surround the display area (DA).

[0064] The non-display area (NDA) may include a pad area (PDA) and a peripheral area (PHA). In the non-display area (NDA), wiring (or a portion of said wiring) electrically connected to pixels (PX) and pads (PD) may be disposed.

[0065] Pads (PDs) may be placed in a pad area (PDA). Pads (PDs) may be electrically connected to a circuit board (not shown) via a conductive ball, a wire, or other conductive connecting member. Additionally, pads (PDs) may be electrically connected to pixels (PX). Driving signals and driving voltages for driving a display panel (DPN) may be supplied from the circuit board to the display device (10) through the pads (PDs).

[0066] A pad area (PDA) may be positioned at one end (e.g., the bottom) of a display panel (DPN). The pad area (PDA) may include pads (PD) that are electrically connected to an external circuit board. The pads (PD) may be electrically connected to pixels (PX) through their respective connection wires within the display panel (DPN). In one embodiment, when a driving circuit comprising at least one of a gate driver, a data driver, and a timing controller is positioned within the display panel (DPN) and / or on a non-display area (NDA), at least some of the pads (PD) may be electrically connected to the driving circuit to transmit driving signals and driving voltages of the driving circuit.

[0067] The peripheral area (PHA) may be the remaining area of ​​the non-display area (NDA) excluding the pad area (PDA). The peripheral area (PHA) may surround the display area (DA). Wiring electrically connected to pixels (PX) and pads (PD) may pass through the peripheral area (PHA).

[0068] FIG. 2 is a cross-sectional view showing a display device according to one embodiment. For example, FIG. 2 shows a part of a display device (10) corresponding to a part of a display area (DA) of FIG. 1, and shows a schematic cross-section of a first pixel (PX1), a second pixel (PX2), and a third pixel (PX3) forming a unit pixel (UPX) among the pixels (PX) of the display area (DA). The first pixel (PX1), the second pixel (PX2), and the third pixel (PX3) can each emit light of a first color, light of a second color, and light of a third color.

[0069] Referring to FIGS. 1 and 2, a display device (10) may include a backplane substrate (BPL), a light-emitting element layer (LEL), and a light conversion layer (CVTL) disposed on the backplane substrate (BPL). The backplane substrate (BPL) may also be referred to as a "bottom substrate" or a "backplane layer." In one embodiment, the display device (10) may further include an optical filter for increasing the color purity of pixels (PX) and an optical structure for increasing the light emission efficiency of pixels (PX). For example, color filters (CF) and a lens (LS) covering the light-emitting elements (LE) of pixels (PX) and color conversion layers (CCL) may be disposed on the light conversion layer (CVTL). In one embodiment, the lens (LS) may be disposed on a display panel (DPN) in the form of a lens array (e.g., a micro-lens array) having a size and arrangement shape corresponding to the pixels (PX).

[0070] FIG. 2 shows a display device (10) having an LEDoS (Light Emitting Diode on Silicon) structure in which light-emitting diodes are arranged as light-emitting elements (LE) on a backplane substrate (BPL) formed by a semiconductor process using a silicon wafer (for example, a backplane substrate formed from a semiconductor circuit board). However, the embodiments are not limited thereto. For example, the backplane substrate (BPL) may be a backplane substrate of a different type or structure, for example, a thin-film transistor substrate in which a thin-film transistor is formed on a base substrate such as a glass substrate or a polymer film. Additionally, the embodiments may be applied to a display device of a different type and / or structure, or to a device of a different type and / or structure such as a lighting device.

[0071] The backplane substrate (BPL) may include a base substrate (SB), pixel circuits (PXC) of pixels (PX), and pads (PD) of FIG. 1. The base substrate (SB) and the backplane substrate (BPL) including it may include a display area (DA) and a non-display area (NDA) of FIG. 1. The pixel circuits (PXC) may be placed in the display area (DA), and the pads (PD) may be placed in the non-display area (NDA).

[0072] The backplane board (BPL) may further include wiring electrically connected to pixels (PX) and pads (PD). For example, the backplane board (BPL) may include signal lines electrically connected to pixels (PX) (for example, signal lines connected between pads (PD) or a driving circuit and pixels (PX) to transmit scan signals (or clock signals) and data signals (or digital data) to pixels (PX)) and power lines (for example, power lines transmitting a first driving voltage and a second driving voltage to pixels (PX)).

[0073] In one embodiment, a first power line for transmitting a first driving voltage may be electrically connected between at least one pad (PD) disposed in a pad area (PDA) and pixel circuits (PXC) disposed in a display area (DA), and may be formed within a backplane substrate (BPL). The first power line may transmit a first driving voltage applied from the at least one pad (PD) to the pixel circuits (PXC).

[0074] In one embodiment, a second power line transmitting a second driving voltage, for example, a common voltage, may include a backplane power line (BLI) formed within a backplane substrate (BPL) and electrically connected to at least one other pad (PD) disposed in a pad area (PDA), a power line (PL) of a light-emitting element layer (LEL) electrically connected between the backplane power line (BLI) and the second electrodes (ET2) of pixels (PX), and a second contact terminal (CT2) and a second connection electrode (CNE2) electrically connected between the power line (PL) and the backplane power line (BLI).

[0075] In one embodiment, the backplane power wiring (BLI) may be formed in a display area (DA) and a non-display area (NDA), and may be electrically connected to a power line (PL) formed in a light-emitting element layer (LEL) in the display area (DA) and electrically connected to at least one pad (PD) in the non-display area (NDA). In another embodiment, the backplane power wiring (BLI) may be formed only in the non-display area (NDA), and the power line (PL) of the light-emitting element layer (LEL) may extend from the display area (DA) to the non-display area (NDA) and be electrically connected to the backplane power wiring (BLI) in the non-display area (NDA). In addition, the connection structure between the second electrodes (ET2) of the pixels (PX) and the backplane power wiring (BLI) and / or pad (PD) may be varied according to the embodiments. FIG. 2 illustrates an embodiment in which the power line (PL) of the light-emitting element layer (LEL) is connected to the backplane power wiring (BLI) within the display area (DA).

[0076] The backplane substrate (BPL) may further include first contact terminals (CT1) disposed on pixel circuits (PXC), second contact terminals (CT2) on backplane power wiring (BLI), and a lower insulating layer (BIL) (or passivation layer). Although FIG. 2 shows only one lower insulating layer (BIL) disposed on pixel circuits (PXC) and surrounding the first contact terminals (CT1) and the second contact terminal (CT2), embodiments are not limited thereto. For example, a plurality of insulating layers and a plurality of conductive layers may be disposed on a base substrate (SB) on which pixel circuits (PXC) are formed. Backplane wiring including backplane power wiring (BLI), pixel circuits (PXC), first contact terminals (CT1), and second contact terminals (CT2) may be disposed or formed on the base substrate (SB). The pads (PD) of FIG. 1 may be disposed on the backplane substrate (BPL). Pads (PDs) can be electrically connected to backplane wiring.

[0077] In one embodiment, the backplane substrate (BPL) may be formed by a semiconductor process using a silicon wafer. For example, the base substrate (SB) may be a silicon wafer. In one embodiment, the base substrate (SB) may be made of single-crystal silicon.

[0078] Pixel circuits (PXCs) may be disposed within a backplane substrate (BPL) corresponding to each pixel region where each pixel (PX) is placed. In one embodiment, each pixel circuit (PXC) may include a CMOS (Complementary Metal-Oxide Semiconductor) circuit formed using a semiconductor process. As an example, each pixel circuit (PXC) may include at least one transistor and at least one capacitor formed using a semiconductor process.

[0079] In one embodiment, each pixel (PX) may include each pixel circuit (PXC) and at least one light-emitting element (LE) electrically connected to the pixel circuit (PXC). The pixel circuit (PXC) can control the driving current flowing through the light-emitting element (LE) of each pixel (PX) in response to driving signals input from the outside.

[0080] First contact terminals (CT1) and a lower insulating layer (BIL) may be disposed on the pixel circuits (PXC). The first contact terminals (CT1) (or a part of the pixel circuits (PXC)) may be exposed on the upper surface of the backplane substrate (BPL) and may be surrounded by the lower insulating layer (BIL). The first contact terminals (CT1) may be contacted and / or electrically connected to the first electrodes (ET1) of the pixels (PX) (e.g., first pixel electrodes or anode electrodes) through the exposed portion.

[0081] In FIG. 2, the first contact terminals (CT1) and pixel circuits (PXC) are shown as separate configurations, but embodiments are not limited thereto. For example, the first contact terminals (CT1) may be a part of each pixel circuit (PXC). As an example, the first contact terminals (CT1) may be electrodes (or wirings) that protrude and are exposed from the upper surface of each pixel circuit (PXC).

[0082] The first contact terminal (CT1) of each pixel (PX) can electrically connect the pixel circuit (PXC) of the corresponding pixel (PX) and the first electrode (ET1). The first contact terminal (CT1) can receive a first driving voltage from each pixel circuit (PXC). In one embodiment, the first contact terminal (CT1) of each pixel (PX) can be electrically connected to the light-emitting element (LE) of the corresponding pixel (PX) via the first connecting electrode (CNE1) and the first electrode (ET1) of the corresponding pixel (PX).

[0083] The second contact terminal (CT2) can electrically connect the backplane power wiring (BLI) and the power line (PL) of the light-emitting element layer (LEL). The second contact terminal (CT2) can receive a second driving voltage, for example, a common voltage, from the backplane power wiring (BLI). In one embodiment, the second contact terminal (CT2) can be electrically connected to the power line (PL) of the light-emitting element layer (LEL) via the second connecting electrode (CNE2).

[0084] The first contact terminals (CT1) and the second contact terminal (CT2) may include a conductive material. For example, the first contact terminals (CT1) and the second contact terminal (CT2) may include copper (Cu), titanium (Ti), silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or a mixture thereof, but are not limited thereto.

[0085] A lower insulating layer (BIL) may surround the first contact terminals (CT1) and the second contact terminal (CT2). For example, the lower insulating layer (BIL) may be placed on the base substrate (SB), pixel circuits (PXC), and backplane power wiring (BLI) and may surround the sides of the first contact terminals (CT1) and the second contact terminal (CT2). Although FIG. 2 discloses an embodiment in which the lower insulating layer (BIL) completely surrounds the sides of the first contact terminals (CT1) and the second contact terminal (CT2), the embodiments are not limited thereto. For example, the lower insulating layer (BIL) may be formed at a height lower than that of the first contact terminals (CT1) and the second contact terminal (CT2), and the upper surfaces of the first contact terminals (CT1) and the second contact terminal (CT2) may protrude higher than the upper surface of the lower insulating layer (BIL).

[0086] The lower insulating layer (BIL) may include openings corresponding to the first contact terminals (CT1) and the second contact terminal (CT2). For example, the lower insulating layer (BIL) may be opened to expose the upper surface of the first contact terminals (CT1) and the upper surface of the second contact terminal (CT2).

[0087] The lower insulating layer (BIL) comprises at least one insulating material and may have a single-layer or multi-layer structure. In one embodiment, the lower insulating layer (BIL) is an inorganic insulating material (for example, silicon oxide (SiO₂). x ), silicon nitride (SiN x ), silicon oxide nitride (SiO x N y ), aluminum oxide (Al x O y ), titanium oxide (Ti x O y ), hafnium oxide (HfO x It may include at least one inorganic insulating layer including ), or other inorganic insulating materials).

[0088] The light-emitting element layer (LEL) may include light-emitting elements (LE), electrodes and / or wiring electrically connected to the light-emitting elements (LE), insulating layers and reflective layers disposed around the light-emitting elements (LE).

[0089] In one embodiment, the electrodes of the light-emitting element layer (LEL) may include first electrodes (ET1) and second electrodes (ET2) electrically connected to both ends of each light-emitting element (LE), first connecting electrodes (CNE1) electrically connected between each first electrode (ET1) and first contact terminals (CT1), and second connecting electrodes (CNE2) electrically connected between the power line (PL) of the light-emitting element layer (LEL) and the second contact terminal (CT2).

[0090] In one embodiment, the wiring of the light-emitting element layer (LEL) may include a power line (PL) electrically connected between the second electrodes (ET2) and the second connecting electrode (CNE2). The power line (PL) may be a common layer to which the second electrodes (ET2) of the pixels (PX) are commonly connected, and may include openings corresponding to the light-emitting elements (LE) when viewed in a planar view. As an example, the power line (PL) may have a mesh shape when viewed in a planar view.

[0091] FIG. 2 illustrates a display device (10) having a structure in which first electrodes (ET1) are placed on a first insulating layer (IL1) covering a backplane substrate (BPL) and light-emitting elements (LE) are combined with the backplane substrate (BPL) by the first electrodes (ET1), but the structure of the display device (10) is not limited thereto. For example, light-emitting elements (LE) may be appropriately placed on the backplane substrate (BPL) by utilizing other connecting electrodes or wirings without using a bonding method.

[0092] In one embodiment, the insulating layers of the light-emitting element layer (LEL) may include a first insulating layer (IL1) and a second insulating layer (IL2) sequentially disposed on a backplane substrate (BPL). In one embodiment, the insulating layers of the light-emitting element layer (LEL) may further include a protective film (PRL) covering the sides of the light-emitting elements (LE) and the first electrodes (ET1).

[0093] Each of the insulating layers of the light-emitting element layer (LEL) may be composed of a single layer or multiple layers containing an insulating material. In one embodiment, each of the insulating layers of the light-emitting element layer (LEL) is made of an inorganic insulating material (for example, silicon oxide (SiO₂)). x ), silicon nitride (SiN x ), silicon oxide nitride (SiO x N y ), silicon oxide carbide (SiO x C y ), aluminum oxide (Al x O y ), aluminum nitride (AlN x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x It may include an inorganic insulating layer comprising titanium oxide (TiOx), or other inorganic insulating materials, but is not limited thereto.

[0094] The reflective layers of the light-emitting element layer (LEL) may include a first reflective layer (RFL1) and a second reflective layer (RFL2) covering both ends of each of the light-emitting elements (LE). For example, the first reflective layer (RFL1) and the second reflective layer (RFL2) may be disposed on the lower surface and the upper surface of each of the light-emitting elements (LE).

[0095] The first connecting electrodes (CNE1), the second connecting electrode (CNE2), and the first insulating layer (IL1) may be disposed on a backplane substrate (BPL). For example, the first connecting electrodes (CNE1) may be disposed on each of the first contact terminals (CT1), and the second connecting electrode (CNE2) may be disposed on the second contact terminal (CT2). The first connecting electrodes (CNE1) and the second connecting electrode (CNE2) may penetrate the first insulating layer (IL1).

[0096] The first connecting electrodes (CNE1) are positioned between the backplane substrate (BPL) and the first electrodes (ET1) to connect the backplane substrate (BPL) and the first electrodes (ET1). For example, the first connecting electrode (CNE1) of each pixel (PX) may be electrically connected between the first contact terminal (CT1) of the corresponding pixel (PX) and the first electrode (ET1). Although the first connecting electrodes (CNE1) and the first electrodes (ET1) are described as separate elements in FIG. 2, the embodiments are not limited thereto. For example, the first connecting electrodes (CNE1) may be a part of each of the first electrodes (ET1).

[0097] The second connecting electrode (CNE2) is positioned between the backplane substrate (BPL) and the power line (PL) to connect the backplane substrate (BPL) and the power line (PL). For example, the second connecting electrode (CNE2) may be electrically connected between the second contact terminal (CT2), which is electrically connected to the backplane power wiring (BLI), and the power line (PL). Although the second connecting electrode (CNE2) and the power line (PL) are described as separate elements in FIG. 2, the embodiments are not limited thereto. For example, the second connecting electrode (CNE2) may be considered as part of the power line (PL).

[0098] The first connecting electrodes (CNE1) and the second connecting electrode (CNE2) may include a conductive material. For example, the first connecting electrodes (CNE1) and the second connecting electrode (CNE2) may include at least one of gold (Au), copper (Cu), tin (Sn), titanium (Ti), aluminum (Al), silver (Ag), or other metals.

[0099] A first insulating layer (IL1) may be disposed on a backplane substrate (BPL). The first insulating layer (IL1) may include openings corresponding to the first connecting electrodes (CNE1) and the second connecting electrode (CNE2) and may surround the sides of the first connecting electrodes (CNE1) and the second connecting electrode (CNE2). The first insulating layer (IL1) may expose the upper surfaces of the first connecting electrodes (CNE1) and the second connecting electrode (CNE2).

[0100] The first electrodes (ET1) may be disposed on the first connecting electrodes (CNE1) and the first insulating layer (IL1). For example, the first electrodes (ET1) may be disposed on each of the first connecting electrodes (CNE1) and may also be disposed on a portion of the first insulating layer (IL1) around the first connecting electrodes (CNE1).

[0101] The first electrodes (ET1) may be disposed between each first connecting electrode (CNE1) and each light-emitting element (LE). The first electrodes (ET1) may be electrically connected between each first connecting electrode (CNE1) and each light-emitting element (LE) (for example, the contact electrodes (CTE) or the first semiconductor layer (SEM1) of each light-emitting element (LE)).

[0102] The first electrodes (ET1) may include a conductive material. In one embodiment, the first electrodes (ET1) may be bonding electrodes (or bonding pads) for stably placing or bonding light-emitting elements (LE) on a backplane substrate (BPL). However, the type of the first electrodes (ET1) is not limited thereto, and the type, structure, and / or material of the first electrodes (ET1) may vary depending on the bonding structure (e.g., bonding) or bonding method (e.g., bonding) of the backplane substrate (BPL) and the light-emitting elements (LE). Below, an embodiment in which the first electrodes (ET1) are bonding electrodes is described.

[0103] In one embodiment, the first electrodes (ET1) may include a conductive material suitable for a bonding process. For example, the first electrodes (ET1) may include a metal or metal alloy with excellent electrical and thermal conductivity, or a transparent conductive material capable of a bonding process. Examples of metals or metal alloys that may be included in the first electrodes (ET1) include eutectic metals such as gold (Au)-tin (Sn) alloy, titanium (Ti), zirconium (Zr), nickel (Ni), or chromium (Cr). Examples of transparent conductive materials that may be included in the first electrodes (ET1) include Indium Tin Oxide (ITO) or Zinc Oxide (ZnO). The first electrodes (ET1) may also be formed of other conductive materials. The first electrodes (ET1) may have a thickness sufficient to properly or easily perform a bonding process (for example, a thickness of approximately several hundred nanometers).

[0104] The first reflective layers (RFL1) may be disposed on each of the first electrodes (ET1). The first reflective layers (RFL1) may include a conductive material and thus have conductivity.

[0105] In one embodiment, the first reflective layers (RFL1) may comprise a conductive material with high light reflectivity (e.g., a metal). For example, the first reflective layers (RFL1) may comprise aluminum (Al) or other metals with high light reflectivity (e.g., molybdenum (Mo), titanium (Ti), copper (Cu), silver (Ag), magnesium (Mg), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), or chromium (Cr), etc.). Alternatively, the first reflective layers (RFL1) may be a distributed Bragg reflector (DBR) in which transparent conductive layers of different refractive indices are alternately and / or repeatedly stacked.

[0106] Although an embodiment in FIG. 2 is disclosed in which each pixel (PX) includes a first electrode (ET1) and a first reflective layer (RFL1), the embodiments are not limited thereto. For example, the first electrode (ET1) and the first reflective layer (RFL1) may be integrated into a single electrode (or conductive layer), or the first electrode (ET1) may be composed of multiple layers including the first reflective layer (RFL1).

[0107] In one embodiment, the first reflective layers (RFL1) can cover (for example, completely cover) the lower surface of each of the light-emitting elements (LE). Accordingly, light traveling downward from each of the light-emitting elements (LE) can be effectively reflected, thereby increasing the light efficiency of the pixels (PX).

[0108] Light-emitting elements (LE) may be disposed on each of the first reflective layers (RFL1). Each of the light-emitting elements (LE) may include a first semiconductor layer (SEM1), a light-emitting layer (EML), and a second semiconductor layer (SEM2) sequentially disposed on the first reflective layer (RFL1). In one embodiment, each of the light-emitting elements (LE) may further include a contact electrode (CTE) covering one side (e.g., the bottom side) of the first semiconductor layer (SEM1). In another embodiment, each of the light-emitting elements (LE) may not include a contact electrode (CTE).

[0109] A contact electrode (CTE) may be disposed on the first reflective layer (RFL1) of each pixel (PX). The contact electrode (CTE) may be disposed on one side (e.g., the bottom side) of the first semiconductor layer (SEM1) included in the light-emitting element (LE). The contact electrode (CTE) protects the first semiconductor layer (SEM1) and can smoothly connect (e.g., electrically connect) the light-emitting element (LE) to each first reflective layer (RFL1) (or first electrode (ET1)).

[0110] The contact electrode (CTE) may comprise a metal, a metal oxide, or other conductive material. In one embodiment, the contact electrode (CTE) may comprise a transparent conductive material (e.g., Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), or other transparent conductive material), but is not limited thereto.

[0111] The first semiconductor layer (SEM1), the light-emitting layer (EML), and the second semiconductor layer (SEM2) may be formed from a semiconductor epitaxial stack or epi-layers formed by epitaxial growth on a semiconductor substrate.

[0112] The first semiconductor layer (SEM1) may include a semiconductor material doped with a dopant of the first conductivity type. For example, the first semiconductor layer (SEM1) may be a semiconductor layer of the first conductivity type that includes a nitride-based semiconductor material, a phosphide-based semiconductor material, or other semiconductor material, and further includes a dopant of the first conductivity type. In one embodiment, the first semiconductor layer (SEM1) may be a p-type semiconductor layer (e.g., p-GaN) doped with a p-type dopant such as Mg, Zn, Ca, Se, Ba, etc.

[0113] The light-emitting layer (EML) may be disposed on the first semiconductor layer (SEM1). For example, the light-emitting layer (EML) may be disposed between the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2). The light-emitting layer (EML) may emit light by the recombination of electron-hole pairs that occurs according to an electrical signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0114] The light-emitting layer (EML) may include a nitride-based semiconductor material, a phosphide-based semiconductor material, or other semiconductor materials, and may have a single or multiple quantum well structure. In one embodiment, the light-emitting layer (EML) may have a multiple quantum well structure including a quantum well layer including InGaN and a barrier layer including GaN, AlGaN, or GaAlN, but is not limited thereto.

[0115] In one embodiment, pixels (PX) may include light-emitting elements (LE) that emit light of substantially the same wavelength band. The light emitted by each of the light-emitting elements (LE) may be short-wavelength light of a wavelength band lower than that of the light finally emitted from each of the pixels (PX). In one embodiment, the first pixel (PX1), the second pixel (PX2), and the third pixel (PX3) may each emit red light (e.g., red light having a peak wavelength in the range of approximately 610 nm to 650 nm), green light (e.g., green light having a peak wavelength in the range of approximately 510 nm to 550 nm), and blue light (e.g., blue light having a peak wavelength in the range of approximately 440 nm to 480 nm). Additionally, each of the light-emitting elements (LE) may be an ultraviolet light-emitting diode (UV LED) or a blue light-emitting diode (Blue LED) that emits ultraviolet light having a wavelength band lower than or equal to the wavelength band of blue light emitted from the third pixel (PX) (for example, ultraviolet light having a peak wavelength in the range of approximately 100 nm to 400 nm) or blue light.

[0116] In one embodiment, when the emitting layer (EML) comprises InGaN, the wavelength band or color of the light emitted from the emitting layer (EML) can be controlled by adjusting the content of indium (In). For example, the indium content of the emitting layer (EML) may be 10% or less, and the emitting layer (EML) may emit ultraviolet light. Alternatively, the indium content of the emitting layer (EML) may be 10% to 20%, and the emitting layer (EML) may emit blue light. For example, the emitting layer (EML) may emit ultraviolet or blue light having a peak wavelength in the range of approximately 340 nm to 460 nm.

[0117] In one embodiment, the light-emitting elements (LE) may be micro light-emitting diodes having a fine size of approximately several micrometers to several hundred micrometers or less. For example, each of the light-emitting elements (LE) may be a UV micro light-emitting diode or a blue micro light-emitting diode having a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3) of 100 μm or less.

[0118] The second semiconductor layer (SEM2) may include a semiconductor material doped with a dopant of the second conductivity type. For example, the second semiconductor layer (SEM2) may be a semiconductor layer of the second conductivity type that includes a nitride-based semiconductor material, a phosphide-based semiconductor material, or other semiconductor material, and further includes a dopant of the second conductivity type. In one embodiment, the second semiconductor layer (SEM2) may be an n-type semiconductor layer (e.g., n-GaN) doped with an n-type dopant such as Si, Ge, Sn, etc.

[0119] The protective film (PRL) may cover the sides of the light-emitting elements (LE), the first reflective layers (RFL1), and the first electrodes (ET1). In one embodiment, the protective film (PRL) may be individually placed in each pixel area, but is not limited thereto.

[0120] The protective film (PRL) may include an opening that exposes a portion of each of the light-emitting elements (LE), for example, the upper surface. At the portion of the protective film (PRL) where it is opened, the light-emitting elements (LE) may be electrically connected to each of the second electrodes (ET2).

[0121] The protective layer (PRL) is silicon oxide (SiO₂ x ), silicon nitride (SiN x ), silicon oxide nitride (SiO x N y ), aluminum oxide (Al x O y ), titanium oxide (Ti x O y) and hafnium oxide (HfO x It may include at least one insulating material among ), or other insulating materials. The protective film (PRL) protects the light-emitting elements (LE) and can increase the electrical stability of the light-emitting elements (LE).

[0122] The second electrodes (ET2) can be placed on each light-emitting element (LE). For example, the second electrodes (ET2) can be placed on the second semiconductor layers (SEM2) of the light-emitting elements (LE) and can cover the upper surface of the light-emitting elements (LE). The second electrodes (ET2) can be electrically connected to the second semiconductor layers (SEM2) of the light-emitting elements (LE).

[0123] In one embodiment, the second electrodes (ET2) may also be positioned on top of the protective film (PRL) and may be electrically connected to the power line (PL) from the side. In one embodiment, the second electrodes (ET2) may be formed individually in each pixel area and may be electrically connected to the backplane power wiring (BLI) through the power line (PL).

[0124] In another embodiment, the second electrodes (ET2) may be formed as a single common layer (e.g., a common electrode) that is placed across the entire display area (DA), and the pixels (PX) may share a single second electrode (ET2). The shape or location of the second electrodes (ET2), the connection structure between the second electrodes (ET2) and the light-emitting elements (LE), the connection structure between the second electrodes (ET2) and the power line (PL), etc., may be varied according to the embodiments.

[0125] The second electrodes (ET2) may include a transparent conductive material. For example, the second electrodes (ET2) may include ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or other transparent conductive materials and may be substantially transparent. Accordingly, light generated from the light-emitting elements (LE) can pass through the second electrodes (ET2).

[0126] The second reflective layers (RFL2) may be disposed on each of the second electrodes (ET2). In one embodiment, the second reflective layers (RFL2) may completely cover the upper surface of each of the light-emitting elements (LE).

[0127] In one embodiment, the second reflective layers (RFL2) may be dispersed Bragg reflectors. For example, the second reflective layers (RFL2) may include first layers and second layers having different refractive indices and alternately stacked on light-emitting elements (LE) (for example, on each second electrode (ET2)) to form a dispersed Bragg reflector. In one embodiment, the second reflective layers (RFL2) may include oxides. For example, each first layer may be made of titanium oxide such as TiO2, and each second layer may be made of silicon oxide such as SiO2.

[0128] The reflectance of the first reflective layers (RFL1) and the reflectance of the second reflective layers (RFL2) with respect to the emission wavelength of light emitted from the light-emitting elements (LE) (e.g., ultraviolet or blue light) may be different. The first reflective layers (RFL1) and the second reflective layers (RFL2) may have optimized reflectances to improve the resonance effect of the light emitted from the light-emitting elements (LE).

[0129] The reflectance of the first reflective layers (RFL1) may be higher than the reflectance of the second reflective layers (RFL2). For example, the first reflective layers (RFL1) may reflect light emitted from each light-emitting element (LE) with a reflectance of 90% or more, and the second reflective layers (RFL2) may reflect light emitted from each light-emitting element (LE) with a reflectance of 80% or more, and may have a lower reflectance compared to the reflectance of the first reflective layers (RFL1). However, the material and reflectance of the first reflective layers (RFL1) and the second reflective layers (RFL2), respectively, may vary depending on the embodiments. By placing a pair of first reflective layers (RFL1) and second reflective layers (RFL2) having different reflectances on both sides of each light-emitting element (LE), the amount of light emitted from the light-emitting element layer (LEL) can be increased, and the light efficiency of the pixels (PX) can be increased.

[0130] Each light-emitting element (LE) may be a resonant light-emitting diode (hereinafter referred to as a resonant LED) in which the resonance effect is improved or optimized by a first reflective layer (RFL1) and a second reflective layer (RFL2). Alternatively, in addition to the light-emitting element (LE), a second electrode (ET2) on the light-emitting element (LE), and a first reflective layer (RFL1) (or a lower electrode including the first reflective layer (RFL1) and the first electrode (ET1)) and a second reflective layer (RFL2) disposed on both sides of the light-emitting element (LE) may be considered to form a resonant LED.

[0131] The power line (PL) may surround the light-emitting elements (LE), the protective film (PRL), and the second electrodes (ET2). For example, the power line (PL) may be positioned on the side of the protective film (PRL) and the second electrodes (ET2). In one embodiment, the power line (PL) may further surround the side of the second reflective layers (RFL2).

[0132] The power line (PL) can be electrically connected to the second electrodes (ET2). For example, the power line (PL) can be placed directly on the side of the second electrodes (ET2) and electrically connected to the second electrodes (ET2).

[0133] The power line (PL) can be electrically connected to the backplane power wiring (BLI) formed on the backplane substrate (BPL) inside and / or outside the display area (DA) (for example, the peripheral area (PHA) in FIG. 1). FIG. 2 illustrates an embodiment in which the power line (PL) is connected to the backplane power wiring (BLI) inside the display area (DA).

[0134] The power line (PL) may include a conductive material (e.g., a metal). For example, the power line (PL) may include at least one of gold (Au), copper (Cu), tin (Sn), titanium (Ti), aluminum (Al), and silver (Ag).

[0135] In one embodiment, the power line (PL) may include a highly reflective conductive material. For example, the power line (PL) may include a highly reflective conductive material with respect to the emission wavelength of the light-emitting elements (LE), for example, aluminum (Al), or other highly reflective conductive materials.

[0136] The power line (PL) can reflect and recirculate light generated from each light-emitting element (LE) and directed toward the side. For example, light generated from each light-emitting element (LE) and directed toward the side can be emitted upward from each light-emitting element (LE) while being reflected once or multiple times by the power line (PL). The light emitted upward from the light-emitting elements (LE) can be incident on each color conversion layer (CCL).

[0137] The light emission rate of each light-emitting element (LE) can be increased by the power line (PL). Accordingly, the amount of light incident on each color conversion layer (CCL) can be increased, and the light efficiency of the pixels (PX) can be improved.

[0138] The second insulating layer (IL2) can be placed around the light-emitting elements (LE). For example, the second insulating layer (IL2) can be filled in the space formed between the light-emitting elements (LE).

[0139] In one embodiment, the second insulating layer (IL2) may be formed to a height greater than the height of other elements disposed in the light-emitting element layer (LEL). For example, the second insulating layer (IL2) may be formed to a height greater than the maximum height of the second reflective layers (RFL2) and the power line (PL), and may completely cover other elements disposed in the light-emitting element layer (LEL) (for example, light-emitting elements (LE) and second reflective layers (RFL2), etc.).

[0140] In one embodiment, the second insulating layer (IL2) comprises an inorganic insulating material and can be flattened through a flattening process (e.g., a CMP process). Accordingly, the upper surface of the second insulating layer (IL2) can be substantially flat.

[0141] In one embodiment, the second insulating layer (IL2) may comprise an oxide capable of oxide-oxide bonding. Additionally, the second insulating layer (IL2) may be optically transparent so that light emitted from the light-emitting element layer (LEL) can pass through. For example, the second insulating layer (IL2) may comprise an inorganic insulating material including an oxide. As an example, the second insulating layer (IL2) may comprise a silicon oxide such as SiO2, an aluminum oxide such as Al2O3, or other oxide capable of oxide-oxide bonding. The second insulating layer (IL2) may also be referred to as the "first oxide layer."

[0142] A photovoltaic conversion layer (CVTL) may be disposed on a light-emitting element layer (LEL). The photovoltaic conversion layer (CVTL) may include color conversion layers (CCL) disposed on the light-emitting elements (LE) of pixels (PX), third reflective layers (RFL3) surrounding the color conversion layers (CCL), and a third insulating layer (IL3) disposed around the color conversion layers (CCL) and the third reflective layers (RFL3).

[0143] Color conversion layers (CCL) can overlap with light-emitting elements (LE). For example, color conversion layers (CCL) can overlap with light-emitting elements (LE) in a third direction (DR3). The color conversion layers (CCL) may include a first color conversion layer (CCL1) disposed on a light-emitting element (LE) of each of the first pixels (PX1), a second color conversion layer (CCL2) disposed on a light-emitting element (LE) of each of the second pixels (PX2), and a third color conversion layer (CCL3) disposed on a light-emitting element (LE) of each of the third pixels (PX3). The first color conversion layer (CCL1), the second color conversion layer (CCL2), and the third color conversion layer (CCL3) can absorb light emitted from each of the light-emitting elements (LE) and convert it into light of a first color, light of a second color, and light of a third color, respectively.

[0144] In one embodiment, each color conversion layer (CCL) may comprise an inorganic material (e.g., a nitride-based semiconductor material) and have a multiple quantum well structure. The color conversion layer (CCL) may absorb short-wavelength light emitted from each light-emitting element (LE) and emit longer-wavelength light. The color conversion layer (CCL) may also be referred to as a "wavelength conversion layer."

[0145] For example, each color conversion layer (CCL) can absorb light emitted from each light-emitting element (LE) and utilize it as an excitation source to convert it into light corresponding to the emission wavelength of the corresponding pixel (PX). The light converted by each color conversion layer (CCL) can be emitted upward from the pixels (PX) along a third direction (DR3), etc. (e.g., vertically).

[0146] Each color conversion layer (CCL) may have a volume sufficient to ensure light conversion efficiency. For example, the height or thickness of the color conversion layer (CCL) may be greater than the height or thickness of the light-emitting element (LE). Additionally, the total volume of the quantum well layers included in each color conversion layer (CCL) may be greater than the total volume of the quantum well layers included in the light-emitting layer (EML) of the light-emitting element (LE).

[0147] The third reflective layers (RFL3) may surround the color conversion layers (CCL). For example, the third reflective layers (RFL3) may surround the sides of the first color conversion layer (CCL1), the second color conversion layer (CCL2), and the third color conversion layer (CCL3), respectively.

[0148] A third insulating layer (IL3) may be placed around the color conversion layers (CCL). For example, the third insulating layer (IL3) may be filled in the space formed between the color conversion layers (CCL).

[0149] In one embodiment, the third insulating layer (IL3) may be formed with a thickness greater than the thickness of other elements disposed in the optical conversion layer (CVTL). For example, the third insulating layer (IL3) may be formed with a thickness greater than the thickness of the color conversion layers (CCL) and the third reflective layers (RFL3), and may cover the lower surface of the color conversion layers (CCL) and the third reflective layers (RFL3).

[0150] In one embodiment, the third insulating layer (IL3) comprises an inorganic insulating material and can be flattened through a flattening process (e.g., a CMP process). Accordingly, the lower surface of the third insulating layer (IL3) can be substantially flat.

[0151] In one embodiment, the third insulating layer (IL3) may comprise an oxide capable of oxide-oxide junction. Additionally, the third insulating layer (IL3) may be optically transparent so that light emitted from the light-emitting element layer (LEL) can pass through. For example, the third insulating layer (IL3) may comprise an inorganic insulating material including an oxide. As an example, the third insulating layer (IL3) may comprise a silicon oxide such as SiO2, an aluminum oxide such as Al2O3, or other oxide capable of oxide-oxide junction. The third insulating layer (IL3) may also be referred to as the "second oxide layer." In one embodiment, the second insulating layer (IL2) and the third insulating layer (IL3) may comprise the same material, for example, SiO2, and may be bonded to each other.

[0152] In one embodiment, the light-emitting element layer (LEL) and the light-converting layer (CVTL) may be formed individually on different substrates and may be joined to each other by an oxide-oxide bonding that joins the second insulating layer (IL2) and the third insulating layer (IL3). Accordingly, there may be a bonding interface (BIF) between the second insulating layer (IL2) and the third insulating layer (IL3). Additionally, between the second reflective layer (RFL2) and the color-converting layer (CCL) of each pixel (PX), there may be an insulating layer containing oxide (for example, a part of the second insulating layer (IL2) and the third insulating layer (IL3)).

[0153] In one embodiment, the third reflective layers (RFL3) may comprise a conductive material with high light reflectivity (e.g., a metal). For example, the third reflective layers (RFL3) may comprise aluminum (Al) or other metals with high light reflectivity (e.g., molybdenum (Mo), titanium (Ti), copper (Cu), silver (Ag), magnesium (Mg), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), or chromium (Cr), etc.). However, the embodiments are not limited thereto. For example, the third reflective layers (RFL3) may be composed of a dispersed Bragg reflector.

[0154] Color filters (CF) may be disposed on a photovoltaic conversion layer (CVTL). The color filters (CF) may include a first color filter (CF1) disposed on a first color conversion layer (CCL1), a second color filter (CF2) disposed on a second color conversion layer (CCL2), and a third color filter (CF3) disposed on a third color conversion layer (CCL3). The lower surface of each color filter (CF) may cover (for example, completely cover) the upper surface of each color conversion layer (CCL). Accordingly, light loss of pixels (PX) can be prevented or reduced.

[0155] Each of the color filters (CF) may be an optical filter capable of blocking (e.g., blocking or absorbing) light in a wavelength band emitted from the light-emitting elements (LE) and transmitting light in a wavelength band converted by each color conversion layer (CCL). For example, each of the color filters (CF) may be an optical filter that blocks ultraviolet light, or light in a wavelength band corresponding to the emission wavelength (λ) of the light-emitting elements (LE) (e.g., a peak wavelength band), for example, an ultraviolet blocking filter.

[0156] The first color filter (CF1) can transmit light of a first color, for example, red light. The second color filter (CF2) can transmit light of a second color, for example, green light. The third color filter (CF3) can transmit light of a third color, for example, blue light. In one embodiment, the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) may be a red color filter, a green color filter, and a blue color filter, respectively, but are not limited thereto. For example, the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) may be composed of a dispersion Bragg reflector optimized to match the emission wavelength of each pixel (PX), or may include an organic material.

[0157] A lens (LS) may be placed on each color filter (CF). The lens (LS) may have a size corresponding to the area of ​​the light-emitting element (LE) and the color conversion layer (CCL) of each pixel (PX), and may overlap with the light-emitting element (LE) and the color conversion layer (CCL) of each pixel (PX). For example, the lens (LS) may be a microlens corresponding to the size of each light-emitting element (LE). In one embodiment, each lens (LS) may have a size larger than each light-emitting element (LE) and each color conversion layer (CCL) when viewed in a planar view, and may cover the periphery of the light-emitting element (LE) and the color conversion layer (CCL). In one embodiment, the lens (LS) may be a microlens in the form of a convex lens, but is not limited thereto. By placing the lens (LS) on top of each color conversion layer (CCL) and the color filter (CF), the light emission characteristics of the pixels (PX) can be adjusted or improved.

[0158] The lens (LS) can be formed of a transparent material so that light incident from the light-emitting elements (LE) can be transmitted. For example, the lens (LS) can be formed of glass, plastic, ceramic, or other materials, and can be formed of an optical material with a high refractive index.

[0159] FIG. 3 is a cross-sectional view showing a display device according to one embodiment. FIG. 4 is a cross-sectional view showing a display device according to one embodiment. FIG. 5 is a cross-sectional view showing a display device according to one embodiment.

[0160] For example, FIGS. 3, 4, and 5 show a portion of the display area (DA) of FIG. 1, and show a schematic cross-section of the first pixel (PX1), the second pixel (PX2), and the third pixel (PX3) forming a unit pixel (UPX) among the pixels (PX) of the display area (DA). FIG. 3 shows a display device (10) in which the position of the bonding interface (BIF) is different compared to FIG. 2. FIGS. 4 and 5 each show a display device (10) in which the shape and size of the color conversion layers (CCL) are different compared to FIGS. 2 and FIG. 3. In describing the embodiments, the same reference numerals are used for configurations similar or identical to at least one embodiment described above, and redundant descriptions are omitted.

[0161] Referring to FIG. 3, the second insulating layer (IL2) can be formed at the same height as the second reflective layers (RFL2), and the bonding interface (BIF) can be located on the upper surface of each of the second reflective layers (RFL2). For example, if an oxide layer capable of oxide-oxide bonding (e.g., a second layer containing an oxide such as SiO2) is disposed on the top of each of the second reflective layers (RFL2), the second insulating layer (IL2) and the second reflective layers (RFL2) can be formed at the same height. Accordingly, the second insulating layer (IL2) can expose the upper surface of the second reflective layers (RFL2), and the upper surface of the second insulating layer (IL2) and the second reflective layers (RFL2) can be bonded to the third insulating layer (IL3) by oxide-oxide bonding.

[0162] Referring to FIGS. 4 and 5, the color conversion layers (CCL) may have an inversely tapered cross-section. For example, the color conversion layers (CCL) may be formed as a truncated shape with a width that gradually decreases toward the bottom. The third reflective layers (RFL3) wrap around the sides of each of the color conversion layers (CCL) and may have a shape and size corresponding to the color conversion layers (CCL).

[0163] In one embodiment, the lower surface of each of the color conversion layers (CCL) may have an area greater than the area of ​​the upper surface of each of the second reflection layers (RFL2) or light-emitting elements (LE), and may cover (e.g., completely cover) the second reflection layers (RFL2) or light-emitting elements (LE) when viewed in a planar view. Additionally, the lower surface of each of the color filters (CF) may cover (e.g., completely cover) the upper surface of each of the color conversion layers (CCL). Accordingly, light loss of the pixels (PX) can be prevented or reduced.

[0164] The color conversion layers (CCL) may have a volume sufficient to ensure light conversion efficiency. When the area or width of the color conversion layers (CCL) increases in the embodiments of FIGS. 4 and 5 compared to the embodiments of FIGS. 2 and 3, the height or thickness of the color conversion layers (CCL) may decrease. However, the embodiments are not limited thereto, and the shape or size of the color conversion layers (CCL) may be varied according to the embodiments.

[0165] FIG. 6 is a cross-sectional view showing a light-emitting layer according to one embodiment. For example, FIG. 6 shows one embodiment of a light-emitting layer (EML) for each of the light-emitting elements (LE) disposed within the light-emitting element layer (LEL) of FIG. 2 to 5.

[0166] Referring to FIG. 6, the light-emitting layer (EML) may have a single or multiple quantum well structure including at least one quantum well layer (QWL). For example, the light-emitting layer (EML) may have a multiple quantum well structure including quantum well layers (QWL) and barrier layers (BRL). The quantum well layers (QWL) and barrier layers (BRL) may be alternately arranged or stacked along a third direction (DR3). In one embodiment, barrier layers (BRL) may be disposed on the bottom and top layers of the light-emitting layer (EML).

[0167] In one embodiment, the quantum well layer (QWL) may comprise a nitride-based semiconductor material. For example, the quantum well layer (QWL) may comprise GaN, InGaN, AlGaN, or AlInGaN. Depending on the emission wavelength, the quantum well layer (QWL) may contain little to no indium or contain indium in a low amount. In one embodiment, when the light-emitting element (LE) emits ultraviolet light, the quantum well layer (QWL) may substantially not contain indium or may contain indium in a low amount (or composition) of 10% or less. In one embodiment, when the light-emitting element (LE) emits blue light, the quantum well layer (QWL) may contain indium in an amount of approximately 10% to 20%.

[0168] In one embodiment, the barrier layer (BRL) may include a nitride-based semiconductor material. As an example, the barrier layer (BRL) may include AlGaN or GaN. The materials of the quantum well layer (QWL) and the barrier layer (BRL) are not limited to the materials exemplified above and may vary depending on the embodiments.

[0169] When the light-emitting element (LE) has a small thickness of 1 μm or less, for example, a thickness of approximately several hundred nanometers, the light-emitting layer (EML) may have a thickness of approximately several to several tens of nanometers. For example, the total thickness of the light-emitting layer (EML) may be 10 nm or less.

[0170] FIG. 7 is a diagram illustrating a resonance structure according to one embodiment. For example, FIG. 7 shows a standing wave according to a resonance structure formed between a first reflective layer (RFL1) and a second reflective layer (RFL2) according to one embodiment.

[0171] Referring to FIGS. 1 to 7, the distance between the first reflective layer (RFL1) and the second reflective layer (RFL2) disposed on both sides of the light-emitting element (LE) can be appropriately adjusted according to the light-emitting wavelength (λ) of the light-emitting element (LE). For example, the distance between the first reflective layer (RFL1) and the second reflective layer (RFL2) can be set to a value corresponding to a first length (L1) that is a multiple of N (N is a natural number) of the light-emitting wavelength (λ) of the light-emitting element (LE). As an example, the first interface (IF1) between the first reflective layer (RFL1) and the light-emitting element (LE), and the second interface (IF2) between the second reflective layer (RFL2) and the second electrode (ET2) can be located at a point (or height) corresponding to a node where the amplitude of the light-emitting wavelength (λ) of the light-emitting element (LE) is minimized.

[0172] In one embodiment, each of the light-emitting elements (LE) may be a nano LED or micro LED having a thickness of 1 μm or less. For example, the thickness or first length (L1) of each of the light-emitting elements (LE) may be several hundred nanometers. Each of the light-emitting elements (LE) emits light in response to an electrical signal applied to both ends, and even if formed in a microscopic size, it can emit light sufficient to be used as a light source for pixels (PX). By using light-emitting elements (LE) having a microscopic size, a high-resolution display device (10) of a fine size (for example, a virtual reality device or an augmented reality device) can be easily manufactured.

[0173] In FIG. 7, the first reflective layer (RFL1) and the second reflective layer (RFL2) are shown to be spaced apart from each other by a first length (L1) corresponding to twice the emission wavelength (λ) of the light-emitting element (LE), but the embodiments are not limited thereto. For example, the first reflective layer (RFL1) and the second reflective layer (RFL2) may be spaced apart from each other by a distance corresponding to at least three times the emission wavelength (λ) of the light-emitting element (LE).

[0174] A light-emitting element (LE) and a second electrode (ET2) may be disposed between the first reflective layer (RFL1) and the second reflective layer (RFL2). In one embodiment, the light efficiency of the light-emitting element (LE) can be improved or optimized by appropriately adjusting or optimizing the thickness of the plurality of layers included in the light-emitting element (LE) and the second electrode (ET2). For example, the quantum well layers (QWL) included in the light-emitting element (LE) may be located at a point (or height) corresponding to an antinode where the amplitude of the emission wavelength (λ) (or wave) of the light-emitting element (LE) is maximum. Accordingly, the resonance of light generated in the light-emitting element (LE) can be enhanced, and the light efficiency of the light-emitting element (LE) can be improved.

[0175] FIG. 8 is a cross-sectional view showing a color conversion layer according to one embodiment. For example, FIG. 8 shows a cross-section of each of the color conversion layers (CCL) disposed within the photovoltaic conversion layer (CVTL) of FIG. 2 to 5.

[0176] Referring to FIG. 8, the color conversion layer (CCL) may have a multi-quantum well structure including quantum well layers (QWLc) and barrier layers (BRLc). The quantum well layers (QWLc) and barrier layers (BRLc) may be alternately arranged or stacked along a third direction (DR3). In one embodiment, barrier layers (BRLc) may be disposed at the bottom and top of the color conversion layer (CCL). In one embodiment, each color conversion layer (CCL) may include a nitride-based semiconductor material.

[0177] In one embodiment, the quantum well layer (QWLc) may include a nitride-based semiconductor material containing indium. As an example, the quantum well layer (QWLc) may include InGaN, but is not limited thereto. The indium content (or composition) of the quantum well layer (QWLc) included in the color conversion layer (CCL) may be greater than or equal to the indium content (or composition) of the quantum well layer (QWL) included in the light-emitting element (LE).

[0178] The first color conversion layer (CCL1) may contain indium in an amount corresponding to the wavelength band of the first color light. For example, when the first color conversion layer (CCL1) absorbs light emitted from a light-emitting element (LE) and converts it into red light (for example, red light having a peak wavelength in the range of approximately 610 nm to 650 nm), the indium content of the quantum well layers (QWLc) of the first color conversion layer (CCL1) may be approximately 30% to 40%.

[0179] The second color conversion layer (CCL2) may contain indium in an amount corresponding to the wavelength band of the second color light. For example, when the second color conversion layer (CCL2) absorbs light emitted from a light-emitting element (LE) and converts it into green light (for example, green light having a peak wavelength in the range of approximately 510 nm to 550 nm), the indium content of the quantum well layers (QWLc) of the second color conversion layer (CCL2) may be approximately 20% to 30%.

[0180] The third color conversion layer (CCL3) may contain indium in an amount corresponding to the wavelength band of the third color light. For example, when the third color conversion layer (CCL3) absorbs light emitted from a light-emitting element (LE) and converts it into blue light (for example, blue light having a peak wavelength in the range of approximately 440 nm to 480 nm), the indium content of the quantum well layers (QWLc) of the third color conversion layer (CCL3) may be approximately 10% to 20%.

[0181] In one embodiment, the barrier layer (BRLc) may include a nitride-based semiconductor material. As an example, the barrier layer (BRLc) may include GaN. However, the materials of the quantum well layer (QWLc) and the barrier layer (BRLc) are not limited to the materials exemplified above and may vary depending on the embodiments.

[0182] In one embodiment, each barrier layer (BRLc) may have an adjusted or optimized thickness to improve the light conversion efficiency of the color conversion layer (CCL). For example, each barrier layer (BRLc) may have a thickness corresponding to the wavelength band of light emitted from the light-emitting element (LE). For example, when the light-emitting element (LE) emits ultraviolet light, each barrier layer (BRLc) may have a thickness of approximately 100 nm or less (for example, a thickness of 90 nm or less), and when the light-emitting element (LE) emits blue light, each barrier layer (BRLc) may have a thickness of approximately 90 nm or more (for example, a thickness of 90 nm to 115 nm or less).

[0183] In one embodiment, barrier layers (BRLc) disposed on the bottom and top layers of the color conversion layer (CCL) may have a thickness smaller than that of other barrier layers (BRLc), for example, approximately half the thickness. For example, when the light-emitting element (LE) emits ultraviolet light, each of the barrier layers (BRLc) disposed on the bottom and top layers of the color conversion layer (CCL) may have a thickness of approximately 50 nm or less (for example, a thickness of 45 nm or less), and when the light-emitting element (LE) emits blue light, each of the barrier layers (BRLc) disposed on the bottom and top layers of the color conversion layer (CCL) may have a thickness of approximately 45 nm or more (for example, a thickness of 45 nm to 58 nm or less). However, the embodiments are not limited thereto, and the thickness of the barrier layers (BRLc) or the total thickness of the color conversion layer (CCL) may vary depending on the embodiments.

[0184] Each color conversion layer (CCL) may have a thickness adjusted to improve or optimize the light efficiency of the pixel (PX). For example, each color conversion layer (CCL) may have a thickness corresponding to a second length (L2) of 1 μm or more, for example, a thickness in the range of approximately 1 μm to 10 μm. As the color conversion layer (CCL) has a thickness of 1 μm or more, color conversion efficiency can be secured or improved, and as the color conversion layer (CCL) has a thickness of 10 μm or less, light loss can be reduced or minimized and optical efficiency can be increased. Accordingly, even if the light emitted from each light-emitting element (LE) is converted into light corresponding to the emission wavelength of each pixel (PX), the brightness of the pixel (PX) can be appropriately secured or improved.

[0185] FIG. 9 is a flowchart showing a method for manufacturing a display device according to one embodiment. For example, FIG. 9 schematically shows the manufacturing steps of a display device (10) including color conversion layers (CCL) as in the embodiments described above.

[0186] FIG. 10 is a cross-sectional view showing a display substrate according to one embodiment. For example, FIG. 10 shows an embodiment of a display substrate (DSL) formed in step S110 of FIG. 9.

[0187] FIGS. 11 to 16 are cross-sectional views sequentially illustrating a method for forming a light conversion layer according to one embodiment. The manufacturing steps of FIGS. 11 to 16 may be included in step S120 of FIG. 9.

[0188] FIGS. 17 and 18 are cross-sectional views sequentially illustrating a method of combining a display substrate and a light conversion layer according to one embodiment. The manufacturing steps of FIGS. 17 and 18 may be included in step S130 of FIG. 9.

[0189] FIG. 19 is a cross-sectional view showing a display device manufactured according to one embodiment. FIG. 19 shows a step of forming a color filter layer and a lens array included in step S140 of FIG. 9.

[0190] Referring to FIG. 9, a method for manufacturing a display device (10) according to one embodiment may include the steps of forming a display substrate including a backplane substrate (BPL) and a light-emitting element layer (LEL) (S110), forming a light-converting layer (CVTL) including a color conversion layer (CCL) (S120), combining the display substrate and the light-converting layer (CVTL) (S130), and forming a color filter layer and a lens array (S140). Steps S110 and S120 may be performed individually or independently of each other, and may proceed simultaneously or sequentially.

[0191] Referring to FIGS. 9 and 10, the step (S110) of forming a display substrate (DSL) including a backplane substrate (BPL) and a light-emitting element layer (LEL) may include the step of preparing a backplane substrate (BPL) and forming a light-emitting element layer (LEL) on the backplane substrate (BPL). The step of preparing the backplane substrate (BPL) may be the step of providing or manufacturing a backplane substrate (BPL) including pixel circuits (PXC), backplane power wiring (BLI), first contact terminals (CT1), second contact terminals (CT2), and a lower insulating layer (BIL), as illustrated in FIG. 10. The step of forming a light-emitting element layer (LEL) on a backplane substrate (BPL) may include the steps of forming first connecting electrodes (CNE1), a second connecting electrode (CNE2), and a first insulating layer (IL1) on the backplane substrate (BPL); forming first electrodes (ET1), first reflective layers (RFL1), and light-emitting elements (LE) on the first connecting electrodes (CNE1); forming a protective film (PRL) on the sides of the first electrodes (ET1), the first reflective layers (RFL1), and the light-emitting elements (LE); forming second electrodes (ET2) and second reflective layers (RFL2) on the light-emitting elements (LE); forming a power line (PL) on the sides of the second electrodes (ET2) and the protective film (PRL), and on the second connecting electrode (CNE2); and forming a second insulating layer (IL2).

[0192] In one embodiment, a semiconductor thin film layer (or epitaxial layer) grown on a semiconductor substrate may be etched on the semiconductor substrate to form light-emitting elements (LE), and the light-emitting elements (LE) may be placed or bonded on the first reflective layers (RFL1). In another embodiment, the semiconductor thin film layer or epitaxial layer grown on the semiconductor substrate may be placed or bonded on the first connecting electrodes (CNE1), the second connecting electrode (CNE2), and the first insulating layer (IL1) by a wafer-to-wafer bonding process or the like, and then etched to form light-emitting elements (LE). The first electrodes (ET1) and the first reflective layers (RFL1) may be formed as individual patterns before bonding the light-emitting elements (LE) or the semiconductor thin film layer, or etched as individual patterns after bonding the light-emitting elements (LE) or the semiconductor thin film layer.

[0193] Referring to FIGS. 9, 11 to 14, color conversion layers (CCL) can be formed on a manufacturing substrate (FSB). The color conversion layers (CCL) can be formed on different regions of the manufacturing substrate (FSB). In one embodiment, the order of forming the color conversion layers (CCL) can be determined according to the wavelength band of the converted light by the color conversion layers (CCL). For example, a third color conversion layer (CCL3) corresponding to the third color light, which is the shortest wavelength light among the first color light, the second color light, and the third color light, can be formed first. For example, as shown in FIGS. 11 and 12, a first mask layer (HML1) exposing a first region (A1) can be formed on the manufacturing substrate (FSB), and a third color conversion layer (CCL3) can be formed on the first region (A1).

[0194] The manufacturing substrate (FSB) is a substrate for manufacturing color conversion layers (CCL) and may be a growth substrate suitable for epitaxial growth.

[0195] In one embodiment, the manufacturing substrate (FSB) may include materials such as GaAs, silicon (Si), sapphire, SiC, GaN, ZnO, or Al2O3. The type or material of the manufacturing substrate (FSB) is not particularly limited as long as the epitaxial growth of semiconductor layers for manufacturing color conversion layers (CCL) can be carried out smoothly.

[0196] The first mask layer (HML1) includes an opening corresponding to the first region (A1) (for example, exposing the manufacturing substrate (FSB) in the first region (A1)) and may cover other regions of the manufacturing substrate (FSB). In one embodiment, the first mask layer (HML1) may include an inorganic material such as SiO2 or SiNx, but is not limited thereto. The first mask layer (HML1) may be removed after the formation of the third color conversion layer (CCL3).

[0197] The third color conversion layer (CCL3) can be formed by epitaxial growth. For example, the barrier layers (BRLc) and quantum well layers (QWLc) of the third color conversion layer (CCL3) can be formed alternately by epitaxial growth using the semiconductor material exemplified above.

[0198] Subsequently, as illustrated in FIGS. 12 and 13, a second mask layer (HML2) exposing a second region (A2) may be formed on a manufacturing substrate (FSB), and a second color conversion layer (CCL2) may be formed on the second region (A2). In one embodiment, the second mask layer (HML2) may include an inorganic material such as SiO2 or SiNx, but is not limited thereto. The materials of the first mask layer (HML1) and the second mask layer (HML2) may be the same or different. The second mask layer (HML2) may be removed after the formation of the second color conversion layer (CCL2).

[0199] The second color conversion layer (CCL2) can be formed by epitaxial growth. For example, the barrier layers (BRLc) and quantum well layers (QWLc) of the second color conversion layer (CCL2) can be formed alternately by epitaxial growth using the semiconductor material exemplified above.

[0200] Subsequently, as illustrated in FIGS. 13 and 14, a third mask layer (HML3) exposing a third region (A3) may be formed on a manufacturing substrate (FSB), and a first color conversion layer (CCL1) may be formed on the third region (A3). In one embodiment, the third mask layer (HML3) may include an inorganic material such as SiO2 or SiNx, but is not limited thereto. The material of the third mask layer (HML3) may be the same as or different from the material of the first mask layer (HML1) and / or the second mask layer (HML2). The third mask layer (HML3) may be removed after the formation of the first color conversion layer (CCL1).

[0201] The first color conversion layer (CCL1) can be formed by epitaxial growth. For example, the barrier layers (BRLc) and quantum well layers (QWLc) of the first color conversion layer (CCL1) can be formed alternately by epitaxial growth using the semiconductor material exemplified above.

[0202] In one embodiment, by forming color conversion layers (CCL) using the Molecular Beam Epitaxy (MBE) method, each of the color conversion layers (CCL) can be formed in the shape of a rod. In another embodiment, by forming color conversion layers (CCL) using the Metal-Organic Chemical Vapor Deposition (MOCVD) method, each of the color conversion layers (CCL) can be formed in the shape of a truncated pyramid or other truncated solid. In one embodiment, each of the color conversion layers (CCL) can be formed thickly to have a second length (L2) of 1 μm or more in the third direction (DR3).

[0203] Referring to FIGS. 9, 11 through 15, a third reflective layer (RFL3) can be formed on each side of the color conversion layers (CCL). For example, a third reflective layer (RFL3) covering each side of the color conversion layers (CCL) can be formed using the material previously exemplified as the material of the third reflective layer (RFL3).

[0204] Referring to FIGS. 9, 11 through 16, a third insulating layer (IL3) can be formed on a manufacturing substrate (FSB), color conversion layers (CCL), and third reflective layers (RFL3). The third insulating layer (IL3) can be formed by a film deposition process using the material previously exemplified and can be formed above the height of the color conversion layers (CCL) and the third reflective layers (RFL3). Accordingly, the third insulating layer (IL3) can cover the color conversion layers (CCL) and the third reflective layers (RFL3). In one embodiment, a planarization process can be performed to planarize the upper surface of the third insulating layer (IL3).

[0205] Referring to FIGS. 9 to 17, a display substrate (DSL) and a photovoltaic conversion layer (CVTL) can be arranged facing each other. For example, a manufacturing substrate (FSB) having a photovoltaic conversion layer (CVTL) formed thereon can be placed or aligned on the display substrate (DSL) such that the side having the photovoltaic conversion layer (CVTL) formed thereon faces the display substrate (DSL).

[0206] Referring to FIGS. 9 through 18, a display substrate (DSL) and a photovoltaic conversion layer (CVTL) can be bonded (e.g., bonded), and a manufacturing substrate (FSB) can be separated from and removed from the photovoltaic conversion layer (CVTL). In one embodiment, the display substrate (DSL) and the photovoltaic conversion layer (CVTL) can be bonded (e.g., bonded) by an oxide-oxide bond. For example, by bonding a second insulating layer (IL2) and a third insulating layer (IL3) by an oxide-oxide bond, a photovoltaic conversion layer (CVTL) can be bonded onto a display substrate (DSL) including a backplane substrate (BPL) and a light-emitting element layer (LEL). Accordingly, a photovoltaic conversion layer (CVTL) can be disposed or formed on the light-emitting element layer (LEL). A bonding interface (BIF) may exist between the second insulating layer (IL2) and the third insulating layer (IL3).

[0207] Referring to FIGS. 9 through 19, a color filter layer including color filters (CF) and a lens array including a lens (LS) can be sequentially formed on a light conversion layer (CVTL). Each of the color filters (CF) and the lens (LS) can be formed using the material previously exemplified and can be placed in each pixel area to cover each color conversion layer (CCL).

[0208] As described above, the display device (10) according to the embodiments may include light-emitting elements (LE) that emit light of the same wavelength band as a light source for pixels (PX). The light-emitting elements (LE) may be formed simultaneously using the same material. Accordingly, the structure of the light-emitting element layer (LEL) including the light-emitting elements (LE) can be simplified, and the number of mask processes included in the formation process of the light-emitting element layer (LEL) can be reduced. By doing so, the manufacturing process of the display device (10) can be simplified, and manufacturing efficiency can be increased.

[0209] In some embodiments, a first reflective layer and a second reflective layer having different reflectances may be disposed on both sides of each of the light-emitting elements (LE). Accordingly, the resonance of light generated in each of the light-emitting elements (LE) can be enhanced, and the light efficiency of each of the light-emitting elements (LE) can be improved.

[0210] Additionally, the display device (10) according to the embodiments may include color conversion layers (CCL) disposed on light-emitting elements (LE) and converting light emitted from the light-emitting elements (LE) into light corresponding to the emission wavelength of each pixel (PX). Accordingly, each pixel (PX) can emit light of a color corresponding to each emission wavelength.

[0211] In some embodiments, the color conversion layers (CCL) may be formed on a manufacturing substrate (FSB) and covered with an insulating layer containing an oxide (e.g., a third insulating layer (IL2)). The photovoltaic conversion layer (CVTL) containing the color conversion layers (CCL) may be bonded onto the light-emitting element layer (LEL) by an oxide-oxide junction. Accordingly, the light-emitting element layer (LEL) and the color conversion layers (CCL) can be reliably bonded (e.g., bonded), and the manufacturing process can be facilitated or simplified.

[0212] In some embodiments, at least one of an optical filter and an optical structure may be disposed on top of the color conversion layers (CCL). For example, a color filter (CF) and a lens (LS) may be disposed on top of each of the color conversion layers (CCL). Accordingly, the color purity and light emission rate of the pixels (PX) can be increased.

[0213] The display device (10) according to the embodiments may be applied to various electronic devices. For example, an electronic device according to one embodiment may include the display device (10) according to the above-described embodiments, and may further include a module or device having additional functions in addition to the display device (10).

[0214] FIG. 20 is a drawing showing a smart watch including a display device according to one embodiment.

[0215] Referring to FIG. 20, a display device (10_1) according to one embodiment can be applied to a smart watch (1000_1), which is one of the smart devices.

[0216] FIGS. 21 and 22 are drawings showing a head-mounted display device including a display device according to one embodiment.

[0217] Referring to FIGS. 21 and 22, a head-mounted display device (1000_2) according to one embodiment may be a virtual reality device. The head-mounted display device (1000_2) includes a first display device (10_2), a second display device (10_3), a display device housing (1100), a housing cover (1200), a first eyepiece (1210), a second eyepiece (1220), a head-mounted band (1300), a middle frame (1400), a first optical member (1510), a second optical member (1520), and a control circuit board (1600).

[0218] The first display device (10_2) provides an image to the user's left eye, and the second display device (10_3) provides an image to the user's right eye.

[0219] The first optical member (1510) may be positioned between the first display device (10_2) and the first eyepiece (1210). The second optical member (1520) may be positioned between the second display device (10_3) and the second eyepiece (1220). Each of the first optical member (1510) and the second optical member (1520) may include at least one convex lens.

[0220] The middle frame (1400) is positioned between the first display device (10_2) and the control circuit board (1600), and may be positioned between the second display device (10_3) and the control circuit board (1600). The middle frame (1400) serves to support and fix the first display device (10_2), the second display device (10_3), and the control circuit board (1600).

[0221] The control circuit board (1600) can be placed between the middle frame (1400) and the display device housing (1100). The control circuit board (1600) can be connected to the first display device (10_2) and the second display device (10_3) through a connector. The control circuit board (1600) can convert an image source input from the outside into video data and transmit the video data to the first display device (10_2) and the second display device (10_3) through the connector.

[0222] The control circuit board (1600) can transmit video data corresponding to a left-eye image optimized for the user's left eye to the first display device (10_2) and video data corresponding to a right-eye image optimized for the user's right eye to the second display device (10_3). Alternatively, the control circuit board (1600) can transmit the same video data to the first display device (10_2) and the second display device (10_3).

[0223] The display device housing (1100) serves to house the first display device (10_2), the second display device (10_3), the middle frame (1400), the first optical member (1510), the second optical member (1520), and the control circuit board (1600). The housing cover (1200) is positioned to cover an open side of the display device housing (1100). The housing cover (1200) may include a first eyepiece (1210) in which the user's left eye is positioned and a second eyepiece (1220) in which the user's right eye is positioned. Although FIGS. 21 and 22 illustrate the first eyepiece (1210) and the second eyepiece (1220) being positioned separately, the embodiments are not limited thereto. As an example, the first eyepiece (1210) and the second eyepiece (1220) may be combined into one.

[0224] The first eyepiece (1210) is aligned with the first display device (10_2) and the first optical member (1510), and the second eyepiece (1220) can be aligned with the second display device (10_3) and the second optical member (1520). The user can view an image of the first display device (10_2) magnified into a virtual image by the first optical member (1510) through the first eyepiece (1210), and can view an image of the second display device (10_3) magnified into a virtual image by the second optical member (1520) through the second eyepiece (1220).

[0225] The head mounting band (1300) serves to secure the display device storage unit (1100) to the user's head so that the first eyepiece (1210) and the second eyepiece (1220) of the storage unit cover (1200) can be maintained in a state where they are positioned on the user's left and right eyes, respectively. When the display device storage unit (1100) is implemented as a lightweight and compact unit, the head-mounted display device (1000_2) may be equipped with an eyeglass frame as shown in FIG. 23 instead of the head mounting band (1300).

[0226] In addition, the head-mounted display device (1000_2) may further be equipped with a battery for supplying power, an external memory slot for storing external memory, an external connection port for receiving video sources, and a wireless communication module. The external connection port may be a USB (universe serial bus) terminal, a display port, or an HDMI (high-definition multimedia interface) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0227] FIG. 23 is a drawing showing a head-mounted display device including a display device according to one embodiment.

[0228] Referring to FIG. 23, a head-mounted display device (1000_3) according to one embodiment may be a device in the form of glasses. A head-mounted display device (1000_3) according to one embodiment may have a display device (10_4), a left eye lens (10a), a right eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device storage portion (50).

[0229] In FIG. 23, it is anticipated that the head-mounted display device (1000_3) is a glasses-type display device including eyeglass frame temples (30a, 30b), but the embodiments are not limited thereto. For example, the head-mounted display device (1000_3) can be applied in various forms in other electronic devices.

[0230] The display device housing (50) may include a display device (10_4) and a reflective member (40) (or an optical path conversion member). An image displayed on the display device (10_4) may be reflected by the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user can view an augmented reality image in which a virtual image displayed on the display device (10_4) through the right eye and a real image seen through the right eye lens (10b) are combined. In one embodiment, the display device housing (50) may further include an optical member disposed between the display device (10_4) and the reflective member (40). An image displayed on the display device (10_4) may be magnified by the optical member and have its optical path converted by the reflective member (40) and provided to the user's right eye through the right eye lens (10b).

[0231] FIG. 23 illustrates that the display device housing (50) is positioned at the right end of the support frame (20), but the embodiments of this specification are not limited thereto. For example, the display device housing (50) may be positioned at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected from the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be positioned at both the left end and the right end of the support frame (20), in which case the user can view the image displayed on the display device (10_4) through both the left eye and the right eye.

[0232] FIG. 24 is a drawing showing an automobile instrument panel and a center fascia including display devices according to one embodiment. FIG. 24 shows an automobile with display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment applied.

[0233] Referring to FIG. 24, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to an instrument panel of a vehicle, to a center fascia of a vehicle, or to a Center Information Display (CID) placed on the dashboard of a vehicle. Additionally, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0234] FIG. 25 is a drawing showing a transparent display device including a display device according to one embodiment.

[0235] Referring to FIG. 25, a display device (10_5) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light simultaneously. Therefore, a user located in front of the transparent display device can not only view the image (IM) displayed on the display device (10_5) but also see an object (RS) or background located on the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) may include a light-transmitting portion capable of transmitting light or be formed of a material capable of transmitting light.

[0236] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

1. Backplane substrate; A light-emitting element layer comprising first electrodes disposed on the backplane substrate, light-emitting elements disposed on the first electrodes, and a first oxide layer covering the light-emitting elements; and A light conversion layer comprising color conversion layers disposed on the light-emitting element layer and overlapping with the light-emitting elements, and a second oxide layer covering the lower surface of the color conversion layers, A display device in which the first oxide layer and the second oxide layer are bonded.

2. In Paragraph 1, The above-mentioned light-emitting elements are a display device that emits ultraviolet or blue light.

3. In Paragraph 2, A display device comprising a first color conversion layer, a second color conversion layer, and a third color conversion layer, each of which converts light emitted from the light-emitting elements into light of a first color, light of a second color, and light of a third color, respectively.

4. In Paragraph 3, A display device in which the first color light, the second color light, and the third color light are red light, green light, and blue light, respectively.

5. In Paragraph 3, A display device having a multiple quantum well structure, wherein the first color conversion layer, the second color conversion layer, and the third color conversion layer comprise a nitride-based semiconductor material.

6. In Paragraph 5, Each of the first color conversion layer, the second color conversion layer, and the third color conversion layer comprises quantum well layers containing indium, and A display device in which the indium content of the quantum well layers of the first color conversion layer, the indium content of the quantum well layers of the second color conversion layer, and the indium content of the quantum well layers of the third color conversion layer are different.

7. In Paragraph 1, The above light-emitting element layer is, First reflective layers disposed between the first electrodes and the light-emitting elements and covering the lower surface of each of the light-emitting elements; and A display device comprising second reflective layers disposed on the light-emitting elements and covering the upper surface of each of the light-emitting elements.

8. In Paragraph 7, A display device in which the reflectance of the first reflective layers is higher than the reflectance of the second reflective layers.

9. In Paragraph 7, A display device comprising the first reflective layers including a conductive material.

10. In Paragraph 7, A display device comprising, wherein each of the above second reflective layers includes first layers and second layers that are alternately stacked to form a dispersed Bragg reflector.

11. In Paragraph 10, A second layer containing an oxide is disposed on the uppermost portion of each of the above second reflective layers, and The first oxide layer is formed at the same height as the second reflective layers to expose the upper surface of the second reflective layers, and The second oxide layer is a display device bonded to the first oxide layer and the second reflective layers.

12. In Paragraph 7, A display device in which the first oxide layer covers the upper surface of the second reflective layers.

13. In Paragraph 7, A display device wherein the light-emitting element layer further comprises second electrodes disposed between the light-emitting elements and the second reflective layers.

14. In Paragraph 7, A display device in which the distance between the first reflective layers and the second reflective layers is N (N is a natural number) times the emission wavelength of the light-emitting elements.

15. In Paragraph 1, A display device wherein the light conversion layer further comprises third reflective layers surrounding the sides of the color conversion layers.

16. In Paragraph 1, A display device comprising color filters and lenses disposed on the light conversion layer and covering the color conversion layers.

17. In Paragraph 1, A display device in which the first oxide layer and the second oxide layer comprise SiO2 or Al2O3.

18. A step of forming a display substrate comprising a backplane substrate and a light-emitting element layer, and a first oxide layer covering the light-emitting elements of the light-emitting element layer; A step of forming a light conversion layer including color conversion layers and a second oxide layer covering the color conversion layers; and A method for manufacturing a display device comprising the step of arranging the display substrate and the light conversion layer facing each other, and bonding the first oxide layer and the second oxide layer to combine the display substrate and the light conversion layer.

19. In Paragraph 18, The step of forming the above-mentioned light conversion layer is, A step of sequentially forming a first color conversion layer, a second color conversion layer, and a third color conversion layer by epitaxial growth on different regions of a manufacturing substrate; A step of forming a reflective layer on the side of the first color conversion layer, the second color conversion layer, and the third color conversion layer; and A method for manufacturing a display device comprising the step of forming the second oxide layer to cover the first color conversion layer, the second color conversion layer, the third color conversion layer, and the reflective layer.

20. Includes a display device including a display panel, The above display panel is, Backplane substrate; A light-emitting element layer comprising first electrodes disposed on the backplane substrate, light-emitting elements disposed on the first electrodes, and a first oxide layer covering the light-emitting elements; and A light conversion layer comprising color conversion layers disposed on the light-emitting element layer and overlapping with the light-emitting elements, and a second oxide layer covering the lower surface of the color conversion layers, An electronic device in which the first oxide layer and the second oxide layer are bonded.

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