Foldable circuit board, display module and display apparatus

Abstract

A foldable circuit board, comprising a connecting body and two mating ports. The two mating ports are connected to two ends of the connecting body in the extension direction thereof; the connecting body comprises a first side edge, the extension direction of the first side edge being consistent with the extension direction of the connecting body; when the connecting body is in a folded state, the two mating ports are located on one side of the first side edge; the connecting body comprises a folding part and a flat part other than the folding part; the folding part comprises a first crease part, a second crease part and a folding sub-part; the first crease part comprises two first creases and a first crease sub-part; the extension direction of the two first creases intersects the extension direction of a plurality of connection lines at the position of the first crease part; an included angle between the first crease sub-part and the flat part is a first included angle; the second crease part is the same as the first crease part; the folding sub-part is located between the first crease part and the second crease part; the folding sub-part protrudes with respect to the flat part, an included angle between a plane where the folding sub-part is located and a plane where the flat part is located being less than or equal to a preset angle.

Description

Foldable circuit boards, display modules and display devices Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a foldable circuit board, display module and display device. Background Technology

[0002] With the continuous development of the PCB connector industry, flexible PCBs are becoming increasingly popular.

[0003] Flexible printed circuit boards (FPCBs) are a crucial component in display devices, serving to connect and conduct electronic components. Besides their excellent electrical properties, FPCBs are also rollable, foldable, and bendable, enabling them to be installed in miniaturized and high-density spaces.

[0004] Summary of the Invention

[0005] On one hand, a foldable circuit board is provided, including a connecting body and two plug-in ports; the connecting body is provided with multiple connecting lines and is configured to be foldable; in the unfolded state, the two plug-in ports are respectively connected to both ends of the extending direction of the connecting body, and the two plug-in ports are connected by the multiple connecting lines; the connecting body includes a first side, and the extending direction of the first side is consistent with the extending direction of the connecting body; in the folded state, the two plug-in ports are located on the side of the first side away from the connecting body; the connecting body also includes at least one folding portion and a flat portion other than at least one folding portion, the folding portion including a first crease portion, a second crease portion, and a folding sub-port; the first crease portion includes The second crease includes two first creases and a first crease sub-section located between the two first creases; the extension directions of the two first creases intersect the extension directions of multiple connecting lines at the location of the first crease sub-section, and the angle between the first crease sub-section and the flat section is a first angle; the second crease includes two second creases and a second crease sub-section located between the two second creases; the extension directions of the two second creases intersect the extension directions of multiple connecting lines at the location of the second crease sub-section, and the angle between the second crease sub-section and the flat section is a second angle; the folded sub-section is located between the first crease and the second crease, the folded sub-section protrudes relative to the flat section, and the angle between the plane of the folded sub-section and the plane of the flat section is less than or equal to a preset angle.

[0006] In some embodiments, the extension directions of the two first creases of the first crease portion are perpendicular to the extension directions of the plurality of connecting lines at the location of the first crease portion; the extension directions of the two second creases of the second crease portion are perpendicular to the extension directions of the plurality of connecting lines at the location of the second crease portion.

[0007] In some embodiments, the folded portion is parallel to the flat portion.

[0008] In some embodiments, the first included angle ranges from 20° to 80°; the second included angle ranges from 20° to 80°; and the preset angle ranges from 0° to 20°.

[0009] In some embodiments, the second included angle and the first included angle are equal, and the widths of the first crease portion and the second crease portion are equal.

[0010] In some embodiments, when the connection body is in a folded state, the connection body includes a first region located between two plug ports; at least one fold is located in the first region.

[0011] In some embodiments, when the connecting body is in a folded state, the connecting body further includes at least one second region, the second region being adjacent to a plug-in port, and the second region and the plug-in port being located on one side of the first side of the connecting body; at least one fold is located in the second region.

[0012] In some embodiments, when the connecting body is in a folded state, the connecting body includes a first region, at least one second region, and other regions besides the first region and at least one second region; the first region is located between two plug ports; a second region is adjacent to a plug port, and the second region and the plug port are located on one side of the first side of the connecting body; when the first region is not provided with a fold, the connecting body includes at least one third crease extending along a first direction, the at least one third crease penetrating the first region and other regions; the connecting body is folded along the at least one third crease; the first direction is the extension direction of multiple connecting lines in the first region.

[0013] In some embodiments, a slit is provided on the portion of the connecting body where at least one third crease is located in the first region.

[0014] In some embodiments, a slit is provided on the portion of the connecting body where at least one third crease is located in the first region; the slit divides the portion of the connecting body located in the first region into strips of equal width, the width of which is the dimension on the connecting body in a direction perpendicular to the first direction.

[0015] In some embodiments, the connection body includes a conductive connection layer and an insulating protective layer covering the conductive connection layer. The conductive connection layer is used to provide multiple connection lines, and the insulating protective layer is a soft film material.

[0016] In some embodiments, the foldable circuit board is a flexible flat cable connector.

[0017] In some embodiments, a shielding protective layer is provided on the surface of the connecting body.

[0018] In some embodiments, the shielding protective layer is an aluminum foil Mylar composite material.

[0019] On the other hand, a display module is provided, including a display panel and a plurality of sub-circuit boards; the display panel includes at least one side, the at least one side includes a bonding side, the display panel includes a bonding area near the bonding side, and the bonding area is connected to a plurality of connectors; a sub-circuit board is connected to at least one connector; among the plurality of sub-circuit boards, at least two adjacent sub-circuit boards are connected by a foldable circuit board as described above.

[0020] In some embodiments, when the foldable circuit board is inserted into the side of two adjacent sub-circuit boards away from the display panel, the two adjacent sub-circuit boards are connected by the foldable circuit board as described in any of the above embodiments; or, when the foldable circuit board is inserted into the side of two adjacent sub-circuit boards near the display panel, the two adjacent sub-circuit boards are connected by the foldable circuit board having at least one third fold.

[0021] In some embodiments, the display module further includes a control circuit board, at least one of the plurality of sub-circuit boards being connected to the control circuit board; at least one sub-circuit board is provided with at least one gear level adjuster, the gear level adjuster being configured to form a plurality of different gear levels, and one gear level adjuster being connected to a connector; the sub-circuit board is also provided with at least one microcontroller, the first terminal of each microcontroller being connected to the control circuit board; the microcontroller is configured to output a gear level control signal according to the strength of an input signal, thereby controlling the gear level adjuster to form a plurality of different gear levels; when the sub-circuit board is provided with one microcontroller, the second terminal of the microcontroller is connected to each gear level adjuster; when the sub-circuit board is provided with multiple gear level adjusters and multiple microcontrollers, the second terminal of one microcontroller is connected to one gear level adjuster.

[0022] In some embodiments, the gear position adjuster includes multiple gear position sub-adjusters, each gear position sub-adjuster having a first end, a second end, and a third end. The third ends of the multiple gear position sub-adjusters are respectively connected to the second end of the microcontroller. A first resistor is provided between the first end and the third end, and a second resistor is provided between the second end and the third end. The multiple gear position sub-adjusters are configured to combine with each other to form multiple different gears.

[0023] In some embodiments, the display module further includes a control circuit board and a timing control chip. The timing control chip is connected between multiple sub-circuit boards and the control circuit board, or the timing control chip is disposed on the control circuit board. The control circuit board is also provided with a step-down circuit chip. Each sub-circuit board is provided with at least one analog switch. The first terminal of each analog switch is connected to the step-down circuit chip, which is configured to provide a Vterm voltage. The second terminal of an analog switch is connected to a connector, which is configured to feed back the number of signal anomalies to the timing control chip. The third terminal of each analog switch is connected to the timing control chip, which is configured to store configuration data applicable to low-voltage differential signal mode and current mode logic mode, record and store the number of signal anomalies fed back by the connector, and output a mode control signal according to the number of signal anomalies to control the analog switches to close or open.

[0024] In some embodiments, the analog switch includes a first transistor and a second transistor connected in parallel, the first terminals of the first transistor and the second transistor are both connected to a step-down circuit chip; the second terminals of the first transistor and the second transistor are both connected to a connector; and the third terminals of the first transistor and the second transistor are both connected to a timing control chip.

[0025] In some embodiments, the first transistor is an N-type transistor and the second transistor is a P-type transistor; the third terminal of the second transistor is connected to the timing control chip via a NOT gate circuit.

[0026] In some embodiments, the timing control chip further includes multiple common-mode range modules. Each common-mode range module includes a range voltage generator and N transistors connected in series. The first transistor is connected to the range voltage generator, and the last transistor is connected to the output terminal of the timing control chip. The timing control chip also includes N control pins. The control stages of the N transistors in each common-mode range module are respectively connected to the N control pins. The control pins are configured to provide common-mode control signals. The connector is configured to feed back the number of signal anomalies to the timing control chip. The timing control chip is also configured to traverse the multiple common-mode range modules upon power-on, record and store the number of signal anomalies fed back by the connector under each common-mode range module, and locate the appropriate common-mode range module based on the number of signal anomalies.

[0027] In some embodiments, the N transistors include a plurality of N-type transistors and / or a plurality of P-type transistors.

[0028] On the other hand, a display device is provided, including the display module as described above. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0030] Figure 1 is a structural diagram of an FPC according to some embodiments;

[0031] Figure 2 is a structural diagram of an FFC according to some embodiments;

[0032] Figure 3 is a cross-sectional view along section line AA in Figure 2;

[0033] Figure 4 is a structural diagram of a foldable circuit board in a flat state according to some embodiments;

[0034] Figure 5 is a structural diagram of a foldable circuit board in a folded state according to some embodiments;

[0035] Figure 6 is a cross-sectional view along section line AA in Figure 5;

[0036] Figure 7 is a structural diagram of a foldable circuit board in another folded state according to some embodiments;

[0037] Figure 8 is a structural diagram of a foldable circuit board in another folded state according to some embodiments;

[0038] Figure 9 is a structural diagram of a foldable circuit board in another folded state according to some embodiments;

[0039] Figure 10 is a structural diagram of a foldable circuit board in another folded state according to some embodiments;

[0040] Figure 11 is a cross-sectional view along section line BB in Figure 10;

[0041] Figure 12 is a perspective view of a foldable circuit board in another folded state according to some embodiments;

[0042] Figure 13A is a structural diagram of a foldable circuit board in another folded state according to some embodiments;

[0043] Figure 13B is a structural diagram of a foldable circuit board in another folded state according to some embodiments;

[0044] Figure 14 is a structural diagram of a display module according to some embodiments;

[0045] Figure 15 is a structural diagram of another display module according to some embodiments;

[0046] Figure 16 is a structural diagram of another display module according to some embodiments;

[0047] Figure 17 is a structural diagram of another display module according to some embodiments;

[0048] Figure 18 is a structural diagram of another display module according to some embodiments;

[0049] Figure 19 is a structural diagram of an EQ gear according to some embodiments;

[0050] Figure 20 is a structural diagram of another display module according to some embodiments;

[0051] Figure 21 is a structural diagram of another display module according to some embodiments;

[0052] Figure 22 is a structural diagram of another display module according to some embodiments;

[0053] Figure 23 is a structural diagram of an analog switch according to some embodiments;

[0054] Figure 24 is a structural diagram of another analog switch according to some embodiments;

[0055] Figure 25 is a flowchart of automatic optimization of LVDS mode and CML mode according to some embodiments;

[0056] Figure 26 is a structural diagram of a common mode gear module according to some embodiments;

[0057] Figure 27 is a flowchart of an automatic VCM optimization according to some embodiments;

[0058] Figure 28 is a structural diagram of a display device according to some embodiments. Detailed Implementation

[0059] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0060] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0061] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0062] In describing some embodiments, the term "connection" and its derivative expressions may be used. For example, the term "connection" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0063] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0064] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0065] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0066] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0067] Flexible circuit boards can be, for example, flexible printed circuit (FPC) connectors or flexible flat cable (FFC) connectors.

[0068] FPCs can be classified into single-sided FPCs, double-sided FPCs, and multi-layer FPCs, as shown in Figure 1. An FPC includes two plug-in ports 102' and a connecting body 101'. In some examples, the two plug-in ports 102' are connected to the same side of the connecting body 101'. The FPC is created by etching a flexible copper clad laminate (FCCL) using an etching process, such as chemical etching, to obtain connecting lines 103' with different circuit patterns, thereby connecting the two plug-in ports 102' through the connecting lines 103'. The connecting lines 103' of the FPC are formed in one piece. The circuit pattern and size of the connecting lines 103' can be designed according to the connection space layout of the electronic components in the display device. Typically, the shape of the FPC is fixed; that is, after designing its shape according to the connection space layout of the electronic components in the display device, the FPC is manufactured according to this shape and assembled onto the electronic device in the designed shape. Throughout the entire process of manufacturing and assembling the electronic device, the shape of the FPC remains fixed and can be directly applied to the production line for assembling display devices.

[0069] As shown in Figures 2 and 3, the FFC includes two insulating protective layers 1 on the top and bottom and a conductive connection layer 2 in the middle. For example, the conductive connection layer 2 is sandwiched between insulating films. The conductive connection layer 2 is, for example, a flat copper foil, with a simpler structure and a thicker thickness compared to the FPC. The FFC also includes two plug-in ports 102 and a connecting body 101. However, the connecting lines 103 of the FFC are parallel lines. In order to meet the connection space layout of electronic components in the display device and to facilitate the connection of electronic components, the FFC can be folded into a certain shape to meet the connection requirements of electronic components. However, the current folding scheme has problems such as difficulty in controlling dimensional tolerances and poor flatness of the folded FFC. The size and flatness of the folded FFC fluctuate greatly, which can cause the machine to fail to recognize the label or fail to plug in during mass production of display devices, resulting in frequent production line downtime and affecting mass production efficiency and product quality.

[0070] For example, during the assembly of display devices, it was found that when the length of the folded FFC is short, it is difficult to connect the plug-in ports 102 at both ends to the electronic components. For instance, if the distance between the electronic components to be connected is greater than the distance between the plug-in ports at both ends of the FFC, the relative displacement of the plug-in ports at both ends of the FFC will stretch the FFC in order to connect the electronic components, which can easily cause local breakage or damage to the FFC and affect the normal display of the display device. When the length of the folded FFC is long, after the plug-in ports 102 at both ends are connected to the electronic components, the electronic components are easily warped by the reverse stress of the FFC, which can also affect the normal display of the display device. Furthermore, the FFC itself is also relatively easy to warp under stress, affecting the flatness of the FFC. Moreover, in the current folding scheme, after folding the FFC, the height and rigidity of the FFC increase, which can easily cause the electronic components to warp after connection, failing to meet the production requirements of the display device assembly line and leading to frequent production line downtime.

[0071] In some embodiments of this disclosure, as shown in Figures 4 and 5, a foldable circuit board 100 is provided, including a connecting body 101 and two plug-in ports 102; the connecting body 101 is provided with multiple connecting lines 103, and the connecting body 101 is configured to be foldable.

[0072] As shown in Figure 4, when the connecting body 101 is in the unfolded state, two plug-in ports 102 are respectively connected to the two ends of the extension direction X of the connecting body 101, and the two plug-in ports 102 are connected by multiple connecting lines 103; the connecting body 101 includes a first side 101-1, and the extension direction of the first side 101-1 is consistent with the extension direction X of the connecting body 101.

[0073] As shown in Figures 5 and 6, when the connecting body 101 is in a folded state, the two plug-in ports 102 are located on the side of the first side 101-1 away from the connecting body 101. It can be understood that the connecting body 101 is folded at the position close to the two plug-in ports 102 respectively, and after folding, the two plug-in ports 102 are located on the side of the first side 101-1 away from the connecting body 101. At this time, there is a crease 101-2 at each of the two folded positions, and the crease 101-2 intersects the extension direction X of the connecting body 101.

[0074] As shown in Figures 5 and 6, the connecting body 101 also includes at least one folded portion 10 and a flat portion 20 other than the at least one folded portion 10. The folded portion 10 includes a first crease portion 11, a second crease portion 12, and a fold sub-portion 13. The first crease portion 11 includes two first creases 11-1 and a first crease sub-portion 11-2 located between the two first creases 11-1. The extending directions of the two first creases 11-1 intersect the extending directions of the multiple connecting lines 103 at the location of the first crease portion 11. The included angle between the first crease sub-portion 11-2 and the flat portion 20 is a first included angle α1. The second crease portion 12 includes two second creases 12-1 and a second crease sub-portion 12-2 located between the two second creases 12-1; the extension direction of the two second creases 12-1 intersects the extension direction of the multiple connecting lines 103 at the location of the second crease portion 12, and the included angle between the second crease sub-portion 12-2 and the flat portion 20 is a second included angle a2; the folded sub-portion 13 is located between the first crease portion 11 and the second crease portion 12, the folded sub-portion 13 protrudes relative to the flat portion 20, and the included angle between the plane of the folded sub-portion 13 and the plane of the flat portion 20 is less than or equal to a preset angle.

[0075] For example, the foldable circuit board 100 can be an FFC, or a flexible circuit board that needs to be folded as required. This disclosure does not limit it. This disclosure uses FFC as an example to illustrate the foldable circuit board 100.

[0076] For example, as shown in Figures 3 and 4, the foldable circuit board 100 (e.g., FFC) includes two insulating protective layers 1, such as insulating films with a conductive connection layer 2 sandwiched in between, such as flat copper foil, and the two insulating protective layers 1 cover the conductive connection layer 2; the material of the insulating protective layer 1 can be, for example, polyethylene (PE), a thermoplastic resin material, used to insulate and protect the conductive connection layer 2; the foldable circuit board 100 (e.g., FFC) includes a connecting body 101 and two plug-in ports 102, the connecting body 101 is provided with multiple connecting lines 103, the two plug-in ports 102 are connected by the multiple connecting lines 103, and the two plug-in ports 102 are respectively plugged into two electronic components in the display device that need to be connected. A reinforcing plate 3 is provided at the plug-in port 102 to reinforce the plug-in port 102 and facilitate the plugging by operators. The material of the reinforcing plate 3 can be, for example, polyethylene terephthalate (PET). Polyethylene terephthalate is a thermoplastic polyester material with good mechanical properties, such as creep resistance, fatigue resistance, and abrasion resistance.

[0077] For example, as shown in FIG4, when the connection body 101 of the foldable circuit board 100 (e.g., FFC) is in the unfolded state, the connection body 101 extends in a certain direction, and two plug-in ports 102 are respectively connected to the two ends of the extension direction X of the connection body 101. The two plug-in ports 102 are connected by multiple connecting lines 103, that is, the extension direction of the multiple connecting lines 103 is consistent with the extension direction X of the connection body 101.

[0078] For example, in order to meet the connection space layout of electronic components in the display device and to more conveniently realize the connection of electronic components, as shown in FIG5, when the connection body 101 of the foldable circuit board 100 is in the folded state, the two plug-in ports 102 are located on the side of the first side 101-1 away from the connection body 101, that is, the two plug-in ports 102 are located on the same side of the first side 101-1, which facilitates the connection of two electronic components.

[0079] Specifically, as shown in Figures 4 and 5, on the unfolded foldable circuit board 100, the portions near the two plug-in ports 102 are folded towards the first side 101-1, so that the two plug-in ports 102 are folded to one side of the first side 101-1.

[0080] As exemplarily shown in Figures 5 and 6, the connection body 101 further includes one or more folded portions 10 and a flat portion 20 other than the one or more folded portions 10, wherein the one or more folded portions 10 protrude upwards relative to the flat portion 20. The folded portions 10 are used to adjust the distance d1 between the two plug-in ports 102 when the connection body 101 of the foldable circuit board 100 is in a folded state.

[0081] For example, as shown in Figures 5 and 6, the folding portion 10 includes a first crease portion 11, a second crease portion 12, and a folding sub-portion 13, with the portion between the first crease portion 11 and the second crease portion 12 being the folding sub-portion 13.

[0082] For example, as shown in Figures 5 and 6, the first crease portion 11 includes two first creases 11-1 and a first crease sub-portion 11-2 located between the two first creases 11-1; the two first creases 11-1 include a first valley crease 11-11 and a first mountain crease 11-12, the first valley crease 11-11 connecting the first crease sub-portion 11-2 and the flat portion 20, and the first valley crease 11-11 and the flat portion 20 are located on the same plane; the first mountain crease 11-12 connecting the first crease sub-portion 11-2 and the folded portion 13, and the first mountain crease 11-12 is located above the flat portion 20; thus, a first included angle a1 is formed between the first crease sub-portion 11-2 and the flat portion 20, and the angle of the first included angle a1 is adjustable.

[0083] For example, as shown in Figures 5 and 6, the second crease portion 12 includes two second creases 12-1 and a second crease sub-portion 12-2 located between the two second creases 12-1; the two second creases 12-1 include a second valley crease 12-11 and a second mountain crease 12-12, the second valley crease 12-11 connecting the second crease sub-portion 12-2 and the flat portion 20, and the second valley crease 12-11 and the flat portion 20 are located on the same plane; the second mountain crease 12-12 connecting the second crease sub-portion 12-2 and the folded portion 13, the second mountain crease 12-12 being located above the flat portion 20; this forms a second included angle a2 between the second crease sub-portion 12-2 and the flat portion 20, and the angle of the second included angle a2 is adjustable.

[0084] It is understood that the first valley fold 11-11 and the first mountain fold 11-12 of the first fold portion 11 may be parallel or not parallel; the second valley fold 12-11 and the second mountain fold 12-12 of the second fold portion 12 may be parallel or not parallel; the first fold portion 11 and the second fold portion 12 may be parallel or not parallel to each other; the folding can be done according to the actual situation, and this disclosure does not limit it.

[0085] For example, as shown in Figures 5 and 6, since the folded part 13 is located between the first fold part 11 and the second fold part 12, and is connected to the first mountain fold 11-12 and the second mountain fold 12-12 respectively, and the first mountain fold 11-12 of the first fold part 11 and the second mountain fold 12-12 of the second fold part 12 are both located above the flat part 20, the folded part 13 protrudes relative to the flat part 20. The surface of the folded part 13 is a flat plane. By adjusting the angles of the first included angle a1 and the second included angle a2, the angle between the plane containing the surface of the folded part 13 and the plane containing the flat part 20 will change. To ensure the overall flatness of the foldable circuit board 100, the angle between the plane containing the folded part 13 and the plane containing the flat part 20 needs to be less than or equal to a preset angle. That is, the folded part 13 should be approximately parallel to the flat part 20, and should not be tilted too much to avoid causing the production line machine to malfunction. The preset angle is set according to the production line machine's requirement for 100% flatness of the foldable circuit board. The preset angle can be, for example, 0° to 20°, such as 0°, 1°, 2°, 3°, 4°, 5°, 6°, 7°, 8°, 9°, 10°, 11°, 12°, 13°, 14°, 15°, 16°, 17°, 18°, 19°, and 20°.

[0086] For example, as shown in Figures 5 and 6, by folding the two plug-in ports 102 of the foldable circuit board 100 to the side of the first side 101-1 away from the connecting body 101, and by providing a folding part 10 on the foldable circuit board 100, the connection space layout of electronic components in the display device can be satisfied, and the connection of electronic components can be realized more conveniently. Furthermore, due to the provision of the folding part 10, the foldable circuit board 100 is telescopic. For example, by pulling outward or pushing inward the flat parts 20 located on both sides of the folding part 10, the angles of the first included angle a1 and the second included angle a2 of the folding part 10 change, and the distance d2 between the first valley fold 11-11 and the second valley fold 12-11 of the folding part 10 changes, so that the distance d1 between the two plug-in ports 102 of the folded foldable circuit board 100 can be adjusted.

[0087] For example, when the flat sections 20 located on both sides of the folding section 10 are pushed inward, the angles of the first included angle a1 and the second included angle a2 become smaller, the distance d2 between the first valley fold 11-11 and the second valley fold 12-11 of the folding section 10 becomes smaller, and the distance d1 between the two plug-in ports 102 becomes smaller; when the flat sections 20 located on both sides of the folding section 10 are pulled outward, the angles of the first included angle a1 and the second included angle a2 become larger, the distance d2 between the first valley fold 11-11 and the second valley fold 12-11 of the folding section 10 becomes larger, and the distance d1 between the two plug-in ports 102 becomes larger. This allows the distance between the two plug-in ports 102 to be adjusted according to the actual distance between the electronic components in the display device. The distance between the two plug-in ports 102 has a certain amount of flexibility, which can meet the distance dimensional tolerance between the electronic components in the display device.

[0088] Meanwhile, the foldable circuit board 100 can be simply folded a few times, and the hardness of the folded foldable circuit board 100 is not much different from that of the unfolded foldable circuit board 100. It is relatively soft, so that the electronic components connected by the foldable circuit board 100 and the foldable circuit board 100 itself are not easy to warp. Although the folding sub-part 13 protrudes relative to the flat part 20, the surface of the folding sub-part 13 is a flat plane. The folded foldable circuit board 100 is relatively flat overall, so that the folded foldable circuit board 100 meets the production requirements of the assembly line for display equipment, ensures the normal operation of the production line, and improves production efficiency and product quality.

[0089] In some embodiments, as shown in Figures 8 and 10, when the connecting body 101 is in a folded state, the connecting body 101 includes a first region M1 and at least one second region M2, for example, two second regions M2. The first region M1 is located between two plug-in ports 102; one second region M2 is close to one plug-in port 102, and the second region M2 and the plug-in port 102 are located on one side of the first side 101-1 of the connecting body 101. At least one folding portion 10 is located in the first region M1, and / or at least one folding portion 10 is located in the second region M2.

[0090] For example, as shown in Figure 8, there is one folded part 10 located in the first region M1, and no folded part 10 is provided in either of the two second regions M2; for another example, there is one folded part 10 located in the first region M1, and one folded part 10 located in one of the second regions M2; for yet another example, as shown in Figure 5, there is one folded part 10 located in the first region M1, and two folded parts 10 located in the two second regions M2 respectively; for yet another example, no folded part 10 is provided in the first region M1, and one folded part 10 is located in one of the second regions M2; for yet another example, as shown in Figure 10, no folded part 10 is provided in the first region M1, and two folded parts 10 are located in the two second regions M2 respectively.

[0091] It is understood that the first region M1 or the second region M2 may also be provided with multiple folds 10, and this disclosure does not limit this.

[0092] In some embodiments, as shown in Figures 5, 8, and 10, the extension directions of the two first creases 11-1 of the first crease portion 11 are perpendicular to the extension directions of the plurality of connecting lines 103 at the location of the first crease portion 11; the extension directions of the two second creases 12-1 of the second crease portion 12 are perpendicular to the extension directions of the plurality of connecting lines 103 at the location of the second crease portion 12.

[0093] For example, as shown in FIG4, the multiple connecting lines 103 of the foldable circuit board 100 (e.g., FFC) are parallel lines, and the two plug-in ports 102 are connected by the multiple connecting lines 103. That is, in the unfolded state, the extension direction of the multiple connecting lines 103 is the direction of the relative position of the two plug-in ports 102. In other words, the extension direction of the multiple connecting lines 103 is consistent with the extension direction X of the connecting body 101. However, in the folded state, as shown in Figures 5, 8, and 10, the two plug-in ports 102 are folded to the side of the first side 101-1 of the connecting body 101 away from the connecting body 101. At this time, the extension direction of the multiple connecting lines 103 located in the first region M1 remains unchanged, that is, the extension direction of the multiple connecting lines 103 located in the first region M1 is consistent with the extension direction X of the connecting body 101. However, since the two plug-in ports 102 are folded to the side of the first side 101-1 of the connecting body 101 away from the connecting body 101, the extension direction of the multiple connecting lines 103 in the second region M2 near the plug-in ports 102 also changes accordingly. For example, the extension direction Y of the multiple connecting lines 103 in the second region M2 is perpendicular to the extension direction X of the multiple connecting lines 103 in the first region M1, that is, the extension direction Y of the multiple connecting lines 103 in the second region M2 is perpendicular to the extension direction X of the connecting body 101.

[0094] For example, as shown in Figures 5 and 8, for at least one folded portion 10 located in the first region M1, the extension direction of the two first folds 11-1 of the first fold portion 11 is perpendicular to the extension direction of the multiple connecting lines 103 at the location of the first fold portion 11, that is, the extension direction of the two first folds 11-1 of the first fold portion 11 is perpendicular to the extension direction X of the connecting body 101; the extension direction of the two second folds 12-1 of the second fold portion 12 is perpendicular to the extension direction of the multiple connecting lines 103 at the location of the second fold portion 12, that is, the extension direction of the two second folds 12-1 of the second fold portion 12 is perpendicular to the extension direction X of the connecting body 101.

[0095] For example, as shown in Figures 5 and 10, for at least one folded portion 10 located in the second region M2, the extension direction of the two first folds 11-1 of the first fold portion 11 is perpendicular to the extension direction Y of the multiple connecting lines 103 at the location of the first fold portion 11, that is, the extension direction of the two first folds 11-1 of the first fold portion 11 is parallel to the extension direction X of the connecting body 101; the extension direction of the two second folds 12-1 of the second fold portion 12 is perpendicular to the extension direction Y of the multiple connecting lines 103 at the location of the second fold portion 12, that is, the extension direction of the two second folds 12-1 of the second fold portion 12 is parallel to the extension direction X of the connecting body 101.

[0096] In some embodiments, as shown in FIG4, the dimension of the foldable circuit board 100 in the extension direction X of the connecting body 101 is the length TL of the foldable circuit board 100, and the dimension of the foldable circuit board 100 in the extension direction X perpendicular to the connecting body 101 is the width W of the foldable circuit board 100. When the connecting body 101 is in the unfolded state, the length TL of the foldable circuit board 100 can be, for example, 145mm, and the width W can be, for example, 39mm. The following describes the folded dimensions using a foldable circuit board 100 with a length TL of 145mm and a width W of 39mm as an example.

[0097] For example, on the foldable circuit board 100 in the unfolded state, two plug-in ports 102 are folded to one side of the first side 101-1. As shown in FIG7, FIG7 shows a folding part 10 provided in the first region M1 of the connecting body 101. The folding part 10 is shown in the unfolded state. The distance D from the side of the two plug-in ports 102 away from the first side 101-1 to the first side 101-1 can be, for example, 6mm. In this case, the length TL1 of the foldable circuit board 100 is TL-D×2, that is, TL1=145mm-6mm×2=133mm. For example, there is a dimensional tolerance during the folding process. Therefore, the length TL1 of the foldable circuit board 100 can be, for example, 132.9mm; the width W remains unchanged, for example, 39mm. In this case, the length TL1-1 of the first region M1 of the connecting body 101 is TL1-W×2, that is, TL1-1=132.9mm-39mm×2=54.9mm.

[0098] For example, as shown in FIG8 and referring to FIG6, based on FIG7, after folding the folding part 10, the length TL2 of the foldable circuit board 100 after folding can be, for example, 123.9 mm. The length TL2 of the foldable circuit board 100 after folding can be changed by adjusting the angles of the first included angle a1 and the second included angle a2.

[0099] Specifically, as shown in Figure 8 and referring to Figure 6, for example, the folding portion 10 is disposed in the middle of the first region M1 of the connecting body 101; the distance from the first valley fold 11-11 to the edge of the foldable circuit board 100 in the extending direction X of the connecting body 101 after folding is L1; the width of the first fold sub-portion 11-2 is L2; ​​the angle of the first included angle α1 is α; the width of the second fold sub-portion 12-2 is equal to the width of the first fold sub-portion 11-2; the angle of the second included angle α2 is equal to the angle of the first included angle α1; the dimension of the folding sub-portion 13 in the extending direction X of the connecting body 101 is L3; TL2 = 2 × L1 + L3 - 2 × L2 × cosα. For example, L1 = 39 mm, L2 = 2 mm, L3 = 48.7 mm, α = 45°, TL2 = 2 * 39 mm + 48.7 mm - 2 × 2 × cos45° ≈ 123.9 mm. The angles of the first included angle a1 and the second included angle a2 are different, and the length TL2 of the foldable circuit board 100 after folding is also different. It can be understood that when the folding part 10 is in the fully unfolded state, that is, α=180°, the length TL2 of the foldable circuit board 100 in Figure 8 is equal to the length TL1 of the foldable circuit board 100 in Figure 7.

[0100] As can be understood, as shown in Figure 8, the length TL2 of the foldable circuit board 100 changes after folding, and the distance d1 between the two plug-in ports 102 of the foldable circuit board 100 also changes. The length TL2 of the foldable circuit board 100 can be changed by adjusting the angles of the first included angle a1 and the second included angle a2. In other words, the distance d1 between the two plug-in ports 102 of the foldable circuit board 100 can be changed by adjusting the angles of the first included angle a1 and the second included angle a2.

[0101] In some other embodiments, as shown in FIG4, the dimension of the foldable circuit board 100 in the extension direction X of the connecting body 101 is the length TL of the foldable circuit board 100, and the dimension of the foldable circuit board 100 in the extension direction X perpendicular to the connecting body 101 is the width W of the foldable circuit board 100. When the connecting body 101 is in the unfolded state, the length TL of the foldable circuit board 100 can be, for example, 160 mm, and the width W can be, for example, 39 mm. The following describes the folded dimensions using a foldable circuit board 100 with a length TL of 160 mm and a width W of 39 mm as an example.

[0102] For example, on the foldable circuit board 100 in the unfolded state, two plug-in ports 102 are folded to one side of the first side 101-1. As shown in FIG9, FIG9 shows that a folding part 10 is provided in each of the two second regions M2 of the connecting body 101. The folding part 10 is shown in the unfolded state. The distance D from the side of the two plug-in ports 102 away from the first side 101-1 to the first side 101-1 can be, for example, 18mm. In this case, the length TL1 of the foldable circuit board 100 is TL-D×2, that is, TL1=160mm-18mm×2=124mm; the width W remains unchanged, for example, it can be 39mm.

[0103] For example, as shown in FIG10, based on FIG9, after folding the folding part 10, the length TL2 of the foldable circuit board 100 after folding is equal to TL1, for example, it can be 124mm. The length TL2 of the foldable circuit board 100 after folding can be changed by adjusting the angles of the first included angle a1 and the second included angle a2.

[0104] Specifically, as shown in Figure 10 and referring to Figure 11, for example, the dimension from the first valley fold 11-11 of the folded portion 10 to the first side 101-1 of the connecting body 101 is H1, the width of the first fold sub-part 11-2 is H2, the angle of the first included angle a1 is α, the dimension of the fold sub-part 13 in the direction perpendicular to the insertion port 102 is H3, the width of the second fold sub-part 12-2 is equal to the width of the first fold sub-part 11-2, the angle of the second included angle a2 is equal to the angle of the first included angle a1, the dimension from the second valley fold 12-11 of the folded portion 10 to the side of the insertion port 102 away from the first side 101-1 of the connecting body 101 is H4, and the distance B from the side of the insertion port 102 away from the first side 101-1 of the connecting body 101 after folding to the first side 101-1 is B = H1 + H4 + H3 - 2 × H2 × cosα. For example, H1 = 0mm, H2 = 3mm, H3 = 6mm, α = 60°, H4 = 6mm, B = 0mm + 6mm + 6mm - 2 × 3 × cos60° = 9mm. The angle of the first included angle a1 is different from the angle of the second included angle a2. After folding, the distance B from the edge of the first side 101-1 away from the connecting body 101 of the plug-in port 102 to the first side 101-1 is different, which makes the foldable circuit board 100 have a certain amount of expansion and contraction in the longitudinal direction after folding.

[0105] Furthermore, after the foldable circuit board 100 has a certain amount of expansion and contraction in the longitudinal direction, the adjustable range of the foldable circuit board 100 in the longitudinal direction increases. Since the angles of the first included angle a1 and the second included angle a2 can be adjusted, the angles of the first included angle a1 and the second included angle a2 of the folded part 10 in the first second region M2 can be adjusted so that the angle of the first included angle a1 of the folded part 10 in the first second region M2 closer to the second second region M2 is greater than the angle of the first included angle a1 of the folded part 10 away from the second second region M2; at the same time, the angle of the second included angle a2 of the folded part 10 in the first second region M2 closer to the second second region M2 is greater than the angle of the second included angle a2 of the folded part 10 away from the second second region M2.

[0106] The angles of the first included angle a1 and the second included angle a2 of the folded portion 10 in the second second region M2 can also be adjusted so that the angle of the first included angle a1 of the folded portion 10 in the second second region M2 closer to the first second region M2 is greater than the angle of the first included angle a1 of the folded portion 10 away from the first second region M2; at the same time, the angle of the second included angle a2 of the folded portion 10 in the second second region M2 closer to the first second region M2 is greater than the angle of the second included angle a2 of the folded portion 10 away from the first second region M2.

[0107] At this time, the length of the folded portion 10 in the first second region M2 closer to the second second region M2 is greater than the length of the folded portion 10 in the second second region M2 farther from the second second region M2; the length of the folded portion 10 in the second second region M2 closer to the first second region M2 is greater than the length of the folded portion 10 in the second second region M2 farther from the first second region M2; the two plug-in ports 102 move away from each other, which to some extent allows the distance d1 between the two plug-in ports 102 to change.

[0108] It should be noted that the above description of the dimensions of the foldable circuit board 100 is only the dimensions of the foldable circuit board 100 in some embodiments. Foldable circuit boards 100 with other dimensions can also be provided according to actual conditions. This disclosure does not limit this.

[0109] In some embodiments, to ensure that the distance between the two plug-in ports 102 of the foldable circuit board 100 after folding is adjustable and has a certain amount of extension, the angle range of the first included angle a1 can be set to 20° to 80°, for example, 25°, 30°, 35°, 40°, 45°, 50°, 55°, 60°, 65°, 70°, 75°; the angle range of the second included angle a2 can be set to 20° to 80°, for example, 25°, 30°, 35°, 40°, 45°, 50°, 55°, 60°, 65°, 70°, 75°; to ensure the flatness of the foldable circuit board 100 after folding, the range of the preset angle can be set to 0° to 20°, for example, 2°, 5°, 7°, 10°, 12°, 15°, 17°. When the preset angle is 0°, the folding sub-section 13 is parallel to the flat section 20, making the foldable circuit board 100 flatter after folding. This ensures that the foldable circuit board 100 meets the production requirements of the assembly line for display equipment, guarantees the normal operation of the production line, and improves production efficiency and product quality.

[0110] It is understood that the angle range of the first included angle a1, the angle range of the second included angle a2, and the range of the preset angle can be set according to the actual situation, and this disclosure does not limit them.

[0111] In some embodiments, the extension directions of the two first creases 11-1 of the first crease portion 11 are perpendicular to the extension directions of the plurality of connecting lines 103 at the location of the first crease portion 11; the extension directions of the two second creases 12-1 of the second crease portion 12 are perpendicular to the extension directions of the plurality of connecting lines 103 at the location of the second crease portion 12. The second included angle a2 and the first included angle a1 are equal, and the widths of the first crease sub-part 11-2 and the second crease sub-part 12-2 are equal. That is, the first crease portion 11 and the second crease portion 12 are mirror symmetrical, making the folded sub-part 13 parallel to the flattened part 20, thereby making the foldable circuit board 100 flatter after folding, so that the foldable circuit board 100 meets the production requirements of the assembly line for display devices, ensuring the normal operation of the production line, and improving production efficiency and product quality.

[0112] In some embodiments, as shown in Figures 10 and 12, when the connecting body 101 is in a folded state, the connecting body 101 also includes other regions M3 besides the first region M1 and at least one second region M2; when the first region M1 is not provided with a folding part 10, the connecting body 101 includes at least one third crease 30 extending along the first direction Z, and the at least one third crease 30 penetrates the first region M1 and other regions M3; the connecting body 101 is folded along the at least one third crease 30; the first direction Z is the extension direction of the plurality of connecting lines 103 in the first region M1.

[0113] For example, as shown in FIG10, the other area M3 is the area where a portion of the connecting body 101 and another portion of the connecting body 101 overlap after the two plug-in ports 102 are folded to one side of the first side 101-1.

[0114] For example, when a folding portion 10 is provided in at least one second region M2 and no folding portion 10 is provided in the first region M1, at least one third fold 30 can be provided in the first region M1 of the connecting body 101 and other regions M3. The third fold 30 runs through the first region M1 and other regions M3. Folding the connecting body 101 along at least one third fold 30 can reduce the size of the connecting body 101 in the direction perpendicular to the first direction Z, that is, reduce the width of the connecting body 101, so that the foldable circuit board 100 after folding is smaller and can meet the assembly of more different products.

[0115] For example, as shown in Figures 12 and 13A, and referring to Figure 10, two third folds 30 are provided in the first region M1 and other regions M3 of the connecting body 101. The two third folds 30 divide the first region M1 and other regions M3 into three equal parts in a direction perpendicular to the first direction Z. After the connecting body 101 is folded along the first third fold 30 and then folded along the second third fold 30, the width of the connecting body 101 becomes one-third of its original width.

[0116] For example, as shown in FIG13B and referring to FIG10, three third folds 30 can be provided in the first region M1 and other regions M3 of the connecting body 101. The three third folds 30 divide the first region M1 and other regions M3 into four equal parts perpendicular to the first direction Z. The connecting body 101 is folded along the first third fold 30, then folded along the second third fold 30, and then folded along the third third fold 30. Alternatively, the connecting body 101 is folded in half for the first time along the second third fold 30, and then folded in half a second time along the first and third third folds 30. At this time, the width of the connecting body 101 becomes one-quarter of its original width. It is understood that four third folds 30, five third folds 30, etc., can also be provided in the first region M1 and other regions M3 of the connecting body 101. The number of third folds 30 is not limited in this disclosure.

[0117] In some embodiments, as shown in Figures 12, 13A, and 13B, and referring to Figure 10, a slit 31 is provided on the portion of the connecting body 101 where at least one third fold 30 is located in the first region M1. The slit 31 is provided such that at least one third fold 30 is in a cut-off state. When the connecting body 101 is folded along at least one third fold 30, since at least one third fold 30 is in a cut-off state, after folding along the third fold 30, a portion of the connecting body 101 can be completely placed on top of another portion of the connecting body 101, and there is no connection at the third fold 30. The hardness at the third fold 30 is relatively low, and it is flatter.

[0118] For example, as shown in FIG13B and referring to FIG10, the slit 31 divides the portion of the connecting body 101 located in the first region M1 into several strips. For example, the slit 31 divides the portion of the connecting body 101 located in the first region M1 into strips of the same width, so that the several strips of the connecting body 101 can overlap completely in sequence. This not only reduces the rigidity of the connecting body 101 after folding, but also reduces the width of the foldable circuit board 100 by a larger range, so as to meet the assembly of more different products.

[0119] In some embodiments, as shown in FIG3, the connection body 101 includes a conductive connection layer 2 and an insulating protective layer 1 covering the conductive connection layer 2. The conductive connection layer 2 is used to provide multiple connection lines 103; the insulating protective layer 1 is a soft film material.

[0120] For example, the insulating protective layer 1 of the connecting body 101 of the foldable circuit board 100 is made of a soft film material, which increases the flexibility of the connecting body 101 of the foldable circuit board 100. This makes the foldable circuit board 100 less rigid and more flexible after it is folded, so that the electronic components connected by the foldable circuit board 100 and the foldable circuit board 100 itself are not easy to warp. At the same time, it increases the flatness of the foldable circuit board 100 to a certain extent, which can meet the assembly of more different products and prevent the machine from being unable to recognize the label or unable to plug in during mass production of display devices. This prevents the high incidence of production line downtime and ensures mass production efficiency and product quality.

[0121] In some embodiments, as shown in Figures 13A and 13B, a shielding protective layer 40, such as aluminum foil Mylar composite material, is provided on the surface of the connecting body 101.

[0122] For example, since the foldable circuit board 100 is folded, the signals of each overlapping layer after folding will have some interference. A shielding protective layer 40 can be provided on the surface of the connecting body 101. For example, aluminum foil Mylar composite material can effectively shield electromagnetic interference (EMI) and radio frequency interference (RFI), protecting the stability and accuracy of signal transmission. The shielding protective layer 40, such as aluminum foil Mylar composite material, can be set according to the actual situation. For example, a shielding protective layer 40, such as aluminum foil Mylar composite material, can be set for parts with strong signal interference, while a shielding protective layer 40, such as aluminum foil Mylar composite material, can be omitted for parts with relatively weak signal interference. At the same time, the shielding protective layer 40, such as aluminum foil Mylar composite material, can also be used as an adhesive to stick the parts of the foldable circuit board 100 that need to be fixed after folding, enhancing the overall integrity of the foldable circuit board 100 after folding.

[0123] In some embodiments, as shown in FIG13B, a double-sided adhesive 50 is provided on the connecting body 101. The double-sided adhesive 50 is used to stick the part of the connecting body 101 that needs to be fixed after folding, so that the foldable circuit board 100 is more secure and the folded part is not easy to unfold.

[0124] Currently, with the development of the display industry, the size of display panels is constantly increasing, and the refresh rate of display panels is constantly improving; however, the increase in display panel size and refresh rate will cause signal attenuation problems in display panels.

[0125] For example, as shown in Figure 14, in some embodiments, the display module 1000, such as a television display module, includes a display panel 200 and a plurality of sub-circuit boards 300. The display panel 200 includes at least one side 201, and the at least one side 201 includes a binding side 201-1. The binding side 201-1 is connected to a plurality of connectors 400. The size of the display panel 200 can be, for example, 65 inches. The display module 1000, such as a television display module, can include, for example, four sub-circuit boards 300 and a control circuit board 500. Each sub-circuit board 300 is connected to at least one connector 400, for example, three connectors 400. For example, the display panel 200 is divided into two parts, with the dividing line perpendicular to the binding side 201-1. The first part 1000-1 of the display panel 200 is connected to two sub-circuit boards 300, which are connected through an FPC. The second part 1000-2 of the display panel 200 is connected to two other sub-circuit boards 300, which are connected through another FPC. One of the sub-circuit boards 300 connected to the first part 1000-1 of the display panel 200 is connected to the control circuit board 500 through an FPC. The other sub-circuit board 300 connected to the second part 1000-2 of the display panel 200 is connected to the control circuit board 500 through an FPC.

[0126] For example, due to the technical characteristics of FPCs, such as impedance mismatch, electromagnetic interference, dielectric loss, conductor loss, and copper conductor roughness, signal attenuation can occur. Specifically, when a signal encounters impedance mismatch during transmission, it can cause signal reflection, affecting signal continuity and stability, and thus signal quality. The signal is also susceptible to external electromagnetic interference, leading to distortion. During signal transmission, trace resistance and dielectric loss cause signal attenuation, resulting in energy loss. The roughness of the copper conductor also affects signal transmission efficiency; the greater the roughness, the more significant the signal attenuation. These factors combined result in significant signal attenuation during FPC signal transmission. The impact of FPCs on signals is mainly reflected in its material properties, manufacturing process, and usage environment, such as the conductivity and insulation properties of the materials. Different materials exhibit different signal loss values ​​at specific frequencies. After the sub-circuit board 300 is connected via an FPC, the signal loss during transmission is significant, and the signal attenuation is severe. This solution can no longer meet the transmission requirements of the eye diagram.

[0127] It should be noted that the eye diagram is formed by superimposing the waveforms of each symbol obtained from scanning due to the persistence of the oscilloscope. The eye diagram contains rich information; the effects of inter-symbol interference and noise can be observed from it, reflecting the overall characteristics of the digital signal. Therefore, the quality of the system can be estimated, making eye diagram analysis the core of signal integrity analysis in high-speed interconnect systems. A wide, high-profile eye diagram indicates a better signal; a wide, flat eye diagram with a low-profile eye indicates a worse signal.

[0128] For example, the larger the size of the display panel 200 and the higher the refresh rate, the more display abnormalities the display panel 200 will have, such as eye diagram problems.

[0129] Therefore, some embodiments of this disclosure provide a display module 1000, as shown in Figures 15 and 16, including a display panel 200 and a plurality of sub-circuit boards 300; the display panel 200 includes at least one side 201, the at least one side 201 includes a binding side 201-1, the display panel 200 includes a binding area near the binding side 201-1, and the binding area is connected to a plurality of connectors 400; one sub-circuit board 300 is connected to at least one connector 400; among the plurality of sub-circuit boards 300, at least two adjacent sub-circuit boards 300 are connected by the foldable circuit board 100 as described above.

[0130] For example, the sub-circuit board 300 can be a PCBA (Printed Circuit Board Assembly), on which electronic components are assembled using processes such as SMT (Surface Mount Technology) or DIP (Dual In-line Package). A PCBA is a fully functional electronic module that implements specific electronic functions through the electronic components assembled on it. The sub-circuit board 300 can be, for example, an X-PCBA (X-Printed Circuit Board Assembly) or a Y-PCBA (Y-Printed Circuit Board Assembly). This disclosure uses an X-PCBA (X-Printed Circuit Board Assembly) as an example to illustrate the sub-circuit board 300.

[0131] For example, connector 400 can be COF (Chip On Flex, or Chip On Film). COF technology is an integrated circuit packaging technology that uses a flexible film die to fix integrated circuits onto a flexible circuit board. This technology uses a flexible additional circuit board as a chip carrier to combine the chip with the flexible substrate circuit, or it refers to a flexible additional circuit board without chip packaging. In this disclosure, COF refers to the use of COF technology to package a driver chip IC onto a flexible circuit board. Connector 400, such as COF, has been widely used in various display devices such as televisions, computers, laptops, and mobile phones, and is key to the pursuit of thinness and lightness in display devices.

[0132] For example, a sub-circuit board 300, such as an X-PCBA board, can be connected to one or more connectors 400, such as COFs. The sub-circuit board 300 transmits the display signals output by the control board 500 to the connectors 400, such as COFs, thereby driving the display panel 200 to display. To ensure normal display of the display panel 200 and uniformity of signal transmission, for larger display panels 200, one sub-circuit board 300 can be connected to multiple connectors 400.

[0133] For example, the control circuit board 500 can be a C-PCBA board (Control-Printed Circuit Board Assembly), on which electronic components are assembled on the PCB board using processes such as SMT (Surface Mount Technology) or DIP (Dual In-line Package) to realize the logic control function; the control circuit board 500 can also be a SOC (System on Chip), and this disclosure does not limit it.

[0134] For example, the foldable circuit board 100 (e.g., FFC) typically uses high-quality conductors and insulating materials to provide high-fidelity signal transmission, reduce signal loss and distortion, and ensure audio quality. The conductors of the foldable circuit board 100 (e.g., FFC) have low impedance and high temperature resistance, which can reduce energy loss in signal transmission, improve efficiency and performance, and ensure long-term stable operation. The foldable circuit board 100 (e.g., FFC) also has good shielding performance, reducing the impact of external interference on the signal and improving signal purity and stability. Connecting two adjacent sub-circuit boards 300 through the foldable circuit board 100 (e.g., FFC), and connecting the sub-circuit board 300 and the control circuit board 500 through the foldable circuit board 100 (e.g., FFC), can effectively avoid signal attenuation problems in the display panel 200 and improve the signal transmission quality of the display panel 200.

[0135] For example, as shown in Figures 15 and 16, and referring to Figure 5, in the plurality of sub-circuit boards 300 connected to the first portion 1000-1 of the display panel 200, adjacent sub-circuit boards 300 can be connected via the aforementioned foldable circuit board 100 (e.g., FFC). In the plurality of sub-circuit boards 300 connected to the second portion 1000-2 of the display panel 200, adjacent sub-circuit boards 300 can be connected via the aforementioned foldable circuit board 100 (e.g., FFC). One of the sub-circuit boards 300 connected to the first portion 1000-1 of the display panel 200 can be connected to the control circuit board via the aforementioned foldable circuit board 100 (e.g., FFC). The 500 connection allows one of the sub-circuit boards 300 connected to the second part 1000-2 of the display panel 200 to be connected to the control circuit board 500 via the aforementioned foldable circuit board 100 (e.g., FFC). This not only effectively avoids signal attenuation issues in the display panel 200 and improves the quality of signal transmission in the display panel 200, but also allows for more convenient connection of electronic components by folding the two plug-in ports 102 of the foldable circuit board 100 to the side of the first side 101-1 away from the connecting body 101 and providing a folding part 10 on the foldable circuit board 100, thus satisfying the spatial layout of electronic components in the display device.

[0136] For example, by adjusting the angles of the first included angle a1 and the second included angle a2 of the folding portion 10, the distance between the two plug-in ports 102 of the foldable circuit board 100 after folding can be adjusted. For instance, when the angles of the first included angle a1 and the second included angle a2 become smaller, the distance between the two plug-in ports 102 becomes smaller; when the angles of the first included angle a1 and the second included angle a2 become larger, the distance between the two plug-in ports 102 becomes larger. This allows the distance between the two plug-in ports 102 to be adjusted according to the actual distance between the electronic components in the display device. The distance between the two plug-in ports 102 has a certain amount of flexibility, which can meet the requirements of the distance between the electronic components in the display device. The distance dimensional tolerance is well controlled; at the same time, the foldable circuit board 100 only needs to be folded simply, with few folds, and the hardness of the foldable circuit board 100 after folding is not much different from that of the unfolded foldable circuit board 100, making it relatively soft. This makes it difficult for the electronic components connected by the foldable circuit board 100 and the foldable circuit board 100 itself to warp; although the folding sub-part 13 protrudes relative to the flat part 20, the surface of the folding sub-part 13 is a flat plane, and the foldable circuit board 100 after folding is relatively flat overall. This allows the foldable circuit board 100 to meet the production requirements of the assembly line for display equipment, ensuring the normal operation of the production line and improving production efficiency and product quality.

[0137] In some embodiments, as shown in FIG15, when the foldable circuit board 100 is inserted into the side of two adjacent sub-circuit boards 300 away from the display panel 200, the two adjacent sub-circuit boards 300 are connected by the foldable circuit board 100 as described in any of the above embodiments; or, as shown in FIG16 and referring to FIG12, when the foldable circuit board 100 is inserted into the side of two adjacent sub-circuit boards 300 close to the display panel 200, the two adjacent sub-circuit boards 300 are connected by the foldable circuit board 100 having at least one third crease 30.

[0138] For example, as shown in FIG15, when the foldable circuit board 100 is inserted into the side of two adjacent sub-circuit boards 300 away from the display panel 200, that is, when the connecting body 101 of the folded foldable circuit board 100 is further away from the display panel 200 than the two insertion ports 102, since the space on the side of the sub-circuit board 300 away from the display panel 200 is larger, there is no limitation on the width of the foldable circuit board 100, and the foldable circuit board 100 described in any of the above can realize the connection of two adjacent sub-circuit boards 300.

[0139] For example, as shown in FIG16 and referring to FIG12, when the foldable circuit board 100 is inserted into the side of two adjacent sub-circuit boards 300 near the display panel 200, that is, when the connecting body 101 of the folded foldable circuit board 100 is closer to the display panel 200 than the two plug-in ports 102, in order to ensure that the foldable circuit board 100 can be set in this smaller space and without affecting the setting of the connector 400, in some products, the width of the foldable circuit board 100 after folding is less than the width of the sub-circuit board 300. Therefore, there is a certain requirement for the width of the foldable circuit board 100. Therefore, the foldable circuit board 100 needs to be folded along at least one third crease 30 to reduce the width of the folded foldable circuit board 100 and meet the connection requirements of the two adjacent sub-circuit boards 300.

[0140] In some embodiments, as shown in FIG17, the display module 1000 further includes a timing controller chip 600 (TCON). The timing controller chip 600 is connected between the sub-circuit board 300 and the control circuit board 500. Exemplarily, the timing controller chip 600 is connected to the sub-circuit board 300 and the control circuit board 500 through a foldable circuit board 100. When the timing controller chip 600 is connected between the sub-circuit board 300 and the control circuit board 500, the control circuit board 500 can be, for example, a power board. The timing controller chip 600 provides the generation and adjustment of timing signals for the digital system, and can control the working time and sequence of each module in the display device. After the timing controller chip 600 converts the display signal, it transmits it, for example, to the sub-circuit board 300, the connector 400, and then to the display panel 200. Specifically, the timing controller chip 600 plays the following roles: 1. Timing control: mainly realizes the timing control between each module in the display device to ensure the normal operation of the digital system. 2. Image Display Control: Plays a crucial role in the image display process of the display device, ensuring the stability and clarity of the image display. 3. Power Management: Controls the power management of the digital system, minimizing energy consumption. 4. Clock Control: Adjusts the system clock to ensure synchronized operation between all modules.

[0141] With the continuous development of the display industry, more and more display devices are now adopting a design without a timing control chip 600, namely a TCON-less design, which means that the timing control chip 600 is placed on the control circuit board 500.

[0142] TCON-less design has become a cost-reduction solution for current display devices, such as televisions. As shown in Figures 15 and 16, the control circuit board 500 integrates the main control function of the timing control chip 600. The drive circuitry and interfaces of the timing control chip 600 are integrated onto the control circuit board 500, forming the TCON-less chassis board. Through the foldable circuit board 100 (e.g., FFC), the TCON-less chassis board can directly transmit relevant signals from the timing control chip 600 to, for example, the sub-circuit board 300 or connector 400, and then to the display panel 200. It should be noted that the TCON-less chassis board can also directly transmit relevant signals from the timing control chip 600 to the display panel 200 from other components; this disclosure does not impose any limitations. In this way, display devices, such as televisions, do not require a separate timing control chip 600, thus reducing costs.

[0143] For example, display devices of the same type but different models, such as different models of televisions, may be equipped with different signal output systems, such as P2P (Point-to-Point) signal output systems. These signal output systems may include components such as a TCON-less chassis board and a foldable circuit board 100 (e.g., FFC), or they may also include components such as a control circuit board 500, a timing control chip 600, and a foldable circuit board 100 (e.g., FFC). The output signals (e.g., P2P signals) of different signal output systems (e.g., P2P signal output systems) have different related indicators, such as P2P signal output quality, EMC (Electromagnetic Compatibility) capability, and compatible frequency bands.

[0144] It's important to note that P2P signals refer to signals generated during point-to-point communication. Point-to-point communication means data transmission occurs directly between two devices without the need for an intermediary server. This method significantly reduces server load and is particularly suitable for large data transmission, such as real-time audio and video chat, online video streaming, and large file transfers.

[0145] It should be noted that EMC refers to the ability of a device or system to operate within its electromagnetic environment without causing unacceptable electromagnetic interference to any other device in that environment. Therefore, EMC includes two aspects: firstly, the electromagnetic interference generated by the device during normal operation must not exceed certain limits; secondly, the device must have a certain degree of immunity to electromagnetic interference present in its environment.

[0146] With the development of new display device models, display devices are becoming increasingly feature-rich and larger in size. The refresh rate range that display panels need to be compatible with is expanding, signal transmission speeds are increasing, and the differences in signal output capabilities among display device signal output systems (such as P2P signal output systems) are also widening. However, during high-speed signal transmission (such as P2P signals), signal attenuation occurs after multiple connections and transmissions, leading to inter-symbol distortion, reducing the quality of high-speed transmitted signals (such as P2P signals), and causing eye diagram problems. This is especially true for larger display devices, where signal attenuation during high-speed transmission is more severe, resulting in greater eye diagram problems.

[0147] For example, to reduce signal attenuation (e.g., P2P signal) and compensate for signal strength, as shown in Figure 18, multiple EQ levels 3011' can be provided on each sub-circuit board 300 at the location where it connects to each connector 400, such as COF, and an EQ control level 3012' can be provided on each sub-circuit board 300. Both EQ levels 3011' and EQ control level 3012' include a first terminal EQ-1', a second terminal EQ-2', and a third terminal EQ-3'. The first terminal EQ-1' can be, for example, an output terminal, the second terminal EQ-2' can be, for example, a ground terminal, and the third terminal EQ-3' can be, for example, an input terminal. A resistor is provided between the first terminal EQ-1' and the third terminal EQ-3', and a resistor is provided between the second terminal EQ-2' and the third terminal EQ-3', thereby enabling different signal output levels.

[0148] For example, as shown in FIG18, and referring to FIG15, FIG16, and FIG17, the first terminal EQ-1' of EQ level 3011' is connected to connector 400, such as COF; the second terminal EQ-2' of EQ level 3011' is grounded; and the third terminal EQ-3' of EQ level 3011' is connected to control circuit board 500. The display signal output by control circuit board 500 is transmitted to connector 400, such as COF, via multiple EQ levels 3011', and then transmitted from connector 400, such as COF, to display panel 200.

[0149] For example, as shown in Figure 18, and referring to Figures 15, 16, and 17, the first terminal EQ-1' of the EQ control position 3012' is connected to multiple connectors 400, such as COF, connected to the sub-circuit board 300 where the EQ control position 3012' is located. The second terminal EQ-2' of the EQ control position 3012' is grounded, and the third terminal EQ-3' of the EQ control position 3012' is connected to the control circuit board 500. The EQ control position 3012' is used to control whether multiple EQ positions 3011' set at the positions connected to each connector 400, such as COF, on the sub-circuit board 300 are working. For example, the EQ control position 3012' outputs a high level or a low level to multiple connectors 400, such as COF. After receiving the high level or low level, the connector 400, such as COF, outputs a control signal according to the software algorithm inside the connector 400, thereby controlling whether the multiple EQ positions 3011' are working.

[0150] For example, as shown in Figure 18, multiple EQ levels 3011' can be, for example, three EQ levels 3011', namely, the first EQ level 3011-1', the second EQ level 3011-2', and the third EQ level 3011-3'. The first EQ level 3011-1', the second EQ level 3011-2', and the third EQ level 3011-3' can form eight different adjustment levels. For example, a high level can represent H (High), and a low level can represent L (Low). The eight adjustment levels can be HHH, HHL, HLH, HLL, LHH, LHL, LLH, and LLL, respectively.

[0151] For example, when the output of EQ control position 3012' is high, the first EQ position 3011-1', the second EQ position 3011-2', and the third EQ position 3011-3' are all active, allowing for eight adjustment levels. When the output of EQ control position 3012' is low, only the first EQ position 3011-1' and the second EQ position 3011-2' are active, while the third EQ position 3011-3' is inactive. Four adjustment levels can be formed using the first EQ position 3011-1' and the second EQ position 3011-2'. Alternatively, when the output of EQ control position 3012' is low... When the first EQ setting 3011-1' and the third EQ setting 3011-3' are active, the second EQ setting 3011-2' is inactive. Four adjustment settings can be formed by using the first EQ setting 3011-1' and the third EQ setting 3011-3'. Alternatively, when the EQ control setting 3012' outputs a low level, only the second EQ setting 3011-2' and the third EQ setting 3011-3' are active, the first EQ setting 3011-1' is inactive. Four adjustment settings can be formed by using the second EQ setting 3011-2' and the third EQ setting 3011-3'. This disclosure does not impose any limitations.

[0152] For example, as shown in Figure 19(a), when the resistor between the first terminal EQ-1' and the third terminal EQ-3' of EQ level 3011' and EQ control level 3012' is disconnected, the output of EQ level 3011' and EQ control level 3012' is low, and the level of EQ level 3011' is L; as shown in Figure 19(b), when the resistor between the second terminal EQ-2' and the third terminal EQ-3' of EQ level 3011' and EQ control level 3012' is disconnected, the output of EQ level 3011' and EQ control level 3012' is high, and the level of EQ level 3011' is H.

[0153] For example, by adjusting the EQ level 3011', compensation can be achieved for the signal (e.g., a P2P signal) transmitted to the display panel 200, thereby realizing high-speed P2P signal gain. The setting position of the EQ level 3011' can be specifically set according to the actual situation, and this disclosure does not impose any restrictions. Commonly used compensation methods for the EQ level 3011' include hardware setting and software setting.

[0154] For example, when setting up the hardware, if there is a problem with the initial setting, the output signal will be attenuated significantly and the quality will be poor, resulting in display abnormalities or connector 400, such as COF malfunction. In this case, it is necessary to manually try other settings. For example, when the output of EQ control position 3012' is high, the first EQ position 3011-1', the second EQ position 3011-2', and the third EQ position 3011-3' all function. At this time, the first EQ position 3011-1', the second EQ position 3011-2', and the third EQ position 3011-3' are manually adjusted one by one, and the signal quality under the eight adjustment positions HHH, HHL, HLH, HLL, LHH, LHL, LLH, and LLL is recorded respectively. Finally, the corresponding position with the best signal quality is determined. The signal is superimposed on a certain level through the resistor in the position to keep it relatively constant. Currently, the compensation method set by the hardware cannot be adjusted by the front-end display system. It requires manual debugging. Moreover, a suitable fixed position needs to be determined during product verification. It is difficult to change the position after mass production, which brings great difficulties to the subsequent debugging work. In some cases, the eye diagram cannot be properly debugged, resulting in risky mass production or failure to mass produce.

[0155] For example, when setting the software, no manual intervention is required. After receiving the signal before compensation, the sub-circuit board 300 iterates through the eight adjustment levels (HHH, HHL, HLH, HLL, LHH, LHL, LLH, LLL) one by one according to the software algorithm inside the sub-circuit board 300 until a suitable level is found. However, if there is a problem with the initial level, the output signal attenuation is large and the quality is poor, causing the connector 400, for example, to malfunction, the internal software algorithm will not be able to iterate through the eight adjustment levels (HHH, HHL, HLH, HLL, LHH, LHL, LLH, LLL), and there is a risk of incorrect initial level setting. Moreover, the larger the size of the display panel 200, the more severe the signal attenuation during high-speed transmission, and the greater the risk of incorrect initial level setting. Therefore, there is currently no software setting adjustment scheme for EQ levels for large-size, high-speed display devices.

[0156] Therefore, in some embodiments of this disclosure, as shown in Figures 20 and 21, and referring to Figures 15, 16, and 17, the display module 1000 further includes a control circuit board 500, at least one of the plurality of sub-circuit boards 300 being connected to the control circuit board 500; at least one sub-circuit board 300 is provided with at least one gear adjuster 301, the gear adjuster 301 being configured to form a plurality of different gears, and one gear adjuster 301 being connected to a connector 400; the sub-circuit board 300 is also provided with at least one microcontroller 302, each microcontroller... The first end 3021 of the microcontroller 302 is connected to the control circuit board 500; the microcontroller 302 is configured to output a gear control signal according to the strength of the input signal, thereby controlling the gear adjuster 301 to form multiple different gears; when the sub-circuit board 300 is provided with one microcontroller 302, the second end 3022 of the microcontroller 302 is connected to each gear adjuster 301; when the sub-circuit board 300 is provided with multiple gear adjusters 301 and multiple microcontrollers 302, the second end 3022 of one microcontroller 302 is connected to one gear adjuster 301.

[0157] In some embodiments, as shown in Figures 20 and 21, the gear position regulator 301 includes multiple gear position sub-regulators 3011, for example, three gear position sub-regulators 3011, namely a first gear position sub-regulator EQ1, a second gear position regulator EQ2, and a third gear position regulator EQ3. Each gear position sub-regulator 3011 includes a first terminal EQ-1 (e.g., an output terminal), a second terminal EQ-2 (e.g., a ground terminal), and a third terminal EQ-3 (e.g., an input terminal). The third terminals EQ-3 of the multiple gear position sub-regulators 3011 are respectively connected to the second terminal 3022 of the microcontroller 302. A first resistor EQ-4 is provided between the first terminal EQ-1 and the third terminal EQ-3 of the gear position regulator 3011, and a second resistor EQ-5 is provided between the second terminal EQ-2 and the third terminal EQ-3 of the gear position regulator 3011. The multiple gear position regulators 3011 are configured to combine with each other to form multiple different gear positions.

[0158] For example, as shown in Figures 15, 16, and 17, the display module 1000, such as a television display module, includes multiple, for example, four sub-circuit boards 300 and one control circuit board 500. The television display module 1000 can be divided into left and right parts, the left half being the first part 1000-1 and the right half being the second part 1000-2. The first part 1000-1 and the second part 1000-2 each include two sub-circuit boards 300. One of the sub-circuit boards 300 in the first part 1000-1 is connected to the control circuit board 500, and one of the sub-circuit boards 300 in the second part 1000-2 is connected to the control circuit board 500.

[0159] It is understood that the display module 1000 can also be a display module for other products, such as a mobile phone display module. A mobile phone display module may include, for example, two sub-circuit boards 300 and one control circuit board 500. The two sub-circuit boards 300 are respectively connected to the control circuit board 500, or the two sub-circuit boards 300 are connected, with one sub-circuit board 300 connected to the control circuit board 500. This disclosure does not limit the scope of the application.

[0160] For example, as shown in Figures 20 and 21, and referring to Figures 15, 16, and 17, each sub-circuit board 300 is connected to three connectors 400, such as COF. A gear adjuster 301 is provided at the connection points between the sub-circuit board 300 and the three connectors 400, such as COF. The gear adjuster 301 is connected to the connectors 400, such as COF. The signal is transmitted through the gear adjuster 301 to the connectors 400, such as COF, and then from the connectors 400, such as COF, to the display panel 200. Each gear adjuster 301 can form multiple different adjustment gears to compensate for the signal (such as P2P signal) transmitted to the display panel 200, thereby achieving high-speed P2P signal gain.

[0161] It should be noted that the number of sub-circuit boards 300, control circuit boards 500, connectors 400, and gear adjusters 301 are not limited in this disclosure and can be set according to the actual situation.

[0162] For example, as shown in Figures 20 and 21, and referring to Figures 15, 16 and 17, at least one microcontroller 302 is provided on multiple, for example, four, sub-circuit boards 300. The first end 3021 of each microcontroller 302 is connected to the control circuit board 500. For example, the first end 3021 of the microcontroller 302 can be connected to the foldable circuit board 100 (e.g., FFC). The foldable circuit board 100 (e.g., FFC) is connected to the control circuit board 500. The control circuit board 500 is provided with a timing control chip 600, for example, thereby realizing the connection between the first end 3021 of the microcontroller 302 and the control circuit board 500.

[0163] For example, the first terminal 3021 of the microcontroller 302 can also be connected to a foldable circuit board 100 (e.g., FFC), which is connected to another sub-circuit board 300. The other sub-circuit board 300 is connected to a control circuit board 500, which is provided with a timing control chip 600, thereby enabling the first terminal 3021 of the microcontroller 302 to be connected to the control circuit board 500.

[0164] For example, the first terminal 3021 of the microcontroller 302 can also be connected to the foldable circuit board 100 (e.g., FFC), the foldable circuit board 100 (e.g., FFC) is connected to the timing control chip 600, and the timing control chip 600 is connected to the control circuit board 500, thereby realizing the connection between the first terminal 3021 of the microcontroller 302 and the control circuit board 500.

[0165] For example, the first terminal 3021 of the microcontroller 302 can also be connected to the foldable circuit board 100 (e.g., FFC), the foldable circuit board 100 (e.g., FFC) is connected to another sub-circuit board 300, the other sub-circuit board 300 is connected to the timing control chip 600, and the timing control chip 600 is connected to the control circuit board 500, thereby realizing the connection between the first terminal 3021 of the microcontroller 302 and the control circuit board 500.

[0166] For example, the first terminal 3021 of the microcontroller 302 can also be connected to the control circuit board 500 through other components, which is not limited here; the control circuit board 500 transmits signals to the microcontroller 302, and the microcontroller 302 can output a gear control signal according to the strength of the input signal, thereby controlling the gear adjuster 301 to form multiple different gears.

[0167] For example, the sub-circuit board 300 and the timing control chip 600 can be connected via a foldable circuit board 100 (e.g., FFC) or via an FPC; the sub-circuit board 300 and the control circuit board 500 can be connected via a foldable circuit board 100 (e.g., FFC) or via an FPC; the timing control chip 600 and the control circuit board 500 can be connected via a foldable circuit board 100 (e.g., FFC) or via an FPC; or they can be connected via other components, which are not limited in this disclosure.

[0168] For example, as shown in FIG20 and referring to FIG16, a sub-circuit board 300 is provided with a microcontroller 302. In this case, the first terminal 3021 of the microcontroller 302 is connected to the control circuit board 500, and the second terminal 3022 of the microcontroller 302 is connected to the third terminal EQ-3 of three gear position regulators 301, for example, three gear position sub-regulators 3011 of three gear position regulators 301. The microcontroller 302 can control multiple gear position regulators 301 at the same time. For example, the three gear position regulators 301 can form multiple different gear positions. As shown in FIG21 and referring to FIG16, a sub-circuit board 300 is provided with three microcontrollers 302. In this case, the first terminal 3021 of each microcontroller 302 is connected to the control circuit board 500; the second terminal 3022 of each microcontroller 302 is connected to the third terminal EQ-3 of three gear position sub-regulators 3011 of a gear position regulator 301. One microcontroller 302 controls one gear position regulator 301 to form multiple different gear positions.

[0169] For example, the gear control signal output by the microcontroller 302 can be either high or low. When the output gear control signal is high, the gear position of the gear sub-adjustment 3011 is controlled to be H (high); when the output gear control signal is low, the gear position of the gear sub-adjustment 3011 is controlled to be L (low). Specifically, for example, a microcontroller 302 is connected to a gear adjuster 301. The second terminal 3022 of the microcontroller 302 includes at least three pins, namely a first pin, a second pin, and a third pin. The third terminal EQ-3 of the first gear sub-adjustment EQ1 in the gear adjuster 301 is connected to the first pin of the microcontroller 302. The third terminal EQ-3 of the second gear sub-adjustment EQ2 in the gear adjuster 301 is connected to the second pin of the microcontroller 302. The third terminal EQ-3 of the third gear sub-adjustment EQ3 in the gear adjuster 301 is connected to the second pin of the microcontroller 302. Terminal EQ-3 is connected to the third pin of microcontroller 302. For example, if the gear control signal output by microcontroller 302 through the first pin is high, the gear control signal output through the second pin is high, and the gear control signal output through the third pin is low, then the gear of the first gear sub-regulator EQ1 is H (high), the gear of the second gear sub-regulator EQ2 is H (high), and the gear of the third gear sub-regulator EQ3 is L (low). Therefore, the gear formed by gear regulator 301 is HHL.

[0170] For example, this solution can utilize the serial communication function of a signal output system (e.g., a P2P signal output system) to output a gear control signal through a microcontroller 302 according to different models and preset display signal strength, thereby controlling the gear sub-adjuster 3011 to automatically adjust the EQ setting of the display panel 200, so as to match the preset display signal strength with the EQ setting of the display panel 200, thus meeting the flexibility requirements of the signal output system (e.g., a P2P signal output system) for signal output.

[0171] For example, if the signal quality output by the signal output system (e.g., the P2P signal output system) is poor, the gear level formed by the gear adjuster 301 needs to be increased to increase the compensation strength of the signal and reduce the risk of display abnormalities. If the signal energy output by the signal output system (e.g., the P2P signal output system) is too strong, causing the EMC (Electromagnetic Compatibility) test to fail, the gear level formed by the gear adjuster 301 also needs to be increased to reduce the output signal strength of the signal output system (e.g., the P2P signal output system). If the signal output system (e.g., the P2P signal output system) outputs functions compatible with low-frequency P2P signals, the gear level formed by the gear adjuster 301 needs to be decreased to adapt to its compensation frequency band, or the gear adjuster 301 can be turned off directly.

[0172] It should be noted that EMC includes two parts: EMI (electromagnetic interference) and EMS (electromagnetic susceptibility). Electromagnetic interference refers to any electromagnetic phenomenon that can degrade the performance of equipment or systems. Electromagnetic susceptibility refers to the performance degradation of equipment or systems caused by electromagnetic interference.

[0173] It should be noted that if the signal energy output by the signal output system (e.g., the P2P signal output system) is too strong, causing the EMC test to fail, then the gear level formed by the gear regulator 301 needs to be increased compared to the original gear level to enhance the energy compensation of the display panel 200, thereby reducing the energy of the signal output system (e.g., the P2P signal output system) and keeping the energy of the signal output system (e.g., the P2P signal output system) and the display panel 200 in balance.

[0174] It should be noted that some models can be compatible with low-frequency signals. According to the principle of energy loss, high-frequency signals are easily lost, while low-frequency signals are not easily lost. If the compensation was previously based on high-frequency signals, there is a risk of overcompensation when using it on low-frequency signals. Therefore, it is necessary to reduce the gear level formed by the gear adjuster 301 to match its compensation frequency band, or directly turn off the gear adjuster 301.

[0175] In some embodiments, as shown in Figures 15, 16, and 17, the display module 1000 includes, for example, a display panel 200. The bonding side 201-1 of the display panel 200 is connected to, for example, twelve connectors 400. The connectors 400 can be, for example, COF. The display module 1000 also includes, for example, four sub-circuit boards 300. Each sub-circuit board 300 is connected to three connectors 400. Typically, the signal output from the control circuit board 500 is transmitted to the display panel 200 via the sub-circuit boards 300 and the connectors 400. When the signal is transmitted to the sub-circuit boards 300 at both ends of the bonding side 201-1 of the display panel 200, the signal attenuation is relatively large. For example, the signal attenuation is relatively large when transmitted to the sub-circuit boards 300 near the left and right sides of the display panel 200. One or more microcontrollers 302 can be set on the outermost sub-circuit board 300. The connection method of the microcontrollers 302 is as described above and will not be repeated here.

[0176] For example, as shown in FIG20, the leftmost sub-circuit board 300 is used as an example for illustration. The sub-circuit board 300 is equipped with a microcontroller 302 and three gear position adjusters 301, the connection method of which will not be described in detail. When the signal strength output by the signal output system (e.g., a P2P signal output system) is high and no signal compensation is required, the signal output system (e.g., a P2P signal output system) communicates with the microcontroller 302 via IIC / SPI, etc. The IIC / SPI communication signal is transmitted to the microcontroller 302. After receiving the signal, the microcontroller 302 judges the signal strength. If it determines that the signal does not require compensation, it does not output a gear position control signal, and the three gear position sub-adjusters 3011 of the gear position adjuster 301 remain unchanged. The default gear positions of the three gear position sub-adjusters 3011 of the gear position adjuster 301 are, for example, EQ1=H, EQ2=L, and EQ3=H. When the signal strength output by the signal output system (e.g., a P2P signal output system) is low, a signal eye diagram problem may occur, or the signal energy output by the signal output system (e.g., a P2P signal output system) may be too strong, leading to EMC (Electromagnetic Compatibility) issues. When a compatibility (electromagnetic compatibility) test fails and signal compensation is required, the signal output system (e.g., a P2P signal output system) communicates with the microcontroller 302 via IIC / SPI. The IIC / SPI communication signal is transmitted to the microcontroller 302. After receiving the signal, the microcontroller 302 determines the signal strength. If it determines that the signal needs compensation, it outputs the corresponding gear control signal, thereby controlling the three gear sub-adjusters 3011 in the gear adjuster 301 to the appropriate gear. The three gear sub-adjusters 3011 combine to form the required gear, thus achieving signal compensation.

[0177] The current general-purpose differential signal communication protocol (CEDS / CHPI) supports two signal transmission modes: LVDS (Low-Voltage Differential Signals) and CML (Current Mode Logic). LVDS and CML are suitable for different signal environments and each has its own advantages and disadvantages in terms of power consumption, operating speed, and coupling method. The quality of high-speed differential signals is affected by the transmission path; for example, sub-circuit boards, control boards, FFCs, and FPCs are all important influencing factors. Furthermore, the length and shape of FFCs vary significantly, leading to large differences in signal attenuation. The functionality of control boards is also difficult to control. In addition, with many users and diverse environments, application modes cannot be standardized. Moreover, it is difficult to achieve hardware compatibility between LVDS and CML modes. LVDS mode does not require Vterm voltage, while CML mode requires an external Vterm voltage supply, thus making it impossible to freely choose the mode setting most suitable for the signal environment.

[0178] For example, the settings matched for LVDS mode and CML mode are different, including pre-enhancement (PE), swing, and common mode voltage (VCM). The optimal settings for both modes must be confirmed during the factory commissioning phase and stored in the timing control chip's software program TCON Code. Specifically, pre-enhancement (PE) increases the signal rise time; swing increases the signal amplitude; and VCM is the common mode voltage at the differential signal endpoints.

[0179] In some embodiments, as shown in FIG22 and referring to FIG23, the display module 1000 further includes a timing control chip 600, which is connected between multiple sub-circuit boards 300 and the control circuit board 500, or the timing control chip 600 is disposed on the control circuit board 500; the control circuit board 500 is also provided with a step-down circuit chip 700; each sub-circuit board 300 is provided with at least one analog switch 303, and the first terminal 3031 of each analog switch 303 is connected to the step-down circuit chip 700, which is configured to provide Vterm voltage; the second terminal 3032 of an analog switch 303 is connected to a connector 400, which is configured to feed back the number of signal anomalies to the timing control chip 600; the third terminal 3033 of each analog switch 303 is connected to the timing control chip 600, which is configured to store configuration data applicable to low-voltage differential signal mode and current mode logic mode, record and store the number of signal anomalies fed back by the connector 400, and output mode control signals according to the number of signal anomalies, thereby controlling the analog switch 303 to close or open.

[0180] For example, in some embodiments, as shown in FIG24, the analog switch 303 can use transistors T connected in parallel to realize rail-to-rail transmission of input and output signals. Specifically, the analog switch 303 includes, for example, a first transistor T1 and a second transistor T2 connected in parallel. The first transistor T1 can be an N-type transistor, and the second transistor T2 can be a P-type transistor. The first terminal T1-1 of the first transistor T1 and the first terminal T2-1 of the second transistor T2 are connected to the first terminal 3031 of the analog switch 303, for example, the input terminal. The second terminals T1-2 of the first transistor T1 and the second terminal T2-2 of the second transistor T2 are connected to the second terminal 3032 of the analog switch 303, for example, the output terminal. The third terminal T1-3 of the first transistor T1 is connected to the third terminal 3033 of the analog switch 303, for example, the control terminal. The third terminal T2-3 of the second transistor T2 is connected to the third terminal 3033 of the analog switch 303 through a NOT gate circuit 303-1, for example, the control terminal.

[0181] Specifically, when the control signal at the third terminal 3033 of the analog switch 303, for example, is at a high level H, the first transistor T1 and the second transistor T2 are simultaneously turned on, allowing the signal to pass through. The voltage at the second terminal 3032 of the analog switch 303, for example, the output terminal, is equal to the voltage at the first terminal 3031 of the analog switch 303, for example, the input terminal. When the control signal at the third terminal 3033 of the analog switch 303, for example, is at a low level L, the first transistor T1 and the second transistor T2 are simultaneously turned off, the signal is cut off, and there is no voltage output at the second terminal 3032 of the analog switch 303, for example, the output terminal.

[0182] For example, as shown in Figure 22, multiple analog switches 303 are provided on each sub-circuit board 300, such as three analog switches 303. The second terminal 3032 of one analog switch 303 (e.g., the output terminal) is connected to a connector 400 (e.g., COF). The first terminals 3031 of the multiple analog switches 303 (e.g., the input terminals) are all connected to the step-down circuit chip 700. The third terminals 3033 of the multiple analog switches 303 (e.g., the control terminals) are all connected to the timing control chip 600. When the control signal output by the timing control chip 600 is high level H, the analog switch 303 is turned on, and the Vterm voltage output by the step-down circuit chip 700 is output to the connector 400. At this time, the signal transmission mode can be CML mode. When the control signal output by the timing control chip 600 is low level L, the analog switch 303 is turned off, and the Vterm voltage output by the step-down circuit chip 700 is cut off. At this time, the signal transmission mode can be LVDS mode.

[0183] As shown in Figure 25 and referring to Figure 22, the display module 1000 provided in this disclosure achieves hardware compatibility with both LVDS and CML modes, meaning that the hardware design of this disclosure is compatible with both LVDS and CML modes. Specific settings can be found in the relevant descriptions above and will not be repeated here.

[0184] As shown in Figure 25, the optimal settings (PE, Swing, VCM, etc.) for LVDS and CML modes are stored in the software program TCON Code of the timing control chip 600. During the factory debugging phase, the optimal settings applicable to LVDS and CML modes can be confirmed and stored in the software program TCON Code of the timing control chip 600 respectively.

[0185] Currently, LVDS mode is the more commonly used mode. Therefore, the software program TCON Code of the timing control chip 600 can be set to LVDS mode by default. That is, the timing control chip 600 outputs a low-level L control signal, and records the number of signal anomalies fed back by the connector 400 (e.g., COF), let's say the number of anomalies is M. Then, the timing control chip 600 outputs a high-level H control signal, switching to CML mode. At this time, records the number of signal anomalies fed back by the connector 400 (e.g., COF), let's say the number of anomalies is N. Compare the number of anomalies in the two modes. If M ≥ N, it indicates that the signal quality of CML mode is better. In this case, the software program TCON Code of the timing control chip 600 is set to CML mode, that is, the signal transmission mode is set to CML mode, and the timing control chip 600 outputs a high-level H control signal. If M < N, it indicates that the signal quality of LVDS mode is better. In this case, the software program TCON Code of the timing control chip 600 is set to LVDS mode, that is, the signal transmission mode is set to LVDS mode, and the timing control chip 600 outputs a low-level L control signal.

[0186] The number of signal anomalies reported by connector 400, such as COF, can be either the number of times the BCC / LOCK signal is pulled low, or the bit error rate of the signal reported by connector 400, such as COF. Communication between timing control chip 600 and connector 400, such as COF, is not a one-time success; multiple handshakes may occur. Even if successful, some data communication errors still exist, resulting in a certain bit error rate. The bit error rate is an indicator of the accuracy of data transmission within a specified time: Bit error rate = (Number of errors in transmission / Total number of transmitted bits) * 100%. BCC / LOCK is the output signal of connector 400, such as COF; the name may differ depending on the protocol, but the meaning is the same. When the signal handshake fails, the BCC / LOCK signal will be pulled low.

[0187] For example, this solution achieves hardware compatibility with both LVDS and CML modes. The timing control chip 600's software program TCON Code stores the optimal settings for both modes simultaneously. The connector 400, such as COF, provides feedback on the current signal quality. The timing control chip 600 outputs a control signal based on the number of signal anomalies reported by the connector 400, such as COF, thereby controlling the free switching between LVDS and CML modes, achieving the optimal settings for the current application environment, and improving eye diagram quality.

[0188] For example, CML mode requires an external supply of Vterm voltage and does not require the timing control chip to set the common mode voltage (VCM) separately. LVDS does not require Vterm voltage but requires the timing control chip to set the VCM separately. Different VCMs have a significant impact on the quality of the transmitted signal, and the optimal VCM setting is different under different refresh rates. Therefore, it is especially important to refine the VCM level and find the optimal VCM setting in LVDS mode.

[0189] In some embodiments, as shown in FIG26 and referring to FIG22, the timing control chip 600 includes a plurality of common-mode level modules 601. Each common-mode level module 601 includes a level voltage generator 601-1 and N transistors T, which are connected in series. The first transistor T is connected to the level voltage generator 601-1, and the last transistor T is connected to the output terminal of the timing control chip 600. The timing control chip 600 is also provided with N control pins 602. The control stage T-3 of the N transistors T in each common-mode level module 601 is connected to the corresponding N control pins 602. The control pins 602 are configured to provide common-mode control signals. Each common-mode gear module 601 generates a gear voltage generator 601-1 that generates the corresponding gear voltage (VCM). When the N transistors T of the common-mode gear module 601 are turned on, the gear voltage generator 601-1 transmits the corresponding gear voltage to the output of the timing control chip 600, and the timing control chip 600 transmits the corresponding gear voltage to the display panel 200.

[0190] Connector 400 is configured to report the number of signal anomalies to timing control chip 600. Timing control chip 600 is also configured to power on and traverse multiple common-mode range modules 601, recording and storing the number of signal anomalies reported by connector 400 during the operating state of each common-mode range module 601, and locating the appropriate common-mode range module 601 based on the number of signal anomalies. The operating state of common-mode range module 601 refers to the range voltage generator 601-1 of that common-mode range module 601 generating the voltage (VCM) for the corresponding range, which is then output through the output terminal of timing control chip 600.

[0191] For example, as shown in FIG26, the N transistors T include multiple N-type transistors and / or multiple P-type transistors. In different common-mode position modules 601, the number of multiple N-type transistors and / or the number of multiple P-type transistors are different, and the positions of the N-type transistors and / or P-type transistors in the N transistors T connected in series are different.

[0192] For example, as shown in FIG26, the timing control chip 600 is provided with sixty-four common-mode range modules 601, which are V1 to V64 respectively. Each common-mode range module 601 includes six transistors T. The control stage T-3 of the six transistors T in each common-mode range module 601 is connected to six control pins 602 respectively. Therefore, the on / off combination of the six transistors T in the sixty-four common-mode range modules 601 can be controlled by the common-mode control signal provided by the six control pins 602, thereby realizing the on / off of the common-mode range module 601 and completing the fine search for the optimal VCM setting under the sixty-four common-mode range modules 601.

[0193] For example, as shown in FIG26, the distribution of N-type transistors and / or P-type transistors in each common-mode slot module 601 can be arranged sequentially without overlap according to the number and type of transistors T in each common-mode slot module 601. For example, 384 transistors T can be used to construct sixty-four common-mode slot modules 601. Each common-mode slot module 601 includes six transistors T, of which there are 192 N-type transistors and 192 P-type transistors. The six transistors T in each common-mode slot module 601 can be configured as follows:

[0194] The type planning for the first transistor T in the common mode slot module 601 is as follows: the first transistor T in the first to the 32nd common mode slot modules 601 are all P-type transistors, and the first transistor T in the 33rd to the 64th common mode slot modules 601 are all N-type transistors.

[0195] The type planning for the second transistor T in the common-mode slot module 601 is as follows: the second transistor T in the first to the sixteenth common-mode slot module 601 and the 33rd to the forty-eighth common-mode slot module 601 are all P-type transistors, and the second transistor T in the remaining common-mode slot modules 601 are all N-type transistors.

[0196] The type of the third transistor T in the common-mode slot module 601 is planned as follows: the third transistor T in the first to eighth common-mode slot modules 601, the 17th to 24th common-mode slot modules 601, the 33rd to 40th common-mode slot modules 601, and the 49th to 56th common-mode slot modules 601 are all P-type transistors, and the third transistor T in the remaining common-mode slot modules 601 are all N-type transistors.

[0197] The type planning for the fourth transistor T in the common-mode slot module 601 is as follows: common-mode slot modules 601 to 601, common-mode slot modules 601 to 601, common-mode slot modules 601 to 601, common-mode slot modules 601 to 601, common-mode slot modules 601 to 601, common-mode slot modules 601 to 601, and common-mode slot module 601, 601, 601, 601, and 601, 601, and 601, 601, and 601, 601, and 601, 601. The fourth transistor T in modules 601 to the 36th common-mode slot module 601, the 41st common-mode slot module 601 to the 44th common-mode slot module 601, the 49th common-mode slot module 601 to the 52nd common-mode slot module 601, and the 57th common-mode slot module 601 to the 60th common-mode slot module 601 are all P-type transistors, while the fourth transistor T in the remaining common-mode slot module 601 are all N-type transistors.

[0198] The type planning for the fifth transistor T in the common-mode slot module 601 is as follows: Common-mode slot modules 601 to 601, common-mode slot modules 601 to 901, common-mode slot modules 601 to 1001, common-mode slot modules 601 to 1401, common-mode slot modules 601 to 1801, common-mode slot modules 601 to 2201, common-mode slot modules 601 to 2601, common-mode slot modules 601 to 300, and common-mode slot module 601... The fifth transistor T in blocks 601 to 34, 37 to 38, 41 to 42, 45 to 46, 49 to 50, 53 to 54, 57 to 58, and 61 to 62 are all P-type transistors, while the fifth transistor T in the remaining common-mode blocks 601 are all N-type transistors.

[0199] The type planning for the sixth transistor T in the common-mode octet module 601 is as follows: the sixth transistor T in single-digit common-mode octet modules 601 is a P-type transistor, and the sixth transistor T in double-digit common-mode octet modules 601 is an N-type transistor.

[0200] For example, the six control pins 602 are designated as first control pin D1, second control pin D2, third control pin D3, fourth control pin D4, fifth control pin D5, and sixth control pin D6. For instance, if the common-mode control signal provided by the first control pin D1 is 1 (high level), the first transistor (N-type transistor) in V32-V63 is turned on; if the common-mode control signal provided by the second control pin D2 is 0 (low level), the second transistor (P-type transistor) in V32-V47 is turned on; if the common-mode control signal provided by the third control pin D3 is 1 (high level), the third transistor (N-type transistor) in V40-V47 is turned on; and if the common-mode control signal provided by the fourth control pin D4 is 1 (high level), the fourth transistor (N-type transistor) in V44-V47 is turned on. When the common-mode control signal provided by the fifth control pin D5 is 0 (low level), the fifth transistor (P-type transistor) in V44 to V45 is turned on; when the common-mode control signal provided by the sixth control pin D6 is 1, the sixth transistor (N-type transistor) in V45 is turned on. Finally, the first transistor T to the sixth transistor T in V45 are all turned on. The voltage output of the corresponding gear generated by the gear voltage generator 601-1 in V45, that is, the VCM output by the timing control chip 600 is the VCM corresponding to the 45th common-mode gear module 601 (V45).

[0201] For example, as shown in Figure 27, after power-on, the timing control chip 600 defaults to the VCM under one of the common-mode level modules 601, and then iterates through the VCMs under different common-mode level modules 601, that is, iterates through the VCMs under sixty-four common-mode level modules 601. The connector 400 feeds back to the timing control chip 600 the number of signal anomalies under each common-mode level module 601, such as the signal bit error rate. A fixed-size data packet is sent for each level. The timing control chip 600 records and stores the signal bit error rate value fed back by the connector 400 under the VCM settings of different common-mode level modules 601 (bit error rate = bit errors in transmission / total number of transmitted bits * 100%), which are recorded as Q1 / Q2....Q63 / Q64 respectively. By comparing, the minimum signal bit error rate value is obtained, thereby controlling the control pin 602 to provide the corresponding common-mode control signal, automatically locating the optimal VCM setting value of the common-mode level module 601. This solution can adaptively match the optimal VCM according to different application scenarios and requirements.

[0202] On the other hand, as shown in FIG28, a display device 10000 is provided, including the display module 1000 as described above.

[0203] For example, the display device 10000 can be any device that displays either moving (e.g., video) or stationary (e.g., still image), and whether it is text or image. Display devices include, but are not limited to, televisions, mobile phones, wearable devices, personal digital assistants (PDAs), augmented reality (AR) devices, virtual reality (VR) devices, handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, camcorders, game consoles, clocks, calculators, television monitors, flat panel displays, computer monitors, in-vehicle displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.

[0204] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0205] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A foldable circuit board, comprising: A connecting body is provided with multiple connecting lines; The connecting body is configured to be foldable; Two plug-in ports are provided. When the connecting body is in the unfolded state, the two plug-in ports are respectively connected to both ends of the extending direction of the connecting body, and the two plug-in ports are connected by the plurality of connecting lines. The connecting body includes a first side, and the extending direction of the first side is consistent with the extending direction of the connecting body. When the connecting body is in a folded state, the two plug-in ports are located on the side of the first side away from the connecting body; the connecting body also includes at least one folded portion and a flat portion other than the at least one folded portion, the folded portion including: The first crease portion includes two first creases and a first crease sub-portion located between the two first creases; the extending directions of the two first creases intersect the extending directions of the plurality of connecting lines at the location of the first crease portion; the included angle between the first crease sub-portion and the flat portion is a first included angle; The second crease portion includes two second creases and a second crease sub-portion located between the two second creases; the extending directions of the two second creases intersect the extending directions of the plurality of connecting lines at the location of the second crease portion; the included angle between the second crease sub-portion and the flat portion is a second included angle; The folded part is located between the first crease and the second crease, and the folded part protrudes relative to the flat part. The angle between the plane of the folded part and the plane of the flat part is less than or equal to a preset angle.

2. The foldable circuit board according to claim 1, wherein, The two first creases of the first crease portion extend in a direction perpendicular to the extension direction of the plurality of connecting lines at the location of the first crease portion; the two second creases of the second crease portion extend in a direction perpendicular to the extension direction of the plurality of connecting lines at the location of the second crease portion.

3. The foldable circuit board according to claim 1 or 2, wherein, The folded sub-section is parallel to the flat section.

4. The foldable circuit board according to any one of claims 1 to 3, wherein, The first included angle ranges from 20° to 80°; the second included angle ranges from 20° to 80°; and the preset angle ranges from 0° to 20°.

5. The foldable circuit board according to any one of claims 1 to 4, wherein, The second included angle is equal to the first included angle, and the widths of the first crease portion and the second crease portion are equal.

6. The foldable circuit board according to any one of claims 1 to 5, wherein, When the connecting body is in a folded state, the connecting body includes a first region located between the two plug-in ports; at least one of the folded portions is located in the first region.

7. The foldable circuit board according to any one of claims 1 to 6, wherein, When the connecting body is in a folded state, the connecting body further includes at least one second region, one second region being adjacent to a plug-in port, and the second region and the plug-in port being located on one side of the first side of the connecting body; at least one fold is located in the second region.

8. The foldable circuit board according to any one of claims 1 to 7, wherein, When the connecting body is in a folded state, the connecting body includes a first region, at least one second region, and other regions besides the first region and the at least one second region; the first region is located between the two plug ports; one second region is close to one plug port, and the second region and the plug port are located on one side of the first side of the connecting body; When the folded portion is not provided in the first region, the connecting body includes at least one third fold extending along a first direction, the at least one third fold penetrating the first region and the other regions; the connecting body is folded along the at least one third fold. The first direction is the extension direction of the plurality of connecting lines in the first region.

9. The foldable circuit board according to claim 8, wherein, At least one of the third creases on the connecting body is provided with a slit in the portion of the first region.

10. The foldable circuit board according to claim 9, wherein, On the connecting body, at least one third crease located in the first region is provided with fine slits; The slits divide the portion of the connecting body located in the first region into strips of equal width, the width of which is the dimension on the connecting body in a direction perpendicular to the first direction.

11. The foldable circuit board according to any one of claims 1 to 10, wherein, The connection body includes a conductive connection layer and an insulating protective layer covering the conductive connection layer. The conductive connection layer is used to set the plurality of connection lines. The insulating protective layer is a soft film material.

12. The foldable circuit board according to any one of claims 1 to 11, wherein, The foldable circuit board is a flexible flat cable connector.

13. The foldable circuit board according to any one of claims 1 to 12, wherein, The surface of the connecting body is provided with a shielding protective layer.

14. The foldable circuit board according to claim 13, wherein, The shielding protective layer is made of aluminum foil Mylar composite material.

15. A display module, comprising: A display panel includes at least one side, the at least one side including a bonding side, the display panel including a bonding area adjacent to the bonding side, the bonding area being connected to a plurality of connectors; Multiple sub-circuit boards, each sub-circuit board being connected to at least one connector; among the multiple sub-circuit boards, at least two adjacent sub-circuit boards are connected by a foldable circuit board as described in any one of claims 1 to 14.

16. The display module according to claim 15, wherein, When the foldable circuit board is inserted into the side of two adjacent sub-circuit boards away from the display panel, the two adjacent sub-circuit boards are connected by the foldable circuit board as described in any one of claims 1 to 14; or, when the foldable circuit board is inserted into the side of two adjacent sub-circuit boards close to the display panel, the two adjacent sub-circuit boards are connected by the foldable circuit board as described in any one of claims 8 to 10.

17. The display module according to claim 15 or 16, wherein, The display module further includes a control circuit board, at least one of the plurality of sub-circuit boards being connected to the control circuit board; at least one sub-circuit board is provided with at least one gear level adjuster, the gear level adjuster being configured to form multiple different gear levels, and one gear level adjuster being connected to a connector; the sub-circuit board is also provided with at least one microcontroller, the first terminal of the at least one microcontroller being connected to the control circuit board; the microcontroller is configured to output a gear level control signal according to the strength of the input signal, thereby controlling the gear level adjuster to form multiple different gear levels; When the sub-circuit board is equipped with a microcontroller, the second terminal of the microcontroller is connected to the at least one gear adjuster. In the case of a sub-circuit board with multiple gear shifters and multiple microcontrollers, the second terminal of one microcontroller is connected to one gear shifter.

18. The display module according to claim 17, wherein, The gear shift regulator includes multiple gear shift sub-adjusters, each with a first terminal, a second terminal, and a third terminal. The third terminals of the multiple gear shift sub-adjusters are respectively connected to the second terminal of the microcontroller. A first resistor is provided between the first terminal and the third terminal, and a second resistor is provided between the second terminal and the third terminal. The multiple gear shift sub-adjusters are configured to combine with each other to form multiple different gears.

19. The display module according to any one of claims 15 to 18, wherein, The display module further includes a control circuit board and a timing control chip. The timing control chip is connected between the plurality of sub-circuits and the control circuit board, or the timing control chip is disposed on the control circuit board. The control circuit board also includes a step-down circuit chip; each sub-circuit board has at least one analog switch, the first terminal of each analog switch is connected to the step-down circuit chip, and the step-down circuit chip is configured to provide Vterm voltage; the second terminal of an analog switch is connected to a connector, which is configured to feed back the number of signal anomalies to the timing control chip; the third terminal of each analog switch is connected to the timing control chip, which is configured to store configuration data applicable to low-voltage differential signal mode and current mode logic mode, record and store the number of signal anomalies fed back by the connector, and output a mode control signal according to the number of signal anomalies to control the analog switches to close or open.

20. The display module according to claim 19, wherein, The analog switch includes a first transistor and a second transistor connected in parallel. The first terminals of the first transistor and the second transistor are both connected to the buck converter chip. The second terminals of the first transistor and the second transistor are both connected to a connector. The third terminals of the first transistor and the second transistor are both connected to the timing control chip.

21. The display module according to claim 20, wherein, The first transistor is an N-type transistor, and the second transistor is a P-type transistor; the third terminal of the second transistor is connected to the timing control chip through a NOT gate circuit.

22. The display module according to any one of claims 19 to 21, wherein, The timing control chip is also provided with multiple common-mode level modules. Each common-mode level module includes a level voltage generator and N transistors connected in series. The first transistor is connected to the level voltage generator, and the last transistor is connected to the output terminal of the timing control chip. The timing control chip is further provided with N control pins. The control stages of the N transistors in each common-mode gear module are respectively connected to the N control pins. The control pins are configured to provide common-mode control signals. The connector is configured to feed back the number of signal anomalies to the timing control chip. The timing control chip is further configured to traverse multiple common-mode gear modules upon power-on, record and store the number of signal anomalies fed back by the connector under each common-mode gear module, and locate the appropriate common-mode gear module based on the number of signal anomalies.

23. The display module according to claim 22, wherein, The N transistors include multiple N-type transistors and / or multiple P-type transistors.

24. A display device comprising a display module as described in any one of claims 15 to 23.

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