Power conversion method and power conversion device

Abstract

A power conversion device (20) comprises: inverter circuits (2A, 2B) that convert DC power from a DC power supply (4) into n-phase (n≥3) AC power, and drive an AC load (1); a smoothing capacitor (3) that is provided between the DC power supply (4) and the inverter circuits (2A, 2B); and a control unit (7) that drives the inverter circuits (2A, 2B). The control unit (7) is configured to perform control so as to cause the switching timing of a prescribed phase among the switching timings (Su, Sv, Sw) of the n phases to change according to a specific pattern, on the basis of a voltage command value corresponding to operation of the AC load (1), and an operation state (θre) of the AC load (1).

Description

Power Conversion Method and Power Conversion Device

[0001] The present invention relates to a power conversion method and a power conversion device.

[0002] Patent Document 1 describes a power conversion device applied to a motor control device that drives a multiphase motor using an inverter circuit. In a power conversion device such as that of Patent Document 1, a smoothing capacitor is provided between a DC power supply and an inverter circuit in order to mitigate fluctuations in the input voltage of the inverter circuit during switching of the switching elements of the inverter circuit and to stably control the power supply to the load.

[0003] Japanese Unexamined Patent Application Publication No. 2009-232546

[0004] For example, a ripple current with a peak value of about 100 A flows through the smoothing capacitor, and losses occur due to the internal resistance of the smoothing capacitor. When the temperature of the smoothing capacitor rises due to this loss, the durability of the smoothing capacitor decreases, leading to a reduction in its lifespan.

[0005] Therefore, in the power conversion device of Patent Document 1, according to the operating point of the multiphase motor (power conversion), the phase difference between the carrier signals of each phase used for pulse width modulation (PWM) control is selectively and uniquely determined so as to reduce the ripple current flowing through the smoothing capacitor. However, depending on the form of power conversion and the operating point of power conversion, when the phase difference between the carrier signals of each phase is fixed, there is an overlap in the ripple currents of each phase, resulting in a large peak value of the ripple current. Therefore, with the method of uniquely determining the phase difference between the carrier signals of each phase according to the operating point of power conversion as shown in Patent Document 1, it may not be possible to obtain a sufficient effect of reducing the peak value of the ripple current.

[0006] The present invention has been made in view of the above problems, and its object is to provide a power conversion method and a power conversion device capable of reducing the peak value of the ripple current flowing through a smoothing capacitor.

[0007] A power conversion device according to one aspect of the present invention comprises an inverter circuit that converts DC power from a DC power source into n-phase (n≧3) AC power, a smoothing capacitor provided between the DC power source and the inverter circuit, and a control unit that drives the inverter circuit. The control unit is configured to control the switching timing of a predetermined phase among the n-phase switching timings in a specific pattern based on a voltage command value corresponding to the operation of the AC load and the operating state of the AC load.

[0008] According to the present invention, it is possible to provide a power conversion method and a power conversion device that can reduce the peak value of the ripple current flowing through a smoothing capacitor.

[0009] Figure 1 is a block diagram illustrating an overview of a motor drive system to which the power converter according to the first embodiment is applied. Figure 2 is a block diagram illustrating an example of the configuration of the timing selection unit shown in Figure 1. Figure 3 is a diagram illustrating an example of the logic for selecting the switching timing in the first embodiment. Figure 4A is a diagram illustrating the calculated waveforms of the ripple current of each phase flowing through the smoothing capacitor in the first embodiment. Figure 4B is a diagram illustrating the calculated waveform of the total ripple current flowing through the smoothing capacitor in the first embodiment. Figure 5A is a diagram illustrating the calculated waveforms of the ripple current of each phase flowing through the smoothing capacitor in the first comparative example. Figure 5B is a diagram illustrating the calculated waveform of the total ripple current flowing through the smoothing capacitor in the first comparative example. Figure 6A is a diagram illustrating the calculated waveforms of the ripple current of each phase flowing through the smoothing capacitor in the second comparative example. Figure 6B is a diagram illustrating the calculated waveform of the total ripple current flowing through the smoothing capacitor in the second comparative example. Figure 7 is a block diagram illustrating an overview of a motor drive system to which the power converter according to the second embodiment is applied. Figure 8 is a block diagram illustrating an example of the configuration of the comparison value generation unit shown in Figure 7. Figure 9 is a time chart showing an example of the operation of the synchronous carrier generation unit shown in Figure 7. Figure 10 is a time chart showing an example of the operation of the PWM generation unit shown in Figure 7. Figure 11 is a time chart showing the U-phase current and its average value at the moment the switching timing is changed in the first embodiment (without voltage compensation) and the second embodiment (with voltage compensation).

[0010] The embodiments will be described with reference to the drawings. In the drawings, the same parts are denoted by the same reference numerals and their descriptions are omitted.

[0011] (First Embodiment) Referring to Figure 1, the configuration of the power converter 20 according to the first embodiment will be described. In the first embodiment, the power converter 20 will be described as an example in which it is applied as a motor control device that drives a motor 1 as an open-winding motor as a multiphase AC load. The motor 1 is an n-phase electric motor, and in the first embodiment, a three-phase electric motor with n=3 phases will be described as an example, but it is not limited to this, and the power converter 20 can be applied to an electric motor with any number of phases, such as n=5, 7, etc.

[0012] The power converter 20 includes a first inverter circuit 2A and a second inverter circuit 2B to which a DC power supply 4 is connected, a smoothing capacitor 3, a resolver 5, a control unit 7, and an ammeter side unit 17, all located between the DC power supply 4 and the first and second inverter circuits 2A and 2B. Since the motor 1 is an open-wound motor, two first inverter circuits 2A and 2B are used, but if the power converter 20 is applied to a multi-phase motor drive system other than an open-wound motor, one inverter circuit may be used. The DC power supply 4 is, for example, a rechargeable secondary battery such as a lithium-ion battery. The smoothing capacitor 3 smooths the voltage supplied from the DC power supply 4 to the first and second inverter circuits 2A and 2B and removes noise, etc.

[0013] The first inverter circuit 2A and the second inverter circuit 2B each convert the DC power of the DC power supply 4 into n-phase (three-phase in the first embodiment) AC power to drive an n-phase motor 1 having n coils. The first end of the motor 1 is connected to the output terminal of the first inverter circuit 2A, and the second end of the motor 1 is connected to the output terminal of the second inverter circuit 2B. The control unit 7 controls the driving of the motor 1 via the first inverter circuit 2A and the second inverter circuit 2B.

[0014] Each of the first inverter circuits 2A and 2B has, for example, n arms (not shown) corresponding to n coils (not shown) of the motor 1. Each arm is connected in parallel to a DC power supply 4 and a smoothing capacitor 3. Each arm is configured by connecting two semiconductor switching elements, such as IGBTs and MOSFETs, in series, and the midpoint of the two semiconductor switching elements connected in series is connected to the corresponding phases (here, U-phase, V-phase, and W-phase) of the coils of the motor 1. The control electrode (gate) of each semiconductor switching element is connected to a control unit 7. The motor 1 is driven by controlling each semiconductor switching element with a gate signal from the control unit 7. Since the first inverter circuits 2A and 2B with such configurations can use known inverter circuits such as the inverter circuit described in Patent Document 1, for example, a more detailed explanation is omitted.

[0015] The resolver 5 measures the rotor position θre, which is the operating state of the motor 1, and feeds back the measured value of the rotor position θre to the control unit 7. The ammeter side unit 17 measures the phase currents flowing through each phase of the motor 1, namely the U-phase current Iu, the V-phase current Iv, and the W-phase current Iw, and feeds back the measured values ​​of the phase currents Iu, Iv, and Iw to the control unit 7.

[0016] The control unit 7 is a general-purpose computer equipped with a CPU (Central Processing Unit), memory, and an input / output unit. A computer program (control program) is installed in the control unit 7. By executing the computer program, the control unit 7 performs various functions.

[0017] The control unit 7 is a system that performs current control to realize the desired torque command value from the torque command unit 6 in the motor 1, and performs feedback control to supply the motor 1 with phase currents Iu, Iv, and Iw necessary to generate a predetermined torque. The control unit 7 comprises a current command unit 8, an n-phase / dq0 conversion unit 9, a current control unit 10, a dq0 / n-phase conversion unit 11, a timing selection unit 12, a triangular wave generation unit 13, and a PWM generation unit 14.

[0018] The torque command value from the torque command unit 6 is input to the current command unit 8. The current command unit 8 converts the torque command value into current command values ​​on the dq0 axis, namely the d-axis current command value Id*, the q-axis current command value Iq*, and the 0-axis current command value I0*, and inputs them to the current control unit 10. The rotor position θre of the motor 1 measured by the resolver 5 and the phase currents Iu, Iv, and Iw measured by the ammeter side unit 17 are input to the n-phase / dq0 conversion unit 9. The n-phase / dq0 conversion unit 9 converts the measured phase currents Iu, Iv, Iw and rotor position θre into coordinates corresponding to the measured currents on the dq0 axis, namely the d-axis measured current Id, the q-axis measured current Iq, and the 0-axis measured current I0, and inputs them to the current control unit 10.

[0019] The current control unit 10 calculates the voltage command values ​​on the dq0 axis, namely the d-axis voltage command value Vd*, the q-axis voltage command value Vq*, and the 0-axis voltage command value V0*, from the difference between the current command values ​​Id*, Iq*, and I0* on the dq0 axis and the measured currents Id, Iq, and I0, using PI control or the like. The calculated voltage command values ​​Vd*, Vq*, and V0* on the dq0 axis are input to the dq0 / n-phase conversion unit 11 and the timing selection unit 12.

[0020] The dq0 / n-phase conversion unit 11 converts the voltage command values ​​Vd*, Vq*, and V0* on the dq0 axis into n-phase voltage command values ​​Vu*, V-phase voltage command value Vv*, and W-phase voltage command value Vw*, and inputs them to the PWM generation unit 14. The timing selection unit 12 determines the optimal switching timings Su, Sv, and Sw for each phase based on the d-axis voltage command value Vd*, the q-axis voltage command value Vq*, and the U-phase modulated wave phase θmu calculated from the rotor position θre, and inputs them to the triangular wave generation unit 13. The triangular wave generation unit 13 generates three-phase triangular wave carrier signals Cu, Cv, and Cw based on the switching timings Su, Sv, and Sw, and inputs them to the PWM generation unit 14.

[0021] The PWM generation unit 14 performs a triangular wave comparison using the n-phase voltage command values ​​Vu*, Vv*, Vw* and the triangular wave carrier signals Cu, Cv, Cw to generate the first gate signals Gu1, Gv1, Gw1 and the second gate signals Gu2, Gv2, Gw2, which are PWM-controlled pulse waves. The first gate signals Gu1, Gv1, Gw1 control the switching operation of the first inverter circuit 2A, and the second gate signals Gu2, Gv2, Gw2 control the switching operation of the second inverter circuit 2B. The first gate signals Gu1, Gv1, Gw1 and the second gate signals Gu2, Gv2, Gw2 are pulse signals modulated from voltage sinusoidal wave commands with the same modulation rate but shifted phase. Phase currents Iu, Iv, Iw are supplied to each coil of the motor 1 from the first inverter circuit 2A and the second inverter circuit 2B.

[0022] Next, the operation of the timing selection unit 12 will be explained in more detail using Figure 2. Figure 2 is a block diagram showing an example of the configuration of the timing selection unit 12 shown in Figure 1. In the configuration shown in Figure 2, the timing selection unit 12 includes a voltage phase calculation unit 15 and a timing selection logic unit 16. The timing selection unit 12 calculates the voltage phase θvol from the d-axis voltage command value Vd* and the q-axis voltage command value Vq* using the voltage phase calculation unit 15, and calculates the U-phase modulated wave phase θmu by adding the rotor position θre measured by the resolver 5 to the voltage phase θvol. Note that the timing selection unit 12 does not only calculate the U-phase modulated wave phase θmu, but may also calculate the V-phase modulated wave phase θmv or the W-phase modulated wave phase θmw.

[0023] The U-phase modulated wave phase θmu is input to the timing selection logic unit 16. The timing selection logic unit 16 controls the switching timings Su, Sv, and Sw of each phase to change in a specific pattern according to the U-phase modulated wave phase θmu. For example, the timing selection logic unit 16 controls two of the three switching timings Su, Sv, and Sw to be in phase, and one of them to have a phase difference with respect to the other two, according to the value of the U-phase modulated wave phase θmu. The one switching timing that has a phase difference with respect to the other two switching timings is controlled to switch in a specific pattern according to the value of the U-phase modulated wave phase θmu. For example, the one switching timing that has a phase difference with respect to the other two switching timings is controlled to switch sequentially according to the value of the U-phase modulated wave phase θmu.

[0024] By controlling the switching timing of a predetermined phase among the n-phase switching timings Su, Sv, and Sw in a specific pattern based on the U-phase modulated wave phase θmu, the peak value of the total ripple current Ir flowing through the smoothing capacitor 3 can be reduced. For example, one of the two switching timings having a phase difference is controlled to switch in a specific pattern according to the value of the U-phase modulated wave phase θmu. This reduces the peak value of the total ripple current Ir flowing through the smoothing capacitor 3.

[0025] Instead of controlling all three switching timings Su, Sv, and Sw to have equal phase differences, for example, the switching timings Su and Sv of the U and V phases are set to be in phase with the reference carrier, while the switching timing Sw of the W phase is set to have a phase difference with the reference carrier. This has the effect of reducing the peak value of the total ripple current Ir.

[0026] Furthermore, the system may be configured to operate when the modulation rate determined by current control exceeds a predetermined threshold. That is, when the modulation rate exceeds a predetermined threshold (for example, 50%), the switching timing of a predetermined phase among the switching timings Su, Sv, and Sw may be controlled to change in a specific pattern based on the U-phase modulated wave phase θmu. When the modulation rate is below the predetermined threshold (for example, 50%), the system may be controlled not to change the switching timings Su, Sv, and Sw.

[0027] When the modulation rate exceeds a predetermined threshold (for example, 50%) and the pulse widths of the ripple currents Iur, Ivr, and Iwr flowing through the smoothing capacitor 3 become wider, the switching timings Su, Sv, and Sw are changed. This maximizes the effect of reducing the peak value of the total ripple current Ir.

[0028] Figure 3 shows an example of the logic by which the timing selection logic unit 16 selects the switching timings Su, Sv, and Sw for each phase according to the value of the U-phase modulated wave phase θmu. Here, two types of switching timings are provided: a reference carrier and a carrier with a phase difference of 90° (π / 2 radians) relative to the reference carrier, and the logic is set up to decide which one to use for each phase. In other words, in a motor 1 in steady operation, the logic is such that the switching timing of only one of the three phases is shifted every 30° (π / 6 radians) of electrical angle.

[0029] In detail, when the U-phase modulated wave phase θmu is between π / 6 and 3π / 6 radians, the U-phase and V-phase switching timings Su and Sv are used as reference carriers, and the W-phase switching timing Sw is set as a carrier with a phase difference of 90° (π / 2 radians) relative to the reference carrier. When the U-phase modulated wave phase θmu is between 3π / 6 and 5π / 6 radians, the V-phase and W-phase switching timings Sv and Sw are used as reference carriers, and the U-phase switching timing Su is set as a carrier with a phase difference of 90° relative to the reference carrier. When the U-phase modulated wave phase θmu is between 5π / 6 and 7π / 6 radians, the W-phase and U-phase switching timings Sw and Su are used as reference carriers, and the V-phase switching timing Sv is set as a carrier with a phase difference of 90° relative to the reference carrier. When the U-phase modulated wave phase θmu is between 7π / 6 and 9π / 6 radians, the U-phase and V-phase switching timings Su and Sv are used as reference carriers, and the W-phase switching timing Sw is set as a carrier with a phase difference of 90° relative to the reference carrier. When the U-phase modulated wave phase θmu is between 9π / 6 and 11π / 6 radians, the V-phase and W-phase switching timings Sv and Sw are used as reference carriers, and the U-phase switching timing Su is set as a carrier with a phase difference of 90° relative to the reference carrier. When the U-phase modulated wave phase θmu is between 11π / 6 and 12π / 6, or between 0 and π / 6 radians, the W-phase and U-phase switching timings Sw and Su are used as reference carriers, and the V-phase switching timing Sv is set as a carrier with a phase difference of 90° relative to the reference carrier.

[0030] In addition to the example in Figure 3, various other methods can be considered, such as dividing the interval of the U-phase modulated wave phase θmu into finer segments or defining the logic continuously in a function-like form. For example, in the case of the number of phases n = 5, the logic may be such that the switching timing of only one of the five phases is shifted, or the logic may be such that the switching timing of two of the five phases is shifted. For any number of phases n, the logic may be such that the switching timing of a number of phases less than n / 2 is shifted.

[0031] Next, using Figures 4A and 4B, we will explain the ripple currents Iur, Ivr, Iwr for each phase and the total ripple current Ir flowing through the smoothing capacitor 3 when the power converter 20 according to the first embodiment is applied as a motor control device to drive the motor 1 as an open-winding motor. Figure 4A is a diagram showing the calculated waveforms of the ripple currents Iur, Ivr, Iwr for each phase flowing through the smoothing capacitor 3 in the power converter 20 according to the first embodiment. Figure 4B is a diagram showing the calculated waveform of the total ripple current Ir = Iur + Ivr + Iwr flowing through the smoothing capacitor 3 in the power converter 20 according to the first embodiment.

[0032] Furthermore, for comparison, Figures 5A and 5B show the first comparative example in which the switch timings of all three phases are synchronized, and Figures 6A and 6B show the second comparative example in which interleaving is performed to create a phase difference of 120° (2π / 3 radians) between the three phases. Figure 5A is a diagram showing the calculated waveforms of the ripple currents Iur, Ivr, and Iwr of each phase flowing through the smoothing capacitor 3 in the power converter 20 operated in the first comparative example. Figure 5B is a diagram showing the calculated waveform of the total ripple current Ir flowing through the smoothing capacitor 3 in the power converter 20 operated in the first comparative example. Figure 6A is a diagram showing the calculated waveforms of the ripple currents Iur, Ivr, and Iwr of each phase flowing through the smoothing capacitor 3 in the power converter 20 operated in the second comparative example. Figure 5B is a diagram showing the calculated waveform of the total ripple current Ir flowing through the smoothing capacitor 3 in the power converter 20 operated in the second comparative example.

[0033] In the first embodiment shown in Figures 4A and 4B, the first comparative example shown in Figures 5A and 5B, and the second comparative example shown in Figures 6A and 6B, the operating point of the motor 1 on the horizontal axis (time axis) is the same. Furthermore, the calculation results are shown for a modulation rate around 50%, where the total ripple current Ir to the smoothing capacitor 3 is large.

[0034] As shown in Figure 5A, in the first comparative example where the switch timings of all three phases are synchronized, the peak value of the total ripple current Ir is approximately 200A, as shown in Figure 5B. Furthermore, in the second comparative example where interleaving is performed to create a phase difference of 120° (2π / 3 radians) between the three phases, as shown in Figure 6A, the peak value of the total ripple current Ir is approximately 175A, as shown in Figure 6B. Thus, it can be seen that in the second comparative example, the peak value of the total ripple current Ir is not reduced as much as in the first comparative example. This is because when the modulation rate is around 50%, the pulse width of the ripple currents Iur, Ivr, and Iwr of each phase becomes wider, causing overlap between the ripple currents Iur, Ivr, and Iwr of each phase.

[0035] On the other hand, when the first embodiment shown in Figures 4A and 4B is applied, the peak value of the total ripple current Ir can be reduced to about 100A. This is because, in the first embodiment, the overlap of the waveforms of the ripple currents of the two phases with small current values ​​is allowed, and the waveform of the ripple current of only the one phase with a large current value is controlled to continuously shift the pulse phase by 90° from the other two phases. Looking at the waveforms of the three phase ripple currents Iur, Ivr, and Iwr in Figure 4A, from 0ms to 0.1ms, the V-phase ripple current Ivr is controlled to shift the pulse phase by 90° relative to the ripple currents Iwr and Iur of the other phases. Similarly, from 0.1ms to 0.3ms, the W-phase ripple current Iwr is controlled to shift the pulse phase, and from 0.3ms onward, the U-phase ripple current Iur is controlled to shift the pulse phase.

[0036] Thus, in the first embodiment, the switching timing of a predetermined phase among the switching timings Su, Sv, and Sw is controlled to change in a specific pattern based on the U-phase modulated wave phase θmu. As a result, in the first embodiment, a greater reduction in the peak value of the ripple current can be obtained than, for example, the method of providing a phase difference as in the second reference example.

[0037] (Second Embodiment) Referring to Figure 7, the configuration of the power converter 20A according to the second embodiment will be described. In the following, only the differences between the configuration of the power converter 20A and the power converter 20 according to the first embodiment will be described.

[0038] In the second embodiment, the d-axis voltage command value Vd* and q-axis voltage command value Vq* calculated by the current control unit 10, along with the rotor position θre, are input to the comparison value generation unit 12A. The comparison value generation unit 12A converts the d-axis voltage command value Vd*, q-axis voltage command value Vq*, and rotor position θre into comparison values ​​Tu[m], Tv[m], and Tw[m] with respect to the synchronous carrier Cr, and inputs them to the PWM generation unit 14.

[0039] The synchronous carrier generation unit 13A generates a carrier (synchronous carrier) Cr synchronized with the frequency of the output voltage or output current. In the second embodiment, since the power converter 20A is assumed to drive the motor 1, the synchronous carrier Cr is generated from the rotor position θre of the motor 1 obtained from the resolver 5. Generally, the output voltage and output current in motor driving are synchronized with the rotor position of the motor, so the synchronous carrier Cr generated from the rotor position θre is synchronized with the phase of the output voltage and output current. The PWM generation unit 14 compares the synchronous carrier Cr with the comparison values ​​Tu[m], Tv[m], and Tw[m] for each phase, and outputs the first gate signals Gu1, Gv1, Gw1 of the first inverter circuit 2A and the second gate signals Gu2, Gv2, Gw2 of the second inverter circuit 2B.

[0040] Figure 8 is a block diagram showing an example of the configuration of the comparison value generation unit 12A. In the configuration example of Figure 8, the comparison value generation unit 12A includes a modulation rate calculation unit 12B and a comparison value table output unit 12C. The modulation rate calculation unit 12B calculates the modulation rate Md from the d-axis voltage command value Vd* and the q-axis voltage command value Vq*. The modulation rate Md and rotor position θre are input to the comparison value table output unit 12C. The comparison value table output unit 12C stores comparison values ​​Tu[m], Tv[m], and Tw[m] corresponding to the modulation rate Md and rotor position θre. The comparison values ​​Tu[m], Tv[m], and Tw[m] are prepared in k+1 values ​​for each phase according to the modulation rate Md and rotor position θre, for a total of 3(k+1) comparison values. Here, the magnitude of k is, for example, around k=10. Based on the modulation rate Md and rotor position θre input to the comparison value table output unit 12C, appropriate comparison values ​​Tu[m], Tv[m], and Tw[m] are selected and input to the PWM generation unit 14. Using the comparison values ​​Tu[m], Tv[m], and Tw[m], a pulse pattern is generated that compensates for the interphase switching timing difference set to reduce the peak value of the total ripple current Ir, and the voltage error that arises as a result, according to the modulation rate Md and rotor position θre.

[0041] The comparison value table output unit 12C can use the memory provided in the control unit 7. More specifically, the memory provided in the control unit 7 stores three-phase comparison values ​​Tu[m], Tv[m], and Tw[m] corresponding to the modulation rate Md and rotor position θre. The three-phase comparison values ​​Tu[m], Tv[m], and Tw[m] correspond to the n-phase voltage command values ​​Vu*, Vv*, and Vw*. Then, appropriate comparison values ​​Tu[m], Tv[m], and Tw[m] are selected according to the modulation rate Md and rotor position θre input to the comparison value table output unit 12C. Furthermore, when the performance of the CPU provided in the control unit 7 is sufficient, the comparison value table output unit 12C may calculate the comparison values ​​Tu[m], Tv[m], and Tw[m] corresponding to the modulation rate Md and rotor position θre using the CPU.

[0042] FIG. 9 is a time chart showing an example of the operation of the synchronous carrier generation unit 13A. In the example shown in FIG. 9, the synchronous carrier generation unit 13A generates a triangular-wave synchronous carrier Cr that folds back at 0 degrees and 180 degrees of the rotor position θre converted into an electrical angle, and inputs it to the PWM generation unit. That is, the frequency of the synchronous carrier Cr is synchronized with the rotor position θre.

[0043] FIG. 10 is a time chart showing an example of the basic operation of the PWM generation unit 14. In the example shown in FIG. 10, the PWM generation unit 14 compares the synchronous carrier Cr generated by the synchronous carrier generation unit 13A with the U-phase comparison value Tu[m] generated by the comparison value generation unit 12A, thereby uniquely determining the pulse patterns of the U-phase gate signals Gu1 and Gu2.

[0044] More specifically, it is as follows. First, when the synchronous carrier Cr rises from 0 and reaches Tu[0], the pulses of the U-phase gate signals Gu1 and Gu2 switch from the H level to the L level. Next, when the synchronous carrier Cr reaches from Tu[0] to Tu[1], the pulses of the U-phase gate signals Gu1 and Gu2 switch from the L level to the H level. Thus, every time the synchronous carrier Cr rises and reaches the next Tu[m], the pulses of the U-phase gate signals Gu1 and Gu2 switch between the L level and the H level. And when k is an even number, when the synchronous carrier Cr reaches Tu[k - 1], the pulses of the U-phase gate signals Gu1 and Gu2 switch from the H level to the L level. When the synchronous carrier Cr reaches Tu[k], the pulses of the U-phase gate signals Gu1 and Gu2 switch from the L level to the H level.

[0045] Next, when the synchronous carrier Cr reaches its maximum value, the direction of the synchronous carrier Cr reverses and it begins to descend. Then, when the synchronous carrier Cr reaches Tu[k], the pulses of the U-phase gate signals Gu1 and Gu2 switch from the H level to the L level, and when the synchronous carrier Cr reaches Tu[k-1], they switch from the L level to the H level, and this operation is repeated. In this way, the switching timing of the pulses of the U-phase gate signals Gu1 and Gu2 is determined by the comparison value Tu[m] between the synchronous carrier Cr and the U-phase. Note that the logic of the L level and H level may be reversed from the example shown here.

[0046] Regarding the V phase, the PWM generation unit 14 uniquely determines the pulse patterns of the V phase gate signals Gv1 and Gv2 by comparing the synchronous carrier Cr generated by the synchronous carrier generation unit 13A with the V phase comparison value Tv [m] generated by the comparison value generation unit 12A. Regarding the W phase, the PWM generation unit 14 uniquely determines the pulse patterns of the W phase gate signals Gw1 and Gw2 by comparing the synchronous carrier Cr generated by the synchronous carrier generation unit 13A with the W phase comparison value Tw [m] generated by the comparison value generation unit 12A.

[0047] Here, the comparison value generation unit 12A controls the switching timing of one of the three-phase gate signals in a specific pattern relative to the other two gate signals, according to the phase of the synchronous carrier Cr, when the modulation rate Md exceeds a predetermined threshold. Here, the phase of the synchronous carrier Cr corresponds to the U-phase modulated wave phase θmu in the first embodiment. For example, similar to Figure 3, according to the phase of the synchronous carrier Cr, the unit generates three-phase comparison values ​​Tu[m], Tv[m], and Tw[m] in which the H level and L level of one of the three-phase gate signals are inverted relative to the other two gate signals (corresponding to the reference carrier). The gate signals whose H level and L level are inverted relative to the other two gate signals, i.e., whose phase difference is 90 degrees, are switched sequentially according to the phase of the synchronous carrier Cr.

[0048] In the power conversion device 20A according to the second embodiment as well, the calculated waveforms of the ripple currents Iur, Ivr, and Iwr of each phase flowing through the smoothing capacitor 3 are the same as those in FIG. 4A, and the calculated waveform of the total ripple current Ir = Iur + Ivr + Iwr flowing through the smoothing capacitor 3 is the same as that in FIG. 4B. That is, in the power conversion device 20A according to the second embodiment as well, similar to the first embodiment, the peak value of the total ripple current Ir can be reduced.

[0049] In the first embodiment, when changing the switching timing of any one of the three-phase gate signals, a voltage error occurs in which the pulse width of the gate signal becomes a value different from the predetermined value. This will be described by taking the case of the U-phase gate signals Gu1 and Gu2 as an example. For example, when the pulse widths of the U-phase gate signals Gu1 and Gu2 become larger than the value of the predetermined PWM, the U-phase voltage Vu applied to the motor 1 becomes larger than the predetermined value (U-phase voltage command value Vu*). Further, when the pulse widths of the gate signals Gu1 and Gu2 become smaller than the value of the predetermined PWM, the U-phase voltage Vu applied to the motor 1 becomes smaller than the predetermined value (U-phase voltage command value Vu*). Due to this voltage error, as shown in the upper graph of FIG. 11, the average value of the U-phase current Iu deviates from the desired value at the moment when the switching timing of the U-phase gate signals Gu1 and Gu2 is changed.

[0050] Therefore, in the second embodiment, for example, the pulse widths immediately before or after changing the switching timing of the U-phase gate signals Gu1 and Gu2 are adjusted by the U-phase comparison value Tu[m], and voltage compensation is performed so that the U-phase voltage Vu applied to the motor 1 becomes a predetermined value. By performing voltage compensation, as shown in the lower graph of FIG. 11, the average value of the U-phase current Iu can be made to change as desired even at the moment when the switching timing of the U-phase gate signals Gu1 and Gu2 is changed.

[0051] As described above, in the second embodiment with voltage compensation, compared with the first embodiment without voltage compensation, the average values of the phase currents Iu, Iv, and Iw can be made to change as desired.

[0052] According to the first and second embodiments, the power conversion device 20 is applied to a motor control device that drives the motor 1 as an open-winding motor, so that the peak value of the total ripple current Ir of the smoothing capacitor 3 can be reduced when the motor 1 is driven.

[0053] In the first and second embodiments, the power converter 20 was described as being applied as a motor control device to drive a motor 1 as an open-winding motor, but it is not limited to this. For example, the same effects can be obtained when the power converter 20 is applied to multi-phase motor drive systems other than open-winding motors that perform DC / AC conversion, or to power conversion systems such as grid-connected systems.

[0054] As described above, embodiments of the present invention have been presented, but the statements and drawings that constitute part of this disclosure should not be understood as limiting the invention. Various alternative embodiments, examples, and operational techniques will become apparent to those skilled in the art from this disclosure.

[0055] 1. Motor 2A. First Inverter Circuit 2B. Second Inverter Circuit 3. Smoothing Capacitor 4. DC Power Supply 5. Resolver 6. Torque Command Unit 7. Control Unit 8. Current Command Unit 9. n-phase / dq0 Conversion Unit 10. Current Control Unit 11. dq0 / n-phase Conversion Unit 12. Timing Selection Unit 12A. Comparison Value Generation Unit 12B. Modulation Rate Calculation Unit 12C. Comparison Value Table Output Unit 13. Triangular Wave Generation Unit 13A. Synchronous Carrier Generation Unit 14. PWM Generation Unit 15. Voltage Phase Calculation Unit 16. Timing Selection Logic Unit 17. Ammeter Side Unit 20, 20A. Power Conversion Device

Claims

1. A power conversion method for a power conversion device for driving an n-phase AC load, comprising an inverter circuit that converts DC power from a DC power supply into n-phase (n≧3) AC power, and a smoothing capacitor provided between the DC power supply and the inverter circuit, the power conversion method comprising: generating an n-phase voltage command value corresponding to the operation of the AC load; driving the inverter circuit based on the voltage command value and a reference carrier; and controlling the switching timing of a predetermined phase among the n-phase switching timings to change in a specific pattern based on the modulated wave phase.

2. The power conversion method according to claim 1, wherein when the modulation rate exceeds a predetermined threshold, the switching timing of the predetermined phase is controlled to change in a specific pattern based on the modulated wave phase, and when the modulation rate is below the predetermined threshold, the switching timing of the predetermined phase is not changed.

3. The power conversion method according to claim 1 or 2, wherein the switching timing of the predetermined phase is controlled to have a difference from the switching timing of the other phases, and the switching timing of the other phases is controlled to have no difference, and the switching timing of the predetermined phase is controlled to switch in a specific pattern between the switching timings of the n phases based on the modulated wave phase.

4. The power conversion method according to claim 3, wherein the creation of a command value for the PWM generation unit that generates the gate signal of the inverter circuit includes controlling the switching timing of the predetermined phase to have a difference from the switching timing of the other phases, and controlling the switching timing of the predetermined phase to switch in a specific pattern between the switching timings of the n phases based on the modulated wave phase.

5. The power conversion method according to claim 4, wherein compensation for voltage errors resulting from controlling the switching timing of a predetermined phase to switch in a specific pattern between the switching timings of the n phases based on the modulated wave phase is included in creating the command value for the PWM generation unit.

6. The power conversion method according to claim 4, wherein the PWM generation unit generates the gate signal by comparing a carrier synchronized with the phase of the output voltage or output current of the AC load with a plurality of comparison values ​​determined according to the modulation rate.

7. The power conversion method according to claim 1 or 2, further comprising: generating an n-phase carrier signal from n-phase switching timings controlled to change the switching timing of a predetermined phase in a specific pattern; generating a pulse-width modulated n-phase gate signal for driving the inverter circuit from the voltage command value and the n-phase carrier signal; and driving the inverter circuit with the n-phase gate signal.

8. A power conversion device for driving an n-phase AC load, comprising: an inverter circuit that converts DC power from a DC power source into n-phase (n≧3) AC power to drive the AC load; a smoothing capacitor provided between the DC power source and the inverter circuit; and a control unit that drives the inverter circuit, wherein the control unit is configured to generate n-phase voltage command values ​​corresponding to the operation of the AC load, drive the inverter circuit based on the voltage command values ​​and a reference carrier, and control the switching timing of a predetermined phase among the n-phase switching timings to change in a specific pattern based on the modulated wave phase.

9. The power conversion device according to claim 8, wherein the control unit is configured to generate an n-phase carrier signal from n-phase switching timings controlled to change the switching timing of a predetermined phase in a specific pattern, generate a pulse-width modulated n-phase gate signal for driving the inverter circuit from the voltage command value and the n-phase carrier signal, and drive the inverter circuit with the n-phase gate signal.

10. The power conversion device according to claim 8 or 9, wherein the AC load is a motor.

11. The power conversion device according to claim 10, wherein the motor is an open-winding motor.

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