Method and system for making a monocrystalline germanium membrane

Abstract

There is described a method of making a monocrystalline germanium (Ge) membrane. The method generally has: depositing a non-porous layer of monocrystalline Ge onto a porous layer of a monocrystalline Ge substrate, the porous layer mechanically coupled to the monocrystalline Ge substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value; depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the monocrystalline Ge substrate with a given mechanical stress value below the critical mechanical stress value; and moving the stressor layer away from the monocrystalline Ge substrate, said moving freeing the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

Description

METHOD AND SYSTEM FOR MAKING A MONOCRYSTALLINE GERMANIUM MEMBRANE FIELD

[0001] The improvements generally relate to the making of monocrystalline germanium membranes, and more particularly relate to the detachment of such monocrystalline germanium membranes away from monocrystalline germanium host substrates.BACKGROUND

[0002] Free-standing single crystal germanium (Ge) membranes have recently gained increasing interest for various applications including infrared waveguides, photodetectors, lasers, biosensors, flexible optoelectronic devices, lightweight solar cells (e.g., high efficiency lll-V solar cells), to name only a few example applications. In the latter case, for instance, the widespread use of germanium-based solar cells in both terrestrial and space applications is generally hindered by the weight and cost of bulk germanium substrates. The use of thin germanium membranes as substrates for these devices can thus offer a suitable solution as the resulting device can be detached from a parent germanium substrate and then transferred to a light and low-cost holder. Moreover, once detached, the parent germanium substrate can be reconditioned and reused, thus lowering the overall manufacturing costs.

[0003] There have been some attempts at producing thin germanium membranes that are detachable from their corresponding parent germanium substrates. For instance, Abderraouf et al. (see “Mesoporous germanium morphology transformation for lift-off process and substrate re-use." Applied Physics Letters 102.1 (2013)) investigated the morphology of electrochemically formed mesoporous Ge double-layer and its transformations during ultra-high-vacuum annealing at 600-700 °C. The transformation process reorganized pores of the bottom porous Ge layer into faceted spherical voids, which could then be broken to allow for detachment of the upper porous Ge layer. Moreover, PCT Publication No. WO 2022 / 170431 A1 disclosed a process in which two non-porous Ge layers would be deposited at different temperatures on a porous Ge layer. During the annealing, it was demonstrated that the porous Ge layer would undergo significant morphological changes that would allow the detachment of the non-porous Ge layers from the Ge substrate and theformation of the Ge membrane. Although the existing processes for manufacturing thin germanium membranes were satisfactory to a certain degree, there remains room for improvement, specifically in preserving the integrity of the thin germanium membranes as they are detached from the host substrates.SUMMARY

[0004] Several techniques for manufacturing thin germanium membranes exist including epitaxial lift-off, smart-cut technology, nanopatterned 2D materials, germanium on nothing, and porous layer lift-off. The latter technique involves the use of porous germanium layers (can also be referred to as “PGe layers”) produced by low-cost and wafer-scalable electrochemical etching techniques as templates for epitaxial structure deposition. The weak porous layer created between the germanium membrane (can also be referred to as “the membrane”) and the corresponding bulk germanium host substrate (can also be referred to as “the substrate”) is then used as a facilitator for the detachment of the membrane from the substrate.

[0005] Although a few demonstrations of these approaches have been made and high-material quality of the membrane has been demonstrated, there remains challenges in maintaining the integrity of the membranes as they are detached from the substrates. It was found that as the porous layer is intrinsically characterized by a critical mechanical stress, an external force applied to the porous layer must be equal or greater to the critical mechanical stress in order to break the porous layer and free the membrane. However, since the porous layer is hidden behind the membrane, such an external force has to be directly applied to the membrane, i.e. , indirectly applied to the porous layer via the membrane, which can cause irreversibly damage to the membrane during the detachment process in at least some circumstances.

[0006] It was found that by preloading the substrate with a given amount of internal mechanical stress, the magnitude of the external force required to reach the critical mechanical stress of the porous layer can be reduced, which can in turn reduce the required amount of stress directly imparted onto the membrane during the detachment process. Such a preloading can take the form of a stressor layer deposited on the membrane. For instance,in some embodiments, the stressor layer is provided in the form of a metallic layer applied over the membrane. Therefore, when an external force is directly applied on the stressor layer, instead of on the membrane, the external force can bridge a gap between the preloaded amount of internal mechanical stress imparted by the presence of the stressor layer and the critical mechanical stress inherent to the porous layer. By bridging this gap, the external force can free the membrane from the porous layer without necessarily breaking the membrane.

[0007] In accordance with a first aspect of the present disclosure, there is provided a method of making a monocrystalline germanium (Ge) membrane, the method comprising: depositing a non-porous layer of monocrystalline Ge onto a porous layer of a monocrystalline Ge substrate, the porous layer mechanically coupled to the monocrystalline Ge substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value; depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the monocrystalline Ge substrate with a given mechanical stress value below the critical mechanical stress value; and moving the stressor layer away from the monocrystalline Ge substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

[0008] Further in accordance with the first aspect of the present disclosure, the gap between the given mechanical stress value and the critical mechanical stress value can for example be below 1 MPa, preferably below 0.75 MPa, and of about 0.5 MPa.

[0009] Still further in accordance with the first aspect of the present disclosure, the given mechanical stress value ranges between about 100 MPa and 1GPa, preferably between 200 MPa and 500 MPa, and most preferably between 250 and 300 MPa.

[0010] Still further in accordance with the first aspect of the present disclosure, the given material can for example be a metallic material.

[0011] Still further in accordance with the first aspect of the present disclosure, the metallic material can for example be nickel.

[0012] Still further in accordance with the first aspect of the present disclosure, the method can for example further comprise, prior to said depositing the stressor layer, depositing one or more bonding layers on the non-porous layer, the one or more bonding layers sandwiched between the non-porous layer and the stressor layer.

[0013] Still further in accordance with the first aspect of the present disclosure, the stressor layer can for example have a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

[0014] Still further in accordance with the first aspect of the present disclosure, the non-porous layer can for example have a thickness ranging between about 100 nm and 500 microns, preferably between about 250 nm and 250 microns, and most preferably between 500 nm and 10 microns.

[0015] Still further in accordance with the first aspect of the present disclosure, the stressor layer can for example be rigid, said moving can for example include pulling the stressor layer perpendicularly away from the monocrystalline Ge substrate.

[0016] Still further in accordance with the first aspect of the present disclosure, the stressor layer can for example be flexible, said moving can for example include one of peeling and rolling the stressor layer away from the monocrystalline Ge substrate.

[0017] Still further in accordance with the first aspect of the present disclosure, said depositing the stressor layer of the given material can for example include immersing the non-porous layer in a solution together with a nickel electrode, applying electrical voltage across the non-porous layer and the nickel electrode, nickel atoms leaving the electrode to cover the non-porous layer material.

[0018] Still further in accordance with the first aspect of the present disclosure, said applying step can for example be performed while keeping the porous layer facing upwards thereby avoiding bubble formation.

[0019] Still further in accordance with the first aspect of the present disclosure, the method can for example further comprise removing the stressor layer from the non-porous layer.

[0020] Still further in accordance with the first aspect of the present disclosure, said removing the stressor layer can for example involve chemical etching.

[0021] Still further in accordance with the first aspect of the present disclosure, the porous layer can for example have a plurality of pillars extending between the monocrystalline Ge substrate and the non-porous layer, said breaking including breaking the plurality of pillars.

[0022] Still further in accordance with the first aspect of the present disclosure, the method can for example further comprise cleaning broken pillar residues from the non-porous layer.

[0023] In accordance with a second aspect of the present disclosure, there is provided a system for making a monocrystalline germanium membrane, the system comprising: a germanium deposition station depositing a non-porous layer of monocrystalline Ge onto a porous layer of a monocrystalline Ge substrate, the porous layer mechanically coupled to the monocrystalline Ge substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value; a stressor material deposition station depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the monocrystalline Ge substrate with a given mechanical stress value below the critical mechanical stress value; and a detachment station moving the stressor layer away from the monocrystalline Ge substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

[0024] In accordance with a third aspect of the present disclosure, there is provided a semiconductor device comprising: a non-porous layer of monocrystalline Ge; and a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the given materialof the stressor layer being mechanically coupled to the non-porous layer of monocrystalline Ge.

[0025] Further in accordance with the third aspect of the present disclosure, the given material can for example be a metallic material.

[0026] Still further in accordance with the third aspect of the present disclosure, the metallic material can for example be nickel.

[0027] Still further in accordance with the third aspect of the present disclosure, the semiconductor device can for example further comprise one or more bonding layers sandwiched between the non-porous layer and the stressor layer, the stressor layer lying onto the non-porous layer indirectly via the one or more bonding layers.

[0028] Still further in accordance with the third aspect of the present disclosure, the stressor layer can for example have a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

[0029] In accordance with a fourth aspect of the present disclosure, there is provided a method of making a semiconductor membrane, the method comprising: depositing a non-porous layer of a semiconductor material onto a porous layer of a semiconductor substrate, the porous layer mechanically coupled to the semiconductor substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value; depositing a stressor layer of a given material onto the non-porous layer, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the semiconductor substrate with a given mechanical stress value below the critical mechanical stress value; and moving the stressor layer away from the semiconductor substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the semiconductor substrate.

[0030] Further in accordance with the fourth aspect of the present disclosure, the gap between the given mechanical stress value and the critical mechanical stress value can for example be below 1 MPa, preferably below 0.75 MPa, and of about 0.5 MPa.

[0031] Still further in accordance with the fourth aspect of the present disclosure, the given mechanical stress value can for example range between about 100 MPa and 1GPa, preferably between 200 MPa and 500 MPa, and most preferably between 250 and 300 MPa.

[0032] Still further in accordance with the fourth aspect of the present disclosure, the given material can for example be a metallic material.

[0033] Still further in accordance with the fourth aspect of the present disclosure, the metallic material can for example be nickel.

[0034] Still further in accordance with the fourth aspect of the present disclosure, the method can for example further comprise, prior to said depositing the stressor layer, depositing one or more bonding layers on the non-porous layer, the one or more bonding layers sandwiched between the non-porous layer and the stressor layer.

[0035] Still further in accordance with the fourth aspect of the present disclosure, the stressor layer can for example have a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

[0036] Still further in accordance with the fourth aspect of the present disclosure, the non-porous layer can for example have a thickness ranging between about 100 nm and 500 microns, preferably between about 250 nm and 250 microns, and most preferably between 500 nm and 10 microns.

[0037] Still further in accordance with the fourth aspect of the present disclosure, the stressor layer can for example be rigid, said moving including pulling the stressor layer perpendicularly away from the semiconductor substrate.

[0038] Still further in accordance with the fourth aspect of the present disclosure, the stressor layer can for example be flexible, said moving including one of peeling and rolling the stressor layer away from the semiconductor substrate.

[0039] Still further in accordance with the fourth aspect of the present disclosure, said depositing the stressor layer of the given material can for example include immersing the non-porous layer in a solution together with a nickel electrode, applying electrical voltage across the non-porous layer and the nickel electrode, nickel atoms leaving the electrode to cover the non-porous layer material.

[0040] Still further in accordance with the fourth aspect of the present disclosure, said applying step can for example be performed while keeping the porous layer facing upwards thereby avoiding bubble formation.

[0041] Still further in accordance with the fourth aspect of the present disclosure, the method can for example further comprise removing the stressor layer from the non-porous layer.

[0042] Still further in accordance with the fourth aspect of the present disclosure, said removing the stressor layer can for example involve chemical etching.

[0043] Still further in accordance with the fourth aspect of the present disclosure, the porous layer can for example have a plurality of pillars extending between the semiconductor substrate and the non-porous layer, said breaking including breaking the plurality of pillars.

[0044] Still further in accordance with the fourth aspect of the present disclosure, the method can for example further comprise cleaning broken pillar residues from the non-porous layer.

[0045] In accordance with a fifth aspect of the present disclosure, there is provided a system for making a semiconductor membrane, the system comprising: a semiconductor deposition station depositing a non-porous layer of a semiconductor material onto a porous layer of a semiconductor substrate, the porous layer mechanically coupled to the semiconductor substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value; a stressor material deposition station depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the givenmaterial of the stressor layer loading the semiconductor substrate with a given mechanical stress value below the critical mechanical stress value; and a detachment station moving the stressor layer away from the semiconductor substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the semiconductor substrate.

[0046] In accordance with a sixth aspect of the present disclosure, there is provided a semiconductor device comprising: a non-porous layer of a semiconductor material; and a stressor layer of a given material onto the non-porous layer of the semiconductor material, the given material of the stressor layer being mechanically coupled to the non-porous layer of the semiconductor material.

[0047] Further in accordance with the sixth aspect of the present disclosure, the given material can for example be a metallic material.

[0048] Still further in accordance with the sixth aspect of the present disclosure, the metallic material can for example be nickel.

[0049] Still further in accordance with the sixth aspect of the present disclosure, the semiconductor device can for example further comprise one or more bonding layers sandwiched between the non-porous layer and the stressor layer, the stressor layer lying onto the non-porous layer indirectly via the one or more bonding layers.

[0050] Still further in accordance with the sixth aspect of the present disclosure, the stressor layer has a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

[0051] All technical implementation details and advantages described with respect to a particular aspect of the present invention are self-evidently mutatis mutandis applicable for all other aspects of the present invention.

[0052] Many further features and combinations thereof concerning the present improvements will appear to those skilled in the art following a reading of the instant disclosure.DESCRIPTION OF THE FIGURES

[0053] In the figures,

[0054] Fig. 1 is a cross-sectional view of an example of a semiconductor device having a monocrystalline Ge substrate on which a non-porous layer of monocrystalline Ge and a stressor layer of a given material have been deposited, in accordance with one or more embodiments;

[0055] Fig. 1A is a cross-sectional view of the monocrystalline Ge substrate of Fig. 1, showing a neutral plane of shear mechanical stress extending within the monocrystalline Ge substrate, in accordance with one or more embodiments;

[0056] Fig. 2 is a graph of intrinsic mechanical stress as a function of a depth of the monocrystalline Ge substrate of Fig. 1, showing an intrinsic mechanical stress value imparted by a porous layer and another intrinsic mechanical stress value imparted by the stressor layer, in accordance with one or more embodiments;

[0057] Fig. 3 is a cross-sectional view of the monocrystalline Ge substrate of Fig. 1 , shown with a roller peeling the stressor layer away from the monocrystalline Ge substrate, resulting in the freeing of the stressor layer, together with the non-porous layer, in accordance with one or more embodiments;

[0058] Fig. 4 is a flow chart of an example of a method of making a monocrystalline Ge membrane, in accordance with one or more embodiments;

[0059] Fig. 5 is an oblique view of an example of a monocrystalline Ge substrate having a porous layer, a non-porous layer of monocrystalline Ge and a stressor layer imparting intrinsic mechanical stress within the monocrystalline Ge substrate, in accordance with one or more embodiments;

[0060] Fig. 6 is an image of a cross-section of an example of a monocrystalline Ge substrate having a porous layer, a non-porous layer of monocrystalline Ge and a stressor layer, in accordance with one or more embodiments;

[0061] Fig. 7 is a schematic view showing steps of a first example of the method of Fig. 4, in accordance with one or more embodiments;

[0062] Fig. 8 is a schematic view showing steps of a second example of the method of Fig.4, in a double transfer configuration, in accordance with one or more embodiments;

[0063] Fig. 9 is an image of a non-porous layer of monocrystalline Ge pulled away from a porous layer of a monocrystalline Ge substrate, without a stressor layer preloading the monocrystalline Ge substrate, in accordance with one or more embodiments;

[0064] Fig. 10 is an image of a non-porous layer of monocrystalline Ge pulled away from a porous layer of a monocrystalline Ge substrate, with a stressor layer preloading the monocrystalline Ge substrate, in accordance with one or more embodiments;

[0065] Fig. 11 is a graph showing current density as a function of voltage for different solar cells constructed from the non-porous layer of monocrystalline Ge of Fig. 10; and

[0066] Fig. 12 is an image of a stressor material deposition station used to deposit a stressor layer on a a -porous layer of monocrystalline Ge, in accordance with one or more embodiments.DETAILED DESCRIPTION

[0067] Fig. 1 shows an example of a semiconductor component 100, in accordance with an embodiment. As shown, the semiconductor component 100 has a monocrystalline Ge substrate 102 having a porous layer 104. The porous layer 104 is mechanically coupled (e.g., attached, adhered) to a body 106 of the monocrystalline Ge substrate 102 by a first coupling strength value. The porous layer 104 generally extends in a plane parallel to the monocrystalline Ge substrate 102. In this disclosure, the term “porous layer” is meant to encompass any layer encompassing a number of cavities 108 interspersed with one another thereby weakening the structural integrity of the porous layer 104. The porous layer 104 can thus break under duress of a mechanical stress exceeding a critical mechanical stress value Sc. The critical mechanical stress value Sc can depend on one or more parameters including, but not limited to, a thickness t of the porous layer 104, a porosity of the porous layer, to name only a few examples.

[0068] The cavities of the porous layer can have any suitable type of shape, form, orientation and / or size within the porous layer. For instance, in some embodiments, the cavities can be provided in the form of elongated pores extending relatively perpendicularly to the plane of the monocrystalline Ge substrate. Such pores can generally be obtained using known etching techniques, porosification techniques, or a combination thereof. In some other embodiments, the cavities can be provided in the form of ovoid (e.g., spheroid) cavities interspersed with Ge pillars. These latter types of cavities can be obtained by performing one or more thermal annealing processe(s) on the porous layer encompassing the elongated pores referred to above. It is understood that the porous layer 104 can be provided any suitable form, before or after such thermal annealing processe(s). Generally, the more void the porous layer 104 contains, the weaker the resulting porous layer 104 is. Accordingly, porous layers of greater porosity or thickness may be more brittle than porous layers of reduced porosity or thickness, for instance.

[0069] As depicted, the semiconductor component 100 has a non-porous layer 110 of monocrystalline Ge deposited on the porous layer 104 of the monocrystalline Ge substrate 102. The non-porous layer 110 extends generally parallel to the porous layer 104 and to the plane of the monocrystalline Ge substrate 102. The non-porous layer 110 of monocrystalline Ge corresponds to the membrane which is to be later uncoupled from the remainder of the monocrystalline Ge substrate 102.

[0070] The semiconductor component 100 also has a stressor layer 112 of a given material onto the non-porous layer 110 of monocrystalline Ge. The stressor layer 112 is mechanically coupled (e.g., attached, adhered) to the non-porous layer 110 by a second coupling strength value which is greater than the first coupling strength value characterizing the coupling between the porous layer 104 and the monocrystalline Ge substrate 102. Accordingly, when an external mechanical stress is exerted on the semiconductor component 100, such as the flexion illustrated in Fig. 1A, the porous layer 104 may uncouple from the body 106 of the monocrystalline Ge substrate 102 before the stressor layer 112 uncouples from the non-porous layer 110 of monocrystalline Ge. In other words, the coupling between the stressor layer 112 to the non-porous layer 110 is greater than the coupling between the non-porous layer 110 and the porous layer 104.

[0071] It is understood that the stressor layer 112 loads the monocrystalline Ge substrate 102 with a given mechanical stress value Sg which is below the critical mechanical stress value Sc of the porous layer 104. Accordingly, the given mechanical stress Sg imparted by the presence of the stressor layer 112 does not alone permanently affect the integrity of the porous layer 104. However, it reduces the amount of external mechanical stress required to reach the critical mechanical stress value Sc of the porous layer 104 to break it, as explained in greater detail below.

[0072] Fig. 2 shows intrinsic mechanical stress value existing within the semiconductor component 100 at rest as a function of its depth. For instance, a first mechanical stress value 51 exists at a depth of the non-porous layer 110. As the first mechanical stress value S1 is well below the critical mechanical stress value Sc of the porous layer 104, the first mechanical stress value S1 is insufficient to break the porous layer 104 when the semiconductor component 100 rests. In the absence of the stressor layer 112, an external mechanical stress applied on the non-porous layer 110 would have to bridge a first gap AS1 extending between the first mechanical stress value S1 and the critical mechanical stress value Sc to actually break the porous layer 104. As discussed above, although satisfactory to a certain degree, applying a mechanical stress on the non-porous layer 110 may not only break the underlying porous layer 104, but it may also irreversibly damage the non-porous layer 110 as well, which is undesirable.

[0073] Thanks to the presence of the stressor layer 112, a second mechanical stress value 52 (also referred to as the given mechanical stress value Sg) greater than the first mechanical stress value S1 exists at a depth of the stressor layer 112. Although greater than the first mechanical stress value S1, the second mechanical stress value S2 still falls short of reaching the critical mechanical stress value Sc of the porous layer 104. The second mechanical stress value S2 is thus insufficient to break the porous layer 104 when the semiconductor component 100 rests. However, as the presence of the stressor layer 112 loads the semiconductor component 100 with an additional mechanical stress value, an external mechanical stress applied on the stressor layer 112 would have to bridge a second gap AS2 extending between the second mechanical stress value S2 and the critical mechanical stress value Sc to actually break the porous layer 104. As the second gap AS2 is smaller than the first gap AS1, i.e. , AS2< AS1, the external mechanical stress required to break the porous layer 104 is reduced. It is also encompassed that since the external mechanical stress can be applied directly or indirectly on the stressor layer 112 instead of on the non-porous layer, in addition to the non-porous layer 110 being strongly mechanically coupled to the stressor layer 112, the integrity of the non-porous layer 110 may be better preserved during the uncoupling process.

[0074] The uncoupling process generally includes the application of an external mechanical stress directly or indirectly on the stressor layer 112. For instance, the stressor layer 112 can be moved away from the body 106 of the monocrystalline Ge substrate 102. The movement of the stressor layer 112 away from the monocrystalline Ge substrate 102 can include, but is not limited to, a pulling movement, a stretching movement, a twisting movement, a stretching movement, a rolling movement, a pivoting movement, a compressive movement, or a combination thereof. The magnitude of the required external mechanical stress can be tuned during the manufacture of the semiconductor component 100, and / or during the manufacture of the porous layer 104. Examples of such tuning techniques are described in U.S. Provisional Patent Application Serial No. 63 / 565,599, filed on March 15, 2024, the contents of which are hereby incorporated by reference.

[0075] In some embodiments, it can be preferable to deposit one or more bonding layer(s) 111 on the non-porous layer 110 before the stressor layer 112 is deposited. This would result in the non-porous layer 110 and the stressor layer 112 sandwiching the bonding layer(s) 111. The bonding layer(s) 111 can help the bonding of the stressor layer 112 onto the non-porous layer 110. For instance, in some embodiments, the bonding layer(s) include a first bonding layer deposited on the non-porous layer 110, and a second bonding layer deposited on the first bonding layer. The stressor layer 112 is thus deposited directly on the second bonding layer. In other words, the stressor layer 112 is deposited on the non-porous layer 110 indirectly via the first and second bonding layers in this specific embodiment. An example of the first bonding layer can be a thin layer of titanium (Ti) having a thickness ranging between 10 nm and 50 nm, and most preferably of about 20 nm. An example of the second bonding layer can be a thicker layer of gold (Au) having a thickness ranging between about 50 nm and 200 nm, and most preferably of about 100 nm. In this latter embodiment, the titanium of the first bonding layer helps bond the stressor layer 112 to the underlying non-porous layer 110 while the goldof the second bonding layer helps prevent the oxidation of the titanium layer, which also helps the bonding over time. It is understood that in embodiments where the non-porous layer is made of germanium, the bonding layer(s) may be omitted. However, the bonding layer(s) may still be used to enhance bonding and oxidation protection even in the case of germanium.

[0076] In the embodiment illustrated in Fig. 3, a roller 120 adhered to the stressor layer 112 imparts duress to the stressor layer 112 by a rolling movement pulling the stressor layer 112 away from the monocrystalline Ge substrate 102. The external mechanical stress imparted to the semiconductor component 100 bridges the gap between the given mechanical stress value Sg of the stressor layer 112 and the critical mechanical stress value Sc of the porous layer 104, resulting in breaking the porous layer 104 and freeing the stressor layer 112, together with the non-porous layer 110, from the monocrystalline Ge substrate 102.

[0077] Fig. 4 shows an example of a method 400 of making a monocrystalline Ge membrane, in accordance with an embodiment.

[0078] At step 402, a non-porous layer of monocrystalline Ge is deposited onto a porous layer of a monocrystalline Ge substrate. The porous layer is mechanically coupled to the monocrystalline Ge substrate by a first coupling strength value. The magnitude of the first coupling strength value can depend on the technique(s) used to impart pores into the monocrystalline Ge substrate, for instance. Moreover, it is contemplated that the porous layer is designed to break under duress of a mechanical stress exceeding a critical mechanical stress value. The critical stress value can depend on different parameters including, but not limited to, a thickness of the porous layer, a porosity of the porous layer, thermal annealing conditions with which the porous layer has been formed, chemical etching conditions with which the porous layer has been formed, a thickness of the non-porous layer, and the like. Depending on the embodiment, the non-porous layer can have a thickness ranging between about 100 nm and 500 microns, preferably between about 250 nm and 250 microns, and most preferably between 500 nm and 10 microns. However, the thickness of the non-porous layer can vary from one embodiment to another.

[0079] At step 404, a stressor layer of a given material is deposited onto the non-porous layer of monocrystalline Ge. The stressor layer is mechanically coupled to the non-porouslayer by a second coupling strength value which is greater than the first coupling strength value. Accordingly, the mechanical coupling between the stressor layer and the non-porous layer is stronger than the mechanical coupling between the non-porous layer and the porous layer. It is noted that the material of the stressor layer loads the monocrystalline Ge substrate with a given mechanical stress value below the critical mechanical stress value. In some embodiments, the given mechanical stress value imparted by the deposition of the stressor layer can range between about 100 MPa and 1GPa, preferably between 200 MPa and 500 MPa, and most preferably between 250 and 300 MPa. As such, the mere deposition of the stressor layer on the non-porous layer does not irreversibly affect the mechanical coupling between the non-poyous layer and the stressor layer.

[0080] At step 406, the stressor layer is moved away from the monocrystalline Ge substrate. The step 406 of moving imparts a mechanical stress to the porous layer which bridges a gap between the given mechanical stress value and the critical mechanical stress value. In certain embodiments, the gap between the given mechanical stress value and the critical mechanical stress value can be below 1 MPa, preferably below 0.75 MPa, and of about 0.5 MPa. The bridging of the gap results in the breaking of the porous layer and in the freeing of the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

[0081] In some embodiments, the non-porous layer includes a plurality of non-porous layers deposited on top of each other. In these specific embodiments, the composition or crystalline orientation of the monocrystalline Ge can change from one of the non-porous layers to another. In any case, the term “non-porous layer” is meant to encompass one or more non-porous layer sandwiched between the porous layer of the monocrystalline Ge substrate and the stressor layer, which is deposited at step 404. Alternately or alternatively, the stressor layer can include a plurality of stressor layers deposited on top of each other. In these specific embodiments, the composition of the given material of each stressor layer can change from one of the stressor layers to another. In any case, the term “stressor layer” is meant to encompass one or more stressor layers deposited on the non-porous layer(s) which are deposited at step 402. The given mechanical stress value Sg may correspond to a sum of the individual mechanical stress values Sg, i associated with each of the stressor layers i at least in some embodiments.

[0082] The stressor layer can be rigid or flexible depending on the embodiment. For instance, in embodiments where the stressor layer is rigid, the moving of the stressor layer can include a step of pulling the stressor layer perpendicularly away from the monocrystalline Ge substrate. In embodiments where the stressor layer is flexible, the moving of the stressor layer can include a step of peeling or rolling the stressor layer away from the monocrystalline Ge substrate.

[0083] The given material of the stressor layer can change depending on the embodiment. For instance, the given material can be a metallic material such as nickel (Ni), silver (Ag), gold (Au), or an alloy thereof, a ceramic material such as silicon nitride (SiNx), a polymer material such as polydimethylsiloxane (PDMS), ora combination thereof. The thickness of the stressor layer can range between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns, depending on the embodiment. However, the stressor layer can be thinner or thicker than these ranges depending on the embodiment.

[0084] In some embodiments, after the stressor layer and the non-porous layer have been uncoupled from the remainder of the monocrystalline Ge substrate, the stressor layer can be removed from the non-porous layer. The removal of the stressor layer can be performed in a number of different ways. However, one technique which was found convenient when the given material is a metal or a polymer is to chemically etch the given material of the stressor layer away from the non-porous layer. Such chemical etching may involve the use of an etchant (e.g., an acid) strong enough to dissolve the given material. In some other examples, for instance when the given material is a ceramic material, the given material of the stressor layer can be mechanically removed (e.g., grinded) away from the non-porous layer.

[0085] In some embodiments, the porous layer includes a plurality of Ge pillars extending between the monocrystalline Ge substrate and the non-porous layer. It is encompassed that such Ge pillars can be obtained using a technique having a first step of chemical etching the body of the monocrystalline Ge substrate to create pores extending therewithin, and a second step of performing one or more thermal annealing process(es) to transform a morphology of the pores and create the Ge pillars. Examples of such techniques are described in PCT Patent Publication No. WO 2022 / 170,431 A1, published on August 18, 2022, the contents of which are hereby incorporated by reference. In these embodiments, the breaking of the porous layermay include the breaking of the Ge pillars. In these embodiments, the non-porous layer may be left with broken pillars residues which may be cleaned or otherwise removed from the non-porous layer to provide a smooth and continuous surface. The cleaning of the Ge pillars can include a chemical etchant or a mechanical polishing step, depending on the embodiment.

[0086] Fig. 5 shows an example of a semiconductor component 500, in accordance with an embodiment. As shown, the semiconductor component 500 has a body 506 of monocrystalline Ge, a porous layer 504 formed within the body 506 of the monocrystalline Ge substrate 502, a non-porous layer 510 of monocrystalline Ge deposited on the porous layer 104 and a stressor layer 512 of a given material deposited on the non-porous layer 510. As depicted in this figure, the deposition of the stressor layer 512 loads the semiconductor component 500 with internal mechanical stresses M and P representing, respectively, a moment of inertia which tends to curve the stressor layer 512, and a compression force which tends to compress the stressor layer 512, even though the semiconductor component 500 may be at rest. Fig. 6 shows an image of a cross-section of the semiconductor component 600 of Fig. 5. As shown, the non-porous layer 610 sits atop the porous layer 604, whereas the stressor layer 612 sits atop the non-porous layer 610.

[0087] Fig. 7 schematically shows how a semiconductor device 702 can be manufactured using a method 700 disclosed herein, in accordance with an embodiment. More specifically, the method 700 starts with the semiconductor component 500 having the monocrystalline Ge substate 502, the porous layer 504, the non-porous layer 510 and the stressor layer 512, such as shown at step 710. At step 720, an adhesive layer 516 is deposited on the stressor layer 514. At step 730, a semiconductor device support 522 acting as an uncoupling tool, having a corresponding adhesive layer 516, is forced against the adhesive layer 516 of the semiconductor component 500. By moving the semiconductor device support 522 away from the monocrystalline Ge substrate 502, the energy gap discussed above is bridged and the porous layer 504 breaks, such as shown at step 740. At step 750, the semiconductor device support 522 can be flipped upside down, where porous layer residues 524 can be cleaned. Then, the non-porous layer 510 can be processed to form any suitable type of semiconductor device. In the illustrated embodiment, at step 760, the resulting object is processed to form a semiconductor solar cell. For instance, the semiconductor device support 522 is processed toapply first electrical contacts 526 on an external face of the non-porous layer 510. At step 770, second electrical contacts 528 are applied on an external face of the semiconductor device support 522. Finally, at step 780, an anti-reflective coating 532 can be applied on the exposed portion of the non-porous layer, to form the semiconductor solar cell 702.

[0088] Fig. 8 schematically shows another example of a method 800 of manufacturing a monocrystalline Ge membrane, in accordance with another embodiment. As shown, the method 800 with the semiconductor component 500 having the monocrystalline Ge substate 502, the porous layer 504, the non-porous layer 510 and the stressor layer 512, such as shown at step 810. At step 820, a temporary uncoupling tool 821 is adhered to the non-porous layer 510. The temporary uncoupling tool 821 can be provided in the form of an adhesive tape having a handling film to which is applied an adhesive, for instance. As step 830, the uncoupling tool 821 is moved away from the monocrystalline Ge substrate 502, thereby bridging the energy gap between the given mechanical stress value of the stressor layer 512 and the critical mechanical stress value of the porous layer 504, resulting in the breaking of the porous layer 504. Then, at step 840, a semiconductor device support 522 can be coupled to the non-porous layer 510 via one or more adhesive layers 516. At step 850, the temporary uncoupling tool 521 can be removed. Then, the non-porous layer 510 can be processed to form any suitable type of semiconductor device. In the illustrated embodiment, at step 860, the resulting object is processed to form a semiconductor solar cell 802. For instance, the semiconductor device support 522 is processed to apply first electrical contacts 526 on an external face of the non-porous layer 510. At step 870, second electrical contacts 528 are applied on an external face of the semiconductor device support 522. Finally, at step 880, an anti-reflective coating 532 can be applied on the exposed portion of the non-porous layer 510, to form the semiconductor solar cell 802.

[0089] Using the methods disclosed therein, the integrity of the non-porous layer which is uncoupled from the monocrystalline Ge substrate was found to be better preserved then using conventional techniques. More specifically, Fig. 9 shows a non-porous layer of monocrystalline Ge being peeled from a corresponding monocrystalline Ge substrate in the absence of a stressor layer. In this case, the peeling was performed using an adhesive tape. As depicted, the non-porous layer being peeled away from the corresponding monocrystalline Ge substrateis irreversibly damaged, thereby failing to achieve a continuous and smooth non-porous layer of monocrystalline Ge. For instance, the non-porous layer of Fig. 9 can have a first defect density that may exceed industry standards. More specifically, in this example, the first defect density is about 9 cm / cm2. In contrast, Fig. 10 shows a non-porous layer of monocrystalline Ge being peeled from a corresponding monocrystalline Ge substrate in the presence of a stressor layer. As shown, the non-porous layer shows a more continuous and smoother non-porous layer of monocrystalline Ge. The non-porous layer of Fig. 10 has a second defect density which is smaller than the first defect density of the non-porous layer of Fig. 9. More specifically, in this application, the second defect density was found to be of about 0.32 cm / cm2. It is hypothesized that the few defects shown in Fig. 10 stem from an inadequate support of the substrate during the detachment step. In any case, a difference in defect density in the order of a full order of magnitude remains considerable. These results thus highlight the importance of the stressor layer in enhancing membrane stiffness and preventing mechanical failure during detachment. Although these results are only preliminary, it was found that the use of the stressor layer can drastically increase the performance and reliability of the uncoupling process. In fact, in some other experiments, lower defect densities (e.g., near zero) have been obtained. For example, Fig. 11 shows current-voltage (l-V) curves for four solar cells fabricated on the non-porous later of Fig. 10. These results show reproducible performances across the different solar cells, which demonstrates that the method described herein can be used in large-scale solar cell fabrication processes, to name only one exemplary application.

[0090] The methods described above can be performed using a system for making a monocrystalline germanium membrane. Depending on the embodiment, the system can include a germanium deposition station, a stressor material deposition station, and a detachment station. The germanium deposition station is configured for depositing a non-porous layer of monocrystalline Ge onto a porous layer of a monocrystalline Ge substrate. The stressor material deposition station is configured for depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge. The detachment station is configured for moving the stressor layer away from the monocrystalline Ge substrate. As discussed above, the movement imparted by the detachment station to the stressor layer causes a mechanical stress to the porous layer which bridges the gap between the givenmechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

[0091] Fig. 12 shows an example of a stressor material deposition station 1200. As shown, the stressor material deposition station 1200 is configured for immersing the non-porous layer in a solution 1202 together with a nickel electrode 1204, applying electrical voltage V across the non-porous layer and the nickel electrode, which causes nickel atoms leaving the electrode to cover the non-porous layer material to form the stressor layer. It was found convenient to ensure that the electrodeposition step (i.e. , while the electrical voltage is being applied), that the porous layer faces upwards to enable any bubbles to escape thanks to buoyancy and gravity physical laws. Proceeding accordingly may help reduce, or prevent, the formation of bubbles in the stressor layer. Of course, in embodiments where the given material of the stressor layer is not nickel, another embodiment of the stressor material deposition may be used. For instance, the stressor material deposition station can include any suitable type of deposition process including, but not limited to, physical vapor deposition (PVD), sputtering, evaporation, chemical vapor deposition (CVD) (for Ni), to name a few examples.

[0092] Example - Method for layer separation of GaAs Solar Cell Grown on a Porous Germanium using a Stress-Inducing Layer

[0093] The present example discloses a method for fabricating a mechanically weak (e.g., porous) layer on a gallium-doped germanium (Ge) substrate and subsequently enabling substrate reuse following epitaxial growth. Initially, a bi-polar electrochemical etching procedure is applied to a p-type (100) Ge wafer, featuring a 6° off-cut toward the (111) crystallographic orientation. The substrate can then be subjected to an electrolyte solution comprising hydrofluoric acid (HF) and ethanol, for instance. In this example, the etching parameters are selected to yield a porous layer with a target porosity of approximately 50% (±5%) and a thickness of 200 nm (±25 nm), thereby ensuring sufficient adhesion of the overlying epitaxial membrane throughout subsequent microfabrication and thermal processing steps.

[0094] Following the formation of the porous layer, the substrate is processed using a three-step molecular beam epitaxy (MBE) sequence: (1) a low-temperature deposition to seal surface porosity, (2) an annealing phase to structurally reorganize the porous network, and (3) a high-temperature deposition to form a non-porous germanium layer approximately 1.4 pm thick atop the porous layer, which itself measures approximately 160 nm in thickness. The resulting structure exhibits a pillar surface coverage of 14.8% in this example. This figure has been quantified via image analysis software applied to scanning electron microscopy (SEM) imagery.

[0095] Upon completion of the non-porous germanium layer, the substrate is rendered suitable for epitaxial growth of 11 l-V semiconductor devices. A representative single-junction gallium arsenide (GaAs) solar cell is grown in accordance with established protocols. The thermal budget associated with epitaxial growth induces modifications to the internal morphology of the porous layer, necessitating a controlled detachment mechanism.

[0096] To facilitate separation of the non-porous germanium layer, a stressor layer composed of nickel (Ni) is deposited via electroplating onto the processed substrate. In this example, electroplating is performed on 15x15 mm2samples using an aqueous solution containing nickel chloride (NiCI), nickel sulfate (NiS04), boric acid (H3BO3), and phosphoric acid (H3PO4). The electroplating parameters are specifically engineered to induce mechanical stress within the Ni layer, thereby promoting delamination.

[0097] Mechanical detachment is executed using a clean room-grade adhesive tape. A range of electroplating durations and current densities are evaluated to determine optimal conditions for initiating self-delamination, both in the presence and absence of 11 l-V epitaxial layers. Post-detachment, SEM analysis is employed to confirm the structural integrity of the membrane and verify pillar breakage.

[0098] A technical challenge addressed by the disclosed method is the controlled separation of the epitaxial membrane from the underlying substrate without inducing too much mechanical damage to either the active layers contained within the membrane or the reusable substrate lying thereunder. As illustrated above, the detachment mechanism relies on the intentional fracture of a mechanically engineered porous layer. This layer possesses a lowerbonding energy relative to the surrounding material system, thereby ensuring that fracture occurs within the porous layer prior to reaching the yield strength of the bulk substrate or the epitaxial membrane. The stressor layer, deposited atop the non-porous layer of germanium, can accumulate strain energy within the structure, facilitating this controlled separation.

[0099] To preserve the structural integrity of the non-porous layer of germanium, the applied strain during detachment must remain below a deformation threshold of 0.1%, as determined by the Young’s modulus and yield strength of the constituent materials. The detachment assembly comprises the epitaxial membrane and a handle layer, the latter of which is engineered to deliver the requisite strain energy for separation. The handle layer is provided in the form of an adhesive tape, and includes a grip layer and a bonding layer. This handle layer can preferably exhibit mechanical stiffness exceeding that of the non-porous layer of germanium to mitigate crack formation, possess a bonding energy greater than the detachment threshold, and maintain compatibility with standard microfabrication processes.

[0100] The strain energy required for detachment is a function of the surface coverage of the pillar structures within the porous layer. This coverage is calculated based on the average diameter and spatial density of the pillars. Increased surface coverage correlates with elevated bonding energy, thereby necessitating greater strain energy for separation. The coverage is influenced by initial porosity and pillar height, and is further modified by thermal processing due to phenomena such as Ostwald ripening and Rayleigh instability. In the present example, the mean pillar diameter increases from approximately 150 nm to 2.1 pm, with corresponding surface coverage increasing from 14.8% to 54%.

[0101] The nickel (Ni) stressor layer contributes additional strain energy to the system, thereby reducing the energy demand on the handle layer. Owing to its higher stiffness (Young’s modulus of approximately 200 GPa compared to 103 GPa for Ge and lower values for lll-V materials), the Ni layer ensures that strain remains within acceptable limits for the non-porous layer of germanium. Empirical results confirm successful membrane detachment under the following conditions: for a pillar surface coverage of 14.8%, electroplating is performed at a current density of 0.03 A / cm2for 3 to 5 minutes, yielding a Ni layer thickness of 2 to 3.5 pm; for a coverage of 54%, the same current density is applied for 30 to 35 minutes, producing aNi layer thickness of 21.6 to 25.2 m. These values have been empirically demonstrated and could vary from one embodiment to another.

[0102] The technique demonstrated in this example can enable the detachment of non-porous layers that would otherwise be nonviable using conventional techniques. Furthermore, the process is ready for industrial scaling for substrates exceeding 4 inches in diameter. Postseparation, the Ni layer may be retained or selectively removed via wet chemical etching, depending on downstream device fabrication requirements. In all cases, the non-porous layer can be affixed to a rigid or semi-rigid support to prevent crack propagation.

[0103] It was found that the deposition of a stressor layer, such as nickel (Ni), can introduce controlled strain energy into the underlying fragile layer, thereby reducing the mechanical energy required to initiate detachment of the epitaxial membrane. This approach can mitigate the risk of crack formation within the membrane during separation and has demonstrated efficacy in facilitating the release of epitaxial layers grown on porous substrates. The method is adaptable to a variety of epitaxial architectures, rendering it suitable for the fabrication of a broad spectrum of semiconductor devices.

[0104] The experimental results described herein establish a pathway for producing freestanding I ll-V / Ge multi-junction solar cells on full 4-inch germanium membranes using a cost-optimized manufacturing process. Compared to conventional spalling techniques, this method offers improved process control due to the localized nature of the engineered porous layer, which exhibits a lower bonding energy than either the substrate or the epitaxial membrane. Post-detachment, the substrate surface remains substantially planar, in contrast to the irregular surfaces typically resulting from spalling. Residual pillar structures may be removed via selective wet chemical etching using a solution comprising hydrofluoric acid (HF), hydrogen peroxide (H2O2), and water (H2O), thereby obviating the need for chemical mechanical polishing (CMP). This can contribute to reduced material loss during substrate reconditioning and enhances overall process cost efficiency, which are crucial advantages for any new fabrication processes.

[0105] As can be understood, the examples described above and illustrated are intended to be exemplary only. Although the embodiments described in detail in this disclosure aredirected to monocrystalline Ge, it is noted that the methods and systems described therein can be used with any other suitable semiconductor material. For instance, when using other semiconductor materials, such as gallium arsenide (GaAs), the use of bonding layer(s) between the non-porous layer and the stressor layer can be preferable to enhance the bonding between the non-porous layer and the stressor layer. Of course, the bonding layer(s) may be omitted when the semiconductor material is germanium-based or based on other semiconductor materials such as indium phosphide (InP), for instance. The methods and systems proposed herein have been demonstrated with semiconductor materials other than germanium. Indeed, InP and GaAs non-porous layers have been successfully fabricated and removed from their corresponding bulk substrates using the technique disclosed herein. The scope is indicated by the appended claims.

Claims

WHAT IS CLAIMED IS:

1. A method of making a monocrystalline germanium (Ge) membrane, the method comprising:depositing a non-porous layer of monocrystalline Ge onto a porous layer of a monocrystalline Ge substrate, the porous layer mechanically coupled to the monocrystalline Ge substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value;depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non- porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the monocrystalline Ge substrate with a given mechanical stress value below the critical mechanical stress value; andmoving the stressor layer away from the monocrystalline Ge substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

2. The method of claim 1 wherein the gap between the given mechanical stress value and the critical mechanical stress value below 1 MPa, preferably below 0.75 MPa, and of about 0.5 MPa.

3. The method of claim 1 wherein the given mechanical stress value ranges between about 100 MPa and 1GPa, preferably between 200 MPa and 500 MPa, and most preferably between 250 and 300 MPa.

4. The method of claim 1 wherein the given material is a metallic material.

5. The method of claim 1 further comprising, prior to said depositing the stressor layer, depositing one or more bonding layers on the non-porous layer, the one or more bonding layers sandwiched between the non-porous layer and the stressor layer.

6. The method of claim 1 wherein the stressor layer has a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

7. The method of claim 1 wherein the non-porous layer has a thickness ranging between about 100 nm and 500 microns, preferably between about 250 nm and 250 microns, and most preferably between 500 nm and 10 microns.

8. The method of claim 1 wherein the stressor layer is rigid, said moving including pulling the stressor layer perpendicularly away from the monocrystalline Ge substrate.

9. The method of claim 1 wherein the stressor layer is flexible, said moving including one of peeling or rolling the stressor layer away from the monocrystalline Ge substrate.

10. The method of claim 1 wherein said depositing the stressor layer of the given material includes immersing the non-porous layer in a solution together with a nickel electrode, applying electrical voltage across the non-porous layer and the nickel electrode, nickel atoms leaving the electrode to cover the non-porous layer material.

11. The method of claim 10 wherein said applying is performed while keeping the porous layer facing upwards thereby avoiding bubble formation.

12. The method of claim 1 further comprising removing the stressor layer from the non-porous layer.

13. The method of claim 12 wherein said removing the stressor layer involves chemical etching.

14. The method of claim 1 wherein the porous layer has a plurality of pillars extending between the monocrystalline Ge substrate and the non-porous layer, said breaking including breaking the plurality of pillars.

15. The method of claim 14 further comprising cleaning broken pillar residues from the non-porous layer.

16. A system for making a monocrystalline germanium membrane, the system comprising:a germanium deposition station depositing a non-porous layer of monocrystalline Ge onto a porous layer of a monocrystalline Ge substrate, the porous layer mechanically coupled to the monocrystalline Ge substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value;a stressor material deposition station depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the monocrystalline Ge substrate with a given mechanical stress value below the critical mechanical stress value; anda detachment station moving the stressor layer away from the monocrystalline Ge substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the monocrystalline Ge substrate.

17. A semiconductor device comprising:a non-porous layer of monocrystalline Ge; anda stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the given material of the stressor layer being mechanically coupled to the non-porous layer of monocrystalline Ge.

18. The semiconductor device of claim 17 wherein the given material is a metallic material.

19. The semiconductor device of claim 17 further comprising one or more bonding layers sandwiched between the non-porous layer and the stressor layer, the stressor layer lying onto the non-porous layer indirectly via the one or more bonding layers.

20. The semiconductor device of claim 17 wherein the stressor layer has a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

21. A method of making a semiconductor membrane, the method comprising:depositing a non-porous layer of a semiconductor material onto a porous layer of a semiconductor substrate, the porous layer mechanically coupled to the semiconductor substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value;depositing a stressor layer of a given material onto the non-porous layer, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the semiconductor substrate with a given mechanical stress value below the critical mechanical stress value; andmoving the stressor layer away from the semiconductor substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer and freeing the stressor layer, together with the non-porous layer, from the semiconductor substrate.

22. The method of claim 21 wherein the gap between the given mechanical stress value and the critical mechanical stress value below 1 MPa, preferably below 0.75 MPa, and of about 0.5 MPa.

23. The method of claim 21 wherein the given mechanical stress value ranges between about 100 MPa and 1GPa, preferably between 200 MPa and 500 MPa, and most preferably between 250 and 300 MPa.

24. The method of claim 21 wherein the given material is a metallic material.

25. The method of claim 21 further comprising, prior to said depositing the stressor layer, depositing one or more bonding layers on the non-porous layer, the one or more bonding layers sandwiched between the non-porous layer and the stressor layer.

26. The method of claim 21 wherein the stressor layer has a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

27. The method of claim 21 wherein the non-porous layer has a thickness ranging between about 100 nm and 500 microns, preferably between about 250 nm and 250 microns, and most preferably between 500 nm and 10 microns.

28. The method of claim 21 wherein the stressor layer is rigid, said moving including pulling the stressor layer perpendicularly away from the semiconductor substrate.

29. The method of claim 21 wherein the stressor layer is flexible, said moving including one of peeling and rolling the stressor layer away from the semiconductor substrate.

30. The method of claim 21 wherein said depositing the stressor layer of the given material includes immersing the non-porous layer in a solution together with a nickel electrode, applying electrical voltage across the non-porous layer and the nickel electrode, nickel atoms leaving the electrode to cover the non-porous layer material.

31. The method of claim 30 wherein said applying step is performed while keeping the porous layer facing upwards thereby avoiding bubble formation.

32. The method of claim 21 further comprising removing the stressor layer from the non-porous layer.

33. The method of claim 32 wherein said removing the stressor layer involves chemical etching.

34. The method of claim 21 wherein the porous layer has a plurality of pillars extending between the semiconductor substrate and the non-porous layer, said breaking including breaking the plurality of pillars.

35. The method of claim 34 further comprising cleaning broken pillar residues from the non-porous layer.

36. A system for making a semiconductor membrane, the system comprising:a semiconductor deposition station depositing a non-porous layer of a semiconductor material onto a porous layer of a semiconductor substrate, the porous layer mechanically coupled to the semiconductor substrate by a first coupling strength value and breaking under duress of a mechanical stress exceeding a critical mechanical stress value;a stressor material deposition station depositing a stressor layer of a given material onto the non-porous layer of monocrystalline Ge, the stressor layer mechanically coupled to the non-porous layer by a second coupling strength value greater than the first coupling strength value, the given material of the stressor layer loading the semiconductor substrate with a given mechanical stress value below the critical mechanical stress value; anda detachment station moving the stressor layer away from the semiconductor substrate, said moving imparting a mechanical stress to the porous layer thereby bridging a gap between the given mechanical stress value and the critical mechanical stress value, resulting in breaking the porous layer andfreeing the stressor layer, together with the non-porous layer, from the semiconductor substrate.

37. A semiconductor device comprising:a non-porous layer of a semiconductor material; anda stressor layer of a given material onto the non-porous layer of the semiconductor material, the given material of the stressor layer being mechanically coupled to the non-porous layer of the semiconductor material.

38. The semiconductor device of claim 37 wherein the given material is a metallic material.

39. The semiconductor device of claim 37 further comprising one or more bonding layers sandwiched between the non-porous layer and the stressor layer, the stressor layer lying onto the non-porous layer indirectly via the one or more bonding layers.

40. The semiconductor device of claim 37 wherein the stressor layer has a thickness ranging between 1 and 100 microns, preferably between 1 and 50 microns, and most preferably between 1 and 8 microns.

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