Isolated power converter
The soft startup mechanism for isolated power converters addresses high voltage spikes by charging a capacitor to achieve zero voltage switching from the first cycle, reducing secondary side stress and enabling the use of less expensive switches, enhancing efficiency and cost-effectiveness.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- RENESAS DESIGN (UK) LTD
- Filing Date
- 2024-11-14
- Publication Date
- 2026-05-21
AI Technical Summary
Traditional isolated power converters with asymmetrical half-bridge topology experience high voltage spikes on the secondary side during startup, necessitating the use of expensive synchronous rectifier switches due to the reliance on fixed timing for turning on low and high side switches.
A soft startup mechanism is implemented by charging a capacitor on the primary side via a controlled charging path until the output voltage reaches a target value, using a driver to manage the switching sequence of the power switches, ensuring zero voltage switching (ZVS) is achieved from the first cycle, thereby reducing voltage stress on the secondary side.
The solution reduces power losses and secondary side voltage stress, allowing the use of less expensive synchronous rectifier switches by ensuring zero voltage switching from the first cycle, thus optimizing converter efficiency and reducing component costs.
Smart Images
Figure CN2024132126_21052026_PF_FP_ABST
Abstract
Description
ISOLATED POWER CONVERTERTechnical Field
[0001] The present disclosure relates to an isolated power converter and in particular to an isolated power converter with a soft startup mechanism for reduced voltage stress on the secondary side.Background
[0002] Isolated power converters may be used in many different applications. Isolated power converter may be implemented using various topologies including, half-bridge (HB) or full bridge converters. Half bridge converters include HB inductor-inductor-capacitor (LLC) and asymmetric HB (AHB) converters. These topologies have several advantages including high efficiency and relatively low conduction and switching losses.
[0003] Traditionally, soft startup for asymmetrical half-bridge converter is achieved using a fixed time to turn on low side switch (LS) and high side switch (HS) . This results in a relatively high voltage spike on secondary side switch which in turn influences the voltage rating of the synchronous rectifier (SR) switch. Switches with higher voltage rating are generally more expensive.
[0004] It is an object of the disclosure to address one or more of the above mentioned limitations.Summary
[0005] According to a first aspect of the disclosure, there is provided an isolated power converter comprising a primary side for receiving an input voltage and a secondary side for providing an output voltage; a capacitor coupled to the primary side; a charging path connecting the capacitor to a voltage source; wherein the isolated power converter is configured so that upon startup the capacitor is charged via the charging path until the output voltage reaches a target value.
[0006] Optionally, the voltage source is a direct current (DC) voltage source or a rectified AC source.
[0007] Optionally, the isolated power converter is configured to use the voltage source to charge the capacitor after a low side power switch turns off.
[0008] Optionally, the isolated power converter comprises a transformer having a primary winding and a secondary winding; a high side power switch and a low side power switch coupled at a switching node; wherein the primary winding has a first terminal coupled to the switching node via an inductor, and a second terminal coupled to ground via the capacitor.
[0009] Optionally, the isolated power converter comprises a driver for driving the high side power switch and the low side power switch, the driver being configured to operate the converter in a startup mode, wherein in the startup mode the high side power switch is turned off and the low side power switch is operated with switching sequence having an on time during which the low side power switch is turned on and an off time during which the low side power switch is turned off.
[0010] Optionally, wherein during the on time of the low side power switch, a voltage across the capacitor decreases and the output voltage increases, and wherein during the off time of the low side power switch the voltage across the capacitor increases.
[0011] Optionally, wherein the output voltage increases incrementally at each cycle of the switching sequence.
[0012] Optionally, the isolated power converter comprises a sensing circuit configured to sense the output voltage during startup.
[0013] Optionally, wherein the charging path comprises a diode.
[0014] Optionally, wherein after startup a voltage across the capacitor varies between a minimum voltage value and a maximum voltage value, and wherein the voltage source is configured to generate a voltage that is less than the minimum voltage value.
[0015] Optionally, wherein the charging path comprises a switch.
[0016] Optionally, the inductor and the capacitor form a resonant tank.
[0017] Optionally, wherein the power converter is a half bridge converter or a half bridge resonant converter or an asymmetrical half bridge resonant converter.
[0018] Optionally, wherein the power converter is a full bridge converter or a full bridge resonant converter.
[0019] According to a second aspect of the disclosure, there is provided a method of operating an isolated power converter having a primary side for receiving an input voltage and a secondary side for providing an output voltage; and a capacitor coupled to the primary side; the method comprising
[0020] providing the isolated power converter with a charging path connecting the capacitor to a voltage source; and
[0021] upon startup charging the capacitor via the charging path until the output voltage reaches a target value.
[0022] Description of the drawings
[0023] The disclosure is described in further detail below by way of example and with reference to the accompanying drawings, in which:
[0024] figure 1A is a diagram of a conventional asymmetrical half bridge converter;
[0025] figure 1B is a diagram illustrating zero voltage switching during steady state operation for the converter of figure 1A;
[0026] figure 2 is a flow chart of a method for operating an isolated power converter according to the disclosure;
[0027] figure 3 is a diagram of an isolated power converter for implementing the method of figure 2;
[0028] figure 4 is a a diagram of another isolated power converter for implementing the method of figure 2;
[0029] figure 5 is a plot illustrating the operation of the isolated power converter of figure 3 or figure 4;
[0030] figure 6 is a diagram of a full bridge power converter for implementing the method of figure 2.Description
[0031] Figure 1A is a diagram of a conventional asymmetrical half bridge (AHB) converter.
[0032] The AHB converter 100 has a primary side for receiving an input voltage Vin and a secondary side for providing an output voltage Vout. A transformer is provided having a primary winding and a secondary winding. A high side power switch HS and a low side power switch LS are coupled at a switching node. The primary winding of the transformer has a first terminal coupled to the switching node via an inductor Lr, and a second terminal coupled to ground via the capacitor Cr. The resonant tank (Lm / Lr and Cr) is only in parallel with either LS or HS, rendering the converter asymmetrical.
[0033] The secondary winding of the transformer is coupled in parallel with an output capacitor Cout. The secondary winding has a first terminal coupled to the output port and a second terminal coupled to secondary side ground via a synchronous rectifier (SR) switch.
[0034] During steady state operation, high side zero voltage switching (ZVS) permits to reduce device switching losses. In the meantime, it also helps on reducing voltage stress on the SR switch. The voltage spikes are caused by high dv / dt noise and then coupled through transformer leakages to the secondary side.
[0035] For the normal (steady state) operation condition, ZVS can be accomplished with sufficient negative current on the primary side. This negative current Ineg is generated by the voltage V (Lm) across the magnetizing inductor (Lm) during the reset switch ON period Trs. The voltage V (Lm) is equal to N*Vout expressed by the following equation:
[0036] In which N is the transformer turns ratio.
[0037] However, for the startup operation, there is no Vout. This means that first ever switching cycle relies on Vcr to charge up Vout. Eventually, with enough Vout, negative current can be built up and be used to discharge the HS switch Coss to achieve ZVS.
[0038] Traditionally, soft startup for asymmetrical half-bridge converter is achieved using a fixed time to turn on low side switch (LS) and high side switch (HS) . This results in a relatively high voltage spike on secondary side switch which in turn influences the voltage rating of the synchronous rectifier (SR) switch. Switches with higher voltage rating are generally more expensive.
[0039] Figure 1B is a diagram illustrating zero voltage switching during steady state operation for the converter of figure 1A.
[0040] ZVS is achieved by reducing or eliminating the overlap between the drain current Id and the drain to source voltage Vds of the power switches.
[0041] Figure 1B shows the drain current Id and the voltage Vds for the HS switch, as the LS and HS switches turn on and off.
[0042] At time t0 the HS switch is off and the LS switch turns on. The inductor current ILr goes negative for the duration Ton of the LS switch. During this time the voltage Vds (HS) is given by the voltage across the output capacitor Coss1 of the HS switch equal to Vin. At time t1 LS turns off and Vds (HS) decreases. When the HS switch turns on at time t2 the current ILr discharges through Coss1, and Id (HS) increases. The output capacitance Coss is given by the addition of the drain-source capacitance Cds and the gate-drain capacitance Cgs.
[0043] Figure 2 is a flow chart of a method for operating an isolated power converter according to the disclosure. The isolated power converter has a primary side for receiving an input voltage and a secondary side for providing an output voltage; and a capacitor coupled to the primary side.
[0044] At step 210 the isolated power converter is provided with a charging path connecting the capacitor to a voltage source. For instance the voltage source may be a DC voltage source or a rectified AC source. At step 220 upon startup the capacitor is charged via the charging path until the output voltage reaches a target value. The target value may be a predefined value calculated or estimated based on the characteristics of the isolated power converter. Since the voltage Vcr across the capacitor remains relatively low during startup, this approach permits to achieve low power losses, hence reducing voltage stress on the secondary side of the power converter.
[0045] Figure 3 is a diagram of an isolated power converter for implementing the method of figure 2. The isolated power converter 300 has a primary side for receiving an input voltage Vin and a secondary side for providing an output voltage Vout. In this case, the magnetizing inductance Lm of the transformer is not shown separately.
[0046] A capacitor Cr is coupled to the primary side, and a charging path connects the capacitor to a voltage source. Upon startup the capacitor is charged via the charging path until the output voltage reaches a target value.
[0047] A transformer is provided having a primary winding and a secondary winding. A high side power switch HS and a low side power switch LS are coupled at a switching node. The primary winding of the transformer has a first terminal coupled to the switching node via an inductor Lr, and a second terminal coupled to ground via the capacitor Cr at node P.
[0048] The secondary winding of the transformer is coupled in parallel with an output capacitor Cout. The secondary winding has a first terminal coupled to the output port and a second terminal coupled to the secondary side ground via a switch, which may be implemented as a synchronous rectifier (SR) switch, such as a SR MOS or a SR GaN. Alternatively, the secondary side switch may be replaced by a diode. In another implementation the secondary side switch may be located on the other side of the secondary winding, hence coupled to Vout.
[0049] The inductor Lr and the capacitor Cr form a resonant tank and are also referred to as resonant capacitor and resonant inductor respectively.
[0050] A primary driver is provided on the primary side to drive the HS and LS power switches. A secondary driver is provided on the secondary side to drive the SR switch.
[0051] The primary driver is configured to operate the converter in a startup mode until Vout reaches the desired value. The primary driver may be configured to operate in startup mode for a pre-determined number of cycles. Alternatively the driver may receive a feedback signal indicating the value of Vout during startup. For instance a sensing circuit configured to sense the output voltage during startup may be provided. Such a sensing circuit may be implemented in different way to measure Vout either directly or indirectly.
[0052] In this example, the voltage source is a direct current (DC) voltage source providing a voltage Vdc. Alternatively, the voltage source may be a rectified AC source. In the example of figure 3, the charging path is formed of a conducting channel connecting the capacitor Cr to the DC voltage source via a diode D1 and a resistance Rcr. This implementation is suitable when the voltage Vdc is less than a minimum voltage Vcr_min across the capacitor Cr, in which Vcr_min is the minimum Vcr voltage during normal operation, hence after the startup. During start up the diode D1 is forward biased to charge Cr.
[0053] After startup the voltage Vcr across the Cr is above Vcr_min so that the diode D1 becomes reversed biased, hence switching off the charging path.
[0054] During start up the resonant capacitor Cr is used as a source and the transformer delivers energy to secondary side directly. During startup the HS switch is turned off (open) . By turning on the low side switch LS, Cr charges Lm and forms a negative current loop (current moving anticlockwise from Cr to Lm, Lr and LS) . The transformer then delivers this energy into output capacitor (Cout) . When LS turns off the charging path is used to charge up Cr. The LS ON time and the LS OFF time are determined by Vdc and Idc.
[0055] The DC voltage source may be implemented in different ways. For instance the DC voltage source may be a rail voltage source on the integrated circuit (IC) . For instance the rail voltage source may deliver a rail voltage Vcc or Vdd. Alternatively the DC voltage Vdc could come from auxiliary winding or any bias DC source.
[0056] For the source selection, the voltage Vdc cannot be too low otherwise it is going to affect the Vout pre-charge speed and in the end increase the total startup time. Some applications have restriction on startup time. On the other hand, the voltage source cannot be too large either. If the voltage Vcr is too high, during LS ON which Cr discharge period, the ILr current would become larger and potentially damage the LS switch.
[0057] Once the output voltage Vout and the voltage Vcr have reached a sufficient level, the HS switch is then permitted to turn on. Consequently, starting from the first switching cycle in which the HS is turned on, one can guarantee HS ZVS turn on.
[0058] Figure 4 is a diagram of another isolated power converter for implementing the method of figure 2. The power converter 400 is similar to the power converter 300 of figure 3, however in this case the diode D1 has been replaced by a switch S1. A controller is provided to control the operation of the switch S1. During startup the controller is configured to turn on the switch S1 (closed) . After startup the controller would turn off the switch S1. The switch S1 may be implemented in different ways. For instance the switch S1 may be N-type or P-type, such as an NMOS or a PMOS transistor.
[0059] If S1 is an NMOS transistor, then a blocking diode may be provided to block the current when Vcr > Vdc.
[0060] Figure 5 is a plot illustrating the operation of the isolated power converter of figure 3 or figure 4, during start up. Figure 5 shows several waveforms that include: the gate voltage of the low side switch 510, the inductor current ILr 520, the capacitor voltage Vcr 530 and the output voltage Vout 540.
[0061] During startup the HS switch is turned off (open) . Initially at time t0, the LS switch LS is off (open) the voltage Vcr= Vdc and the current ILr through inductor Lr is null. At time t1 the switch LS turns on, the amplitude of the inductor current ILr starts increasing. The current ILr being negative, the amplitude becomes more and more negative. The voltage Vcr decreases and the output Vout start increasing. The switch LS remains on for the on time Ton. At time t2 the switch LS turns off. The current ILr is back to 0 and Vcr starts increasing. The capacitor Cr is charged for the duration Toff via the charging path. The on time Ton may be relatively short, and the off time Toff may be longer than Ton, allowing for sufficient time to charge Cr. During the time Toff the output voltage Vout may remain substantially constant. At time t3 the switch LS is turned back on, and a new cycle starts again.
[0062] The output voltage Vout increases incrementally at each cycle. When Vout is high enough, the drain to source voltage of the HS switch Vds (HS) can be discharged close to 0V before t2. After several cycles the output voltage reaches the target value. The required numbers of cycles to reach the desired Vout value may be estimated or calculated based on the circuit design characteristics. Alternatively the voltage Vout may be monitored during startup, and the cycles repeated until Vout reaches the desired value. The driver may include a comparator for comparing a current value of Vout with the target value.
[0063] Once Vout has reached the target value, the Vout pre-charge stops, and the normal sequence starts. The output voltage Vout may be monitored either directly, for instance using the auxiliary winding, or indirectly.
[0064] For direct Vout sensing case, the on / off switching sequence of the LS switch continues until Vout meets a minimum threshold value. This minimum threshold value should be high enough so that a negative current ILm is generated during LS ON time. The current Ilm then discharges through the output capacitance Coss of the high side switch HS.
[0065] For in-direct Vout sensing case, the duration of the on / off switching sequence of the LS switch is calculated or estimated. For an ideal transformer, Vout increment step can be estimated using the equation:
[0066] In which N is the transformer turns ratio, that is the number of turns in the primary coil Np over the number of turns in the secondary coil Ns.
[0067] The smaller the Cr to Cout ratio, the smaller the Vout increasing step. Therefore, in this case a relatively long time is required for Vout to reach the minimum threshold value. Similarly, a small transformer turns ratio lead to a small and therefore requires more cycles to reach the Vout target value.
[0068] In a numerical example, if the transformer turns ratio is 1: 1, and Cr to Cout ratio is also 1, then Vout will quickly catch up 1 / 2Vcr, because The larger Vout, the slower the Vout charging speed.
[0069] When Vout > 0, Lm becomes reversed biased by Nps *Vout. Therefore, when the LS switch turns ON during normal startup, the primary side current flow as described in figure 1B. Then, after LS switch OFF, the negative current ILr discharges through the high side switch capacitance Coss_1 and achieves high side zero voltage switch. When Vout is high enough, the negative current iLr is sufficiently large to fully discharge HS Coss1 and achieve ZVS. With ZVS enabled, voltage stress on the secondary side is greatly reduced. As a result, the SR switch may be chosen with a lower voltage rating.
[0070] Figure 6 is a diagram of a full bridge power converter for implementing the method of figure 2. In this example, the driver is used to drive the four switches S1, S2, S3 and S4. The charging path is now provided by the connection between Cr and Vdc via the switch S4. The driver is configured to perform soft start control as follows. First to charge the capacitor Cr, the switch S4 is turned on and the switch S2 is turned off. Then, S4 is turned off and S2 is turned on to transfer energy to Cout.
[0071] Like in the examples of figures 3 or 4, the converter of figure 6 may include a sensing circuit configured to sense the output voltage Vout during startup. In this case the feedback signal indicative of Vout is sent to the primary side driver.
[0072] A skilled person will appreciate that variations of the disclosed arrangements are possible without departing from the disclosure. Accordingly, the above description of the specific embodiments is made by way of example only and not for the purposes of limitation. It will be clear to the skilled person that minor modifications may be made without significant changes to the operation described.
Claims
1.An isolated power converter comprisinga primary side for receiving an input voltage and a secondary side for providing an output voltage;a capacitor coupled to the primary side;a charging path connecting the capacitor to a voltage source;wherein the isolated power converter is configured so that upon startup the capacitor is charged via the charging path until the output voltage reaches a target value.2.The isolated power converter as claimed in claim 1, wherein the voltage source is a direct current (DC) voltage source or a rectified AC source.3.The isolated power converter as claimed in claim 1, wherein the isolated power converter is configured to use the voltage source to charge the capacitor after a low side power switch turns off.4.The isolated power converter as claimed in claim 1, comprisinga transformer having a primary winding and a secondary winding;a high side power switch and a low side power switch coupled at a switching node;wherein the primary winding has a first terminal coupled to the switching node via an inductor, and a second terminal coupled to ground via the capacitor.5.The isolated power converter as claimed in claim 4, comprising a driver for driving the high side power switch and the low side power switch, the driver being configured to operate the converter in a startup mode, wherein in the startup mode the high side power switch is turned off and the low side power switch is operated with switching sequence having an on time during which the low side power switch is turned on and an off time during which the low side power switch is turned off.6.The isolated power converter as claimed in claim 5, wherein during the on time of the low side power switch, a voltage across the capacitor decreases and the output voltage increases, and wherein during the off time of the low side power switch the voltage across the capacitor increases.7.The isolated power converter as claimed in claim 5, wherein the output voltage increases incrementally at each cycle of the switching sequence.8.The isolated power converter as claimed in claim 1, comprising a sensing circuit configured to sense the output voltage during startup.9.The isolated power converter as claimed in claim 1, wherein the charging path comprises a diode.10.The isolated power converter as claimed in claim 1, wherein after startup a voltage across the capacitor varies between a minimum voltage value and a maximum voltage value, and wherein the voltage source is configured to generate a voltage that is less than the minimum voltage value.11.The isolated power converter as claimed in claim 1, wherein the charging path comprises a switch.12.The isolated power converter as claimed in claim 4, wherein the inductor and the capacitor form a resonant tank.13.The isolated power converter as claimed in claim 1, wherein the power converter is a half bridge converter or a half bridge resonant converter or an asymmetrical half bridge resonant converter.14.The isolated power converter as claimed in claim 1, wherein the power converter is a full bridge converter or a full bridge resonant converter.15.A method of operating an isolated power converter having a primary side for receiving an input voltage and a secondary side for providing an output voltage; and a capacitor coupled to the primary side; the method comprisingproviding the isolated power converter with a charging path connecting the capacitor to a voltage source; andupon startup charging the capacitor via the charging path until the output voltage reaches a target value.