Self-alignment for die stacking

Abstract

Methods for self-alignment for die stacking are disclosed. In one aspect, magnets are added to wafers in a predefined grid. Complementary magnets in dice to be placed on the wafer are attracted to the magnets in the wafer, causing the dice to be positioned and aligned in a desired location on the wafer. Conventional bonding techniques may then be used to secure the dice to the wafer. While plural dice are contemplated, the present disclosure also contemplates a single die being attached to a wafer using this technique. The creation of the magnets may be done using preformed magnets or by placing magnetic material in the wafers and generating a magnet using an electromagnetic field.

Description

SELF-ALIGNMENT FOR DIE STACKINGPRIORITY APPLICATION

[0001] The present application is related to U.S. Provisional Patent Application Serial No. 63 / 721,060, filed on November 15, 2024, and entitled “SELF- ALIGNMENT FOR DIE STACKING,” the contents of which are incorporated herein by reference in their entirety.BACKGROUNDI. Field of the Disclosure

[0002] The technology of the disclosure relates generally to techniques that allow dice to be stacked on wafers for three-dimensional circuit packages.II. Background

[0003] Computing devices abound in modem society, and more particularly, mobile communication devices have become increasingly common. The prevalence of these mobile communication devices is driven in part by the many functions that are now enabled on such devices. Increased processing capabilities in such devices means that mobile communication devices have evolved from pure communication tools into sophisticated mobile entertainment centers, thus enabling enhanced user experiences. With the advent of the myriad functions available to such devices, there has been increased pressure to provide increased processing capability for the devices. Because these devices are intended to be mobile, this pressure translates into providing more processing capability in a space-constrained environment. One solution to this pressure is stacking wafers or stacking dice on wafers to form a three-dimensional package. Finding efficient and accurate ways to create such stacks provides room for innovation.SUMMARY

[0004] Aspects disclosed in the detailed description include methods for selfalignment for die stacking. In particular, aspects of the present disclosure contemplate adding magnets to wafers in a predefined grid. Complementary magnets in the dice to be placed on the wafer are attracted to the magnets in the wafer, causing the dice to be positioned and aligned in a desired location on the wafer. Conventional bondingtechniques may then be used to secure the dice to the wafer. While plural dice are contemplated, the present disclosure also contemplates a single die being attached to a wafer using this technique. Die-to-die stacking using this method is also possible, (may also be referred to as “die-to-die bonding”) The creation of the magnets may be done using preformed magnets or by placing magnetic material in the wafers and generating a magnet using an electromagnetic field.

[0005] In this regard, in one aspect, a package is disclosed. The package includes a wafer comprising a first magnet on a first surface and a die bonded to the wafer on the first surface, the die comprising a second magnet positioned adjacent to the first magnet.

[0006] In another aspect, a method of making a package is disclosed. The method includes forming a wafer, creating cavities in the wafer, creating wafer magnets in the cavities, placing a die on the wafer, and aligning the die using the wafer magnets in the cavities.

[0007] In another aspect, a package is disclosed. The package includes a first die comprising a first magnet on a first surface and a second die bonded to the first die on the first surface, the second die comprising a second magnet positioned adjacent to the first magnet.BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a cross-sectional elevational view of a package with a die stacked on a wafer using the self-aligning techniques of the present disclosure;

[0009] Figure 2 is a flowchart illustrating an exemplary process for adding selfaligning magnetic elements during package fabrication;

[0010] Figures 3A-3H are cross-sectional side elevational views of intermediate products formed in the steps for the process of Figure 2;

[0011] Figures 4A-4H are top plan views of the intermediate products formed in the steps for the process of Figure 2;

[0012] Figures 5A-5G show additional details of circuitry formation in a wafer for use in the process of Figure 2; and

[0013] Figure 6 is a block diagram of a mobile computing device, which may include the package of Figure 1 for one or more elements according to the present disclosure.DETAILED DESCRIPTION

[0014] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0015] It will be understood that although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed as a first element without departing from the scope of the present disclosure. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0016] It will be understood that when an element, such as a layer, region, or substrate, is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element, or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, no intervening elements are present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, no intervening elements are present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element, or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, no intervening elements are present.

[0017] Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It willbe understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.

[0018] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a," “an,” and “the” are intended to include the plural forms as well unless the context clearly indicates otherwise. It will be further understood that the terms “comprises," “comprising," “includes,” and / or “including,” when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0019] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0020] In keeping with the above admonition about definitions, the present disclosure uses transceiver in a broad manner. Current industry literature uses “transceiver” in two ways. The first way uses transceiver broadly to refer to a plurality of circuits that send and receive signals. Exemplary circuits may include a baseband processor, an up / down conversion circuit, filters, amplifiers, couplers, and the like coupled to one or more antennas. A second way, used by some authors in the industry literature, refers to a circuit positioned between a baseband processor and a power amplifier circuit as a transceiver. This intermediate circuit may include the up / down conversion circuits, mixers, oscillators, filters, and the like, but generally does not include the power amplifiers. As used herein, the term transceiver is used in the first sense. Where relevant to distinguish between the two definitions, the terms “transceiver chain” and “transceiver circuit” are used respectively.

[0021] Additionally, to the extent that the term “approximately” is used in the claims, it is herein defined to be within five percent (5%).

[0022] Aspects disclosed in the detailed description include methods for selfalignment for die stacking. In particular, aspects of the present disclosure contemplateadding magnets to wafers in a predefined grid. Complementary magnets in dice to be placed on the wafer are attracted to the magnets in the wafer, causing the dice to be positioned and aligned in a desired location on the wafer. Conventional bonding techniques may then be used to secure the dice to the wafer. While plural dice are contemplated, the present disclosure also contemplates a single die being attached to a wafer using this technique. Die-to-die stacking is also possible with this method. The creation the magnets may be done using preformed magnets or by placing magnetic material in the wafers and generating a magnet using an electromagnetic field.

[0023] The end result of this process is a package with a die on a wafer that is more readily placed in the correct position, such that the electrical connections between circuitry in the die and circuitry in the wafer are interconnected and the die is bonded to the wafer. The pick-and-place steps are significantly accelerated compared to conventional optical techniques, which have low throughput. Additionally, the processes of the present disclosure do not require the use of hydrophobic / hydrophilic materials. While hydrophilic materials allow for self-alignment and are reasonably fast, the presence of water droplets is generally undesirable. The improved throughput and absence of water make this an attractive technique for stacking dice on wafers, and it may also be extended to stacking a die on a die (or multiple dice on a die).

[0024] Before addressing the processes of the present disclosure, a discussion of a package 100 assembled according to aspects of the present disclosure is provided with reference to Figure 1. In this regard, the package 100 may include a device wafer 102 that is configured to attach to a laminate substrate (e.g., a printed circuit board or the like), for example, through wirebonds, backside die connections (e.g., solder bumps, ball grid arrays) or the like, none shown. Circuitry 104 in the device wafer 102 is electrically coupled to circuitry 106 in a die 108 through interconnects (e.g., copper vias) 110. The die 108 is bonded to the wafer 102, such as through hybrid bonding (although other techniques are discussed below). Alignment and placement magnets 112A, 112B are present from their use in the initial placement of the die 108 on the wafer 102. While only one die 108 is shown attached to the wafer 102, other alignment and placement magnets 114(1)- 114(N) may be present to assist in the placement of other dice. While the alignment and placement magnets 112A, 112B, 114( 1 )- 114(2) are not used during theoperation of the package 100, they remain manufacturing artifacts when a package 100 is assembled according to aspects of the present disclosure.

[0025] In this regard, Figure 2 provides a flowchart of a process 200 used to assemble a package 100 according to aspects of the present disclosure. Figures 3A-3H and 4A-4H provide side and top views of intermediate products formed during the process 200, and the following discussion uses the Figures 3A-3H, 4A-4H to highlight aspects of the process 200.

[0026] The process 200 begins by forming a wafer 300 (block 202, see Figures 3A, 4A) that will eventually form the die 108 of Figure 1. The wafer 300 may be a uniform material that acts as a substrate for circuitry (e.g., bulk silicon), a silicon on insulator (SOI), or the like. A resist coating 302 is applied (block 204, see Figures 3B, 4B) to the wafer 300 on a “top” surface (in the z-axis), with the understanding that terms like top and bottom are relative.

[0027] The resist coating 302 is subjected to a lithographic process (block 206, see Figures 3C, 4C) to create a pattern of apertures 304 in the resist coating 302, thereby exposing the material of the wafer 300. In exemplary aspects, the pattern of apertures 304 provides circular apertures, although other shapes are possible. The pitch between apertures may be a function of the size of the die 108. While any size is possible, a circle having a diameter of approximately twenty micrometers is specifically contemplated. An etch is performed (block 208, see Figures 3D, 4D), thereby creating cavities 306 in the material of the wafer 300. It should be appreciated that the resist coating 302 is selected to be impervious to the etch.

[0028] The cavities 306 have a magnetic material 308 deposited therein (block 210, see Figures 3E, 4E), such as through sputtering or the like. Note that this may leave some residue on the resist coating 302. The resist coating 302 is then removed (block 212, see Figures 3F, 4F) so that the top surface of the wafer 300 is again exposed.

[0029] Optionally, the magnetic material 308 is subjected to a magnetic field (block 214, see Figures 4G1 and 4G2). Note that this magnetic field may be applied during deposition to determine a direction of preferred magnetic switching (e.g., switch only in a vertical direction (z-axis) either upside or downside) and again after deposition (to switch in either the up or down direction making the appropriate selection between north and south poles being exposed) and before removal of the resist coating 302. While theabove discussion has focused on the wafer 300 that may make the die 108, it should be appreciated that a comparable process is being performed on a wafer 400 that will form the wafer 102 of Figure 1 (or a second die on which the first die is to be stacked, not illustrated). In such a case, as illustrated in Figures 4G1 and 4G2, the fields applied to the wafer 300 and the wafer 400 are oppositely oriented such that the surface poles of the magnets so created are opposite of one another (e.g., a wafer 300 has a “north” pole exposed, and the wafer 400 has a “south” pole exposed (or vice versa)).

[0030] The magnetization of block 214 is optional because, instead of sputtering in a magnetic material, a previously magnetized permanent magnet may have been created and inserted into the cavities 306. Note that the insertion of such pre-existing magnets may not be practical with conventional processes, but it is possible. Still another option would be to deposit magnetic material and then make the material a permanent magnet through annealing at high temperatures under a magnetic field. All such approaches are within the scope of the present disclosure.

[0031] The wafer 300 is then diced (block 216, see Figure 4H) into dice 402(1)-402(X). In a contemplated aspect, each die 402 of dice 402(1 )-402(X) has four magnets (e.g., one at each corner), although other configurations are possible. An individual die 402 is then picked and placed onto the wafer 400 (block 218, see Figure 3G). Note that conventional pick and place tools may be able to maintain a significant speed (40K-50K units per hour (UPH)) with reasonable accuracy. Initially, there may be some misalignment, as shown by Figure 3G, but then the force of the magnets 404 in the die 402 operating on the magnets 406 in the wafer 400 causes the die 402 to align properly (block 220, see Figure 3H).

[0032] As noted, the process for providing the die 402 is similar, at least before block 216, to that used to create the wafer 400, although the patterning of the apertures in the resist coating 302 may be less uniform and tailored to the desired locations of any dice attached to the wafer 400. Also, if die-to-die stacking is used, the dice may not be made from the same wafer 300 due to possible magnetic field misalignment (depending on how the magnets are formed).

[0033] One of the reasons that circular or elliptical magnets are advantageous is that the magnetic field will be a high gradient, with the strongest field at the center of the magnet. This condition helps with the alignment of block 220.

[0034] Note further that circuitry 104 and 106 may be formed prior to the addition of the magnets 404, 406. This aspect is illustrated in Figures 5A-5G. Specifically, a wafer 300 is formed with circuitry 5OO(1)-5OO(Y) formed therein (see Figure 5A). A backside 502 is ground and thinned (see Figure 5B). The wafer 300 is flipped, and passivation layers 504 and vias 506 are formed (see Figure 5C). An oxide layer 508 may also be provided, and the magnets 404 are formed in that oxide layer 508 (see Figure 5D). The wafer 300 is flipped again and placed on a carrier substrate 510 (see Figure 5E) for dicing (see Figure 5F) and then picked / placed onto the wafer 400 (see Figure 5G).

[0035] Alternatively, the circuitry 104 and 106 may be formed in the wafers 300, 400 after magnet creation and before block 216.

[0036] As noted above, there are multiple ways in which the die 402 may be attached to the wafer 400, including the use of a die attach film (DAF), fusion bonding, and the like.

[0037] The package 100 formed according to aspects disclosed herein may be provided in or integrated into any processor-based device. Examples, without limitation, include a set-top box, an entertainment unit, a navigation device, a communications device, a fixed location data unit, a mobile location data unit, a global positioning system (GPS) device, a mobile phone, a cellular phone, a smartphone, a session initiation protocol (SIP) phone, a tablet, a phablet, a server, a computer, a portable computer, a mobile computing device, a wearable computing device (e.g., a smartwatch, a health or fitness tracker, eyewear, etc.), a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, a vehicle component, avionics systems, a drone, and a multicopter.

[0038] Figure 6 is a schematic diagram of an exemplary communication device 600 wherein the package 100 can be provided to provide any of the necessary circuitry to enable functionality. Herein, the communication device 600 can be any type of communication device, such as those listed above as well as access points, base stations (e.g., eNB or gNB), and any other type of wireless communication devices that support wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, Ultra-wideband (UWB), and near field communications.

[0039] More particularly, the communication device 600 will generally include a control system 602, a baseband processor 604, transmit circuitry 606, receive circuitry 608, antenna switching circuitry 610, multiple antennas 612, and user interface circuitry 614. Any of these circuits may be instantiated in a package 100 formed according to the process 200. In a non-limiting example, the control system 602 can be a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC), as an example. In this regard, the control system 602 can include at least a microprocessor(s), an embedded memory circuit(s), and a communication bus interface(s). The receive circuitry 608 receives radio frequency signals via the antennas 612 and through the antenna switching circuitry 610 from one or more base stations. A low noise amplifier and a filter of the receive circuitry 608 cooperate to amplify and remove broadband interference from the received signal for processing. Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using an analog-to-digital converter(s) (ADC).

[0040] The baseband processor 604 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations. The baseband processor 604 is generally implemented in one or more digital signal processors (DSPs) and ASICs.

[0041] For transmission, the baseband processor 604 receives digitized data, which may represent voice, data, or control information, from the control system 602, which it encodes for transmission. The encoded data is output to the transmit circuitry 606, where a digital-to-analog converter(s) (DAC) converts the digitally encoded data into an analog signal, and a modulator modulates the analog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier will amplify the modulated earner signal to a level appropriate for transmission and deliver the modulated carrier signal to the antennas 612 through the antenna switching circuitry 610 to the antennas 612. The multiple antennas 612 and the replicated transmit and receive circuitries 606, 608 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art.

[0042] It is also noted that the operational steps described in any of the exemplary aspects herein are described to provide examples and discussion. The operations described may be performed in numerous different sequences other than the illustrated sequences. Furthermore, operations described in a single operational step may actually be performed in a number of different steps. Additionally, one or more operational steps discussed in the exemplary aspects may be combined. It is to be understood that the operational steps illustrated in the flowchart diagrams may be subject to numerous different modifications, as will be readily apparent to one of skill in the art. Those of skill in the art will also understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0043] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations. Thus, the disclosure is not intended to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

What is claimed is:

1. A package comprising:a wafer comprising a first magnet on a first surface;a die bonded to the wafer on the first surface, the die comprising a second magnet positioned adjacent to the first magnet.

2. The package of claim 1 , wherein the wafer comprises four first magnets and the die comprises four second magnets adjacent to respective ones of the four first magnets.

3. The package of claim 1, wherein the first magnet is circularly shaped.

4. The package of claim 1, wherein the wafer comprises first circuitry coupled to second circuitry in the die.

5. The package of claim 4, further comprising a via coupling the first circuitry to the second circuitry.

6. The package of claim 1, further comprising a die attach film (DAF) positioned between the wafer and the die to assist in bonding.

7. The package of claim 1, wherein the wafer is bonded by a fusion bond.

8. The package of claim 1 integrated into a device selected from the group consisting of: a set-top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smartphone; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; avideo player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; a drone; and a multicopter.

9. A method of making a package, comprising:forming a wafer;creating cavities in the wafer;creating wafer magnets in the cavities;placing a die on the wafer;aligning the die using the wafer magnets in the cavities.

10. The method of claim 9, further comprising forming the die.

11. The method of claim 10, wherein forming the die comprises creating die magnets in the die to align with the wafer magnets.

12. The method of claim 9, further comprising bonding the wafer to the die.

13. The method of claim 9, wherein creating wafer magnets comprises creating circular wafer magnets.

14. The method of claim 9, wherein creating wafer magnets comprises sputtering a magnetic material into the cavities.

15. The method of claim 14, wherein creating wafer magnets further comprises applying a magnetic field to the wafer.

16. The method of claim 15, wherein applying the magnetic field comprises applying the magnetic field during sputtering.

17. The method of claim 15, wherein applying the magnetic field comprises applying the magnetic field after sputtering.

18. A package comprising:a first die comprising a first magnet on a first surface; and a second die bonded to the first die on the first surface, the second die comprising a second magnet positioned adjacent to the first magnet.

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