Solar cell and preparation method

Abstract

The present disclosure is applicable to the technical field of solar cells, and provides a solar cell and a preparation method. In a photovoltaic cell, there is a first height difference between the maximum height and the minimum height of second finger lines arranged in an N region, and there is a second height difference between the maximum height and the minimum height of first finger lines arranged in a P region, wherein the first height difference is less than the second height difference.

Description

Solar cells and their fabrication methods

[0001] Priority information

[0002] This disclosure requests priority and benefits from patent application No. 202422946835.8, filed with the China National Intellectual Property Administration on November 29, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of solar cell technology, specifically to a solar cell and its fabrication method. Background Technology

[0004] Back-contact solar cells, as one of the current high-efficiency cell structures, are characterized by the absence of grid lines on the front. Instead, the positive and negative electrodes and PN junction are arranged in an interdigitated pattern on the back of the cell. This structure prevents the front from being affected by the shading of the grid lines, while maximizing the size range of the metal grid lines on the back of the cell, optimizing the arrangement, and reducing the series resistance on the back of the cell, thereby improving the fill factor and conversion efficiency.

[0005] In the prior art, fine grid lines are printed on both the P-region and N-region of the back contact solar cell. However, since the impact of the high uniformity of the fine grid lines in the P-region and N-region of the back contact solar cell on the cell performance is usually not considered, the resistance of the fine grid lines in the N-region is relatively large, which affects the cell conversion efficiency.

[0006] Public content

[0007] This disclosure provides a back-contact solar cell, which aims to solve the problem that the fine grid line resistance in the N-region of existing back-contact solar cells is relatively large, thus affecting the cell conversion efficiency.

[0008] This disclosure is implemented by providing a back-contact solar cell, comprising:

[0009] The back side of the silicon wafer includes P-regions and N-regions arranged alternately in sequence;

[0010] The first fine grid line located in region P;

[0011] The second fine grid line is located in region N;

[0012] The maximum height of the second fine grid line and the minimum height of the second fine grid line have a first height difference, and the maximum height of the first fine grid line and the minimum height of the first fine grid line have a second height difference, wherein the first height difference is less than the second height difference.

[0013] The present invention discloses a back-contact solar cell in which the maximum height of the second fine grid line in the N region has a first height difference with the minimum height of the second fine grid line, and the maximum height of the first fine grid line in the P region has a second height difference with the minimum height of the first fine grid line, and the first height difference is less than the second height difference. This makes the height of the second fine grid line in the N region more uniform, which can reduce the resistance of the second fine grid line, increase the lower limit of current transmission of the second fine grid line, improve the cell fill factor, and thus improve the cell conversion efficiency.

[0014] Optionally, the first height difference is less than or equal to 1 micrometer; the second height difference is less than or equal to 2.1 micrometers.

[0015] This disclosure achieves a smaller height variation in the second fine grid line compared to the first fine grid line by controlling the first height difference to be less than or equal to 1 micrometer and the second height difference to be less than or equal to 2.1 micrometers, i.e., controlling the first height difference to be within 1 micrometer and the second height difference to be within 2.1 micrometers. This results in a more uniform height of the second fine grid line compared to the first fine grid line.

[0016] Optionally, the height of the first fine gate line is 5.6 to 7.7 micrometers, and the height of the second fine gate line is 5.8 to 6.8 micrometers.

[0017] Optionally, the difference in maximum height between two adjacent second fine grid lines is less than the difference in maximum height between two adjacent first fine grid lines, and the difference in minimum height between two adjacent second fine grid lines is less than the difference in minimum height between two adjacent first fine grid lines.

[0018] Because the difference in the maximum height of two adjacent second fine gate lines is less than the difference in the maximum height of two adjacent first fine gate lines, and the difference in the minimum height of two adjacent second fine gate lines is less than the difference in the minimum height of two adjacent first fine gate lines, the height variation of different second fine gate lines is smaller than the height variation of different first fine gate lines. This makes the height of all second fine gate lines more uniform than that of all first fine gate lines, which can further reduce the resistance of the second fine gate lines.

[0019] Optionally, the width of the first fine grid line is greater than the width of the second fine grid line.

[0020] Optionally, the difference between the width of the first fine gate line and the width of the second fine gate line is 2 to 3 micrometers.

[0021] This disclosure achieves good contact performance between the first fine gate line and the P-type doped layer by setting the difference between the width of the first fine gate line and the width of the second fine gate line to 2-3 micrometers, while avoiding the need for more paste and thus achieving lower cost.

[0022] Optionally, the back-contact solar cell also includes:

[0023] A P-type doped layer is located in the P region, and the first fine gate line is located on the side of the P-type doped layer away from the silicon wafer and is in contact with the P-type doped layer.

[0024] An N-type doped layer is located in the N region, and a second fine gate line is located on the side of the N-type doped layer away from the silicon wafer and in contact with the N-type doped layer.

[0025] Optionally, the back-contact solar cell also includes:

[0026] A tunneling oxide layer is disposed between the P-type doped layer and the silicon wafer, and between the N-type doped layer and the silicon wafer.

[0027] In this embodiment, the width of the first fine gate line is increased to be greater than that of the second fine gate line, thereby increasing the contact area between the first fine gate line and the P-type doped layer, improving contact performance, reducing the contact resistance of the P-region, and further improving battery efficiency.

[0028] This disclosure also provides a method for preparing a back-contact solar cell, including:

[0029] A second screen is placed on the back side of the silicon wafer, and a squeegee is used to press a second paste onto a second area on the back side of the silicon wafer to print a second fine grid line in the second area.

[0030] A first screen is placed on the back side of a silicon wafer. A squeegee is used to press a first paste onto a first area on the back side of the silicon wafer and smooth out a second fine grid line, so as to print the first fine grid line in the first area and make the height undulation of the second fine grid line less than that of the first fine grid line.

[0031] Optionally, a doctor blade is used to press the first paste onto a first region on the back side of the silicon wafer and smooth out the second fine gate lines to print the first fine gate lines in the first region, and to make the height variation of the second fine gate lines less than that of the first fine gate lines, including:

[0032] A first paste is extruded onto a first region on the back side of a silicon wafer using a scraper, and a second fine gate line is smoothed out, so that the maximum height of the second fine gate line and the minimum height of the second fine gate line form a first height difference, and the maximum height of the first fine gate line and the minimum height of the first fine gate line form a second height difference, and the first height difference is less than the second height difference.

[0033] Optionally, a doctor blade is used to press the first paste onto a first region on the back side of the silicon wafer and smooth out the second fine gate lines to print the first fine gate lines in the first region, and to make the height variation of the second fine gate lines less than that of the first fine gate lines, including:

[0034] A first paste is pressed onto a first region on the back side of the silicon wafer using a scraper, and a second fine gate line is flattened so that the average of the multiple height differences of the second fine gate line is less than the average of the multiple height differences of the first fine gate line.

[0035] Optionally, the second slurry includes a second organic binder, the first slurry includes a first organic binder, and the content of the second organic binder in the second slurry is less than the content of the first organic binder in the first slurry.

[0036] Optionally, the content of the second organic binder in the second slurry is 8.5-9%, and the content of the first organic binder in the first slurry is 9-9.5%.

[0037] Optionally, both the first organic adhesive and the second organic adhesive include resin, and the resin content in the second slurry is less than the resin content in the first slurry.

[0038] Optionally, the resin content in the second slurry is 2-2.5%, and the resin content in the first slurry is 2.5-3%.

[0039] Optionally, in the step of pressing the second paste onto the second region on the back side of the silicon wafer using a scraper, the scraper moves at a speed of V1, and in the step of pressing the first paste onto the first region on the back side of the silicon wafer using a scraper, the scraper moves at a speed of V2, where V1 and V2 are different.

[0040] Optionally, the first region is region P, the second region is region N, and the glass content in the first slurry is greater than the glass content in the second slurry.

[0041] Optionally, the first region is region N, the second region is region P, and the glass frit content in the first slurry is less than the glass frit content in the second slurry.

[0042] This disclosure also provides a battery assembly including the aforementioned back-contact solar cell.

[0043] This disclosure also provides a photovoltaic system including the aforementioned battery module. Attached Figure Description

[0044] Figure 1 is a schematic diagram of the back structure of a back-contact solar cell provided according to an embodiment of the present disclosure;

[0045] Figure 2 is a cross-sectional schematic diagram of a back-contact solar cell provided according to an embodiment of the present disclosure;

[0046] Figure 3 is a schematic diagram of the first fine grid line of a back-contact solar cell provided according to an embodiment of the present disclosure;

[0047] Figure 4 is a schematic diagram of the second fine grid line of a back-contact solar cell provided according to an embodiment of the present disclosure;

[0048] Figure 5 is a flowchart of a method for fabricating a back-contact solar cell according to an embodiment of the present disclosure. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this disclosure.

[0050] This disclosure provides a back-contact solar cell, comprising: a silicon wafer, a first fine grid line, and a second fine grid line. The back surface of the silicon wafer includes a first region and a second region alternately arranged in sequence. The first fine grid line is disposed in the first region, and the second fine grid line is disposed in the second region. The height variation of the second fine grid line is less than that of the first fine grid line. Embodiments of this disclosure make the height of the second fine grid line in the second region more uniform, which can reduce the resistance of the second fine grid line, increase the lower limit of current transport of the second fine grid line, improve the cell fill factor, and thus improve the cell conversion efficiency.

[0051] The following describes in detail an embodiment where the first region is region P and the second region is region N, with reference to the accompanying drawings.

[0052] Referring to Figures 1 to 4, an embodiment of this disclosure provides a back-contact solar cell, including: a silicon wafer 1, a first fine grid line 2, and a second fine grid line 3, wherein the back side of the silicon wafer 1 includes a P region 11 and an N region 12 arranged alternately in sequence, the first fine grid line 2 is disposed in the P region 11, and the second fine grid line 3 is disposed in the N region 12.

[0053] Among them, the maximum height H1 of the second fine grid line 3 and the minimum height H2 of the second fine grid line 3 have a first height difference, and the maximum height H3 of the first fine grid line 2 and the minimum height H4 of the first fine grid line 2 have a second height difference, and the first height difference is less than the second height difference.

[0054] In some embodiments, the height variation of the second fine gate line 3 is less than that of the first fine gate line 2. The height variation of the second fine gate line 3 can be understood as the degree of height variation of the second fine gate line 3, and the height variation of the first fine gate line 2 can be understood as the degree of height variation of the first fine gate line 2. A greater degree of height variation results in greater height variation and more uneven height; conversely, a smaller degree of height variation results in less height variation and more uniform height. The aforementioned first height difference being less than the second height difference indicates that the height variation of the second fine gate line 3 is less than that of the first fine gate line 2.

[0055] In some embodiments, multiple height differences between the first fine grid line 2 and the second fine grid line 3 can be collected. For example, multiple height differences with relatively large height differences in the first fine grid line 2 and multiple height differences with relatively large height differences in the second fine grid line 3 can be collected, and the average value of the collected multiple height differences can be taken and compared. For example, if the average value of the multiple height differences with relatively large height differences in the second fine grid line 3 is less than the average value of the multiple height differences with relatively large height differences in the first fine grid line 2, then the height undulation of the second fine grid line 3 is considered to be less than the height undulation of the first fine grid line 2, that is, the second fine grid line 3 is more uniform than the first fine grid line 2.

[0056] In practical applications, multiple highest and lowest points can be taken on the same first fine grid line 2, or multiple highest and lowest points can be taken on different first fine grid lines 2. The difference between the height of each highest point and the height of each lowest point on the first fine grid line 2 is a height difference. The average of multiple height differences is the average of the multiple height differences of the first fine grid line 2. Similarly, multiple highest and lowest points can be taken on the same second fine grid line 3, or multiple highest and lowest points can be taken on different second fine grid lines 3. The difference between the height of each highest point and the height of each lowest point on the second fine grid line 3 is a height difference. The average of multiple height differences is the average of the multiple height differences of the second fine grid line 3. For example, three height differences can be collected on the first fine grid line 2 and the second fine grid line 3 respectively, and the average value can be compared. If the average value of the three height differences in the second fine grid line 3 is less than the average value of the three height differences in the first fine grid line 2, then the height variation of the second fine grid line 3 is considered to be less than that of the first fine grid line 2. For example, four height differences can be collected on the first fine grid line 2 and the second fine grid line 3 respectively, and the average value can be compared. If the average value of the four height differences in the second fine grid line 3 is less than the average value of the four height differences in the first fine grid line 2, then the height undulation of the second fine grid line 3 is considered to be less than that of the first fine grid line 2.

[0057] In this embodiment, the silicon wafer 1 can be either a P-type or an N-type silicon wafer, and there is no specific limitation. There are multiple P-regions 11 and N-regions 12, which are arranged alternately and at intervals. Optionally, an isolation region is provided between adjacent P-regions 11 and N-regions 12. The dashed lines in Figure 1 do not actually exist; they are only used to distinguish between P-regions 11 and N-regions 12.

[0058] In this embodiment of the disclosure, the number of first fine gate lines 2 in each P region 11 can be one or more, and the number of second fine gate lines 3 in each N region 12 can also be one or more.

[0059] Referring to Figures 3 and 4, in this embodiment of the present disclosure, the second fine gate line 3 includes a first surface 31 disposed away from the silicon wafer 1 and a second surface 32 disposed close to the silicon wafer 1. The height of the second fine gate line 3 is the distance between the first surface 31 and the second surface 32 in the height direction of the second fine gate line 3. The maximum height H1 of the second fine gate line 3 is the maximum distance between the first surface 31 and the second surface 32 in the height direction of the second fine gate line 3, and the minimum height H2 of the second fine gate line 3 is the minimum distance between the first surface 31 and the second surface 32 in the height direction of the second fine gate line 3. The first fine gate line 2 includes a third surface 21 disposed away from the silicon wafer 1 and a fourth surface 22 disposed close to the silicon wafer 1. The height of the first fine gate line 2 is the distance between the third surface 21 and the fourth surface 22 in the height direction of the first fine gate line 2. The maximum height H3 of the first fine gate line 2 is the maximum distance between the third surface 21 and the fourth surface 22 in the height direction of the first fine gate line 2, and the minimum height H4 of the first fine gate line 2 is the minimum distance between the third surface 21 and the fourth surface 22 in the height direction of the first fine gate line 2.

[0060] In this embodiment, the maximum height H1 and minimum height H2 of the second fine grid line 3 in the N region 12 of the back-contact solar cell have a first height difference, and the maximum height H3 and minimum height H4 of the first fine grid line 2 in the P region 11 have a second height difference. The first height difference is less than the first height difference. This can be understood as follows: the maximum height H1 of any second fine grid line 3 has a first height difference with its minimum height H2, and similarly, the maximum height H3 of any first fine grid line 2 has a second height difference with its minimum height H4. Since the difference between the maximum and minimum height of any second fine grid line 3 is less than the difference between the maximum and minimum height of any first fine grid line 2, the height of the second fine grid line 3 is more uniform than that of the first fine grid line 2, meaning the height variation of the second fine grid line 3 is smaller. This reduces the resistance of the second fine grid line 3 in the N region 12, increases the lower limit of current transmission, improves the fill factor, reduces the total resistance of the fine grid lines in the back-contact solar cell, and improves the cell conversion efficiency.

[0061] In some embodiments, the first height difference of the second fine grid line 3 being less than the second height difference of the first fine grid line 2 can mean that the first height difference between the maximum height H1 and the minimum height H2 of any second fine grid line 3 is less than the second height difference between the maximum height H3 and the minimum height H4 of any first fine grid line 2, or that the difference in the maximum height of two adjacent second fine grid lines 3 is less than the difference in the maximum height of two adjacent first fine grid lines 2, and the difference in the minimum height of two adjacent second fine grid lines 3 is less than the difference in the minimum height of two adjacent first fine grid lines 2. That is, comparing the height difference of the first fine grid line 2 and the second fine grid line 3 can be comparing the height difference between one first fine grid line 2 and the second fine grid line 3, or it can be comparing the height difference between two adjacent first fine grid lines 2 and two adjacent second fine grid lines 3, and this disclosure does not limit it in this way.

[0062] In this embodiment, the second fine grid line 3 of the N region 12 can be printed in one go, and the first fine grid line 2 of the P region 11 can be printed in one go. The second fine grid line 3 is coated by the printing squeegee twice, so that the height of the second fine grid line 3 of the N region 12 is more uniform, thereby reducing the line resistance of the second fine grid line 3, improving the current transmission capability of the second fine grid line 3, and thus improving the battery conversion efficiency.

[0063] As one embodiment of this disclosure, the first height difference is less than or equal to 1 micrometer; the second height difference is less than or equal to 2.1 micrometers.

[0064] In this embodiment, the difference between the maximum height and the minimum height of the second fine gate line 3 is less than 1 micrometer, and the difference between the maximum height and the minimum height of the first fine gate line 2 is less than 2.1 micrometers. That is, the difference between the maximum height and the minimum height of the second fine gate line 3 is controlled within 1 micrometer, and the difference between the maximum height and the minimum height of the first fine gate line 2 is controlled within 2.1 micrometers, so that the height variation of the second fine gate line 3 is smaller than that of the first fine gate line 2, and the height of the second fine gate line 3 is more uniform than that of the first fine gate line 2.

[0065] For example, the first height difference can be any value among 0.1 micrometer, 0.2 micrometer, 0.3 micrometer, 0.4 micrometer, 0.5 micrometer, 0.6 micrometer, 0.7 micrometer, 0.8 micrometer, 0.9 micrometer, and 1.0 micrometer; the second height difference can be any value among 1.1 micrometer, 1.2 micrometer, 1.4 micrometer, 1.6 micrometer, 1.7 micrometer, 1.8 micrometer, 1.9 micrometer, 2.0 micrometer, and 2.1 micrometer.

[0066] As an embodiment of this disclosure, the height of the first fine gate line 2 is 5.6 to 7.7 micrometers, and the height of the second fine gate line 3 is 5.8 to 6.8 micrometers.

[0067] The height of each first fine gate line 2 is 5.6–7.7 micrometers. This can be understood as the height of each first fine gate line 2 at any position being 5.6–7.7 micrometers, with a minimum height of 5.6 micrometers and a maximum height of 7.7 micrometers. For example, the height of the first fine gate line 2 at any position can be 5.6 micrometers, 5.7 micrometers, 5.9 micrometers, 6.0 micrometers, 6.1 micrometers, 6.3 micrometers, 6.5 micrometers, 6.8 micrometers, 6.9 micrometers, 7.0 micrometers, 7.1 micrometers, 7.2 micrometers, 7.3 micrometers, 7.4 micrometers, 7.6 micrometers, or 7.7 micrometers.

[0068] The height of each second fine gate line 3 is 5.8–6.8 micrometers. This can be understood as the height of any position on each second fine gate line 3 being 5.8–6.8 micrometers, with a minimum height of 5.8 micrometers and a maximum height of 6.8 micrometers. For example, the height of any position on the second fine gate line 3 could be 5.8 micrometers, 5.9 micrometers, 6.0 micrometers, 6.1 micrometers, 6.2 micrometers, 6.4 micrometers, 6.5 micrometers, 6.6 micrometers, 6.7 micrometers, or 6.8 micrometers.

[0069] For example, when the maximum height H3 of the first fine gate line 2 is 7.7 micrometers and the minimum height H4 of the first fine gate line 2 is 5.6 micrometers, the second height difference between the maximum height H3 and the minimum height H4 of the first fine gate line 2 is 2.1 micrometers; when the maximum height H1 of the second fine gate line 3 is 6.8 micrometers and the minimum height H2 of the second fine gate line 3 is 5.8 micrometers, the second height difference between the maximum height H1 and the minimum height H2 of the second fine gate line 3 is 1.0 micrometers.

[0070] As an embodiment of this disclosure, the difference in maximum height between two adjacent second fine grid lines 3 is less than the difference in maximum height between two adjacent first fine grid lines 2, and the difference in minimum height between two adjacent second fine grid lines 3 is less than the difference in minimum height between two adjacent first fine grid lines 2.

[0071] In some embodiments, when multiple first fine grid lines 2 and multiple second fine grid lines 3 are arranged, comparing the height difference between two adjacent second fine grid lines 3 and the height difference between two adjacent first fine grid lines 2 can be comparing two adjacent grid lines or comparing two grid lines arranged at intervals.

[0072] For example, when multiple first fine grid lines 2 are arranged sequentially, the arrangement order can be: first first fine grid line 2, second first fine grid line 2, third first fine grid line 2, fourth first fine grid line 2, fifth first fine grid line 2, etc. Similarly, when multiple second fine grid lines 3 are arranged sequentially, the arrangement order can be: first second fine grid line 3, second second fine grid line 3, third second fine grid line 3, fourth second fine grid line 3, fifth second fine grid line 3, etc. It can be done by comparing the difference in maximum height between the first and second first fine grid lines 2 and the difference in maximum height between the first and second second fine grid lines 3. The difference in maximum height between the first and second second fine grid lines 3 is less than the difference in maximum height between the first and second first fine grid lines 2, and the difference in minimum height between the first and second second fine grid lines 3 is less than the difference in minimum height between the first and second first fine grid lines 2. Alternatively, the height difference between the first and third fine gate lines 2 and the height difference between the first and third fine gate lines 3 can be compared, or the height difference between the third and fifth fine gate lines 2 and the height difference between the third and fifth fine gate lines 3 can be compared. This disclosure does not limit this. Depending on actual needs, the height values ​​of any two gate lines in the first fine gate lines 2 and any two gate lines in the second fine gate lines 3 can also be compared.

[0073] In this embodiment, since the difference in maximum height between two adjacent second fine gate lines 3 is less than the difference in maximum height between two adjacent first fine gate lines 2, and the difference in minimum height between two adjacent second fine gate lines 3 is less than the difference in minimum height between two adjacent first fine gate lines 2, the height variation of different second fine gate lines 3 is smaller than the height variation of different first fine gate lines 2. Therefore, the height of all second fine gate lines 3 is more uniform than that of all first fine gate lines 2, which can further reduce the resistance of the second fine gate lines 3.

[0074] As an embodiment of this disclosure, the back-contact solar cell further includes: a P-type doped layer 4 disposed in the P-region 11 and an N-type doped layer 5 disposed in the N-region 12. A first fine grid line 2 is disposed on the side of the P-type doped layer 4 away from the silicon wafer and in contact with the P-type doped layer 4, and a second fine grid line 3 is disposed on the side of the N-type doped layer 5 away from the silicon wafer 1 and in contact with the N-type doped layer 5.

[0075] Among them, the P-type doped layer 4 and the N-type doped layer 5 are one or a combination of at least two of the following: doped polycrystalline silicon, doped microcrystalline silicon, doped nanocrystalline silicon, and doped amorphous silicon. The materials of the P-type doped layer 4 and the N-type doped layer 5 can be the same or different, and can be set according to actual needs.

[0076] Optionally, both the P-type doped layer 4 and the N-type doped layer 5 are doped polycrystalline silicon. The P-type doped layer 4 is a P-type doped layer doped with a P-type dopant, and the N-type doped layer 5 is an N-type doped layer doped with an N-type dopant. The P-type dopant is a Group IIIA element dopant, and the N-type dopant is a Group VA element dopant. For example, the P-type dopant can be a boron dopant, and the N-type dopant can be a phosphorus dopant.

[0077] Referring to FIG2, as an embodiment of the present disclosure, the width D1 of the first fine gate line 2 is greater than the width D2 of the second fine gate line 3.

[0078] In this embodiment, increasing the width of the first fine gate line 2, making the width D1 of the first fine gate line 2 greater than the width D2 of the second fine gate line 3, can increase the contact area between the first fine gate line 2 and the P-type doped layer 4, improve the contact performance, thereby reducing the contact resistance of the P region 11 and further improving the battery efficiency.

[0079] As an embodiment of this disclosure, the difference between the width D1 of the first fine gate line 2 and the width D2 of the second fine gate line 3 is 2 to 3 micrometers.

[0080] The specific widths of the first fine gate line 2 and the second fine gate line 3 can be set according to actual conditions. In this embodiment, by setting the difference between the width of the first fine gate line 2 and the width of the second fine gate line 3 to 2-3 micrometers, good contact performance between the first fine gate line 2 and the P-type doped layer 4 can be achieved, while avoiding the need for more paste and achieving lower costs.

[0081] As one embodiment of this disclosure, the back-contact solar cell further includes: a first main grid line 8 and a second main grid line 9. The first main grid line 8 is connected to each of the first fine grid lines 2, and the second main grid line 9 is connected to each of the second fine grid lines 3.

[0082] In this embodiment, the first main gate line 8 is simultaneously arranged perpendicular to each of the first fine gate lines 2, and the first main gate line 8 collects the current of each of the first fine gate lines 2; the second main gate line 9 is simultaneously arranged perpendicular to each of the second fine gate lines 3, and the second main gate line 9 collects the current of each of the second fine gate lines 3, which facilitates current collection.

[0083] Specifically, the first fine grid line 2 and the second fine grid line 3 can be silver grid lines, aluminum grid lines, or copper grid lines. The first main grid line 8 and the second main grid line 9 can be silver grid lines, aluminum grid lines, or copper grid lines.

[0084] As an embodiment of this disclosure, the back contact solar cell further includes a tunneling oxide layer 6, which is disposed between the P-type doped layer 4 and the silicon wafer 1 and between the N-type doped layer 5 and the silicon wafer 1.

[0085] In this embodiment, the tunneling oxide layer 6 acts as a tunneling and passivation layer on the surface of the silicon wafer 1, which can further improve the battery efficiency. The tunneling oxide layer 6 can be one or a combination of at least two of silicon oxide, aluminum oxide, and silicon oxynitride.

[0086] As an embodiment of this disclosure, the back contact solar cell further includes a back passivation film 7, which is disposed on the side of the P-type doped layer 4 away from the silicon wafer 1 and the side of the N-type doped layer 5 away from the silicon wafer 1. A first fine grid line 2 passes through the back passivation film 7 and contacts the P-type doped layer 4, and a second fine grid line 3 passes through the back passivation film 7 and contacts the N-type doped layer 5.

[0087] In this embodiment, the back passivation film 7 is used to passivate and protect the back of the P-type doped layer and the N-type doped layer, which helps to further improve the battery efficiency. The back passivation film 7 can be a stack of one or more of aluminum oxide, silicon nitride, silicon oxynitride, and silicon oxide. For example, the back passivation film 7 may include aluminum oxide and silicon nitride stacked sequentially from the silicon wafer 1 away from the silicon wafer 1.

[0088] In some other embodiments of this disclosure, the arrangement of the P-region and the N-region can also be interchanged. That is, the first region is the N-region, the first fine gate line 2 is disposed in the N-region, the second region is the P-region, and the second fine gate line 3 is disposed in the P-region. It should be understood that the P-region is the region where the P-type doped layer is disposed, and the N-region is the region where the N-type doped layer is disposed.

[0089] When the first region is a P-region and the second region is an N-region, the first fine grid line is located in the P-region and the second fine grid line is located in the N-region. The first region has a P-type doped layer, and the second region has an N-type doped layer. The first fine grid line forms an ohmic contact with the P-type doped layer, and the second fine grid line forms an ohmic contact with the N-type doped layer. In this embodiment, printing the second fine grid line in the N-region first, followed by printing the first fine grid line in the P-region, can improve the height uniformity of the second fine grid line in the N-region, reduce its resistance, decrease the total resistance of the fine grid lines on the back of the solar cell, and improve the cell conversion efficiency.

[0090] When the first region is an N-region and the second region is a P-region, the first fine grid line is located in the N-region and the second fine grid line is located in the P-region. An N-type doped layer is disposed in the first region, and a P-type doped layer is disposed in the second region. The first fine grid line forms an ohmic contact with the N-type doped layer, and the second fine grid line forms an ohmic contact with the P-type doped layer. In this embodiment, printing the second fine grid line in the P-region first, followed by printing the first fine grid line in the N-region, can improve the height uniformity of the second fine grid line in the P-region, reduce its resistance, and similarly reduce the total resistance of the fine grid lines on the back contact of the solar cell, thus improving the cell conversion efficiency.

[0091] The embodiments of this disclosure also provide a method for fabricating a back-contact solar cell, used to fabricate the back-contact solar cell in the above embodiments. Referring to FIG5, the method for fabricating a back-contact solar cell includes the following steps:

[0092] Step S1: Place a second screen on the back side of silicon wafer 1, and use a squeegee to press the second paste onto the second area on the back side of silicon wafer 1 to print the second fine grid line 3 in the second area;

[0093] In step S1, a second fine grid line 3 is printed using a second paste, and the opening pattern of the second screen matches the pattern of the second fine grid line 3 on the back contact solar cell. When printing the second fine grid line 3, the second screen is placed on the back side of the silicon wafer 1, the second paste is placed on the second screen, and a squeegee squeezes the second paste from the openings of the second screen to a second region on the back side of the silicon wafer 1, thereby printing the second fine grid line 3 in the second region.

[0094] Step S2: Place a first screen on the back side of the silicon wafer 1, use a squeegee to squeeze the first paste onto the first area on the back side of the silicon wafer 1 and smooth the second fine grid line 3, so as to print the first fine grid line 2 in the first area and make the height undulation of the second fine grid line 3 less than that of the first fine grid line 2.

[0095] Optionally, a squeegee is used to press the first paste onto a first region on the back side of the silicon wafer 1 and smooth the second fine gate line 3, so as to print the first fine gate line 2 in the first region and make the height difference of the second fine gate line 3 less than that of the first fine gate line 2. Specifically, this includes: pressing the first paste onto the first region on the back side of the silicon wafer 1 and smoothing the second fine gate line 3 with a squeegee, that is, while pressing the first paste onto the first region on the back side of the silicon wafer 1, the squeegee also presses and smooths the second fine gate line 3, so that the maximum height H1 of the second fine gate line 3 and the minimum height H2 of the second fine gate line 3 form a first height difference, and the maximum height H3 of the first fine gate line 2 and the minimum height H4 of the first fine gate line 2 form a second height difference, and the first height difference is less than the second height difference.

[0096] Optionally, a squeegee is used to press the first paste onto a first region on the back side of the silicon wafer 1 and smooth the second fine gate line 3, thereby printing the first fine gate line 2 in the first region and making the height variation of the second fine gate line 3 less than that of the first fine gate line 2. Specifically, this includes pressing the first paste onto the first region on the back side of the silicon wafer 1 and smoothing the second fine gate line 3 with a squeegee. That is, while the squeegee presses the first paste onto the first region on the back side of the silicon wafer 1, the squeegee simultaneously presses and smooths the second fine gate line 3, so that the average value of the multiple height differences of the second fine gate line 3 is less than the average value of the multiple height differences of the first fine gate line 2. According to the above preparation method, the average value of the multiple height differences of the second fine gate line 3 is less than the average value of the multiple height differences of the first fine gate line 2, making the height of the second fine gate line 3 more uniform than the height of the first fine gate line 2.

[0097] In step S2, the first fine grid line 2 is printed using the first paste. The opening pattern of the first screen matches the pattern of the first fine grid line 2 on the back contact solar cell, and the opening pattern of the second screen is misaligned with the opening pattern of the first screen, so that when the first screen is placed on the back of the silicon wafer 1, the first screen can cover the printed second fine grid line 3, ensuring that no first paste enters the second area from the first screen when printing the first fine grid line 2.

[0098] In step S2, during the printing of the first fine grid line 2, the squeegee presses down on the first screen and moves on it. The squeegee squeezes the first paste from the openings of the first screen to the first region on the back of the silicon wafer 1 to form the first fine grid line 2 in the first region. When the squeegee presses down on the first screen and moves on it, since the lower surface of the first screen is in contact with the second fine grid line 3, the squeegee can simultaneously squeeze and flatten the second fine grid line 3 below the first screen through the first screen. Thus, the second fine grid line 3 is flattened once by the squeegee during the printing of the second fine grid line 3, and then flattened again by the squeegee during the printing of the first fine grid line 2. That is, the second fine grid line 3 can be flattened twice by the squeegee. This makes the height variation of the second fine grid line 3 in the second region smaller and the height more uniform. This can reduce the resistance of the second fine grid line 3 in the second region, increase the lower limit of current transmission of the second fine grid line 3, improve the fill factor, reduce the total resistance of the fine grid line, and thus improve the cell conversion efficiency.

[0099] In this embodiment, the first slurry and the second slurry may be the same or different. The components and their contents in the first and second slurries may be identical, or the components may be identical but their contents may differ. Optionally, both the first and second slurries include a metal, a glass frit, and an organic binder. The metal in the first and second slurries may include one or a combination of silver and aluminum; the organic binder in the first and second slurries includes resin and other organic substances; and the glass frit in the first and second slurries may be lead-free glass frit.

[0100] As one embodiment of this disclosure, the second slurry includes a second organic binder, the first slurry includes a first organic binder, and the content of the first organic binder in the second slurry is less than the content of the first organic binder in the first slurry.

[0101] In this embodiment, the content of the second organic binder in the second slurry is the total content of all organic binder components in the second slurry, and the content of the organic binder in the first slurry is the total content of all organic binder components in the first slurry. Controlling the content of the second organic binder in the second slurry to be less than the content of the first organic binder in the first slurry makes the second slurry easier to level with a scraper than the first slurry, thereby making the height of the second fine grid lines 3 in the second region more uniform, further reducing the line resistance of the second fine grid lines 3, improving the current transmission capability of the second fine grid lines 3, and thus improving the battery conversion efficiency. The difference between the content of the second organic binder in the second slurry and the content of the first organic binder in the first slurry is not limited; for example, the difference between the content of the second organic binder in the second slurry and the content of the first organic binder in the first slurry can be more than 0.1%.

[0102] As an embodiment of this disclosure, the content of the second organic binder in the second slurry is 8.5-9%, and the content of the first organic binder in the first slurry is 9-9.5%.

[0103] In this embodiment, the content of the second organic binder in the second slurry is controlled to be 8.5-9%, and the content of the first organic binder in the first slurry is controlled to be 9-9.5%. The content of the second organic binder in the second slurry is less than the content of the first organic binder in the first slurry. This makes the second slurry easier to be leveled by the doctor blade than the first slurry, thereby making the height of the second fine grid line 3 in the second region more uniform, further reducing the line resistance of the second fine grid line 3, and ensuring good conductivity of the first fine grid line 2 and the second fine grid line 3.

[0104] As an embodiment of this disclosure, both the first organic adhesive and the second organic adhesive include resin, and the resin content in the second slurry is less than the resin content in the first slurry.

[0105] In this embodiment, the resin content in the second slurry is controlled to be less than the resin content in the first slurry, so that the second slurry is easier to be leveled by the doctor blade than the first slurry, thereby making the height of the second fine grid line 3 in the second region more uniform and further reducing the line resistance of the second fine grid line 3.

[0106] As one embodiment of this disclosure, the resin content in the second slurry is 2-2.5%, and the resin content in the first slurry is 2.5-3%.

[0107] In this embodiment, the resin content in the second slurry is controlled to be 2-2.5%, and the resin content in the first slurry is 2.5-3%. The resin content in the second slurry is less than that in the first slurry, making the second slurry easier to be leveled by the scraper than the first slurry. This results in a more uniform height of the second fine grid line 3 in the second region, further reducing the line resistance of the second fine grid line 3 and improving its current transmission capability, thereby improving the battery conversion efficiency. It also ensures good conductivity of the first fine grid line 2 and the second fine grid line 3.

[0108] In some embodiments of this disclosure, in the step of pressing the second slurry onto the second region on the back side of the silicon wafer 1 using a scraper, the scraper moves at a speed of V1, and in the step of pressing the first slurry onto the first region on the back side of the silicon wafer 1 using a scraper, the scraper moves at a speed of V2, where V1 and V2 are different.

[0109] As an embodiment of this disclosure, in the step of pressing the second slurry onto the second region on the back side of the silicon wafer 1 using a scraper, the scraper's moving speed is V1, and in the step of pressing the first slurry onto the first region on the back side of the silicon wafer 1 using a scraper, the scraper's moving speed is V2, where V1 is less than V2.

[0110] In this embodiment, in step S1, when the squeegee presses the second paste onto the second region on the back side of the silicon wafer 1, the squeegee's moving speed on the second screen is V1; in step S2, when the squeegee presses the first paste onto the first region on the back side of the silicon wafer 1, the squeegee's moving speed on the first screen is V2. Controlling V1 to be less than V2 ensures that the squeegee's moving speed when printing the second fine grid line 3 is less than its moving speed when printing the first fine grid line 2. This allows for more uniform printing of the second paste, resulting in more uniform height of the second fine grid line 3 and further reducing the resistance of the second fine grid line 3. In this embodiment, V1 can specifically be 500–550 mm / s, and V2 can specifically be 560–600 mm / s.

[0111] In another embodiment of this disclosure, in the step of pressing the second slurry onto the second region on the back side of the silicon wafer 1 using a scraper, the scraper moves at a speed of V1. In the step of pressing the first slurry onto the first region on the back side of the silicon wafer 1 using a scraper, the scraper moves at a speed of V2, and V1 is greater than V2.

[0112] In this embodiment, in step S1, when the squeegee presses the second paste onto the second region on the back side of the silicon wafer 1, the squeegee's moving speed on the second screen is V1; in step S2, when the squeegee presses the first paste onto the first region on the back side of the silicon wafer 1, the squeegee's moving speed on the first screen is V2. Controlling V1 to be greater than V2 ensures that the squeegee's moving speed when printing the second fine grid line 3 is greater than its moving speed when printing the first fine grid line 2. This improves the printing uniformity of the first paste, and while improving the height uniformity of the second fine grid line 3, further improves the height uniformity of the first fine grid line 2, reducing the resistance of the first fine grid line 2. This simultaneously reduces the resistance of both the first fine grid line 2 and the second fine grid line 3, further improving battery efficiency. In this embodiment, V1 can specifically be 560–600 mm / s, and V2 can specifically be 500–550 mm / s.

[0113] As one embodiment of this disclosure, the first region is region P, the second region is region N, and the glass frit content in the first slurry is greater than the glass frit content in the second slurry.

[0114] In this embodiment, the first region is a P-region, and the second region is an N-region. A P-type doped layer is disposed in the P-region, and an N-type doped layer is disposed in the N-region. Since the P-type doped layer has a greater ability to prevent slurry ablation than the N-type doped layer, the glass frit content in the first fine grid line 2 is controlled to be greater than that in the second fine grid line 3. This ensures that the slurry burn-through capability of the first fine grid line 2 in the P-region is greater than that of the second fine grid line 3 in the N-region, facilitating the formation of a good ohmic contact between the first fine grid line 2 and the P-type doped layer, thereby improving current transmission capability and battery efficiency. The difference between the glass frit content in the first slurry and the glass frit content in the second slurry can be greater than 0.05%.

[0115] In another embodiment of this disclosure, the first region is region N, the second region is region P, and the glass frit content in the first slurry is less than the glass frit content in the second slurry.

[0116] In this embodiment, the first region is the N-region, and the second region is the P-region. The glass frit content in the first slurry is controlled to be less than that in the second slurry, so that the burn-through capability of the slurry for the second fine grid line 3 in the P-region is greater than that of the slurry for the first fine grid line 2 in the N-region. This facilitates the formation of a good ohmic contact between the second fine grid line 3 and the P-type doped layer, which is beneficial for improving current transmission capability and battery efficiency. The difference between the glass frit content in the first slurry and the glass frit content in the second slurry can be greater than 0.05%.

[0117] Embodiments of this disclosure also provide a battery assembly including the back-contact solar cell described in the above embodiments. It should be noted that this battery assembly has the same or similar beneficial effects as the back-contact solar cell described above, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.

[0118] In this embodiment, multiple back-contact solar cells in the battery module can be connected in series to form a battery string, thereby achieving series current output. For example, the battery cells can be connected in series by setting solder strips (busbars, interconnecting strips), conductive backplates, etc.

[0119] It is understood that in such embodiments, the battery assembly may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film may be filled between the front and back of the back-contact solar cell, the photovoltaic glass, adjacent cells, etc. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film may be an EVA film or a POE film, and the specific choice can be made according to the actual situation, without limitation.

[0120] Photovoltaic glass can be applied to the encapsulating film on the front side of the back-contact solar cell. This photovoltaic glass can be ultra-clear glass, possessing high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%, protecting the solar cell while minimizing impact on its efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the back-contact solar cell together, providing sealing, insulation, and waterproofing.

[0121] The backsheet can be attached to the adhesive film on the back of the back-contact solar cell. The backsheet protects and supports the back-contact solar cell, providing reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, aluminum alloy TPT composite film, etc., and the specific choice depends on the specific circumstances and is not limited here. The backsheet, back-contact solar cell, adhesive film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire solar cell module, providing stable support and installation. For example, the solar cell module can be installed at the desired location using the metal frame.

[0122] Embodiments of this disclosure also provide a photovoltaic system including the battery module described above. It should be noted that this photovoltaic system has the same or similar beneficial effects as the back-contact solar cell described above, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.

[0123] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple solar cell modules; for example, multiple solar cell modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0124] The above are merely preferred embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A back-contact solar cell, wherein, include: A silicon wafer, the back side of which includes P-regions and N-regions arranged alternately in sequence; The first fine grid line is located in the P region; The second fine gate line is located in the N region; Wherein, the maximum height of the second fine gate line and the minimum height of the second fine gate line have a first height difference, the maximum height of the first fine gate line and the minimum height of the first fine gate line have a second height difference, and the first height difference is less than the second height difference.

2. The back-contact solar cell according to claim 1, wherein, The first height difference is less than or equal to 1 micrometer; the second height difference is less than or equal to 2.1 micrometers.

3. The back-contact solar cell according to claim 1, wherein, The height of the first fine gate line is 5.6 to 7.7 micrometers, and the height of the second fine gate line is 5.8 to 6.8 micrometers.

4. The back-contact solar cell according to claim 1, wherein, The difference in maximum height between two adjacent second fine grid lines is less than the difference in maximum height between two adjacent first fine grid lines, and the difference in minimum height between two adjacent second fine grid lines is less than the difference in minimum height between two adjacent first fine grid lines.

5. The back-contact solar cell according to claim 1, wherein, The width of the first fine gate line is greater than the width of the second fine gate line.

6. The back-contact solar cell according to claim 5, wherein, The difference between the width of the first fine gate line and the width of the second fine gate line is 2 to 3 micrometers.

7. The back-contact solar cell according to claim 1, wherein, Also includes: A P-type doped layer is provided in the P region, and the first fine gate line is provided on the side of the P-type doped layer away from the silicon wafer and in contact with the P-type doped layer; An N-type doped layer is disposed in the N region, and the second fine gate line is disposed on the side of the N-type doped layer away from the silicon wafer and in contact with the N-type doped layer.

8. The back-contact solar cell according to claim 7, wherein, Also includes: A tunneling oxide layer is disposed between the P-type doped layer and the silicon wafer, and between the N-type doped layer and the silicon wafer.

9. A method for fabricating a back-contact solar cell, wherein, include: A second screen is placed on the back side of the silicon wafer, and a second paste is extruded onto a second region on the back side of the silicon wafer using a squeegee to print a second fine grid line in the second region; A first screen is placed on the back side of the silicon wafer. The first paste is squeezed onto a first area on the back side of the silicon wafer using the squeegee, and the second fine grid lines are smoothed out to print the first fine grid lines in the first area, and the height variation of the second fine grid lines is less than that of the first fine grid lines.

10. The method for preparing a back-contact solar cell according to claim 9, wherein, Using the doctor blade, the first paste is extruded onto a first region on the back side of the silicon wafer and the second fine gate line is smoothed out to print the first fine gate line in the first region, and the height variation of the second fine gate line is less than that of the first fine gate line, including: The first slurry is pressed onto a first region on the back side of the silicon wafer using the scraper and the second fine gate line is flattened, so that the maximum height of the second fine gate line and the minimum height of the second fine gate line form a first height difference, the maximum height of the first fine gate line and the minimum height of the first fine gate line form a second height difference, and the first height difference is less than the second height difference.

11. The method for fabricating a back-contact solar cell according to claim 9, wherein, Using the doctor blade, the first paste is extruded onto a first region on the back side of the silicon wafer and the second fine gate line is smoothed out to print the first fine gate line in the first region, and the height variation of the second fine gate line is less than that of the first fine gate line, including: The first slurry is pressed onto a first region on the back side of the silicon wafer using the scraper, and the second fine gate lines are flattened so that the average value of the multiple height differences of the second fine gate lines is less than the average value of the multiple height differences of the first fine gate lines.

12. The method for preparing a back-contact solar cell according to claim 9, wherein, The second slurry includes a second organic binder, and the first slurry includes a first organic binder. The content of the second organic binder in the second slurry is less than the content of the first organic binder in the first slurry.

13. The method for fabricating a back-contact solar cell according to claim 12, wherein, The content of the second organic binder in the second slurry is 8.5-9%, and the content of the first organic binder in the first slurry is 9-9.5%.

14. The method for fabricating a back-contact solar cell according to claim 12 or 13, wherein, Both the first organic adhesive and the second organic adhesive include resin, and the resin content in the second slurry is less than the resin content in the first slurry.

15. The method for fabricating a back-contact solar cell according to claim 14, wherein, The resin content in the second slurry is 2-2.5%, and the resin content in the first slurry is 2.5-3%.

16. The method for fabricating a back-contact solar cell according to claim 9, wherein, In the step of pressing the second slurry onto the second region on the back side of the silicon wafer using the scraper, the scraper moves at a speed of V1. In the step of pressing the first slurry onto the first region on the back side of the silicon wafer using the scraper, the scraper moves at a speed of V2. V1 and V2 are different.

17. The method for preparing a back-contact solar cell according to claim 9, wherein, The first region is region P, the second region is region N, and the glass content in the first slurry is greater than the glass content in the second slurry.

18. The method for preparing a back-contact solar cell according to claim 9, wherein, The first region is region N, the second region is region P, and the glass content in the first slurry is less than the glass content in the second slurry.

19. A battery assembly, wherein, Including the back-contact solar cell as described in any one of claims 1 to 8.

20. A photovoltaic system, wherein, Includes the battery assembly as described in claim 19.

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