Wiring substrate

Abstract

A wiring substrate (10) is provided with: a core layer (11) that has through-holes (14); and build-up layers (12, 13) that are layered onto both sides of the core layer (11). The through-holes (14) include a through-hole (PTHX) for transmitting signals and a plurality of through-holes (PTH1, PTH2) for connecting a power supply. In plan view, the through-hole (PTHX) does not overlap with a via hole (15) of the build-up layer (12) adjacent to the core layer (11). In plan view, at least one of the plurality of through-holes (PTH1, PTH2) overlaps with a via hole (15) of the build-up layer (12) adjacent to the core layer (11).

Description

Wiring board 【0001】 The present disclosure relates to a wiring board for mounting a semiconductor integrated circuit device or the like. 【0002】 In order to mount a semiconductor integrated circuit device or the like, a wiring board configured to stack one or more relatively thin insulating substrates (referred to as build-up layers) above and below a relatively thick insulating substrate (referred to as a core layer) may be used. 【0003】 In such a wiring board, for electrical connection, through holes (PTH: Plated Through Hole) are provided in the core layer, and via holes are provided in the build-up layer. A semiconductor integrated circuit device or the like mounted on the wiring board and a circuit board or the like on which the wiring board is mounted are electrically connected by conductors provided on the inner surface of the through hole, conductors provided in the via hole, and wirings provided on the surface and inside of the build-up layer. 【0004】 In Patent Document 1, the configuration of through holes, via holes, and wirings in a wiring board for transmitting differential signals and connecting a power supply is disclosed. 【0005】 Japanese Patent Application Laid-Open No. 2021-158131 【0006】 In recent years, due to the increase in the scale of semiconductor integrated circuit devices, the scale of wiring boards has also increased, and the number of through holes provided in the core layer and the number of via holes provided in the build-up layer have also increased. However, the arrangement of through holes and via holes in such wiring boards has not been examined in detail so far. 【0007】 The present disclosure provides a configuration that can achieve both improvement in signal transmission reliability and power supply enhancement for a wiring board on which a semiconductor integrated circuit device or the like is mounted. 【0008】Aspects of the present disclosure include a wiring board comprising: a core layer having through-holes penetrating in a first direction which is the thickness direction of the wiring board; and build-up layers, one or more layers each laminated on both sides of the core layer in the first direction, each layer having via holes penetrating in the first direction, wherein the through-holes in the core layer include a first through-hole for transmitting signals and a plurality of second through-holes for connecting power supplies; the via holes in a first build-up layer adjacent to the core layer include a first via hole electrically connected to the first through-hole and a plurality of second via holes electrically connected to the plurality of second through-holes, wherein the first through-hole does not overlap with the first via hole in a plan view, and at least one of the plurality of second through-holes overlaps with any of the plurality of second via holes in a plan view. 【0009】 In this embodiment, the wiring board has through-holes in the core layer that penetrate in a first direction, which is the thickness direction of the wiring board, and each layer of the build-up layer has via holes that penetrate in the first direction. The through-holes in the core layer include a first through-hole for transmitting signals and a plurality of second through-holes for connecting power supplies. The first through-holes do not overlap in a plan view with electrically connected first via holes. Therefore, the reliability of the connection between the first through-holes and the first via holes can be improved. On the other hand, at least one of the plurality of second through-holes overlaps in a plan view with an electrically connected via hole. That is, with respect to the second through-holes, it is permissible for via holes to overlap in a plan view, which increases the degree of freedom in the arrangement of via holes and allows for power supply enhancement by increasing the number of via holes. Therefore, both improved signal transmission reliability and power supply enhancement can be achieved. 【0010】 According to this disclosure, it is possible to achieve both improved signal transmission reliability and enhanced power supply for wiring boards on which semiconductor integrated circuit devices and the like are mounted. 【0011】Cross-sectional view showing the schematic configuration of a wiring board according to the embodiment. Example of planar arrangement of through-holes and via holes in a wiring board. Cross-sectional view of the configuration of Figure 2. (a) to (c) are detailed views of the wiring patterns in each wiring layer of Figure 3. (a) is an enlarged view of a through-hole, and (b) is an example of the connection configuration between a signal through-hole and a via hole. 【0012】 The embodiments will be described below with reference to the drawings. In the following description, the thickness direction of the wiring board, in other words, the direction perpendicular to the surface of the wiring board, is referred to as the Z direction (corresponding to the first direction). 【0013】 Figure 1 is a cross-sectional view showing the schematic configuration of a wiring board according to an embodiment. As shown in Figure 1, the wiring board 10 is connected to a semiconductor integrated circuit device 20 mounted at the top of the drawing via bumps 21. The bumps 21 are formed by solder, for example, but are not limited to this. The wiring board 10 is also connected to a circuit board (not shown) at the bottom of the drawing via solder balls 22. 【0014】 The wiring board 10 comprises a core layer 11 and build-up layers 12 and 13 stacked above and below the core layer. The core layer 11 has a relatively thick insulating substrate 11a and has a plated through hole 14 that penetrates the insulating substrate 11a in the Z direction. The through hole 14 has a metal 14a plated on its inner surface and is further filled with resin 14b inside. Note that the resin does not have to be filled inside the through hole 14, and metal may be filled instead of resin. 【0015】 Each of the build-up layers 12 and 13 consists of two layers of insulating substrate 12a, which is thinner than the insulating substrate 11a of the core layer 11. Each layer of the build-up layers 12 and 13 has via holes 15 that penetrate the insulating substrate 12a in the Z direction. The inside of the via holes 15 is filled with metal. Metal wiring 16 is also provided on the surface of the build-up layers 12 and 13 and between the layers. Note that the build-up layers 12 and 13 are not limited to two layers, but may consist of one layer or three or more layers. 【0016】On the wiring board 10, a multilayer wiring structure is formed by through-holes 14, via holes 15, and metal wiring 16. The semiconductor integrated circuit device 20 located at the top of the diagram of the wiring board 10 and the circuit board located at the bottom of the diagram of the wiring board 10 are connected to each other by the multilayer wiring structure formed on the wiring board 10. 【0017】 Figure 2 is a plan view showing an example of the configuration of a multilayer wiring structure for power and signals on a wiring board 10. Figure 2 illustrates through-holes 14 for power and signals, and via holes 15 (in the build-up layer closest to the core layer). In Figure 2, there are three through-holes 14 for transmitting signals (including PTHX), six through-holes 14 for connecting VDD (including PTH1 and PTH2), and six through-holes 14 for connecting VSS (including PTH3 and PTH4). Note that two types of power supplies VDD and VSS are assumed here, but the power supplies are not limited to these two types. 【0018】 Figure 3 is a cross-sectional view of the configuration in Figure 2, showing the cross-sectional structure along the line Y1-Y1'. Figure 4 is a detailed view of the wiring pattern, through-holes, and via holes in the wiring layers (layers A to F) shown in Figure 3. In Figure 4, (a) shows the via holes between layer A and layers A-B, and between layer F and layers E-F; (b) shows the via holes between layer B and layers B-C, and between layer E and layers D-E; and (c) shows the through-holes in layers C and D. In Figures 4(a) and (b), the location of the through-holes 14 is indicated by dashed circles. Note that the via holes 14 shown in Figure 2 correspond to the via holes between layers B-C and layers D-E. 【0019】 As shown in Figure 3, the solder ball 22A is connected to the VDD from the circuit board. The solder ball 22A is connected to the through-holes 14 (PTH1, PTH2) of the core layer 11 via via holes 15 and wiring 16 formed in the build-up layer 13 located below the core layer 11. PTH1 and PTH2 of the core layer 11 are further connected to via holes 15 and wiring 16 formed in the build-up layer 12 located above the core layer 11. From the wiring 16, the semiconductor integrated circuit device 20 is connected by bumps 21. 【0020】 The solder ball 22B is connected to the VSS from the circuit board. The solder ball 22B is connected to the through-holes 14 (PTH3, PTH4) of the core layer 11 via via holes 15 and wiring 16 formed in the build-up layer 13 located below the core layer 11. PTH3 and PTH4 of the core layer 11 are further connected to via holes 15 and wiring 16 formed in the build-up layer 12 located above the core layer 11. From the wiring 16, the semiconductor integrated circuit device 20 is connected by bumps 21. 【0021】 The solder balls 22C transmit signals to or from the circuit board. The solder balls 22C are connected to through-holes 14 (PTHX) in the core layer 11 via via holes 15 and wiring 16 formed in the build-up layer 13 located below the core layer 11. The PTHX in the core layer 11 are further connected to via holes 15 and wiring 16 formed in the build-up layer 12 located above the core layer 11. From the wiring 16, the semiconductor integrated circuit device 20 is connected by bumps 21. 【0022】 The through-holes PTH1 and PTH2 for VDD are connected to the wiring 16 of the E layer via multiple via holes 15 between the D and E layers, and also connected to the wiring 16 of the B layer via multiple via holes 15 between the B and C layers. Furthermore, a portion of each via hole 15 formed between the D and E layers and between the B and C layers and electrically connected to the through-holes PTH1 and PTH2 is positioned so that, in a plan view, it overlaps with the through-holes PTH1 and PTH2. 【0023】 Similarly, the through-holes PTH3 and PTH4 for the VSS are connected to the wiring 16 of the E layer via multiple via holes 15 between the D and E layers, and are also connected to the wiring 16 of the B layer via multiple via holes 15 between the B and C layers. Furthermore, each via hole 15 that is electrically connected to the through-holes PTH3 and PTH4 formed between the D and E layers and between the B and C layers is positioned such that, in a plan view, a portion of it overlaps with the through-holes PTH3 and PTH4. 【0024】On the other hand, the signal through-hole PTHX is connected to the wiring 16 of the E layer via a single via hole 15 between the D and E layers, and also connected to the wiring 16 of the B layer via a single via hole 15 between the B and C layers. The via holes 15 formed between the D and E layers and between the B and C layers, which are electrically connected to the through-hole PTHX, are positioned so as not to overlap with the through-hole PTHX in a plan view. 【0025】 Figure 5(a) is an enlarged view of the through-hole 14, and Figure 5(b) shows the state in which a via hole 15 is connected to the signal through-hole 14. When laying the through-hole 14 in the core layer 11, first a hole for the through-hole 14 is formed in the core layer 11, the inner surface of the hole is plated with metal, and then resin 14b is filled into the center of the hole. Furthermore, metal is plated so as to cover the surfaces 141 and 142 of the filled resin 14b. 【0026】 Here, the metal parts formed on the surfaces 141 and 142 of the resin 14b have uneven surfaces, which results in lower reliability of the connection with the via hole 15 compared to other parts. If there is only one via hole 15 electrically connected to the signal through-hole 14, a connection failure between the through-hole 14 and the via hole 15 will prevent normal operation. For this reason, as shown in Figure 5(b), the signal through-hole 14 is formed in a position where the via hole 15 does not overlap in a plan view. This improves the reliability of the connection between the through-hole 14 and the via hole 15, thereby improving the reliability of signal transmission. 【0027】 On the other hand, since there are multiple via holes 15 electrically connected to the power supply through-hole 14, even if a connection failure occurs in one of them, it will not significantly affect the operation. For this reason, connecting the via holes 15 to the surfaces 141 and 142 of the resin 14b to the power supply through-hole 14 does not cause any particular problems. Furthermore, by allowing the via holes 15 to overlap the power supply through-hole 14 in a plan view, the degree of freedom in arranging the via holes 15 is increased, and the power supply can be strengthened by increasing the number of via holes 15. 【0028】 Furthermore, when superimposing via holes 15 on power supply through holes 14 in a plan view, the via holes 15 can be positioned in any position relative to the through holes 14. For example, as shown in Figure 2, the via holes 15 may be positioned with their center offset from the through holes 14, or their center positions may be aligned. 【0029】 As described above, according to this embodiment, the wiring board 10 has through-holes 14 penetrating in the thickness direction of the wiring board 10 in the core layer 11, and via holes 15 penetrating in the thickness direction of the wiring board 10 in each of the build-up layers 12 and 13. The through-holes 14 in the core layer 11 include through-holes PTHX for transmitting signals and through-holes PTH1 and PTH2 for connecting VDD. The through-holes PTHX do not overlap with the electrically connected via holes 15 in a plan view. Therefore, the reliability of the connection between the through-holes PTHX and the via holes 15 can be increased. On the other hand, at least one of the through-holes PTH1 and PTH2 overlaps with the electrically connected via hole 15 in a plan view. That is, with respect to the through-holes PTH1 and PTH2, it is permitted for the via holes 15 to overlap in a plan view, which increases the degree of freedom in the arrangement of the via holes 15 and allows for power supply enhancement by increasing the number of via holes 15. 【0030】 Furthermore, the through-holes 14 of the core layer 11 include through-holes PTH3 and PTH4 for connecting VSS. At least one of the through-holes PTH3 and PTH4 is superimposed in plan view on an electrically connected via hole 15. In other words, since the via hole 15 is allowed to superimpose on the through-holes PTH3 and PTH4 in plan view, the degree of freedom in the arrangement of the via hole 15 is increased, and power supply can be strengthened by increasing the number of via holes 15. 【0031】 Therefore, the wiring board 10 according to this embodiment can achieve both improved signal transmission reliability and enhanced power supply. 【0032】In Figure 2, three via holes 15 are superimposed on the through-hole 14 for the VDD in a plan view, and three via holes 15 are superimposed on the through-hole 14 for the VSS in a plan view. However, the number of via holes 15 superimposed on the through-hole 14 for the power supply is not limited to these. 【0033】 This disclosure describes how a wiring board on which semiconductor integrated circuit devices and the like are mounted can achieve both improved signal transmission reliability and enhanced power supply, making it useful, for example, for improving the performance of semiconductor products. 【0034】 10 Wiring board 11 Core layer 12, 13 Build-up layer 14 Through-hole (PTH) 15 Via hole 20 Semiconductor integrated circuit equipment PTH1, PTH2, PTH3, PTH4, PTHX Through-hole

Claims

1. A wiring board comprising: a core layer having through-holes penetrating in a first direction which is the thickness direction of the wiring board; and build-up layers, one or more layers stacked on each side of the core layer in the first direction, each layer having via holes penetrating in the first direction, wherein the through-holes in the core layer include a first through-hole for transmitting signals and a plurality of second through-holes for connecting power supplies; the via holes in the first build-up layer adjacent to the core layer include a first via hole electrically connected to the first through-hole and a plurality of second via holes electrically connected to the plurality of second through-holes, wherein the first through-holes do not overlap with the first via holes in a plan view, and at least one of the plurality of second through-holes overlaps with any of the plurality of second via holes in a plan view.

2. A wiring board according to claim 1, wherein the via holes in the second build-up layer, which is adjacent to the core layer and on the opposite side of the first build-up layer from the core layer, include a third via hole electrically connected to the first through-hole and a plurality of fourth via holes electrically connected to the plurality of second through-holes, wherein the first through-hole does not overlap with the third via hole in a plan view, and at least one of the plurality of second through-holes overlaps with any of the plurality of fourth via holes in a plan view.

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