Learning device, inference device, learning method, inference method, learning program, and inference program

Abstract

The present invention comprises: a training data acquisition unit (101) that acquires input parameters that are a plurality of environmental temperatures and heat production amounts for a module and output parameters that are temperature parameters related to the module that consider temperature dependence on the input parameters; and a thermal learning model creation unit (102) that, on the basis of the results of the acquisition by the training data acquisition unit (101), creates a thermal learning model that receives an environmental temperature and a power consumption for a module as input parameters and outputs a temperature parameter related to the module as an output parameter.

Description

Learning device, inference device, learning method, inference method, learning program, and inference program

[0001] The present disclosure relates to a learning device, an inference device, a learning method, an inference method, a learning program, and an inference program.

[0002] In recent years, there has been an increasing demand for miniaturization and high output power in high-frequency modules for wireless communication or radar applications.

[0003] On the other hand, when a high-frequency module is miniaturized, the heat dissipation environment deteriorates, and when the output power is increased, the amount of heat generated increases due to an increase in power consumption. Therefore, in a high-frequency module, due to miniaturization and high output power, the heat generation density significantly increases, and the risk of failure increases.

[0004] Also, when a problem is detected after prototyping, costs and time required for countermeasures are incurred. In the worst case, rework may occur, so the demand for high-quality thermal design is increasing day by day.

[0005] In particular, in a high-frequency module, high-precision modeling of a transistor, which is a main heat-generating part, plays an extremely important role.

[0006] Conventional thermal calculations of transistor models were performed using the 45-degree method. The 45-degree method is based on physical equations. Therefore, this 45-degree method has the advantages of high convergence and fast calculation time for amplifier design.

[0007] On the other hand, according to the description in Non-Patent Document 1, for example, the 45-degree method has an assumption that the thermal conductivity of the substrate is constant. However, actual substrate materials have temperature dependencies and the like. Therefore, for example, when performing amplifier design under a plurality of temperature conditions, or when having a temperature distribution in a multi-cell, there is a problem that the calculation accuracy is low in the 45-degree method.

[0008] AM Darwish, AJ Bayba and HA Hung, "Thermal resistance calculation of AlGaN-GaN devices," in IEEE Transactions on Microwave Theory and Techniques, vol. 52, no. 11, pp. 2611-2620, Nov. 2004

[0009] As described above, the 45-degree method assumes that the thermal conductivity of the substrate is constant, so the calculation accuracy is low when designing amplifiers under multiple temperature conditions or when there is a temperature distribution in a multi-cell system.

[0010] This disclosure was made to solve the above-mentioned problems and aims to provide a learning device that enables higher accuracy of models compared to conventional devices.

[0011] The learning device according to this disclosure is characterized by comprising: a learning data acquisition unit that acquires input parameters which are multiple ambient temperatures and heat generation amounts of a module, and output parameters which are temperature parameters relating to the module that take into account the temperature dependence of the input parameters; and a thermal learning model creation unit that creates a thermal learning model which takes the ambient temperature and heat generation amount of a module as input parameters and outputs temperature parameters relating to the module as output parameters, based on the acquisition results by the learning data acquisition unit.

[0012] According to this disclosure, the above configuration makes it possible to improve the accuracy of the model compared to conventional methods.

[0013] This is a diagram showing an example configuration of a learning device according to Embodiment 1. This is a flowchart showing an example operation of a learning device according to Embodiment 1. This is a diagram showing an example of the temperature dependence and surface orientation dependence of thermal conductivity. This is a diagram showing an example configuration of an 8-finger transistor cell with an ISV structure. This is a diagram showing an example configuration of an 8-finger transistor cell with a Side Via structure. This is a diagram showing an example of the relationship between thermal resistance and heat generation. This is a diagram showing an example configuration of a 4-finger transistor cell. This is a diagram showing an example of the relationship between thermal resistance and drain electrode width. This is a diagram showing an example configuration of a thermal learning model using a neural network according to Embodiment 1. This is a diagram showing an example configuration of a transistor model according to Embodiment 1. This is a diagram showing an example configuration of an inference device according to Embodiment 1. This is a flowchart showing an example operation of an inference device according to Embodiment 1. This is a diagram showing an example of the relationship between temperature and pulse width when the duty cycle is changed. This is a diagram showing an example configuration of a thermal learning model of a neural network according to Embodiment 2. This is a diagram showing an example of transient change in output power during pulse operation. This is a diagram showing an example configuration of a 4-cell transistor. This is a diagram showing an example configuration of a thermal learning model of a neural network according to Embodiment 3. This is a diagram showing an example configuration of an amplifier using multiple stages of transistors. This is a diagram showing an example configuration of a thermal learning model of a neural network according to Embodiment 4. This figure shows an example of the relationship between time and temperature in the lifetime curve. Figures 21A and 21B show examples of the hardware configuration of the learning device and inference device according to Embodiment 1.

[0014] The embodiments will be described in detail below with reference to the drawings. Embodiment 1. Figure 1 shows an example of the configuration of the learning device 1 according to Embodiment 1. The learning device 1 is a device that creates a thermal learning model and a transistor model that take thermal analysis results into consideration. The transistor model created by the learning device 1 is effective as a transistor model when designing amplifiers (high-frequency modules) for wireless communication or radar applications. Furthermore, the thermal learning model created by the learning device 1 can be widely applied as a thermal learning model when designing semiconductor modules other than amplifiers.

[0015] As shown in Figure 1, for example, this learning device 1 includes a learning data acquisition unit 101, a thermal learning model creation unit 102, a conversion unit 103, and a transistor model creation unit 104. In the example in Figure 1, the learning data acquisition unit 101 is shown to have a thermal analysis execution unit 1011 and a measurement data acquisition unit 1012.

[0016] The learning data acquisition unit 101 acquires input parameters, which are conditions for multiple thermal analyses, and output parameters, which are temperature parameters related to the module, taking into account the temperature dependence of the input parameters.

[0017] The conditions for thermal analysis include at least the ambient temperature and heat generation of the module. The ambient temperature of the module is the temperature of the environment in which the module is used. The heat generation of the module is the power converted into heat in the module, and is the power obtained by subtracting the RF output power from the DC power (power consumption) and adding the RF input power. In addition to the ambient temperature and heat generation of the module, the conditions for thermal analysis may also include at least one of the substrate material and substrate structure of the module. An example of the substrate structure of the module is the substrate thickness of the module.

[0018] Furthermore, temperature parameters related to the module include, for example, the temperature at each location such as the heat source, or the thermal resistance between each location or across the entire module.

[0019] The thermal analysis unit 1011 uses CAD (Computer-aided design) and takes multiple thermal analysis conditions as input parameters to perform a thermal analysis including temperature dependence, thereby obtaining temperature parameters related to the module as output parameters. In addition, the thermal analysis unit 1011 may perform a thermal analysis that includes not only temperature dependence but also surface orientation dependence.

[0020] The measured data acquisition unit 1012 acquires measured data measured by a sensor (not shown) and other means, thereby obtaining input parameters, which are conditions for multiple thermal analyses, and output parameters, which are temperature parameters related to the module that take into account the temperature dependence of the input parameters. In addition, in the measured data acquisition unit 1012, the output parameters are not limited to the temperature, which is the output value indicated by the measured data, but may also be thermal resistance calculated from this temperature.

[0021] The learning data acquisition unit 101 selects, for example, whether to use the configuration of the thermal analysis execution unit 1011 or the actual measurement data acquisition unit 1012 for processing, in response to user operations using an operating device (not shown) connected to the learning device 1.

[0022] Furthermore, the example in Figure 1 shows a case where the learning data acquisition unit 101 has both a thermal analysis implementation unit 1011 and a measured data acquisition unit 1012. However, the learning data acquisition unit 101 is not limited to this case; it is sufficient for the learning data acquisition unit 101 to have at least one of the thermal analysis implementation unit 1011 and the measured data acquisition unit 1012.

[0023] Furthermore, in the following description, the learning device 1 will create a model using the learning data obtained by the thermal analysis execution unit 1011 of the learning data acquisition unit 101, and will output data representing the model to an external device (not shown), such as a display device or storage device.

[0024] The thermal learning model creation unit 102 creates a thermal learning model based on the results of the thermal analysis performed by the thermal analysis execution unit 1011. The thermal learning model created by the thermal learning model creation unit 102 is a model that takes the thermal analysis conditions as input parameters and outputs temperature parameters related to the module as output parameters. This thermal learning model is a data analysis model that takes thermal analysis conditions as input and temperature parameters as output, and is, for example, a model that uses a neural network.

[0025] The conversion unit 103 converts the thermal learning model created by the thermal learning model creation unit 102 into an analog model thermal learning model. In this case, the conversion unit 103 performs the conversion to an analog model using, for example, verilog-A. The thermal learning model that the conversion unit 103 is target of is a thermal learning model whose output parameter is the thermal resistance of the module.

[0026] The transistor model creation unit 104 creates a transistor model by incorporating the thermal learning model of the analog model obtained by the conversion unit 103.

[0027] Figure 1 shows a case where the learning device 1 creates both a thermal learning model and a transistor model. However, the learning device 1 is not limited to this and may be configured to create only a thermal learning model. In other words, in this case, the learning device 1 does not need the conversion unit 103 and the transistor model creation unit 104.

[0028] Next, an example of the operation of the learning device 1 according to Embodiment 1 shown in Figure 1 will be explained with reference to Figure 2. That is, here we will show an example of the operation when the learning device 1 creates both a thermal learning model and a transistor model. In the example of the operation of the learning device 1 according to Embodiment 1 shown in Figure 1, for example as shown in Figure 2, first, the thermal analysis implementation unit 1011 uses CAD and takes multiple thermal analysis conditions as input parameters to perform a thermal analysis including temperature dependence, thereby obtaining temperature parameters related to the module as output parameters (step ST101). In addition, the thermal analysis implementation unit 1011 may perform a thermal analysis that includes not only temperature dependence but also surface orientation dependence.

[0029] Next, the thermal learning model creation unit 102 creates a thermal learning model based on the results of the thermal analysis performed by the thermal analysis execution unit 1011. The thermal analysis conditions are input as input parameters, and the temperature parameters related to the module are output parameters (step ST102). In this case, the output parameter of the thermal learning model is the thermal resistance of the module.

[0030] Next, the conversion unit 103 converts the thermal learning model created by the thermal learning model creation unit 102 into an analog model thermal learning model (step ST103).

[0031] Next, the transistor model creation unit 104 creates a transistor model by incorporating the thermal learning model of the analog model obtained by the conversion unit 103 (step ST104).

[0032] Note that if the learning device 1 only creates a thermal learning model, the processes in steps ST103 and ST104 described above are unnecessary. In this case, the output parameters of the thermal learning model may be temperature parameters related to the module other than the thermal resistance of the module.

[0033] Next, the details of the operation by the learning device 1 will be explained. First, the CAD used by the thermal analysis unit 1011 will be explained. The CAD used by the thermal analysis unit 1011 is a CAD capable of thermal analysis simulation. More specifically, when the thermal analysis unit 1011 performs a thermal analysis including temperature dependence, the CAD is a CAD capable of performing a thermal analysis simulation including temperature dependence on material properties. Also, when the thermal analysis unit 1011 performs a thermal analysis including surface orientation dependence, the CAD is a CAD capable of performing a thermal analysis simulation including surface orientation dependence on material properties. Examples of such CADs include Icepak from Ansys or Celsius Thermal Solver from Cadence.

[0034] Figure 3 shows an example of the temperature dependence and surface orientation dependence of thermal conductivity. In Figure 3, reference numeral 11 indicates, for example, the thermal conductivity in the transverse direction (XY direction) of the substrate, and reference numeral 12 indicates, for example, the thermal conductivity in the longitudinal direction (Z direction) of the substrate. As shown in Figure 3, the thermal conductivity differs depending on the surface orientation of the substrate. And with the 45-degree method, it is difficult to reproduce actual heat conduction under such circumstances.

[0035] Furthermore, as shown in Figure 3, thermal conductivity is temperature-dependent, and it can be seen that thermal conductivity worsens as the temperature rises. This means that, for example, the thermal resistance changes significantly between 25°C (room temperature) and 100°C, indicating that, for the same amount of heat generation, the temperature rises more rapidly at 100°C.

[0036] When the ambient temperature of a module is extremely wide, for example, from -50°C to 150°C, the thermal conductivity can differ by about twice as much under low-temperature conditions compared to high-temperature conditions. Therefore, in such cases, the 45-degree method, which assumes constant thermal conductivity, results in low accuracy in calculating thermal resistance, making it difficult to create a highly accurate model.

[0037] Furthermore, the plane orientation dependence and temperature dependence of thermal conductivity also differ depending on the substrate material used. The above-mentioned substrate materials are not limited to semiconductor materials such as Si, GaAs, GaN, SiC, Ga2O3, or diamond, but include all materials such as die bond materials such as AuSn or Ag, package resins such as molds, substrates such as PCBs or glass, or materials related to modules using semiconductors in general, such as shields, wires, leads, or graphite sheets. Note that semiconductor materials such as GaN, SiC, Ga2O3, or diamond are extremely effective materials as wide-bandgap semiconductors used in high-power applications. The thermal analysis unit 1011 can perform thermal analysis simulations that take into account at least one of the plane orientation dependence and temperature dependence of the thermal conductivity of these materials, provided that at least one of these plane orientation dependence and temperature dependence is known.

[0038] Next, we will explain the module's substrate structure (substrate thickness).

[0039] Figure 4 shows an example configuration of an eight-finger transistor cell 2 with an ISV structure. The eight-finger transistor cell 2 with an ISV structure shown in Figure 4 comprises a gate electrode 201, a drain electrode 202, and source electrode vias 203-1, 203-2, 203-3, 203-4, and 203-5.

[0040] Figure 5 shows an example configuration of an 8-finger transistor cell 3 with a Side Via structure. The 8-finger transistor cell 3 with a Side Via structure shown in Figure 5 comprises a gate electrode 301, a drain electrode 302, source electrode vias 303-1 and 303-2, and a bridge 304. The bridge 304 is used to connect the source electrode vias 303-1 and 303-2 and is configured, for example, as an air bridge structure.

[0041] The eight-finger transistor cell 2 with an ISV structure shown in Figure 4 and the eight-finger transistor cell 3 with a Side Via structure shown in Figure 5 both have the same total gate electrode width, but the transistor cells are significantly different. This is because the via shape must be changed depending on the substrate thickness. Substrate thickness affects the difficulty of mounting the chip. Thus, it is conceivable that both the ISV structure, which has good characteristics but a thin substrate thickness and is therefore difficult to mount, and the Side Via structure, which has a thick substrate thickness, may be used as substrate structures.

[0042] Next, we will discuss the difference in thermal resistance between transistor cells with an ISV structure and those with a Side Via structure. Figure 6 shows an example of the relationship between thermal resistance and heat generation. In Figure 6, reference numeral 21 indicates the result of a thermal analysis simulation for a transistor cell with an ISV structure, and reference numeral 22 indicates the result of a thermal analysis simulation for a transistor cell with a Side Via structure. As shown in Figure 6, the thermal resistance of a transistor cell with an ISV structure is lower than that of a transistor cell with a Side Via structure.

[0043] Furthermore, as shown in Figure 6, it can be seen that both the ISV structure transistor cell and the Side Via structure transistor cell exhibit increased thermal resistance as the amount of heat generated increases. This result appears when a thermal analysis simulation is performed that includes the temperature dependence of thermal conductivity, and is difficult to reproduce in a thermal analysis simulation that does not include temperature dependence.

[0044] Next, the reasons for the difference in thermal resistance between the transistor cell with the ISV structure and the transistor cell with the Side Via structure will be described. FIG. 7 is a diagram showing a configuration example of a four-finger transistor cell. This FIG. 7 corresponds to a cross-sectional view obtained by cutting out the transistor cell 2 with the ISV structure shown in FIG. 4 and the transistor cell 3 with the Side Via structure shown in FIG. 5 with respect to the X axis. The four-finger transistor cell shown in this FIG. 7 includes gate electrodes 401-1, 401-2, 401-3, 401-4, drain electrodes 402-1, 402-2, source electrodes 403-1, 403-2, 403-3, and a solid back surface GND 404. In FIG. 7, the spread of heat indicated by the solid line assumes the case of the 45-degree method for the sake of simplification of the figure. Also, the heat generation source is between the gate electrodes 401-1, 401-2, 401-3, 401-4 with a high electric field and the drain electrodes 402-1, 402-2.

[0045] As shown in this FIG. 7, when the widths of the drain electrodes 402-1 and 402-2 are sufficiently small with respect to the substrate thickness, interference points (thermal interference points) occur in the spread of heat as indicated by reference numerals 405-1 and 405-3. Similarly, when the width of the source electrode 403-2 is sufficiently small with respect to the substrate thickness, an interference point (thermal interference point) occurs in the spread of heat as indicated by reference numeral 405-2. When such thermal interference points occur, heat conduction deteriorates, so the thermal resistance increases.

[0046] As described above, the source electrode width and the drain electrode width are important parameters for thermal resistance. And in the Side Via structure, it is necessary to narrow the source electrode width with respect to the ISV structure, and there is a tendency for the thermal resistance to increase. The reason for narrowing the source electrode width in the Side Via structure is to reduce the source inductance. The source inductance is a factor that degrades the high-frequency characteristics, and there is a trade-off relationship between the thermal resistance and the source inductance in the source electrode width.

[0047] Next, the influence of the drain electrode width on the thermal resistance will be described. FIG. 8 is a diagram showing an example of the relationship between the thermal resistance and the drain electrode width. FIG. 8 shows the result of performing a thermal analysis simulation on a transistor cell with an ISV structure. Reference numeral 31 indicates the result of the thermal analysis simulation of a normal transistor cell with an ISV structure having a thin substrate thickness, and reference numeral 32 indicates the result of the thermal analysis simulation when a transistor with an ISV structure is fabricated with a substrate thickness equivalent to a Side Via structure, that is, when the substrate is thick. Note that the drain electrode width may also be represented by the gate-to-gate interval represented by the distance between the centers of the gate electrodes. In the case of the ISV structure, usually, the source electrode width is set to the minimum width at which vias can be formed, but this is not the limit, and widening the source electrode width is also effective in reducing the thermal resistance.

[0048] As shown in this FIG. 8, it can be seen that as the drain electrode width increases, the thermal resistance decreases. This is because as the drain electrode width increases, the thermal interference points 405-1, 405-2, and 405-3 in FIG. 7 approach the back surface solid GND 404.

[0049] Also, as shown in FIG. 8, it can be seen that the thermal resistance of the thinner substrate thickness indicated by reference numeral 31 is smaller than the thermal resistance of the thicker substrate thickness indicated by reference numeral 32. This is because when the substrate thickness is thinner, fewer heat paths are required, resulting in a decrease in thermal resistance.

[0050] As described above, the thermal resistance varies due to various factors, not limited to temperature dependence and plane orientation dependence. In order to create a model that accurately reproduces these, a thermal learning model that adds various factors as inputs and outputs temperature parameters related to temperature such as thermal resistance is essential.

[0051] FIG. 9 is a diagram showing a configuration example of a thermal learning model using a neural network. The thermal learning model using the neural network shown in this FIG. 9 includes input units 501-1, 501-2, 501-3, 501-4, and an output unit 502. Here, hyperparameters such as the number of layers, the number of nodes in each layer, the learning rate, the maximum number of epochs, and the activation function are arbitrary values.

[0052] Furthermore, the thermal learning model does not necessarily have to be a neural network; any model capable of modeling thermal analysis simulations will suffice, such as a model based on physical equations.

[0053] The input units 501-1, 501-2, 501-3, and 501-4 shown in Figure 9 accept parameters such as the module's ambient temperature and heat generation, as well as other parameters such as the module's drain electrode width and substrate thickness, as input parameters. The output unit 502 outputs, for example, the module's thermal resistance as an output parameter.

[0054] Furthermore, the thermal learning model creation unit 102 can create a thermal learning model as shown in Figure 9 by using the thermal analysis conditions and results from the thermal analysis execution unit 1011 as supervised data for the input and output parameters of the neural network.

[0055] Furthermore, the input and output parameters described above are merely examples and are not limited to them. The input parameters can be any parameters that have variable factors.

[0056] Furthermore, the input parameters may include not only the drain electrode width and substrate thickness, but also other parameters related to the transistor layout, such as the single gate electrode width or the number of fingers. They may also be limited to semiconductor materials such as Si, GaAs, GaN, SiC, Ga2O3, or diamond, as well as die bond materials such as AuSn or Ag, package resins such as molds, substrates such as PCBs or glass, or materials related to semiconductor modules in general, such as shields, wires, leads, or graphite sheets.

[0057] The output parameters can be any temperature parameters related to heat in general, and are not limited to thermal resistance; they can also be the maximum temperature of the heat-generating part or the average temperature over a certain range.

[0058] When creating a transistor model using the neural network thermal learning model shown in Figure 9, this thermal learning model is converted into an analog thermal learning model by the conversion unit 103. For example, verilog-A, used in this conversion unit 103, is a language for defining analog models and can be converted on Python.

[0059] Figure 10 shows an example of a transistor model configuration. The transistor model shown in Figure 10 includes a thermal resistance terminal 601 and a variable parameter 602.

[0060] The thermal resistance terminal 601 receives the thermal resistance, which is an output parameter of the thermal learning model.

[0061] In Figure 10, the variable parameters 602 are shown as single gate electrode width (Wgu), number of fingers (Finger), substrate thickness (Subt), ambient temperature (Tamb), and gate-to-gate spacing (Lgg). These parameters can be set by the amplifier designer, and the thermal resistance value will vary depending on their values. The above variable parameters 602 are just examples; any parameters that can be used as input parameters for a thermal learning model can be used.

[0062] In a transistor, RF (radio frequency) power is input, and the amplified RF power is output. Furthermore, a portion of the power is converted into heat and output as heat. This heat is represented by the product of the DC component current and voltage in the RF power input to the transistor. Therefore, the transistor model creation unit 104 may create a transistor model that has the function of calculating the product of the DC component current and voltage in the RF power input to the transistor. The value calculated by this transistor model may then be input as the heat generation amount to the thermal learning model in the transistor model. This improves the accuracy of the temperature parameter, which was previously optimized only at the maximum output point, even at small signals, contributing to improved accuracy of the transistor model.

[0063] In the above explanation, it was assumed that the learning device 1 creates a model using the learning data obtained by the thermal analysis execution unit 1011 of the learning data acquisition unit 101 and outputs data representing the model to an external device. However, the same applies when the learning device 1 uses the learning data obtained by the actual measurement data acquisition unit 1012 of the learning data acquisition unit 101.

[0064] Next, the inference device 7, which performs inference processing using the thermal learning model or transistor model obtained by the learning device 1, will be described with reference to Figure 11. The inference device 7 includes, for example, a data acquisition unit 701 and an inference unit 702, as shown in Figure 11.

[0065] The data acquisition unit 701 acquires the thermal analysis conditions as input parameters. These thermal analysis conditions are the same as those used in the learning device 1. For example, the data acquisition unit 701 acquires the thermal analysis conditions as input parameters in response to user operation.

[0066] The inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into the thermal learning model created by the learning device 1, and acquires the temperature parameters related to the module output from the thermal learning model. If a transistor model is created by the learning device 1, the inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into the thermal learning model of that transistor model.

[0067] Next, an example of the operation of the inference device 7 according to Embodiment 1 shown in Figure 11 will be described with reference to Figure 12. In the inference device 7 according to Embodiment 1 shown in Figure 11, for example as shown in Figure 12, first, the data acquisition unit 701 acquires the thermal analysis conditions as input parameters (step ST201).

[0068] Next, the inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into the thermal learning model created by the learning device 1, and acquires the temperature parameters related to the module output from the thermal learning model (step ST202).

[0069] As described above, according to this embodiment 1, the learning device 1 includes a learning data acquisition unit 101 that acquires input parameters which are multiple ambient temperatures and heat generation amounts of the module, and output parameters which are temperature parameters related to the module that take into account the temperature dependence of the input parameters, and a thermal learning model creation unit 102 that creates a thermal learning model that takes the ambient temperature and heat generation amount of the module as input parameters and outputs temperature parameters related to the module as output parameters, based on the acquisition results by the learning data acquisition unit 101. Furthermore, according to this embodiment 1, the learning data acquisition unit 101 uses a CAD capable of thermal analysis simulation, takes multiple ambient temperatures and heat generation amounts of the module as input parameters, and performs thermal analysis to obtain temperature parameters related to the module that take into account the temperature dependence of the input parameters as output parameters. Furthermore, according to this embodiment 1, the CAD is a CAD capable of thermal analysis simulation that includes temperature dependence of material properties. Furthermore, according to this embodiment 1, the CAD is a CAD capable of thermal analysis simulation that includes surface orientation dependence of material properties. Furthermore, according to this embodiment 1, the thermal learning model is configured by a neural network. Furthermore, according to this embodiment 1, the output parameter obtained by the learning data acquisition unit 101 and the thermal learning model is the thermal resistance of the module. As a result, the learning device 1 according to embodiment 1 enables higher accuracy of the thermal learning model compared to conventional devices. In other words, the learning device 1 according to embodiment 1 can obtain a thermal learning model that takes into account the temperature dependence of thermal conductivity, thereby achieving higher accuracy of the thermal learning model compared to conventional devices.

[0070] Furthermore, according to this embodiment 1, at least one of the module's substrate material and substrate structure is added as an input parameter used in the learning data acquisition unit 101 and the thermal learning model. As a result, the learning device 1 according to embodiment 1 can obtain a thermal learning model that takes into account at least one of the module's substrate material and substrate structure, thereby achieving higher accuracy of the thermal learning model compared to conventional models.

[0071] Furthermore, according to this embodiment 1, the learning device 1 includes a conversion unit 103 that converts a thermal learning model into an analog model thermal learning model, and a transistor model creation unit 104 that creates a transistor model incorporating the analog model thermal learning model obtained by the conversion unit 103. As a result, the learning device 1 according to embodiment 1 makes it possible to achieve higher accuracy of the transistor model compared to conventional devices. In other words, the learning device 1 according to embodiment 1 makes it possible to obtain a transistor model that takes into account the temperature dependence of thermal conductivity, thereby achieving higher accuracy of the transistor model compared to conventional devices.

[0072] Furthermore, according to this embodiment 1, the substrate structure, which is at least one of the module layout and substrate thickness, is added as an input parameter used in the learning data acquisition unit 101 and the thermal learning model. As a result, the learning device 1 according to embodiment 1 can obtain a transistor model that takes into account at least one of the module layout and substrate thickness, thereby achieving higher accuracy of the transistor model compared to conventional methods.

[0073] Furthermore, according to this embodiment 1, the transistor model creation unit 104 creates a transistor model that has the function of calculating the product of the DC component current and voltage in the high-frequency power input to the transistor, and inputs the value calculated by the transistor model as the amount of heat generated into the thermal learning model. As a result, the learning device 1 according to embodiment 1 has improved accuracy even with small signals, and it is possible to achieve higher accuracy of the transistor model compared to conventional models.

[0074] Furthermore, according to this embodiment 1, the inference device 7 includes a data acquisition unit 701 that acquires input parameters, and an inference unit 702 that inputs the input parameters acquired by the data acquisition unit 701 into a thermal learning model and acquires temperature parameters related to the module output from the thermal learning model. As a result, the inference device 7 according to embodiment 1 can perform calculations with higher accuracy than conventional devices. In other words, the inference device 7 according to embodiment 1 can perform calculations with higher accuracy than conventional devices by using a model that takes into account the temperature dependence of thermal conductivity.

[0075] Furthermore, according to this embodiment 1, the learning method includes the steps of: a learning data acquisition unit 101 acquiring input parameters which are multiple ambient temperatures and heat generation amounts of the module, and output parameters which are temperature parameters related to the module that take into account the temperature dependence of the input parameters; and a thermal learning model creation unit 102 creating a thermal learning model that takes the ambient temperature and heat generation amount of the module as input parameters and outputs temperature parameters related to the module as output parameters, based on the acquisition results by the learning data acquisition unit 101. As a result, the learning method according to embodiment 1 makes it possible to improve the accuracy of the thermal learning model compared to conventional methods. In other words, the learning method according to embodiment 1 makes it possible to obtain a thermal learning model that takes into account the temperature dependence of thermal conductivity, thereby achieving higher accuracy of the thermal learning model compared to conventional methods.

[0076] Furthermore, according to this embodiment 1, the inference method includes the steps of: the data acquisition unit 701 acquiring input parameters; and the inference unit 702 inputting the input parameters acquired by the data acquisition unit 701 into the thermal learning model described in claim 17, and acquiring the temperature parameters related to the module output from the thermal learning model. As a result, the inference method according to embodiment 1 can perform calculations with higher accuracy than conventional methods. In other words, the inference method according to embodiment 1 can perform calculations with higher accuracy than conventional methods by using a model that takes into account the temperature dependence of thermal conductivity.

[0077] Furthermore, according to this embodiment 1, the learning program causes the computer to function as the learning device described above. As a result, the learning program according to embodiment 1 enables higher accuracy of the thermal learning model compared to conventional methods. In other words, the learning program according to embodiment 1 can obtain a thermal learning model that takes into account the temperature dependence of thermal conductivity, thereby achieving higher accuracy of the thermal learning model compared to conventional methods.

[0078] Furthermore, according to this embodiment 1, the inference program causes the computer to function as the inference device described above. As a result, the inference program according to embodiment 1 can perform calculations with higher accuracy than conventional methods. In other words, the inference program according to embodiment 1 can perform calculations with higher accuracy than conventional methods by using a model that takes into account the temperature dependence of thermal conductivity.

[0079] Embodiment 2. Embodiment 1 described the case where the ambient temperature of the module, the amount of heat generated, the substrate material, and the substrate structure were used as input parameters, but these are parameters in a steady state. On the other hand, high-frequency modules for wireless communication or radar applications typically perform modulated wave operation or pulsed operation. Therefore, Embodiment 2 describes a thermal learning model applicable to pulsed operation.

[0080] In the learning device 1 according to Embodiment 2, the learning data acquisition unit 101 and the thermal learning model are further input parameters in addition to the ambient temperature and heat generation of the module, as well as the module's duty cycle and pulse width. The module's duty cycle and pulse width are the duty cycle and pulse width of the RF power input to the module. In addition to the above, other parameters shown in Embodiment 1 may be added as input parameters. In the inference device 7 according to Embodiment 2, the data acquisition unit 701 and the inference unit 702 are further input parameters in addition to the ambient temperature and heat generation of the module, as well as the module's duty cycle and pulse width. In addition to the above, other parameters shown in Embodiment 1 may be added as input parameters.

[0081] Figure 13 shows an example of the relationship between temperature and pulse width when the duty cycle is changed. In Figure 13, reference numeral 41 indicates the waveform for high duty cycle, reference numeral 42 indicates the waveform for medium duty cycle, and reference numeral 43 indicates the waveform for low duty cycle. High duty cycle refers to a duty cycle of approximately 33%, medium duty cycle refers to a duty cycle of approximately 10%, and low duty cycle refers to a duty cycle of approximately 2%.

[0082] As shown in Figure 13, it can be seen that the temperature increases as the duty cycle increases. Furthermore, it can be seen that the temperature tends to increase as the pulse width increases. Note that the characteristics shown in Figure 13 are for a specific ambient temperature and a specific heat generation rate.

[0083] As shown in Figure 13, it can be seen that the temperature can be determined if two conditions are known: the module's duty cycle and pulse width, given a certain ambient temperature and a certain amount of heat generation. Therefore, by adding the module's duty cycle and pulse width as input parameters to the thermal learning model shown in Embodiment 1, it becomes possible to model transient temperature changes, and the transient response can also be applied to the transistor model shown in Embodiment 1.

[0084] Figure 14 shows an example configuration of a neural network thermal learning model according to Embodiment 2. The neural network thermal learning model according to Embodiment 2 shown in Figure 14 comprises input units 501b-1, 501b-2, 501b-3, 501b-4, and output unit 502b. As shown in Figure 14, in order to accurately determine the thermal resistance (Zth) of the module during pulse operation, in addition to the ambient temperature (Tamb) and heat generation (Pdiss) of the module, the duty cycle and pulse width (Pulse Width) are required as input parameters. These parameters are the minimum required input parameters, and it is also possible to use other parameters described in Embodiment 1 as input parameters.

[0085] In Figure 14, the output parameter is the thermal resistance (Zth) during the module's pulse operation, but it is not limited to this; other heat-related parameters such as temperature can also be added.

[0086] Next, we will discuss the effects of applying transient response to a thermal learning model. Figure 15 shows an example of transient change in output power during pulse operation. As shown in Figure 15, immediately after a large power is input to the transistor (as indicated by reference numeral 51), the output power changes transiently as the temperature gradually rises. Therefore, by using a transistor model adapted to transient response, it is possible to accurately model this characteristic. Although Figure 15 describes a single pulse, it can also be applied when there are multiple pulses.

[0087] The pulse-applied transistor model shown in Figure 15 is extremely useful, for example, in the field of communications. The change in output power shown by reference numeral 52 in Figure 15 represents the time evolution of the AM-AM characteristic. A change in the AM-AM characteristic indicates a deterioration in the distortion characteristic, meaning that the time response of the transistor's distortion characteristic can be modeled with high accuracy.

[0088] As described above, in this second embodiment, the module's duty cycle and pulse width are added as input parameters used in the learning data acquisition unit 101 and the thermal learning model. As a result, the learning device 1 according to the second embodiment makes it possible to obtain a model applicable to pulse operation compared to the first embodiment.

[0089] Embodiment 3. Embodiments 1 and 2 showed the case where the target transistor is a single-cell transistor. However, transistors are not limited to this; for example, high-power amplifiers using GaN often use multi-cell transistors. Therefore, Embodiment 3 describes a transistor model applicable to multi-cell transistors assumed to be high-power amplifiers.

[0090] In the learning device 1 according to Embodiment 3, the learning data acquisition unit 101 and the thermal learning model are additional input parameters to the ambient temperature and heat generation of the module, as well as the number of transistor cells and the cell spacing. Furthermore, in addition to the above, at least one of the other parameters shown in Embodiment 1, or the parameters shown in Embodiment 2 (duty cycle and pulse width), may be added as input parameters. Furthermore, in the inference device 7 according to Embodiment 3, the data acquisition unit 701 and the inference unit 702 are additional input parameters to the ambient temperature and heat generation of the module, as well as the number of transistor cells and the cell spacing. Furthermore, in addition to the above, at least one of the other parameters shown in Embodiment 1, or the parameters shown in Embodiment 2 (duty cycle and pulse width), may be added as input parameters.

[0091] Figure 16 shows an example configuration of a four-cell transistor. The four-cell transistor shown in Figure 16 comprises transistor cells 801-1, 801-2, 801-3, and 801-4. Reference numerals 802-1, 802-2, and 802-3 indicate the cell spacing. Although a matching circuit is connected to the amplifier, it is not shown in the diagram as it is irrelevant to this explanation.

[0092] In multi-cell transistors, important parameters affecting thermal resistance are the number of transistor cells containing heat sources and the cell spacing. Specifically, if the cell spacing is narrow, thermal interference points, as shown in Figure 7, occur, causing the temperature to rise. Furthermore, when the cell spacings 802-1, 802-2, and 802-3 are equal, the temperature of the transistor cells near the center rises due to the influence of thermal interference points.

[0093] Figure 17 shows an example configuration of a neural network thermal learning model according to Embodiment 3. The neural network thermal learning model according to Embodiment 3 shown in Figure 17 comprises input units 501c-1, 501c-2, 501c-3, 501c-4 and output units 502c-1, 502c-2, 502c-3, 502c-4. As shown in Figure 17, in order to accurately determine the thermal resistance (Rth) of a multi-cell transistor, in addition to the ambient temperature (Tamb) and heat generation (Pdiss) of the module, the number of transistor cells (Cell) and cell spacing (Cell pitch) are required as input parameters. These parameters are the minimum required input parameters, and it is also possible to use at least one of the other parameters shown in Embodiment 1, or the parameters shown in Embodiment 2 (Duty ratio and pulse width), as input parameters.

[0094] Furthermore, in the case of multi-cell transistors, the temperature may differ for each transistor cell (131-1, 131-2, 131-3, 131-4). In such cases, the thermal resistance of each transistor cell can be determined by using a thermal learning model, and this can be applied to the transistor model to improve accuracy. The above explains that when each transistor cell has a different temperature, it is possible to determine the thermal resistance of each transistor cell using a thermal learning model. Conversely, when each finger of a transistor cell has a different temperature, it is also possible to determine the thermal resistance of each finger using a thermal learning model.

[0095] In Figure 17, the output parameter is shown as the thermal resistance (Rth) of each transistor cell. However, it is not limited to this; other heat-related parameters such as temperature, for example, the thermal resistance of the transient response (Zth), can also be added.

[0096] As described above, in this embodiment 3, the number of transistor cells and the cell spacing are added as input parameters used in the learning data acquisition unit 101 and the thermal learning model. Furthermore, in this embodiment 3, the output parameter obtained by the learning data acquisition unit 101 and the thermal learning model is the thermal resistance of each transistor cell. As a result, the learning device 1 according to embodiment 3 makes it possible to obtain a model applicable to multi-cell transistors compared to embodiments 1 and 2.

[0097] Embodiment 4. Embodiments 1-3 showed a case where the target transistor constituted a single stage of an amplifier. However, amplifiers often have multiple stages to increase gain. In the case of a multi-stage configuration, thermal interference may occur depending on the spacing between, for example, the second and third stage transistors, and the transistor models described so far may not be able to reproduce the temperature rise. Therefore, Embodiment 4 describes a transistor model applicable to a multi-stage transistor assumed to be a high-gain amplifier.

[0098] In the learning device 1 according to Embodiment 4, the learning data acquisition unit 101 and the thermal learning model are further configured with the transistor spacing as input parameters, in addition to the ambient temperature and heat generation of the module. Furthermore, at least one of the following may be added as input parameters: other parameters shown in Embodiment 1, parameters shown in Embodiment 2 (duty cycle and pulse width), or parameters shown in Embodiment 3 (number of cells and cell spacing). In addition, in the inference device 7 according to Embodiment 4, the data acquisition unit 701 and the inference unit 702 are further configured with the transistor spacing as input parameters, in addition to the ambient temperature and heat generation of the module. Furthermore, at least one of the following may be added as input parameters: other parameters shown in Embodiment 1, parameters shown in Embodiment 2 (duty cycle and pulse width), or parameters shown in Embodiment 3 (number of cells and cell spacing).

[0099] Figure 18 shows an example of an amplifier configuration using multiple stages of transistors. The amplifier using multiple stages of transistors shown in Figure 18 includes an RF power input terminal 901, an RF power output terminal 902, a first-stage transistor 903-1, a second-stage transistor 903-2, a third-stage transistor 903-3, an input matching circuit 904, a first-to-second-stage matching circuit 905, a second-to-third-stage matching circuit 906, an output matching circuit 907, and a solid ground plane 908 on the back surface. Reference numeral 909 indicates a thermal interference point.

[0100] In the example shown in Figure 18, depending on the distance between the second-stage transistor 903-2 and the third-stage transistor 903-3, thermal interference occurs, increasing thermal resistance and thus raising the temperature.

[0101] Figure 19 shows an example configuration of a neural network thermal learning model according to Embodiment 4. The neural network thermal learning model according to Embodiment 4 shown in Figure 19 comprises input units 501d-1, 501d-2, 501d-3 and output units 502d-1, 502d-2, 502d-3. As shown in Figure 19, in order to accurately determine the thermal resistance (Rth (FET)) of an amplifier using multiple stages of transistors, the input parameters required are the ambient temperature of the module (Tamb) and the amount of heat generated (Pdiss), as well as the spacing between the transistors (FETs). These parameters are the minimum required input parameters, and it is also possible to use at least one of the other parameters shown in Embodiment 1, the parameters shown in Embodiment 2 (Duty ratio and pulse width), or the parameters shown in Embodiment 3 (number of cells and cell spacing) as input parameters.

[0102] Furthermore, in the case of an amplifier using multiple stages of transistors, the temperature may differ for each transistor 803-1, 803-2, and 803-3 (FET1, FET2, and FET3). In such cases, the thermal resistance of each transistor 803-1, 803-2, and 803-3 can be determined by using a thermal learning model, and this can be applied to the transistor model to improve accuracy. Also, for example, the third stage transistor may be a multi-cell transistor. In such cases, as in Embodiment 3, the thermal resistance of each cell of the transistor can be determined by using a thermal learning model, and this can be applied to the transistor model to improve accuracy.

[0103] In Figure 19, the output parameter is shown as the thermal resistance (Rth) of each transistor, but it is not limited to this; it is also possible to add other heat-related parameters such as temperature, for example, the thermal resistance of the transient response (Zth).

[0104] As described above, in this embodiment 4, the transistor spacing is added as an input parameter used in the learning data acquisition unit 101 and the thermal learning model. As a result, the learning device 1 according to embodiment 4 can obtain a model that is applicable to multiple stages of transistors, compared to embodiments 1-3.

[0105] As described in Embodiments 1-4, the learning device 1 can create a highly accurate transistor model by considering the temperature dependence of thermal conductivity. As a result, in Embodiments 1-4, it is possible to reproduce temperature with high accuracy using the transistor model, and to estimate the lifespan accurately during the design process. In other words, the transistor model creation unit 104 in Embodiments 1-4 can create a transistor model that has the function of calculating the lifespan of the transistor based on the thermal resistance output from the thermal learning model, for example, by Minor's rule.

[0106] Figure 20 shows an example of the relationship between time and temperature in the lifetime curve. As shown in Figure 20, the lifetime curve indicated by reference numeral 61 shows that the duration of operation decreases as the temperature increases. For example, if the lifetime at temperature T1 is N1, it means that if that state continues for n1 hours, n1 / N1 minutes of lifetime will be consumed, and the lifetime will end when it reaches 1. When this is applied to multiple temperatures, it is expressed by the following equation (1): n1 / N1 + n2 / N2 + n3 / N3 + n4 / N4 + n5 / N5 + ... = Σ(ni / Ni) = 1 (1)

[0107] As described above, by using the transistor model employing the thermal learning model shown in Embodiment 1-4, it becomes possible to reproduce temperature with high accuracy, and to estimate the lifespan accurately during the design phase.

[0108] Finally, with reference to Figure 21, an example of the hardware configuration of the learning device 1 and inference device 7 according to Embodiment 1-4 will be described. Below, an example of the hardware configuration of the learning device 1 according to Embodiment 1-4 will be described, but the same applies to the hardware of the inference device 7 according to Embodiment 1-4. The functions of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 in the learning device 1 are realized by the processing circuit 1001. The processing circuit 1001 may be dedicated hardware as shown in Figure 21A, or it may be a CPU (Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, or DSP (Digital Signal Processor)) 1002 that executes the program stored in the memory 1003, as shown in Figure 21B.

[0109] If the processing circuit 1001 is dedicated hardware, it may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof. The functions of each part, the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104, may be implemented individually by the processing circuit 1001, or the functions of each part may be implemented together by the processing circuit 1001.

[0110] When the processing circuit 1001 is a CPU 1002, the functions of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 are realized by software, firmware, or a combination of software and firmware. The software and firmware are written as programs and stored in the memory 1003. The processing circuit 1001 realizes the functions of each unit by reading and executing the programs stored in the memory 1003. In other words, the learning device 1 is equipped with a memory 1003 for storing programs that, when executed by the processing circuit 1001, result in the execution of each step shown in Figure 2, for example. Furthermore, these programs can be said to cause the computer to execute the procedures and methods of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104. Here, the memory 1003 can include, for example, non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable ROM), EEPROM (Electrically EPROM), magnetic disks, flexible disks, optical disks, compact disks, minidiscs, or DVDs (Digital Versatile Discs).

[0111] Furthermore, the functions of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 may be partially implemented by dedicated hardware and partially implemented by software or firmware. For example, the learning data acquisition unit 101 can be implemented by a processing circuit 1001 as dedicated hardware, while the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 can be implemented by the processing circuit 1001 reading and executing a program stored in memory 1003.

[0112] Thus, the processing circuit 1001 can realize each of the above-mentioned functions through hardware, software, firmware, or a combination thereof.

[0113] Furthermore, it is possible to freely combine the embodiments, modify any component of each embodiment, or omit any component in each embodiment.

[0114] The learning device described herein enables higher accuracy of models compared to conventional devices and is suitable for use in learning devices and the like.

[0115] 1 Learning device, 2,3 Transistor cells, 7 Inference device, 101 Learning data acquisition unit, 102 Thermal learning model creation unit, 103 Conversion unit, 104 Transistor model creation unit, 201 Gate electrode, 202 Drain electrode, 203-1, 203-2, 203-3, 203-4, 203-5 Source electrode via, 301 Gate electrode, 302 Drain electrode, 303-1, 303-2 Source electrode via, 304 Bridge, 401-1, 401-2, 401-3, 401-4 Gate electrode, 402-1, 402-2 Drain electrode, 403-1, 403-2, 403-3 Source electrode, 404 Backside solid GND, 405-1, 405-2, 405-3 Thermal interference points: 501-1, 501-2, 501-3, 501-4, 501b-1, 501b-2, 501b-3, 501b-4, 501c-1, 501c-2, 501c-3, 501c-4, 501d-1, 501d-2, 501d-3 Input section: 502, 502b, 502c-1, 502c-2, 502c-3, 502c-4, 502d-1, 502d-2, 502d-3 Output section: 601 Thermal resistance terminal: 602 Variable parameter: 701 Data acquisition section: 702 Inference section: 801-1, 801-2, 801-3, 801-4 Transistor cell: 802-1, 802-2, 802-3 Cell spacing, 901 Input terminal, 902 Output terminal, 903-1, 903-2, 903-3 Transistors, 904 Input matching circuit, 905 Interstage 1-2 matching circuit, 906 Interstage 2-3 matching circuit, 907 Output matching circuit, 908 Solid GND on the back surface, 909 Thermal interference point, 1001 Processing circuit, 1002 CPU, 1003 Memory, 1011 Thermal analysis execution unit, 1012 Measurement data acquisition unit.

Claims

1. A learning device comprising: a learning data acquisition unit that acquires input parameters which are multiple ambient temperatures and heat generation amounts of a module, and output parameters which are temperature parameters relating to the module that take into account the temperature dependence of the input parameters; and a thermal learning model creation unit that creates a thermal learning model that takes the ambient temperature and heat generation amount of a module as input parameters and outputs temperature parameters relating to the module as output parameters, based on the acquisition results by the learning data acquisition unit.

2. The learning apparatus according to claim 1, characterized in that at least one of the module's substrate material and substrate structure is added as an input parameter used in the learning data acquisition unit and the thermal learning model.

3. The learning device according to claim 1 or 2, characterized in that the module's duty cycle and pulse width are added as input parameters used in the learning data acquisition unit and the thermal learning model.

4. The learning device according to any one of claims 1 to 3, characterized in that the learning data acquisition unit uses a CAD capable of thermal analysis simulation, takes multiple ambient temperatures and heat generation amounts of the module as input parameters, and performs thermal analysis to obtain temperature parameters for the module that take into account the temperature dependence of the input parameters as output parameters.

5. The learning device according to claim 4, characterized in that the CAD is a CAD capable of performing thermal analysis simulations that include temperature dependence on material properties.

6. The learning device according to claim 4 or 5, characterized in that the CAD is a CAD capable of performing thermal analysis simulations that include surface orientation dependence on material properties.

7. The learning device according to any one of claims 1 to 6, characterized in that the thermal learning model is composed of a neural network.

8. The learning device according to any one of claims 1 to 7, characterized in that the output parameters obtained by the learning data acquisition unit and the thermal learning model are the thermal resistance of the module.

9. A learning device comprising: a conversion unit that converts the thermal learning model described in claim 8 into a thermal learning model of an analog model; and a transistor model creation unit that creates a transistor model incorporating the thermal learning model of an analog model obtained by the conversion unit.

10. The learning apparatus according to claim 9, characterized in that a substrate structure, which is at least one of the module layout and substrate thickness, is added as an input parameter used in the learning data acquisition unit and the thermal learning model.

11. The learning device according to claim 9 or 10, characterized in that the transistor model creation unit creates a transistor model having the function of calculating the product of the DC component current and voltage in the high-frequency power input to the transistor, and inputs the value calculated by the transistor model as the amount of heat generated to the thermal learning model.

12. The learning device according to any one of claims 9 to 11, characterized in that the number of transistor cells and the cell spacing are added as input parameters used in the learning data acquisition unit and the thermal learning model.

13. The learning device according to claim 12, characterized in that the output parameters obtained by the learning data acquisition unit and the thermal learning model are the thermal resistance of each transistor cell.

14. The learning device according to any one of claims 9 to 13, characterized in that the spacing between transistors is added as an input parameter used in the learning data acquisition unit and the thermal learning model.

15. The learning device according to any one of claims 9 to 14, characterized in that the transistor model creation unit creates a transistor model having a function to calculate the lifetime of a transistor based on the thermal resistance output from the thermal learning model.

16. An inference device comprising: a data acquisition unit that acquires input parameters; and an inference unit that inputs the input parameters acquired by the data acquisition unit into a thermal learning model according to any one of claims 1 to 15, and acquires temperature parameters relating to a module output from the thermal learning model.

17. A learning method comprising the steps of: a learning data acquisition unit acquiring input parameters which are multiple ambient temperatures and heat generation amounts of a module, and output parameters which are temperature parameters relating to the module that take into account the temperature dependence of the input parameters; and a thermal learning model creation unit creating a thermal learning model that takes the ambient temperature and heat generation amount of a module as input parameters and outputs temperature parameters relating to the module as output parameters, based on the acquisition results by the learning data acquisition unit.

18. An inference method comprising the steps of: a data acquisition unit acquiring input parameters; and an inference unit inputting the input parameters acquired by the data acquisition unit into a thermal learning model according to any one of claims 1 to 15, and acquiring temperature parameters relating to a module output from the thermal learning model.

19. A learning program for causing a computer to function as a learning device according to any one of claims 1 to 15.

20. An inference program for causing a computer to function as the inference device described in claim 16.

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