Multi-layer planar magnetic coil

The multi-layer coil design with interleaved sub-coils addresses the challenge of maintaining high operating frequencies and compact size by minimizing parasitic capacitance, ensuring effective communication performance in NFC and RFID applications.

WO2026131051A1PCT designated stage Publication Date: 2026-06-25BSH HAUSGERATE GMBH

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
BSH HAUSGERATE GMBH
Filing Date
2025-11-28
Publication Date
2026-06-25

AI Technical Summary

Technical Problem

Existing planar magnetic coils for communication applications face challenges in achieving a compact design with increased self-resonant frequency and upper operating frequency due to parasitic capacitance from multiple layers, which can reduce the operating frequency below the required range for NFC and RFID applications.

Method used

A multi-layer coil design with interleaved sub-coils on different layers of a circuit board, utilizing a thin dielectric substrate and strategic conductor alignment to minimize parasitic capacitance, allowing for a compact form factor while maintaining high operating frequencies.

Benefits of technology

The interleaved sub-coil arrangement increases the self-resonant frequency and operating frequency of the multi-layer coil, enabling efficient communication within the required frequency ranges for NFC and RFID applications without significantly increasing the coil's physical size.

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Abstract

A multi-layer coil (110) is described, wherein the multi-layer coil (110) comprises a first planar sub-coil (131) on a first layer and a second planar sub-coil (132) on a second layer of a circuit board (101), the first layer and the second layer are located above one another along a z-axis which is perpendicular to the first and the second layer of the circuit board (101). The first sub-coil (131) and the second sub-coil (132) each comprise an electrical, line-shaped, conductor (115) which forms M windings of the respective sub-coil (131, 132), with M≥ 2, wherein adjacent windings of the first sub-coil (131) and adjacent windings of the second sub-coil (132) are each separated by a gap (221). The first sub-coil (131) and the second sub-coil (132) are interleaved with respect to one another, such that the conductor (115) of the first sub-coil (131) is at least partially located along the z-axis directly above a gap (221) between adjacent windings of the second sub-coil (132).
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