Power factor conversion circuit for controlling switch on basis of output voltage, and electronic device comprising same

Abstract

An electronic device according to one embodiment may comprise: a rectifying circuit configured to rectify an AC signal; a capacitor; and a power factor conversion circuit configured to control, on the basis of a power factor, charging of the capacitor using the AC signal rectified by the rectifying circuit. The power factor conversion circuit may comprise: an inductor configured to generate a current for charging the capacitor on the basis of the rectified AC signal; a switch configured to change an electrical connection of the inductor; and a control circuit configured to control the switch. The control circuit may be configured to identify the current generated in the inductor while the electrical connection between the inductor and the capacitor is established on the basis of the switch. The control circuit may be configured to, on the basis of identifying the current that is less than or equal to a threshold current, control the switch such that the electrical connection is released according to a delay based on the voltage of the capacitor.

Description

A power factor conversion circuit that controls a switch based on output voltage, and an electronic device including the same.

[0001] The following descriptions relate to a power factor conversion circuit that controls a switch based on an output voltage, and an electronic device including the same.

[0002] With the recent advancement of electronic technology, various types of display devices are being developed and distributed, and the demand for large display devices is increasing. As power consumption increases with the enlargement of display devices, display devices may include one or more power factor correction circuitries (PFC circuits) to stably supply relatively high power consumption.

[0003] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0004] According to one embodiment, an electronic device may include a rectifier circuit configured to rectify an alternating current signal, a capacitor, and a power factor conversion circuit configured to control the charging of the capacitor using the alternating current signal rectified by the rectifier circuit based on the power factor. The power factor conversion circuit may include an inductor configured to generate a current for charging the capacitor based on the rectified alternating current signal, a switch configured to change the electrical connection of the inductor, and a control circuit configured to control the switch. The control circuit may be configured to identify the current generated in the inductor while the electrical connection between the inductor and the capacitor is established based on the switch. The control circuit may be configured to control the switch so that the electrical connection is released according to a delay based on the voltage of the capacitor, based on identifying the current which is below a threshold current.

[0005] In one embodiment, a method of a power circuit comprising a rectifier circuit and a power factor conversion circuit may be provided. The method may include an operation of charging an inductor in the power factor conversion circuit using an alternating current signal rectified by the rectifier circuit. The method may include an operation of connecting the charged inductor to the capacitor to charge the capacitor connected to the power factor conversion circuit. The method may include an operation of identifying a current transmitted from the inductor to the capacitor while the inductor is connected to the capacitor. The method may include an operation of releasing the electrical connection between the inductor and the capacitor according to a delay based on the voltage of the capacitor, based on identifying the current that is below a threshold current.

[0006] In one embodiment, a power circuit of an electronic device may be provided. The power circuit may include a rectifier circuit configured to rectify an alternating current signal, a capacitor, and a power factor conversion circuit configured to control the charging of the capacitor based on the power factor using an inductor configured to receive the alternating current signal rectified by the rectifier circuit. The power factor conversion circuit may be configured to charge the inductor, which is electrically disconnected from the capacitor within a first time interval, using the rectified alternating current signal. The power factor conversion circuit may be configured to charge the capacitor by establishing an electrical connection between the capacitor and the inductor within a second time interval after the first time interval. The second time interval may include a first sub-time interval in which current is transmitted from the inductor to the capacitor through the electrical connection, and a second sub-time interval based on resonance occurring in the power factor conversion circuit after the first sub-time interval.

[0007] FIG. 1 illustrates an embodiment of an electronic device that receives power from a power system.

[0008] FIG. 2 illustrates a schematic block diagram of an exemplary power circuit included in an electronic device according to one embodiment.

[0009] FIG. 3 illustrates a circuit diagram of a part of a power circuit included in an electronic device according to one embodiment.

[0010] Figure 4 illustrates graphs to explain the relationship between an AC signal received from a power system and the switching operation of a power factor conversion circuit.

[0011] FIGS. 5A and FIGS. 5B illustrate graphs for explaining the switching operation included in a power factor conversion circuit.

[0012] FIG. 6 illustrates equivalent circuit diagrams for each of the different states of the power factor conversion circuit, distinguished by whether the switch is activated or not.

[0013] Figure 7 illustrates graphs showing the relationship between the output voltage of a power factor conversion circuit and the frequency of a switch included in the power factor conversion circuit.

[0014] FIG. 8 illustrates an exemplary block diagram of the operation of a control circuit included in a power factor conversion circuit.

[0015] Hereinafter, various embodiments of this document will be described with reference to the attached drawings.

[0016] The various embodiments of this document and the terms used therein are not intended to limit the technology described in this document to specific embodiments and should be understood to include various modifications, equivalents, and / or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar components. A singular expression may include a plural expression unless the context clearly indicates otherwise. In this document, expressions such as "A or B," "at least one of A and / or B," "A, B or C," or "at least one of A, B and / or C" may include all possible combinations of items listed together. Expressions such as "first," "second," "first," or "second" may modify said components regardless of order or importance and are used only to distinguish one component from another and do not limit said components. When it is mentioned that a certain (e.g., 1st) component is "(functionally or telecommunicationally) connected" or "connected" to another (e.g., 2nd) component, said certain component may be directly connected to said other component or connected through another component (e.g., 3rd component).

[0017] As used in this document, the term "module" includes a unit composed of hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be a component formed as a whole, or a minimum unit or part thereof that performs one or more functions. For example, a module may be composed of an application-specific integrated circuit (ASIC).

[0018] FIG. 1 illustrates an embodiment of an electronic device (101) that receives power from a power system (110). The electronic device (101) may be described as an electronic device capable of displaying images. For example, the electronic device (101) may include a TV (television), a monitor, a computer, a smartphone, a tablet PC (personal computer), a portable media player, a wearable device, a video wall, a digital photo frame, etc. The electronic device (101) may be referred to as a display device. For convenience of explanation, an embodiment in which the electronic device (101) is implemented as a TV is described below, but the embodiment is not limited thereto.

[0019] The electronic device (101) may be configured to operate by power provided from the power system (110) (e.g., alternating current (AC) power signal, and / or alternating current signal). The power system (110) (or power distribution system) may be described as infrastructure built to provide power. The electronic device (101) may include a plug (120) (or port, power cord) configured to be connected to a power outlet (or outlet, socket, receptacle) located at one end of the power system (110). The plug (120) may be connected to a component of the electronic device (101) for power conversion (e.g., power conversion from an alternating current signal to a direct current (DC) signal (or direct current power signal)) (e.g., an AC-DC adapter (or power adapter) and / or a power circuit (170) described later with reference to FIG. 1).

[0020] While the plug (120) is electrically connected to the power system (110), the electronic device (101) can perform a function to output video, sound, or a combination thereof (e.g., multimedia content) based on the power of the power system (110). When the electronic device (101) receives information representing video and / or sound, the electronic device (101) can perform the function using said information. The information representing video and / or sound may be stored in the electronic device (101) or received from an external electronic device (e.g., a set-top box (STB)) (130) connected to the electronic device (101). The electronic device (101) may include an antenna configured to receive said information wirelessly or may be electrically connected to said antenna.

[0021] While receiving power from the power system (110) through the plug (120), the electronic device (101) may be operated according to any one of a normal mode (or active mode, enabled mode) and a standby mode (or inactive mode, disabled mode, hibernate mode, sleep mode). The normal mode may be described as a mode that consumes power exceeding the power consumption of the standby mode (e.g., standby power) to output video. The modes of the electronic device (101) are not limited to the normal mode and the standby mode. In this disclosure, the term “mode” may be used interchangeably with the term “state.” In the standby mode, the output of video and sound by the electronic device (101) may be substantially stopped or minimized. In standby mode, the electronic device (101) may output a message (e.g., “Press the power button”) guiding input to switch to normal mode. The message may be output through the display and / or speaker of the electronic device (101). In normal mode, the electronic device (101) may output video (e.g., video different from the message) and / or sound. The electronic device (101) may switch between standby mode and normal mode, or toggle, based on user input.

[0022] The electronic device (101) may include hardware for receiving user input for controlling the electronic device (101) (e.g., user input for switching between standby mode and normal mode). For example, the electronic device (101) may include a switch (or button) that is at least partially visible through the housing of the electronic device (101). For example, the electronic device (101) may include a touch sensor (e.g., a pressure-sensitive touch sensor and / or a capacitive touch sensor) for detecting touch input on at least a portion of the housing. User input may include a direct action by the user on the electronic device (101) (e.g., pressing a switch and / or button, or touching one side of the housing). Embodiments are not limited thereto, and user input may be identified by an audio signal representing the user's speech received through a microphone. The embodiments are not limited thereto, and user input may include indirect actions of the user related to the electronic device (101) based on the remote controller (140).

[0023] Referring to FIG. 1, the electronic device (101) may be configured to receive a wireless signal (or optical signal) from a remote controller (140) based on infrared (IR). Embodiments are not limited thereto, and the remote controller (140) may be configured to transmit a wireless signal based on Bluetooth, BLE (Bluetooth low energy), NFC (near-field communication), UWB (ultra-wideband), WiFi (wireless fidelity), WiFi-direct, and / or other wireless short-range communication protocols. For example, the electronic device (101) may be configured to receive a wireless signal based on the illustrated wireless short-range communication protocols. In both standby mode and normal mode, the electronic device (101) may be configured to receive a wireless signal from the remote controller (140).

[0024] FIG. 1 includes an exploded perspective view illustrating electronic components included in an electronic device (101). The electronic device (101) may include a housing (150), a display panel (160), a power circuit (170), and a main circuitry (180). The housing (150) may include a rear cover (or back cover, back cover) of the electronic device (101). The housing (150) may include an object for supporting the electronic device (101) (e.g., support legs and / or VESA (video electronics standards association) mount holes). One side of the electronic device (101) where the housing (150) is visible may be described as the rear side (e.g., rear side) of the electronic device (101).

[0025] The other side of the electronic device (101), opposite to one side of the electronic device (101) where the housing (150) is visible, may be described as the front side (e.g., front side) of the electronic device (101). The display panel (160) may be visible from the front side of the electronic device (101). The display panel (160) may include a liquid crystal display (LCD), a plasma display panel (PDP), and a plurality of LEDs. The LEDs of the display panel (160) may include organic LEDs (OLEDs). In one embodiment, the display panel (160) may include electronic paper. If the display panel (160) has a flat shape, the display panel (160) may be referred to as a flat panel display (FPD). If the display panel (160) has a curved shape, the display panel (160) may be referred to as a curved display. If the display panel (160) has a deformable shape, the display panel (160) may be referred to as a bendable display, a flexible display, and / or a rollable display.

[0026] The main circuit (180) may be configured to execute the functions of the electronic device (101) described above (e.g., a function for outputting video, sound, or a combination thereof, a turn-on function, a turn-off function, a function for adjusting volume, a function for changing channels, and / or a function for controlling the execution of a software application (e.g., an OTT (over the top) application) installed on the electronic device (101). For example, the main circuit (180) may control a display panel (160) (and / or hardware of the electronic device (101), such as a speaker) using information received from an external electronic device (130) (or an antenna of the electronic device (101)) to output audio, image, video, or any combination thereof that appears according to said information. For example, the main circuit (180) may be configured to control the display panel (160). The power circuit (170) may be configured to provide power to the main circuit (180). The power circuit (170) may be configured to convert an alternating current signal received from the power system (110) into a direct current (DC) signal for driving the main circuit (180). For example, the power circuit (170) may be configured to transmit a direct current signal to the main circuit (180).

[0027] For driving an electronic device (101), the amount of electrical energy provided from a power system (110) to an electronic device (101) may be referred to as apparent power. Apparent power may be a combination of active power (or consumed power) and reactive power. In the case where the power system (110) supplies electrical energy to electronic devices having the same active power, if the reactive powers of said electronic devices are different, the apparent power provided by the power system (110) to said electronic devices may be different. For example, the higher the reactive power, the higher the apparent power may be. Power factor (PF) refers to the ratio between active power and apparent power. To reduce the load on the power system (110), it may be (legally) required that the electronic device (101) have a power factor higher than a critical power factor.

[0028] According to one embodiment, an electronic device (101) and / or a power circuit (170) may be configured to receive an alternating current signal from a power system (110) while satisfying conditions related to power factor (e.g., legal regulations). The legal regulations may be set such that an electronic device (101) consuming 75 W or more of power has a power factor greater than a critical power factor. In accordance with the legal regulations, the electronic device (101) may include a power circuit (170) (e.g., a switching mode power supply (SMPS)) that is controlled to have a power factor greater than the critical power factor. To receive an alternating current signal at a power factor higher than the critical power factor, the power circuit (170) of the electronic device (101) may include a power factor conversion circuit.

[0029] The present disclosure may relate to a power factor conversion circuit having reduced loss (e.g., switching loss occurring in one or more switches included in the power factor conversion circuit), a power circuit (170) including said power factor conversion circuit, and / or an electronic device (101) including said power circuit (170). A load circuit of the electronic device (101), configured to receive power from the power circuit (170), including a main circuit (180) and / or a display panel (160), may request a power signal having a specific voltage (e.g., a power signal having a DC voltage) from the power circuit (170) including the power factor conversion circuit. The load circuit may request a power signal having a second voltage exceeding said first voltage from the power circuit (170) to execute a function supported by the load circuit (e.g., at least one of a function to charge a battery, a function to output audio, or a function to output an image and / or video) while activated based on the power signal having a first voltage.

[0030] For example, the loss generated in the power factor conversion circuit of the power circuit (170) may be proportional to the voltage of the power signal transmitted from the power circuit (170) to the load circuit. For example, the loss generated in the power factor conversion circuit of the power circuit (170) that generates the power signal having the first voltage may be smaller than the loss generated in the power factor conversion circuit of the power circuit (170) that generates the power signal having the second voltage. According to one embodiment, the power circuit (170) may efficiently increase the voltage of the power signal transmitted to the load circuit (e.g., relatively small loss in the power factor conversion circuit) based on identifying a request to increase the voltage of the power signal being transmitted from the load circuit to the load circuit. Because the loss in the power factor conversion circuit increases relatively less while the voltage of the power signal is increased, the power efficiency of the power factor conversion circuit, the power circuit (170) including the power factor conversion circuit, and the electronic device (101) including the power circuit (170) may be improved.

[0031] Below, with reference to FIG. 2, a power circuit (170) of an electronic device (101) including a power factor conversion circuit is schematically illustrated.

[0032] FIG. 2 illustrates a schematic block diagram of an exemplary power circuit (170) included in an electronic device (101) according to one embodiment. Referring to FIG. 2, a schematic block diagram of the power circuit (170) and main circuit (180) of the electronic device (101) of FIG. 1 is shown.

[0033] Referring to FIG. 2, a main circuit (180) is illustrated as exemplary electronic components of an electronic device (101) connected to a power circuit (170). The main circuit (180) of FIG. 2 may correspond to the main circuit (180) of FIG. 1. The embodiments are not limited thereto, and other electronic components of the electronic device (101) (e.g., the display panel (160) of FIG. 1 and / or a driving circuit for driving the display panel (160)) may also be connected to the power circuit (170). The power circuit (170) may generate a DC signal required for driving the remaining electronic components from an AC signal provided from a power system (110). For example, the power circuit (170) may transmit a DC signal having a voltage (Vo2) required for driving the main circuit to the main circuit (180).

[0034] Referring to FIG. 2, the power circuit (170) may include an electromagnetic interference (EMI) filter (210), a rectifier circuit (220), a power factor conversion circuit (230), and / or a DC-DC conversion circuit (240). Power contained in an alternating current signal received from the power system (110) may be sequentially propagated from the EMI filter (210) to the rectifier circuit (220), the power factor conversion circuit (230), and the DC-DC conversion circuit (240), or transmitted.

[0035] An EMI filter (210) may be placed between the power system (110) (or the plug (120) of FIG. 1) and the rectifier circuit (220). The EMI filter (210) may be configured to filter the alternating current signal to be transmitted to the rectifier circuit (220). The EMI filter (210) may be configured to reduce noise contained in the alternating current signal to be transmitted to the rectifier circuit (220) (e.g., noise caused by frequency components higher than the frequency of the alternating current signal intended by the power system (110)).

[0036] A rectifier circuit (220) may be configured to rectify an alternating current signal provided by the power system (110) (or received by the electronic device (101)). Referring to FIG. 2, a rectifier circuit (220) connected to a port extending from an EMI filter (210) is shown. The potential difference between nodes included in the port may correspond to the voltage of the alternating current signal filtered by the EMI filter (210). The rectifier circuit (220) may be configured to rectify the alternating current signal. To rectify the alternating current signal, the rectifier circuit (220) may include a plurality of diodes based on a bridge structure. Embodiments are not limited thereto, but the rectifier circuit (220) may have a structure for rectifying the alternating current signal based on one or more transistors (e.g., an active bridge rectifier circuit and / or a bridgeless rectifier circuit).

[0037] The power factor conversion circuit (230) may be configured to output a DC signal from an AC signal rectified by the rectifier circuit (220). Between the rectifier circuit (220) and the power factor conversion circuit (230), a capacitor (231) configured to store the AC signal rectified by the rectifier circuit (220) (at least temporarily) may be placed. The capacitor (231) may be charged by the rectifier circuit (220). When the capacitor (231) is charged by the rectified AC signal, the voltage between the two ends of the capacitor (e.g., the potential difference between the nodes of the ports between the capacitor (220) and the power factor conversion circuit (230)) may be smoothed.

[0038] The power factor conversion circuit (230) can control the charging of the capacitor (232) using power charged by the capacitor (231). For example, the power factor conversion circuit (230) can control the charging of the capacitor (232) according to a threshold power factor (or a power factor greater than the threshold power factor) defined by the power system (110). For example, the power factor conversion circuit (230) can be configured to control the charging of the capacitor (232) based on the power factor of the AC signal. For example, the power factor conversion circuit (230) can be configured to control the charging of the capacitor (232) based on the power factor using the AC signal rectified by the rectifier circuit (220). The power factor conversion circuit (230) can be configured to charge the capacitor (232) using power stored in the capacitor (231). Here, the power factor may refer to the ratio between the active power and the apparent power with respect to the active power and the reactive power included in the apparent power of the electronic device (101) for the power system (110). The capacitors (231, 232) may include electrolytic capacitors, tantalum capacitors, ceramic capacitors, and / or film capacitors. The capacitors (231, 232) may be referred to as bulk capacitors and / or supercapacitors in terms of storing power for driving the electronic device (101).

[0039] In one embodiment, the power factor conversion circuit (230) may include a switch for controlling the charging of a capacitor (232). The power factor conversion circuit (230) may include a control circuit (250) configured to control the switch. An exemplary structure of the power factor conversion circuit (230) including the control circuit (250) and the switch is described with reference to FIG. 3. An exemplary operation of the control circuit (250) controlling the switch based on a critical conduction mode (CrM) is described with reference to FIG. 4.

[0040] The DC-DC conversion circuit (240) may be configured to generate a DC signal (e.g., a power signal having a voltage (Vo2)) to be transmitted to a power circuit (170) and other electronic components (e.g., main circuit (180)) different from the power circuit (170), using electrical energy output from the power factor conversion circuit (230) or stored in the capacitor (232). For example, the DC-DC conversion circuit (240) may be configured to generate a power signal having a DC voltage required for driving a load circuit such as the main circuit (180) using power charged in the capacitor (232). For example, the DC-DC conversion circuit (240) may be configured to generate a DC signal based on power charged in the capacitor (232). The DC-DC conversion circuit (240) may have a structure based on an LLC (inductor-inductor-capacitor). A DC-DC conversion circuit (240) having a structure based on LLC may be referred to as an LLC resonant circuit and / or an LLC circuit. An electronic device (101) may include an electronic component configured to receive the DC signal of the DC-DC conversion circuit (240).

[0041] Referring to FIG. 2, an embodiment is illustrated in which a DC signal having a voltage (Vo2) is transmitted from a DC-DC conversion circuit (240) to a main circuit (180). An optical coupler (291) may be disposed between the main circuit (180) and the power circuit (170). The optical coupler (291) may be configured to transmit information (e.g., power consumption of the main circuit (180) and / or voltage required for driving the main circuit (180)) from the main circuit (180) to the power circuit (170) for controlling the power factor and / or driving of the power circuit (170) while maintaining electrical isolation between the main circuit (180) and the power circuit (170) (e.g., electrical isolation formed within the DC-DC conversion circuit (240)).

[0042] An embodiment is illustrated in which the main circuit (180) and the DC-DC conversion circuit (240) are connected to the power factor conversion circuit (230) and / or the capacitor (232), but the embodiment is not limited thereto. For example, the display panel (160) of FIG. 1 (or another DC-DC conversion circuit configured to provide a power signal to the display panel (160)) may be connected to the power factor conversion circuit (230) and / or the capacitor (232). For example, the DC-DC conversion circuit (240) and the other DC-DC conversion circuit may be connected in parallel with respect to the capacitor (232). In the above example, the DC-DC conversion circuit (240) and the other DC-DC conversion circuit may receive a power signal having a voltage (Vo1) from the capacitor (232).

[0043] In the present disclosure, the conversion efficiency of the DC-DC conversion circuit (240) may be related to the power loss occurring in the DC-DC conversion circuit (240) while generating a power signal having a voltage (Vo2) using the power of the capacitor (232). As the power loss occurring in the DC-DC conversion circuit (240) increases, the conversion efficiency of the DC-DC conversion circuit (240) may decrease. The power loss occurring in the DC-DC conversion circuit (240) may be related to the difference between the voltage of the power signal input to the DC-DC conversion circuit (240) (e.g., the voltage of the capacitor (232) (Vo1)) and the voltage of the power signal output from the DC-DC conversion circuit (240) (e.g., the voltage of the power signal output to the main circuit (180) (Vo2)). For example, the power loss in the DC-DC conversion circuit (240) can be increased as the difference between the voltages increases.

[0044] The voltage of a power signal input to a load circuit, such as a main circuit (180), may be increased or decreased depending on the state of the load circuit and / or the function to be performed by the load circuit. For example, the minimum voltage of the power signal required to drive the main circuit (180) may correspond to a first voltage in normal mode and a second voltage less than the first voltage in standby mode. For example, the minimum voltage of the power signal required to drive the display panel (160) of FIG. 1 may be increased or decreased based on at least one of whether the display panel (160) is activated, the minimum brightness of the display panel (160), the average brightness of the display panel (160), and / or the brightness of the backlight included in the display panel (160). In other words, while the load circuit is active, the load circuit can change the voltage of the power signal (in one embodiment of FIG. 2, the power signal having voltage (Vo2)) transmitted to the power circuit (170) (repeatedly, continuously, or periodically). Referring to FIG. 2, the main circuit (180), which is an example of a load circuit, can transmit a signal and / or a command to change the voltage (Vo2) of the power signal transmitted to the main circuit (180) to the power circuit (170) and / or the DC-DC conversion circuit (240) using an optical coupler (291).

[0045] In one embodiment, in order to improve the conversion efficiency of the DC-DC conversion circuit (240) (e.g., to reduce the power loss of the DC-DC conversion circuit (240)), a method of controlling the charging of a capacitor (232) based on a power factor conversion circuit (230) may be required. For example, if a main circuit (180), which is an example of a load circuit, requests an increase in the voltage (Vo2) of a power signal, the power factor conversion circuit (230) may increase the voltage (Vo1) of the capacitor (232). In the above example, since both voltages (Vo1, Vo2) are increased, the power loss of the DC-DC conversion circuit (240), based on the difference between the voltages (Vo1, Vo2), may be maintained, reduced, or increased relatively little. Referring to FIG. 2, an optical coupler (292) placed between the main circuit (180) and the power circuit (170) may be placed for communication between the power factor conversion circuit (230) and the main circuit (180). Through the optical coupler (292), the power factor conversion circuit (230) (or control circuit (250)) may detect or identify a request from the main circuit (180) to increase the voltage (Vo2) of the power signal.

[0046] In the present disclosure, the efficiency of the power factor conversion circuit (230) may be related to the power loss generated in the power factor conversion circuit (230). In one embodiment in which the power factor conversion circuit (230) includes a switch for controlling the charging of a capacitor (232), the power loss may be related to the power consumed to activate or deactivate the switch. In other words, the more frequently the state of the switch included in the power factor conversion circuit (230) is changed (e.g., activated or deactivated), the greater the power loss of the power factor conversion circuit (230). For example, the power loss of the power factor conversion circuit (230) may be related to or proportional to the switching frequency of the switch. In summary, based on the request of the main circuit (180) to increase the voltage (Vo2) of the power signal, increasing the voltage (Vo1) of the capacitor (232) reduces the power loss of the DC-DC conversion circuit (240), but the power loss of the power factor conversion circuit (230) may increase.

[0047] The present disclosure may relate to switching conditions of a power factor conversion circuit (230) such that when the voltage of a power signal provided to a load circuit including a main circuit (180) increases, the power loss of the power factor conversion circuit (230) increases (relatively little). For example, to reduce the switching loss of the power factor conversion circuit (230), the power factor conversion circuit (230) (or control circuit (250)) may delay the timing of controlling the switches within the power factor conversion circuit (230). The delay may relate to resonance (or resonance frequency or resonance period) occurring within the power factor conversion circuit (230). The timing of controlling the switches within the power factor conversion circuit (230) is illustrated by way of example with reference to FIG. 5a and FIG. 5b. The resonance occurring in the power factor conversion circuit (230) is illustrated by way of example with reference to FIG. 6. The switching frequency of the power factor conversion circuit (230), which is changed based on the above switching conditions, is explained with reference to FIG. 7. The operation of the power factor conversion circuit (230) based on the above switching conditions is explained with reference to FIG. 8.

[0048] Hereinafter, with reference to FIG. 3, a circuit diagram corresponding to at least a part of the power circuit (170) of FIG. 1 and / or FIG. 2 is described.

[0049] FIG. 3 illustrates a circuit diagram of a portion of a power circuit (170) included in an electronic device according to one embodiment. The electronic device (101) of FIG. 1 and / or FIG. 2 may include the electronic device of FIG. 3. The power circuit (170) of FIG. 1 and / or FIG. 2 may include the power circuit (170) illustrated in FIG. 3.

[0050] Referring to FIG. 3, circuit diagrams of a rectifier circuit (220), a power factor conversion circuit (230), and a DC-DC conversion circuit (240) are shown as part of a power circuit (170). The rectifier circuit (220), power factor conversion circuit (230), control circuit (250), and DC-DC conversion circuit (240) of FIG. 3 may correspond to the rectifier circuit (220), power factor conversion circuit (230), control circuit (250), and DC-DC conversion circuit (240) of FIG. 2, respectively. The capacitor (231) of FIG. 3 may correspond to the capacitor (231) of FIG. 2.

[0051] Referring to FIG. 3, the power factor conversion circuit (230) may include an inductor (Lp) having one end connected to a rectifier circuit (220). The voltage at the node (Vr), which is the one end of the inductor (Lp), may correspond to the voltage of an AC signal rectified by the rectifier circuit (220). The power factor conversion circuit (230) may include a switch configured to change the electrical connection of the inductor (Lp). Referring to FIG. 3, as an example of a switch included in the power factor conversion circuit (230), it may include a transistor (Qp) having a drain electrode (dp) connected to the other end (e.g., node (310)) of the inductor (Lp) and a source electrode (sp) connected to a ground node.

[0052] Although a transistor (Qp) that is an N-channel MOSFET (metal-oxide-semiconductor field-effect transistor) is illustrated, a P-channel MOSFET and / or a BJT (bipolar junction transistor) may be included in the power factor conversion circuit (230) as a substitute for the transistor (Qp). The transistor (Qp) may include a gate electrode (gp) connected to a control circuit (250). In the present disclosure, being activated of a transistor (or switch) such as the transistor (Qp) may indicate a state of the transistor in which the source electrode and the drain electrode are electrically connected. For example, the transistor may be activated when a voltage exceeding a threshold voltage for activating the transistor is applied to the gate electrode of the transistor. Being deactivated of the transistor may indicate a state of the transistor in which the source electrode and the drain electrode are electrically disconnected. For example, the transistor may be deactivated when the voltage at the gate electrode of the transistor is reduced to below the threshold voltage.

[0053] Referring to FIG. 3, the power factor conversion circuit (230) may include a diode (Dp) having an anode connected to the other end (e.g., node (310)) of an inductor (Lp). The cathode of the diode (Dp) may be connected to one end (e.g., node (370)) of a capacitor (231). The voltage (Vo1) of the capacitor (231) may be applied to the node (370) corresponding to the one end of the capacitor (231). The other end of the capacitor (231) may be connected to a ground node or grounded.

[0054] Referring to FIG. 3, the power factor conversion circuit (230) may include resistors (R1, R2) located between a node (370) and a ground node. Resistor (R1) may include one end connected to the node (370) and the other end connected to resistor (R2). Resistor (R2) may include one end connected to resistor (R1) and the other end grounded. The node (320) between the resistors (R1, R2) may be electrically connected to a control circuit (250). The voltage at the node (320) may correspond to a value in which the voltage (Vo1) at the node (370) is reduced by the ratio of the resistance values ​​between the resistors (R1, R2). For example, the voltage (Vo1) may be divided among the resistors (R1, R2) according to the ratio of the resistance values. Among the resistors (R1, R2), resistor (R2) may be a variable resistor having a resistance value that changes according to a control signal.

[0055] Referring to FIG. 3, a DC-DC conversion circuit (240) connected to a node (370) corresponding to one end of a capacitor (231) may include transistors (Qm, Qn) located between the node (370) and a ground node. The DC-DC conversion circuit (240) may include a control circuit (242) configured to control the transistors (Qm, Qn). Although the transistors (Qm, Qn) are N-channel MOSFETs, the embodiment is not limited thereto, and P-channel MOSFETs and / or BJTs may be included in the DC-DC conversion circuit (240) as substitutes for the transistors (Qm, Qn). The transistor (Qm) may include a drain electrode connected to the node (370), a source electrode connected to the drain electrode of the transistor (Qn), and a gate electrode connected to the control circuit (242). The transistor (Qn) may include a drain electrode connected to the source electrode of the transistor (Qm), a grounded source electrode, and a gate electrode connected to the control circuit (242).

[0056] The DC-DC conversion circuit (240) may include a capacitor (Cx) having one end connected to a node (370). The DC-DC conversion circuit (240) may include a transformer (330) having a primary coil (L1) and a secondary coil (L2). The coils (L1, L2) may be referred to as inductors. The primary coil (L1) and the secondary coil (L2) may be inductively coupled to each other. The primary coil (L1) may include one end connected to the other end of the capacitor (Cx) and the other end connected to the source electrode of a transistor (Qm). Based on the control circuit (242), the transistors (Qm, Qn) may be periodically activated so that an AC signal can be applied to the primary coil (L1). While an alternating current signal is applied to the primary coil (L1), an alternating current signal may be induced or generated in the secondary coil (L2) based on inductive coupling.

[0057] The DC-DC conversion circuit (240) may include a rectifier circuit (340) configured to rectify an AC signal induced in a secondary coil (L2). Referring to FIG. 3, an AC signal rectified by the rectifier circuit (340) may be applied to a node (360) connected to the rectifier circuit (340). The DC-DC conversion circuit (240) may include a capacitor (350) having one end connected to the node (360) and the other end grounded. By the capacitor (350), the voltage of the node (360) may be smoothed into a DC voltage (e.g., Vo2). The DC-DC conversion circuit (240) may include resistors (R3, R4) located between the node (360) and the ground node. The resistor (R3) may include one end connected to the node (360) and the other end connected to the resistor (R4). A resistor (R4) may include one end connected to a resistor (R3) and the other end grounded. At a node (365) between resistors (R3, R4), a voltage (Vo2) at the node (360) may be applied such that the voltage (Vo2) has a value reduced by the ratio of the resistance values ​​between resistors (R3, R4). For example, the voltage (Vo2) may be divided among each of the resistors (R3, R4) according to the ratio of the resistance values ​​of the resistors (R3, R4). Among the resistors (R3, R4), resistor (R4) may be a variable resistor having a resistance value that changes according to a control signal.

[0058] A node (360) of the DC-DC conversion circuit (240) may be connected to a load circuit (e.g., the main circuit (180) and / or the display panel (160) of FIG. 1 and / or FIG. 2) following the power circuit (170). For example, the load circuit may receive a power signal having a voltage (Vo2) through the node (360). Based on the power signal, the load circuit may be activated. If the load circuit is a circuit for charging a battery, the load circuit may perform an operation to increase the voltage (Vo2) applied to the node (360) to charge the battery. If the load circuit is a display driving circuit for driving the display panel (160) of FIG. 1, the load circuit may perform an operation to increase the voltage (Vo2) applied to the node (360) to increase the brightness of the display panel (160). If the load circuit is a speaker driving circuit for controlling a speaker, it can perform an operation to increase the voltage (Vo2) applied to the node (360) in order to increase the volume of the speaker.

[0059] The DC-DC conversion circuit (240) may include optical couplers (291, 292) for feedback of the voltage (Vo2) of the node (360). The optical couplers (291, 292) may be configured to transmit information (e.g., information related to the voltage (Vo2)) while maintaining electrical isolation between a circuit connected to the primary coil (L1) of the transformer (330) (e.g., power factor conversion circuit (230)) and a circuit connected to the secondary coil (L2) (e.g., rectifier circuit (340), load circuit connected to the node (360)). The optical couplers (291, 292) may include a light emitting diode (LED) for transmitting said information in the form of an optical signal and a photodiode for receiving said optical signal.

[0060] Referring to FIG. 3, optical couplers (291, 292) can be connected to a node (365) between resistors (R3, R4). Optical coupler (291) can be connected to a control circuit (242). Optical coupler (291) can transmit information indicating the voltage of the node (365) to the control circuit (242). Optical coupler (292) can be connected to a control circuit (250) and a resistor (R2). Optical coupler (292) can transmit information indicating the voltage of the node (365) to the control circuit (250) and the resistor (R2) in the form of an electrical signal. Since the voltage of node (365) is a scaled value of the voltage (Vo2) of node (360), the optical couplers (291, 292) can be configured to provide information about the voltage (Vo2) to the control circuit (242), resistor (R2), and control circuit (250).

[0061] In one embodiment, a feedback circuit for the voltage (Vo2) of the node (360) may be formed by the optical couplers (291, 292). For example, when the power consumption of the load circuit increases, the voltage (Vo2) of the node (360) may be reduced by the discharge of the capacitor (350). A control circuit (242) that identifies the reduced voltage (Vo2) using the optical coupler (291) may increase the electrical energy transmitted to the secondary coil (L2) by adjusting the switching period (or switching frequency) of the transistors (Qm, Qn). Similarly, a control circuit (250) of the power factor conversion circuit (230) that identifies the reduced voltage (Vo2) using the optical coupler (292) may increase the voltage (Vo1) of the capacitor (231) by adjusting the switching period (or switching frequency) of the transistor (Qp).

[0062] Referring to FIG. 3, an electrical signal output from the optical coupler (292) (e.g., an electrical signal related to voltage (Vo2)) can change the resistance value of the variable resistor (R2). For example, when the voltage (Vo2) decreases, the electrical signal output from the optical coupler (292) can cause a decrease in the resistance value of the resistor (R2). When the resistance value of the resistor (R2) decreases, the voltage of the node (320) can decrease because the ratio of the resistance values ​​of the resistors (R1, R2) changes. The control circuit (250), having identified the decreased voltage of the node (320), can increase the voltage (Vo1) of the capacitor (231) by adjusting the switching period (or switching frequency) of the transistor (Qp).

[0063] Although the feedback operation of the DC-DC conversion circuit (240) and / or power factor conversion circuit (230) based on the voltage (Vo2) of the node (360) has been described, the embodiments are not limited thereto. For example, a load circuit receiving the voltage (Vo2) of the node (360) may change or control the voltage (Vo2) by changing the resistance value of a variable resistor (R4). For example, the load circuit may reduce the resistance value of the resistor (R4) to increase the voltage (Vo2). When the resistance value of the resistor (R4) is reduced, the voltage of the node (365) may be reduced because the ratio of the resistance values ​​of the resistors (R3, R4) is changed. Optical couplers (291, 292) connected to the node (365) may provide information indicating the reduced voltage of the node (365) to the control circuit (242), the resistor (R2), and the control circuit (250). As described above with reference to the feedback operation, the control circuit (242) can perform a switching operation of transistors (Qm, Qn) to increase the voltage (Vo2) of node (360) based on identifying the reduced voltage of node (365). The control circuit (250) can also change the switching period (or switching frequency) of transistor (Qp) to increase the voltage (Vo1) of capacitor (231) based on identifying the reduced voltage of node (365).

[0064] As described above, the voltage (Vo2) of the power signal output to the load circuit can be used to control a switch (e.g., transistor (Qp)) of the power factor conversion circuit (230) by using a feedback circuit based on the optical coupler (292). For example, the output voltage of the power factor conversion circuit (230) (e.g., voltage (Vo1) of the capacitor (231)) can be changed according to the voltage (Vo2) so as to improve the conversion efficiency of the DC-DC conversion circuit (240).

[0065] According to one embodiment, the power factor conversion circuit (230) may be configured to control the charging of the capacitor (231) based on the power factor. The power factor conversion circuit (230) and / or the control circuit (250) may be configured to control the charging of the capacitor (231) based on the power factor by using an inductor (Lp) configured to receive an AC signal rectified by the rectifier circuit (220). The inductor (Lp) may be configured to generate a current (Il) for charging the capacitor (231) based on the rectified AC signal. The control circuit (250) may change the electrical connection of the inductor (Lp) using a transistor (Qp) which is a switch. The control circuit (250) may control the electrical connection of the inductor (Lp) based on CrM. The operation of the control circuit (250) and the power factor conversion circuit (230) that control the electrical connection of the inductor (Lp) based on CrM is explained with reference to FIG. 4.

[0066] According to one embodiment, the power factor conversion circuit (230) of the power circuit (170) can change the output voltage of the power factor conversion circuit (230) (e.g., voltage (Vo1) of the capacitor (231)) based on information provided through the optocoupler (292) (e.g., voltage (Vo2) and / or a request from the load circuit connected to the DC-DC conversion circuit (240). When the output voltage is increased, the power factor conversion circuit (230) can reduce the switching loss occurring in the transistor (Qp). For example, when the output voltage is increased, the control circuit (250) can delay the timing of controlling the transistor (Qp) based on the increased output voltage. The operation of the control circuit (250) controlling the transistor (Qp) according to the delay based on the output voltage is described with reference to FIGS. 5a, FIGS. 5b, FIGS. 6, FIGS. 7 and / or FIGS. 8.

[0067] FIG. 4 illustrates graphs for explaining the relationship between an AC signal received from a power system (e.g., the power system (110) of FIG. 1) and a switching operation of a power factor conversion circuit (e.g., the power factor conversion circuit (230) of FIG. 2). The switching operation described with reference to FIG. 4 can be performed by the control circuit (250) of FIG. 2 and / or FIG. 3.

[0068] Referring to FIG. 4, the graph (400) illustrates the output voltage of a power factor conversion circuit (e.g., the power factor conversion circuit (230) of FIG. 2 and / or FIG. 3) shown in the time domain (e.g., the voltage (Vo1) of node (370) of FIG. 3), and the magnitudes of the current of an AC signal received by a power circuit including said power factor conversion circuit (e.g., the power circuit (170) of FIG. 1 to FIG. 3).

[0069] Referring to FIG. 4, an enlarged graph of a portion of the graph (400) is shown. Line (410) may represent the magnitude of the voltage of the AC signal. Line (420) may represent the magnitude of the current of the AC signal. Line (430) may represent the average magnitude of the current of the AC signal. Referring to lines (410, 430), the phase of the voltage of the AC signal and the phase of the current of the AC signal may be aligned with each other. When the phases of the voltage and current of the AC signal are aligned, the power factor may be maximized. According to one embodiment, a power factor conversion circuit may be configured to control a switch (e.g., transistor (Qp) of FIG. 3) so that the phase of the current of the AC signal approximates the phase of the voltage of the AC signal.

[0070] Control of the switch can be performed based on CrM. Line (440) of FIG. 4 may indicate the magnitude of the voltage of the control signal applied to the gate electrode of the switch of the power factor conversion circuit (e.g., transistor (Qp) of FIG. 3). The voltage of the control signal indicated by line (440) may be increased above a specified threshold voltage to activate the switch during a time interval having a length of tg. Referring to FIG. 3, when the transistor (Qp) which is the switch is activated, the rectified AC signal applied to the inductor (Lp) through node (Vr) may be transmitted to the ground node through the inductor (Lp). For example, since node (310) of FIG. 3 is electrically connected to the ground node, the electrical connection between the inductor (Lp) and the capacitor (231) may be disconnected. For example, in each of the above time intervals, since the switch is activated, a current based on the rectified AC signal can be induced in the inductor of the power factor conversion circuit (e.g., inductor (Lp) in FIG. 3). In each of the above time intervals, the magnitude of the current induced in the inductor can be increased, as shown in line (420). Based on the characteristic equation of the inductor (e.g., for the inductance L of the inductor, the voltage v between the two ends of the inductor, and the current i of the inductor), the rate of change of the current induced in the inductor in each of the time intervals can be related to the magnitude of the voltage of the AC signal in each time interval (e.g., positive correlation).

[0071] Referring to line (440), based on the expiration of each time interval having a length of tg, the voltage of the control signal may be reduced below a specified threshold voltage (e.g., about 0 V) ​​to disable the switch. Referring to FIG. 3, when the transistor (Qp) which is the switch is disabled, the node (310) may be electrically disconnected from the ground node, and an electrical connection may be established between the inductor (Lp) and the capacitor (231) through the diode (Dp). For example, because the switch is disabled, the current induced in the inductor may be applied to the capacitor connected to the power factor conversion circuit. In other words, the capacitor connected to the power factor conversion circuit may be charged by the current induced in the inductor. Referring to line (420), since the current is used to charge the capacitor, the magnitude of the current induced in the inductor may be reduced between the time intervals. When the power factor conversion circuit is controlled based on CrM, the switch may be deactivated until the magnitude of the current transmitted from the inductor to the capacitor (e.g., the current transmitted through the diode (Dp) with reference to FIG. 3) is reduced to zero. Based on identifying that the magnitude of the current has been reduced to zero (or based on identifying a current below a threshold current defined to identify the magnitude of the current being zero), the control circuit may reactivate the switch. For example, the control circuit may control the switch so that it is activated for a time interval of length tg.

[0072] In one embodiment, the output voltage of the power factor conversion circuit, represented as voltage (Vo1) in the graph (400), can be changed (dynamically) based on a request from the load circuit. For example, a request to increase the output voltage can be transmitted from the load circuit to the power factor conversion circuit. For example, the request can be transmitted from the load circuit to the power factor conversion circuit through the optical coupler (292) of FIG. 3. The control circuit of the power factor conversion circuit that receives the request can control the switch so that the switching frequency of the switch is increased.

[0073] After the magnitude of the current transmitted from the inductor to the capacitor is reduced to zero, in order to reduce switching losses, the power factor conversion circuit may change the state of the switch at a time when the voltage of the switch (e.g., the potential difference between the drain electrode and the source electrode of the transistor (Qp) in FIG. 3) becomes minimum (or infinitesimal) (e.g., valley switching). After the magnitude of the current transmitted from the inductor to the capacitor is reduced to zero, the voltage of the switch may oscillate (e.g., resonance) due to the parasitic capacitance of the inductor and the surrounding circuit of the inductor (e.g., switch and / or diode). For example, after the magnitude of the current transmitted from the inductor to the capacitor is reduced to zero, a resonant circuit including the inductor may be formed within the power factor conversion circuit.

[0074] When the switching frequency is increased to increase the output voltage of the power factor conversion circuit, switching losses may increase as the frequency at which the state of the switch changes increases. To reduce the rate at which switching losses increase, the control circuit may control the switch using a delay based on the resonant frequency of the resonant circuit. For example, the switch may be activated after the voltage of the switch becomes minimum, following the point in time when the magnitude of the current transmitted from the inductor to the capacitor is reduced to zero. Because the activation time of the switch is delayed, the rate at which the switching frequency increases may be limited, and the rate at which switching losses increase may be reduced. For example, the power factor conversion circuit can provide an increased output voltage based on relatively low switching losses.

[0075] Below, with reference to FIGS. 5a and FIGS. 5b, the operation of a power factor conversion circuit and / or control circuit that controls a switch based on a delay is described.

[0076] FIGS. 5A and 5B illustrate graphs for explaining a switching operation included in a power factor conversion circuit (e.g., the power factor conversion circuit (230) of FIG. 2). The switching operation described with reference to FIG. 5A and / or FIG. 5B may be performed by the control circuit (250) of FIG. 2 and / or FIG. 3. The switching operation described with reference to FIG. 5A and / or FIG. 5B may be related to the switching operation described above with reference to FIG. 4. In FIG. 5A and / or FIG. 5B, the reference numeral of FIG. 3 may be used to describe elements such as the elements of FIG. 3.

[0077] Referring to FIG. 5a and / or FIG. 5b, graphs are shown indicating voltages and / or currents within the power factor conversion circuit at each of the different states (501, 502) of FIG. 3. Line (510) represents the voltage (Vds) between the drain electrode (dp) and the source electrode (sp) of the transistor (Qp) of FIG. 3. Line (520) represents the magnitude of the current in the diode (Dp) of FIG. 3 (e.g., current transmitted from the inductor (Lp) to the capacitor (231). Line (530) represents the magnitude of the current transmitted from the drain electrode (dp) to the source electrode (sp) of the transistor (Qp) of FIG. 3. Line (540) represents the voltage at the gate electrode (gp) of the transistor (Qp) (or the voltage of the control signal transmitted from the control signal (250) to the gate electrode (gp) of the transistor (Qp). The first state (501) of FIG. 5a and the second state (502) of FIG. 5b can each correspond to states of a power factor conversion circuit that provide different output voltages.

[0078] Referring to FIG. 5a, voltages and / or currents within the power factor conversion circuit are shown in a first state (501) of the power factor conversion circuit that provides a first magnitude output voltage. In a time interval (Ton1), referring to line (540), a control signal to activate the switch of the power factor conversion circuit (e.g., transistor (Qp) of FIG. 3) may be transmitted. Referring to FIG. 3, in a time interval (Ton1), the inductor (Lp) may be charged because the transistor (Qp) of FIG. 3 is activated. The length of the time interval (Ton1) may correspond to the specified length tg of FIG. 4. In a time interval (Ton1), as the transistor (Qp) which is the switch is activated, the current of the inductor (Lp) is transmitted to the transistor (Qp), so the current of the switch, indicated by line (530), may correspond to the current of the inductor (Lp).

[0079] Referring to line (540) of FIG. 5a, within a time interval (Toff1) following a time interval (Ton1), a switch (e.g., transistor (Qp) of FIG. 3) can be deactivated. Referring to line (530) within the time interval (Toff1), since the switch is deactivated, the current of the switch can be reduced to substantially zero. Referring to FIG. 3, since the transistor (Qp) is deactivated within the time interval (Toff1), electrical connections of the inductor (Lp), diode (Dp), and capacitor (231) can be established. Within a time interval (Tc) (e.g., a first sub-time interval) included in the time interval (Toff1), as the switch is deactivated, the current generated in the inductor (Lp) can be transmitted to the capacitor (231). As the capacitor (231) is charged by the current, the current of the diode (Dp), represented by the line (520) (e.g., current transmitted from the inductor to the capacitor), can be gradually reduced within the time interval (Tc). Within the time interval (Tc), the current of the diode (Dp) can match the current of the inductor (Lp).

[0080] Referring to line (520) of FIG. 5a, at time tz, which corresponds to the end of the time interval (Tc), the magnitude of the current transmitted from the inductor (Lp) to the capacitor (231) through the diode (Dp) can be reduced to substantially zero. The control circuit of the power factor conversion circuit (e.g., the control circuit (250) of FIG. 3) can measure the current of the inductor (Lp) and / or the diode (Dp) (directly or indirectly). Embodiments are not limited thereto, but the control circuit of the power factor conversion circuit can calculate the magnitude of the current transmitted from the inductor (Lp) to the capacitor (231) using the voltage of the capacitor (231).

[0081] In one embodiment, the control circuit of the power factor conversion circuit (e.g., the control circuit (250) of FIG. 3) may determine the time to activate the switch according to a delay based on the output voltage, instead of activating the switch (immediately) at time tz. Referring to FIG. 5a, the switch may remain deactivated during a time interval (Td) (e.g., a second sub-time interval) after time tz. The length of the time interval (Td) may correspond to a delay determined based on the output voltage (e.g., the voltage (Vo1) of the capacitor (231) of FIG. 3) and / or the voltage of the power signal transmitted to the load circuit (e.g., the voltage (Vo2) of FIG. 3).

[0082] During the time interval (Td), with reference to line (520), since no current flows through the diode (Dp), the circuit can be isolated with respect to the diode (Dp). For example, during the time interval (Td), the charging of the capacitor (231) based on the inductor (Lp) of FIG. 3 can be stopped. During the time interval (Td), with reference to line (510), the voltage of the switch can oscillate. The oscillation can be caused by resonance occurring in the power factor conversion circuit. Resonance can occur between the diode (Dp), the parasitic capacitances of the switch, and the inductor (Lp) after the current of the diode (Dp) is reduced to zero. The control circuit of the power factor conversion circuit can control the switch according to a delay based on the resonance. For example, after the time interval (Td) having a length equal to the delay, the control circuit can activate the switch.

[0083] In the time interval (Td), with reference to line (510), the voltage of the switching transistor (Qp) can oscillate according to the decreasing amplitude. The period Tr of the voltage of the transistor (Qp) oscillating can be determined based on Equation 1.

[0084]

[0085] fr in Equation 1 may be the frequency of resonance (e.g., resonance frequency) occurring in the power factor conversion circuit within the time interval (Td). Period Tr may be referred to as the resonance period. Lp in Equation 1 may be the inductance of the inductor (Lp). Cp in Equation 1 may be the sum of parasitic capacitances associated with resonance occurring in the power factor conversion circuit within the time interval (Td). As described below with reference to FIG. 6, period Tr may be determined based on the inductor (Lp), diode (Dp), and transistor (Qp) included in the power factor conversion circuit.

[0086] Referring to FIG. 5a, within a time interval (Td), as the voltage of the transistor (Qp) changes periodically based on the period Tr, the voltage of the transistor (Qp) may have minimum values ​​(a, b, c). For example, within the time interval (Td), at time tz, which is the start time of the time interval (Td), the voltage of the transistor (Qp) may have a maximum value. At a time when 0.5 × Tr has elapsed since time tz, the voltage of the transistor (Qp) may have a first minimum value (a). At a time when period Tr has elapsed since time tz, the voltage of the transistor (Qp) may have a first maximum value. At a time when 1.5 × Tr has elapsed since time tz, the voltage of the transistor (Qp) may have a second minimum value (b). At a time when 2 × Tr has elapsed since time tz, the voltage of the transistor (Qp) may have a second maximum value. At a time point 2.5 × Tr elapsed after time point tz, the voltage of the transistor (Qp) may have a third minimum value (c). Since the voltage of the transistor (Qp) oscillates according to the amplitude of the decrease, among the minimum values ​​(a, b, c), the first minimum value (a) may correspond to the minimum voltage of the transistor (Qp) within the time interval (Td).

[0087] Referring to the example described above, within the time interval (Td), the minimum value of the transistor (Qp) can occur repeatedly at a time point delayed by delta(k) of Equation 2 from the time point tz of the time interval (Td).

[0088]

[0089] k in Equation 2 may be an integer greater than or equal to 0. Tr in Equation 2 may be Tr in Equation 1, that is, the resonance period generated in the power factor conversion circuit during the time interval (Td). According to one embodiment, the control circuit of the power factor conversion circuit may activate the transistor (Qp) at a point in time after the time interval (Td) after the time tz, where the voltage of the transistor (Qp) becomes minimum (e.g., time tz + delta(0)). In other words, since the voltage of the transistor (Qp) has a first minimum value (a) at a time when 0.5 × Tr has elapsed after the time tz, the control circuit of the power factor conversion circuit may omit activating the transistor (Qp) at a time when 0.5 × Tr has elapsed after the time tz (e.g., bottom skip). The control circuit (250) of FIG. 3 can activate the transistor (Qp) using a delay at time tz, when the current of the diode (Dp) is reduced below a threshold current, and at time tz + delta (0), when the voltage of the switching transistor (Qp) is minimized. Referring to FIG. 3, the electrical connection between the inductor (Lp) and the capacitor (231) can be released based on the activation of the transistor (Qp).

[0090] In one embodiment, at time tz + delta(k), determined based on a natural number k, the control circuit of the power factor conversion circuit can activate the transistor (Qp). For example, delta(k) may be a delay used to activate the transistor (Qp). Referring to FIG. 5a, within the first state (501), the control circuit of the power factor conversion circuit can activate the transistor (Qp) at time tz + delta(2) (e.g., delta(2) = 2.5 × Tr according to Equation 2) based on k = 2. For example, the length of the time interval (Td) may correspond to delta(2) = 2.5 × Tr. The time interval (Ton2) after the time interval (Td) may have the same length as the time interval (Ton1). The operation of the power factor conversion circuit in the time interval (Ton2) may be similar to the operation of the power factor conversion circuit described with reference to the time interval (Ton1). The operation of the power factor conversion circuit in the time interval (Toff2) after the time interval (Ton2) may be similar to the operation of the power factor conversion circuit described with reference to the time interval (Toff1).

[0091] As described above, the control circuit of the power factor conversion circuit can activate the transistor (Qp) when the voltage of the transistor (Qp) corresponds to a minimum value (e.g., a minimum value different from the minimum value) within a time interval (Td). Since the transistor (Qp) is activated when the voltage of the transistor (Qp) corresponds to a minimum value, the switching loss in the transistor (Qp) (e.g., P = Vds × I) can be reduced.

[0092] The control circuit of the power factor conversion circuit can determine a delay after time point tz using k determined from among natural numbers. The said k may have a positive correlation with the output voltage of the power factor conversion circuit. For example, as the output voltage of the power factor conversion circuit increases, k may increase. The control circuit of the power factor conversion circuit may increase k based on identifying an increase in the output voltage of the power factor conversion circuit (e.g., the voltage (Vo1) of the capacitor (231) in FIG. 3). The delta(k) calculated based on the increased k may be determined as the delay for activating the transistor (Qp). For example, the delay may be the value obtained by multiplying the resonance period (e.g., Tr in Equation 1 and / or Equation 2), based on the combination of the inductance of the inductor (e.g., Lp in Equation 1) and parasitic capacitances (e.g., Cp in Equation 1), by (2k + 1) / 2 for a natural number k. Since the output voltage of the power factor conversion circuit may be increased based on the request of the load circuit, the delay may be increased based on said request.

[0093] Referring to FIG. 5a, in a first state (501) of a power factor conversion circuit providing a first magnitude output voltage, the transistor (Qp) can be activated using a delay based on k = 2. When the output voltage of the power factor conversion circuit changes, k used to determine the delay can be changed. When the voltage of the power signal transmitted to the load circuit (e.g., voltage (Vo2) in FIG. 2) changes, k used to determine the delay can be changed. Referring to FIG. 5b, a second state (502) of a power factor conversion circuit providing a second magnitude output voltage less than the first magnitude is shown. Within a time interval (Ton1), the power factor conversion circuit can activate the transistor (Qp) to disconnect the electrical connection between the capacitor (231) and the inductor (Lp). Within a time interval (Ton1), the inductor (Lp) can be charged by a rectified AC signal.

[0094] Referring to FIG. 5b, within a time interval (Toff1) following a time interval (Ton1), the power factor conversion circuit can charge the capacitor (231) by establishing an electrical connection between the capacitor (231) and the inductor (Lp). The time interval (Toff1) may include a first sub-time interval (e.g., time interval (Tc)) in which current is transmitted from the inductor (Lp) to the capacitor (231) through the electrical connection, and a second sub-time interval (e.g., time interval (Td)) based on resonance occurring in the power factor conversion circuit after the first sub-time interval. The second sub-time interval may have a length of (2k + 1) / 2 times the resonance period of the resonance occurring after the first sub-time for a natural number k.

[0095] Referring to FIG. 5b, based on identifying the current of the diode (Dp) reduced below a threshold current at time tz, the power circuit of the power factor conversion circuit can control the transistor (Qp), which is a switch, so that an electrical connection (e.g., an electrical connection between the capacitor (231) and the inductor (Lp)) established within the time interval (Toff1) is released according to a delay based on the voltage of the capacitor (231) (e.g., the output voltage of the power factor conversion circuit). For example, in a second state (502) in which the voltage of the capacitor (231) is determined to be a second size less than the first size of the first state (501) of FIG. 5a, the power factor conversion circuit can determine the delay using k, which is smaller than k = 2 used in the first state (501). For example, based on the voltage of the power signal transmitted to the load circuit identified at time tz (e.g., voltage (Vo2) in FIG. 2), the power factor conversion circuit can determine k. For example, if the voltage of the power signal transmitted to the load circuit in the second state (502) is less than the first voltage of the first state (501), the power factor conversion circuit can determine the delay using k that is smaller than k = 2 used in the first state (501).

[0096] For example, within a second state (502) determined to be k = 1, the control circuit of the power factor conversion circuit can activate the transistor (Qp) at a time when 1.5 × Tr has elapsed since time tz. At the time when the transistor (Qp) is activated, the potential difference between the drain electrode and the source electrode of the transistor (Qp) has a minimum value (a second minimum value (b) within the second state (502) of FIG. 5b), so the switching loss in the transistor (Qp) can be reduced. Since the time when the transistor (Qp) is activated is delayed, a rapid increase in the switching frequency can be prevented, and the rate of increase in switching loss due to the increase in switching frequency can be reduced. As the rate of increase in switching loss of the power factor conversion circuit is reduced, the output voltage of the power factor conversion circuit can be increased. Because the conversion efficiency of the DC-DC conversion circuit is increased based on the increased output voltage, the power efficiency of the power circuit (and the electronic device including the power circuit) including the DC-DC conversion circuit and the power factor conversion circuit can be improved.

[0097] Although exemplary operation of a control circuit (e.g., control circuit (250) of FIG. 3) for determining the delay to be used to activate the transistor (Qp) based on Equations 1 and 2 has been described, the embodiments are not limited thereto. For example, the control circuit may measure the voltage between the drain electrode and the source electrode of the transistor (Qp) (e.g., the voltage indicated by line (510)) (e.g., the rate of change of said voltage) to (directly) identify the point in time when said voltage has a minimum value. Using the identified point in time, the control circuit may activate the transistor (Qp). For example, the control circuit (250) of FIG. 3 may receive a signal to change k in Equation 2 directly from the load circuit through the optical coupler (292). Using k adjusted based on the received signal, the control circuit (250) may determine the point in time when the transistor (Qp) is activated.

[0098] Hereinafter, with reference to FIG. 6, the states of the power factor conversion circuit in each of the time intervals (Ton1, Tc, Td) of FIG. 5a and / or FIG. 5b are described based on the equivalent circuit diagram.

[0099] FIG. 6 illustrates equivalent circuit diagrams (601, 602, 603) for each of the different states of the power factor conversion circuit (230), distinguished by whether or not the switch is activated. The power factor conversion circuit (230) of FIG. 2 and / or FIG. 3 may correspond to the power factor conversion circuit (230) of FIG. 6. The power factor conversion circuit (230) of FIG. 6 may perform the operation of the power factor conversion circuit described with reference to FIG. 1 through 4, FIG. 5a and / or FIG. 5b. In FIG. 6, the reference numeral of FIG. 3 may be used to describe elements such as elements of FIG. 3.

[0100] Referring to FIG. 6, as equivalent circuit diagrams of a power factor conversion circuit (230) included in a power circuit (170), a first equivalent circuit diagram (601) corresponding to a state in which the transistor (Qp) is activated by the control circuit (250), a second equivalent circuit diagram (602) included in a state in which the transistor (Qp) is deactivated by the control circuit (250), and a third equivalent circuit diagram (603) are shown.

[0101] The first equivalent circuit diagram (601) of FIG. 6 may correspond to a power factor conversion circuit (230) in time intervals (Ton1, Ton2) of FIG. 4 having a length of tg, FIG. 5a and FIG. 5b. As the transistor (Qp) is activated, the other end of the inductor (Lp) (e.g., node (310)) may be connected to the ground node. Since the inductor (Lp) is connected to the ground node through the transistor (Qp), the transistor (Qp) may be electrically disconnected from the capacitor (231). Referring to the first equivalent circuit diagram (601), while the transistor (Qp) is activated, the inductor (Lp) may be charged by a rectified AC signal transmitted through the node (Vr). The current (Il) of the inductor (Lp) may be gradually increased based on the charging of the inductor (Lp). Referring to the first equivalent circuit diagram (601), the capacitor (231) can be discharged by a load circuit connected to the capacitor (231). For example, while the inductor (Lp) is being charged, the capacitor (231) can be discharged at least temporarily.

[0102] The second equivalent circuit diagram (602) of FIG. 6 may correspond to the time intervals (Tc) of FIG. 5a and FIG. 5b. Immediately after the transistor (Qp) is deactivated, the other end of the inductor (Lp) (e.g., node (310)) may be connected to the capacitor (231). The current (Il) of the inductor (Lp) may be transmitted to the capacitor (231) through the node (310). Referring to the second equivalent circuit diagram (602), the capacitor (231) may be charged based on the current (Il). When a load circuit is connected, the current (Il) may be used to charge the capacitor (231) and / or drive the load circuit. As the capacitor (231) is charged based on the current (Il), the voltage (Vo1) of the capacitor (231) may be increased and the current (Il) may be decreased.

[0103] The third equivalent circuit diagram (603) of FIG. 6 may correspond to the time intervals (Td) of FIG. 5a and FIG. 5b. After the transistor (Qp) is deactivated, when the current (Il) of the inductor (Lp) is reduced to zero or the voltage of the capacitor (231) is increased above the voltage of the node (310), the equivalent circuit of the power factor conversion circuit (230) may be changed from the second equivalent circuit diagram (602) to the third equivalent circuit diagram (603). Referring to the third equivalent circuit diagram (603), while the current of the diode (Dp) is maintained at zero, the capacitor (231) may be electrically disconnected from the inductor (Lp) and / or the node (310).

[0104] Referring to the third equivalent circuit diagram (603), while the transistor (Qp) is deactivated and the current of the diode (Dp) is zero, a resonant circuit based on the inductor (Lp) and the parasitic capacitor (630) can be formed within the power factor conversion circuit (230). The parasitic capacitance (Cp) of the parasitic capacitor (630) may be a combination of the parasitic capacitance of the transistor (Qp) (e.g., the capacitance of the parasitic capacitor formed between the drain electrode and the source electrode) and the parasitic capacitance of the diode (Dp) (e.g., the capacitance of the parasitic capacitor formed between the anode and the cathode of the diode (Dp)). The series connection of the inductor (Lp) and the parasitic capacitor (630) formed between the node (Vr) and the ground node can be interpreted based on an LC resonant circuit. The resonance period Tr of mathematical formula 1 and / or mathematical formula 2 can correspond to the resonance period of the third equivalent circuit diagram (603).

[0105] FIG. 7 shows graphs (710, 720) representing the relationship between the output voltage of a power factor conversion circuit (e.g., the power factor conversion circuit (230) of FIG. 1 and / or FIG. 2) and the frequency of a switch included in the power factor conversion circuit.

[0106] Referring to FIG. 7, a graph (710) corresponding to a first power circuit that does not include the power factor conversion circuit (230) and control circuit (250) described with reference to FIGS. 1 through 6, and a graph (720) corresponding to a second power circuit that includes the power factor conversion circuit (230) and control circuit (250) described with reference to FIGS. 1 through 6 are shown. Line (711) of graph (710) indicates the switching frequency of the power factor conversion circuit when the power factor conversion circuit of the first power circuit is controlled to charge a capacitor (e.g., capacitor (231) of FIG. 3) with a first voltage (e.g., about 370 V). Line (712) of graph (710) indicates the switching frequency of the power factor conversion circuit when the power factor conversion circuit of the first power circuit is controlled to charge the capacitor with a second voltage (e.g., about 420 V) that exceeds the first voltage. Line (713) of the graph (710) indicates the length of the time interval during which the switch in the power factor conversion circuit of the first power circuit is activated. Line (714) of the graph (710) indicates the voltage within the first period of the rectified AC signal. Lines (715, 716) of the graph (710) indicate the length of the time interval during which the switch of the power factor conversion circuit, controlled based on the first voltage and the second voltage respectively, is deactivated.

[0107] Line (721) of graph (720) indicates the switching frequency of the power factor conversion circuit when the power factor conversion circuit of the second power circuit is controlled to charge the capacitor (e.g., capacitor (231) of FIG. 3) with a first voltage (e.g., about 370 V). Line (722) of graph (720) indicates the switching frequency of the power factor conversion circuit when the power factor conversion circuit of the second power circuit is controlled to charge the capacitor with a second voltage (e.g., about 420 V) that exceeds the first voltage. Line (723) of graph (720) indicates the length of the time interval during which the switch in the power factor conversion circuit of the second power circuit is activated. Line (724) of graph (720) indicates the voltage within the first period of the rectified AC signal. The lines (725, 716) of the graph (720) represent the length of the time interval during which the switch of the power factor conversion circuit, controlled based on the first voltage and the second voltage respectively, is deactivated.

[0108] Referring to lines (711, 712) of graph (710), the switching frequency of the power factor conversion circuit of the first power circuit can be increased to charge the capacitor based on the increased output voltage. Referring to lines (721, 722) of graph (710), the switching frequency of the power factor conversion circuit of the second power circuit can be increased to a lesser extent than the increase in the switching frequency of the power factor conversion circuit of the first power circuit to charge the capacitor based on the increased output voltage. Since the power factor conversion circuit of the second power circuit makes the voltage of the capacitor the second voltage at a lower switching frequency, the power factor conversion circuit of the second power circuit may have less switching loss than the power factor conversion circuit of the first power circuit.

[0109] Hereinafter, with reference to FIG. 8, the operation of a power factor conversion circuit and a control circuit of the power factor conversion circuit according to one embodiment is described.

[0110] FIG. 8 illustrates an exemplary block diagram of the operation of a control circuit (e.g., control circuit (250) of FIG. 2 and / or FIG. 3) included in a power factor conversion circuit (e.g., power factor conversion circuit (230) of FIG. 2 and / or FIG. 3). The operation of FIG. 8 may be performed by the control circuit (250) of FIG. 2 and / or FIG. 3. The order in which the operations of FIG. 8 are performed may differ from the order shown in FIG. 8. For example, the operations of FIG. 8 may be performed in an order different from the order shown in FIG. 8. For example, at least two of the operations of FIG. 8 may be performed substantially simultaneously.

[0111] Referring to FIG. 8, in operation (810), according to one embodiment, the control circuit can charge an inductor (e.g., inductor (Lp) of FIG. 3) in the power factor conversion circuit using an AC signal rectified by a rectifier circuit (e.g., rectifier circuit (220) of FIG. 2). The control circuit can change the state of a switch (e.g., transistor (Qp) of FIG. 3) in the power factor conversion circuit to a first state to disconnect the electrical connection between the inductor and the capacitor (e.g., capacitor (231) of FIG. 3). Based on changing the state of the switch to the first state, the control circuit can maintain the state of the switch in the first state for a time interval (e.g., time intervals (Ton1, Ton2) of FIG. 5a and / or FIG. 5b) having a length based on CrM (e.g., a specified length tg of FIG. 4). Based on the expiration of the above time interval, the control circuit may change the state of the switch from the first state to a second state for establishing the electrical connection. Based on the operation (810), the inductor may be charged for a specified length of time interval. Based on the operation (810), the control circuit may activate the switch to establish an electrical connection between the inductor and the ground node.

[0112] Referring to FIG. 8, in operation (820), according to one embodiment, the control circuit may connect an inductor to a capacitor (e.g., capacitor (231) of FIG. 2) to charge the capacitor connected to the power factor conversion circuit. The control circuit may disable a switch within the power factor conversion circuit that is activated to establish an electrical connection between the inductor and the ground node.

[0113] Referring to FIG. 8, in operation (830), according to one embodiment, the control circuit can identify the current transmitted from the inductor to the capacitor. The current in operation (830) may be related to the current of the diode (Dp) in FIG. 3. Based on operation (820), while the inductor in the power factor conversion circuit is connected to the capacitor, the control circuit can identify the current transmitted from the inductor to the capacitor.

[0114] Referring to FIG. 8, within operation (840), according to one embodiment, the control circuit can identify whether the current identified based on operation (830) is reduced to a threshold current or lower. While the current of operation (830) exceeds (or is greater than) the threshold current (840-No), the control circuit can monitor the current based on operation (830). While the current of operation (830) exceeds the threshold current, the control circuit can maintain the electrical connection between the inductor and the capacitor based on operation (820). If the current of operation (830) is lower than (or less than) the threshold current (840-Yes), the control circuit can perform operation (850).

[0115] Referring to FIG. 8, in operation (850), according to one embodiment, the control circuit may disconnect the electrical connection between the inductor and the capacitor using a delay based on the voltage of the capacitor. In one embodiment, the control circuit may control or disconnect the electrical connection between the inductor and the capacitor using a delay based on the voltage of a power signal (e.g., voltage (Vo2) in FIG. 2) transmitted to a load circuit (e.g., main circuit (180) in FIG. 2) connected to a power circuit including a power factor conversion circuit. For example, the delay may increase as the voltage of the power signal transmitted to the load circuit increases. Based on identifying a current that is below the threshold current of operation (830), the control circuit may disconnect the electrical connection between the inductor and the capacitor according to the delay based on the voltage of the capacitor. For example, after a first point in time when the current identified based on the operation (830) is reduced to below the threshold current, at a second point in time delayed by the delay of the operation (850), the control circuit may disconnect the electrical connection of the operation (850). To disconnect the electrical connection of the operation (850), the control circuit may reactivate the switch that was disabled based on the operation (820) according to the delay.

[0116] For example, after a first point in time when the current identified based on operation (830) is reduced below a threshold current, the control circuit may disconnect the electrical connection between the inductor and the capacitor based on the resonance period of the resonance occurring in the power factor conversion circuit including the inductor (e.g., Tr of Equation 1 and / or Equation 2). For example, the delay of operation (850) may correspond to delta(k) of Equation 2. Based on the electrical connection being disconnected based on operation (830), the inductor and the capacitor may be electrically isolated. After the electrical connection of operation (830) is disconnected, the inductor may be charged based on operation (810). Operations (820, 830, 840, 850) may be performed within the time intervals (Toff1, Toff2) of FIG. 5a and / or FIG. 5b. Operations (830, 840) may be performed within the time intervals (Tc) of FIG. 5a and / or FIG. 5b. Operation (850) may be performed within the time interval (Td) of FIG. 5a and / or FIG. 5b. For example, the length of the time interval (Td) of FIG. 5a and / or FIG. 5b may correspond to the delay of operation (850).

[0117] As described above, according to one embodiment, a power factor conversion circuit may be configured to change an output voltage (e.g., the voltage (Vo1) of the capacitor (231) in FIG. 3) based on a DC-DC conversion circuit and / or a load circuit. When changing the output voltage, the power factor conversion circuit may change the switching condition of a switch included in the power factor conversion circuit based on the output voltage. For example, the switching condition may include a condition in which the switch changes from an inactive state to an active state (e.g., a state in which an inductor and a ground node are connected to charge an inductor within the power factor conversion circuit). The condition for changing the switch to an active state may be related to a delay based on the resonance period of the resonance occurring in the power factor conversion circuit. For example, the switch may change from an inactive state to an active state at a point in time after a delay having a positive correlation with the output voltage from the point in time when the charging of the capacitor based on the power factor conversion circuit is completed. The delay may be longer than the resonance period.

[0118] In one embodiment, a method to reduce switching losses of a power factor conversion circuit may be required. In one embodiment, when increasing the switching frequency of a power factor conversion circuit to increase the output voltage of the power factor conversion circuit, a method to increase the output voltage to a target output voltage while increasing the switching frequency by a small amount may be required. In one embodiment, a method to reduce switching losses of a power factor conversion circuit by utilizing resonance generated in the power factor conversion circuit may be required. An electronic device (e.g., electronic device (101) of FIG. 1) according to one embodiment as described above may include a rectifier circuit (e.g., rectifier circuit (220) of FIG. 2) configured to rectify an AC signal, a capacitor (e.g., capacitor (231) of FIG. 2), and a power factor conversion circuit (e.g., power factor conversion circuit (230) of FIG. 2) configured to control the charging of the capacitor using the AC signal rectified by the rectifier circuit based on the power factor. The power factor conversion circuit may include an inductor configured to generate a current for charging the capacitor based on the rectified AC signal (e.g., inductor (Lp) of FIG. 3), a switch configured to change the electrical connection of the inductor (e.g., transistor (Qp) of FIG. 3), and a control circuit configured to control the switch (e.g., control circuit (250) of FIG. 2 and / or FIG. 3). The control circuit may be configured to identify the current generated in the inductor while the electrical connection between the inductor and the capacitor is established based on the switch. The control circuit may be configured to control the switch so that the electrical connection is released according to a delay based on the voltage of the capacitor, based on identifying the current which is below a threshold current. In one embodiment, the switching loss of the power factor conversion circuit may be reduced based on the control of the switch according to the delay.In one embodiment, when the output voltage of the power factor conversion circuit (e.g., the voltage of the capacitor) is increased, the switching frequency of the power factor conversion circuit may be increased (relatively) less based on the delay.

[0119] For example, the above delay can be increased based on the voltage, which is increased by a load circuit driven based on the power charged in the capacitor.

[0120] For example, the electronic device may further include a DC-DC conversion circuit configured to generate a power signal having a DC voltage required for driving the load circuit by using the power charged in the capacitor.

[0121] For example, the inductor may include one end connected to the rectifier circuit. The switch may include a transistor comprising a drain electrode connected to the other end of the inductor, a source electrode connected to a ground node, and a gate electrode connected to the control circuit.

[0122] For example, the power factor conversion circuit may include a diode comprising an anode connected to the other end of the inductor and a cathode connected to one end of the capacitor.

[0123] For example, the control circuit may be configured to control the switch according to the delay based on the resonance occurring between the inductor and the parasitic capacitances of the diode and the transistor after the current has been reduced to below the threshold current. In one embodiment, since the switch is controlled using the resonance occurring in the power factor conversion circuit, the switching loss of the power factor conversion circuit may be reduced.

[0124] For example, the above delay may be determined by multiplying the resonance period, which is based on the combination of the inductance of the inductor and the parasitic capacitances, by (2k+1) / 2 for a natural number k. The parasitic capacitances may include a first parasitic capacitance between the anode and cathode of the diode, and a second parasitic capacitance between the drain electrode and the source electrode of the transistor.

[0125] For example, the control circuit may be configured to increase k based on identifying an increase in the voltage of the capacitor.

[0126] For example, the control circuit may be configured to control the switch using the delay so that the electrical connection is released at a third point in time after a first point in time when the current reduced to below the threshold current is identified and a second point in time when the voltage of the switch is minimized.

[0127] For example, the control circuit may be configured to maintain the state of the switch in the first state for a time interval having a length based on a critical conduction mode (CRM), based on changing the state of the switch to a first state for releasing the electrical connection. The control circuit may be configured to change the state of the switch from the first state to a second state for establishing the electrical connection, based on the expiration of the time interval.

[0128] In one embodiment as described above, a method of a power circuit comprising a rectifier circuit and a power factor conversion circuit may be provided. The method may include an operation of charging an inductor in the power factor conversion circuit using an alternating current signal rectified by the rectifier circuit. The method may include an operation of connecting the charged inductor to the capacitor in order to charge the capacitor connected to the power factor conversion circuit. The method may include an operation of identifying a current transmitted from the inductor to the capacitor while the inductor is connected to the capacitor. The method may include an operation of releasing the electrical connection between the inductor and the capacitor according to a delay based on the voltage of the capacitor, based on identifying the current that is below a threshold current.

[0129] For example, the operation of charging the inductor may include the operation of charging the inductor for a specified length of time interval.

[0130] For example, the above-mentioned release operation may include releasing the electrical connection at a second time point delayed by the above delay after a first time point in which the current is reduced to below the threshold current.

[0131] For example, the above-mentioned release operation may include an operation to release the electrical connection based on the resonance period of the resonance occurring in the inductor and other circuits of the power factor conversion circuit after the first point in time.

[0132] For example, the charging operation may include the operation of activating a switch to establish an electrical connection between the inductor and the ground node.

[0133] For example, the above connecting operation may include an operation to disable the switch.

[0134] For example, the above-mentioned release operation may include the operation of activating the above-mentioned deactivated switch according to the above-mentioned delay.

[0135] A power circuit of an electronic device according to one embodiment as described above may include a rectifier circuit configured to rectify an AC signal, a capacitor, and a power factor conversion circuit configured to control the charging of a capacitor based on a power factor using an inductor configured to receive the AC signal rectified by the rectifier circuit. The power factor conversion circuit may be configured to charge the inductor, which is electrically disconnected from the capacitor within a first time interval, using the rectified AC signal. The power factor conversion circuit may be configured to charge the capacitor by establishing an electrical connection between the capacitor and the inductor within a second time interval after the first time interval. The second time interval may include a first sub-time interval in which current is transmitted from the inductor to the capacitor through the electrical connection, and a second sub-time interval based on resonance occurring in the power factor conversion circuit after the first sub-time interval.

[0136] For example, the second sub-time interval may have a length of (2k+1) / 2 times the resonance period of the resonance occurring in the power factor conversion circuit after the first sub-time interval, for a natural number k.

[0137] For example, the power factor conversion circuit may include a diode including an anode connected to the other end of the inductor, which includes one end connected to the rectifier circuit, and a cathode connected to one end of the capacitor, and a transistor including a drain electrode connected to the anode of the diode and a source electrode connected to a ground node.

[0138] As used herein, the term “if” will be understood, depending on the context, to mean “when, upon,” “in response to a decision,” or “in response to a detection.” Similarly, “when decided to,” or “when [the mentioned condition or event] is detected,” will be understood, optionally, to mean “when decided,” or “in response to a decision,” “when [the mentioned condition or event] is detected,” or “in response to detecting [the mentioned condition or event].”

[0139] The device described above may be implemented as a hardware component, a software component, and / or a combination of a hardware component and a software component. For example, the device and components described in the embodiments may be implemented using one or more general-purpose or special-purpose computers, such as a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. The processing unit may execute an operating system (OS) and one or more software applications executed on said operating system. Additionally, the processing unit may access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing unit may be described as being used as a single unit, but those skilled in the art will understand that the processing unit may include multiple processing elements and / or multiple types of processing elements. For example, the processing unit may include multiple processors or one processor and one controller. In addition, other processing configurations, such as parallel processors, are also possible.

[0140] Software may include computer programs, code, instructions, or a combination of one or more of these, and may configure a processing unit to operate as desired or instruct the processing unit independently or collectively. Software and / or data may be embodied in any type of machine, component, physical device, computer storage medium, or device so as to be interpreted by the processing unit or to provide instructions or data to the processing unit. Software may be distributed over networked computer systems and may be stored or executed in a distributed manner. Software and data may be stored on one or more computer-readable recording media.

[0141] The method according to the embodiment may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer-readable medium. In this case, the medium may continuously store a program executable by a computer, or temporarily store it for execution or download. Additionally, the medium may be various recording or storage means in the form of a single or several hardware combined, and may not be limited to a medium directly connected to a computer system but may exist distributed over a network. Examples of media may include magnetic media such as hard disks, floppy disks, and magnetic tapes; optical recording media such as CD-ROMs and DVDs; magneto-optical media such as floptical disks; and media configured to store program instructions, including ROM, RAM, and flash memory. Additionally, other examples of media may include recording or storage media managed by app stores that distribute applications or sites and servers that supply or distribute various other software.

[0142] Although the embodiments have been described above with reference to limited examples and drawings, those skilled in the art can make various modifications and variations from the description above. For example, suitable results can be achieved even if the described techniques are performed in a different order than described, and / or the components of the described system, structure, device, circuit, etc. are combined or assembled in a form different from described, or replaced or substituted by other components or equivalents.

[0143] Therefore, other implementations, other embodiments, and equivalents to the claims also fall within the scope of the claims set forth below.

Claims

1. In an electronic device, Rectifier circuit configured to rectify AC signals; capacitor; and It includes a power factor conversion circuit configured to control the charging of the capacitor using the AC signal rectified by the above rectification circuit based on the power factor, and The above power factor conversion circuit is, An inductor configured to generate a current for charging the capacitor based on the rectified AC signal; A switch configured to change the electrical connection of the above inductor; and It includes a control circuit configured to control the above switch, and The above control circuit is, Identify the current generated in the inductor while the electrical connection between the inductor and the capacitor is established based on the switch; Based on identifying the current that is below a threshold current, the switch is configured to be controlled such that the electrical connection is released according to a delay based on the voltage of the capacitor. Electronic device.

2. In claim 1, the delay is, Increased based on the voltage, which is increased by a load circuit driven based on the power charged in the capacitor, Electronic device.

3. In Claim 2, A DC-DC conversion circuit further comprising, using the power charged in the capacitor, a power signal having a DC voltage required for driving the load circuit, wherein Electronic device.

4. In claim 1, the inductor is, It includes one end connected to the above rectification circuit, The above switch is, A transistor comprising a drain electrode connected to the other end of the inductor, a source electrode connected to a ground node, and a gate electrode connected to the control circuit. Electronic device.

5. In claim 4, the power factor conversion circuit is, A diode comprising an anode connected to the other end of the inductor and a cathode connected to one end of the capacitor, Electronic device.

6. In claim 5, the control circuit is, Configured to control the switch according to the delay based on the resonance occurring between the parasitic capacitances of the diode and the transistor and the inductor after the current has decreased below the threshold current. Electronic device.

7. In claim 6, the delay is, The resonance period based on the combination of the inductance of the above inductor and the above parasitic capacitances is determined by multiplying the natural number k by (2k+1) / 2, and The above parasitic capacitances are, A first parasitic capacitance between the anode and cathode of the diode, and a second parasitic capacitance between the drain electrode and the source electrode of the transistor, Electronic device.

8. In claim 7, the control circuit is, Based on identifying the increase in the voltage of the capacitor, configured to increase k, Electronic device.

9. In claim 1, the control circuit is, The switch is configured to be controlled using the above delay such that the electrical connection is released at a third point in time after a first point in time when the current reduced to below the threshold current is identified and a second point in time when the voltage of the switch is minimized. Electronic device.

10. In claim 1, the control circuit is, Based on changing the state of the switch to a first state for releasing the electrical connection, the state of the switch is maintained in the first state during a time interval having a length based on a critical conduction mode (CRM); and Based on the expiration of the above time interval, configured to change the state of the switch from the first state to a second state for establishing the electrical connection. Electronic device.

11. A method of a power circuit including a rectifier circuit and a power factor conversion circuit, An operation of charging an inductor in the power factor conversion circuit using an AC signal rectified by the above rectifier circuit; The operation of connecting the charged inductor to the capacitor in order to charge the capacitor connected to the power factor conversion circuit; An operation to identify the current transmitted from the inductor to the capacitor while the inductor is connected to the capacitor; and Based on identifying the current that is below a threshold current, the operation of releasing the electrical connection between the inductor and the capacitor according to a delay based on the voltage of the capacitor, method.

12. In claim 11, the operation of charging the inductor is, The operation of charging the inductor during a time interval of a specified length, method.

13. In claim 11, the releasing operation is, The operation of releasing the electrical connection at a second time point delayed by the delay amount after a first time point in which the current is reduced to below the threshold current, method.

14. In claim 13, the releasing operation is, After the first point in time above, the operation of releasing the electrical connection based on the resonance period of the resonance occurring in the inductor and other circuits of the power factor conversion circuit, method.

15. In claim 11, the charging operation is, A method comprising the operation of activating a switch to establish an electrical connection between the inductor and the ground node. method.

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