Display device, electronic apparatus comprising same, and display device manufacturing method

Abstract

One embodiment of the present invention relates to a display device comprising a plurality of first island parts and a plurality of first bridge parts connecting the plurality of first island parts to each other. The display device comprises: a substrate including a base layer overlapping each of the plurality of first island parts and the plurality of first bridge parts; a first mask layer disposed on the base layer to overlap the plurality of first island parts; a pixel circuit layer disposed on the first mask layer; a wiring layer disposed on the base layer overlapping the plurality of first bridge parts; and a light-emitting element disposed on the pixel circuit layer.

Description

Display device, electronic device including the same, and method of manufacturing a display device

[0001] Embodiments of the present invention relate to a display device, such as a flexible display device.

[0002] As display devices that visually display electrical signals advance, various display devices with excellent characteristics such as thinness, lightness, and low power consumption are being introduced. For example, flexible display devices that can be folded or rolled into a roll shape are being introduced. Recently, research and development on display devices of various structures, such as stretchable display devices that can change into various shapes, is actively underway.

[0003] Embodiments of the present invention provide a display device, such as a flexible display device.

[0004] One embodiment of the present invention discloses a display device comprising a plurality of first island portions and a plurality of first bridge portions connecting the plurality of first island portions to each other, wherein the display device comprises: a substrate having a base layer that overlaps with each of the plurality of first island portions and the plurality of first bridge portions; a first mask layer disposed on the base layer to overlap with the plurality of first island portions; a pixel circuit layer disposed on the first mask layer; a wiring layer disposed on the base layer that overlaps with the plurality of first bridge portions; and a light-emitting element disposed on the pixel circuit layer.

[0005] In one embodiment, the substrate may further include a barrier layer disposed on the first mask layer.

[0006] In one embodiment, the width of the first mask layer may be wider than the width of the pixel circuit layer.

[0007] In one embodiment, a second mask layer disposed on the base layer to overlap with the plurality of first bridge portions may be further included.

[0008] In one embodiment, the first mask layer and the second mask layer may be disposed on the same layer.

[0009] In one embodiment, the first mask layer and the second mask layer may contain the same material.

[0010] In one embodiment, the width of the second mask layer may be wider than the width of the wiring layer.

[0011] In one embodiment of the present invention, a display device comprising a plurality of first island portions and a plurality of first bridge portions connecting the plurality of first island portions to each other comprises: a substrate; a pixel circuit layer disposed on the substrate to overlap the plurality of first island portions; a wiring layer disposed on the substrate to overlap the plurality of first bridge portions; and a light-emitting element disposed on the pixel circuit layer; wherein the substrate comprises: a first base layer overlapping the plurality of first island portions; a first barrier layer disposed on the first base layer; a second base layer disposed on the first barrier layer; and a second barrier layer disposed on the second base layer; wherein the first barrier layer and the second barrier layer surround the second base layer.

[0012] In one embodiment, the first barrier layer may include: a first-1 barrier portion supporting the lower surface of the second base layer; and a first-2 barrier portion extending from the first-1 barrier portion toward the second barrier layer and surrounding the second base layer.

[0013] In one embodiment, the first and second barrier portions and the second barrier layer may come into contact with each other.

[0014] In one embodiment, the second base layer may be accommodated in the first- and second barrier portions.

[0015] In one embodiment, the width of the second barrier layer may be wider than the width of the pixel circuit layer.

[0016] In one embodiment of the present invention, an electronic device comprising a flexible display device including a plurality of first island portions and a plurality of first bridge portions connecting the plurality of first island portions to each other is disclosed, wherein the display device comprises: a substrate including a base layer that overlaps with each of the plurality of first island portions and the plurality of first bridge portions; a first mask layer disposed on the base layer to overlap with the plurality of first island portions; a pixel circuit layer disposed on the first mask layer; a wiring layer disposed on the base layer that overlaps with the plurality of first bridge portions; and a light-emitting element disposed on the pixel circuit layer.

[0017] In one embodiment of the present invention, a method for manufacturing a display device is disclosed, comprising: a step of placing a base layer on a carrier substrate; a step of placing a first mask layer on the base layer; a step of placing a second mask layer on the base layer so as to be spaced apart from the first mask layer in a cross-sectional view; a step of etching a portion of the base layer that does not overlap with the first mask layer and the second mask layer to form a first-1 opening in the base layer; a step of placing a first sacrificial layer in the first-1 opening; a step of placing a barrier layer on the first mask layer; a step of placing a pixel circuit layer on the barrier layer; a step of placing a wiring layer on the base layer so as to be spaced apart from the pixel circuit layer with a first-2 opening in between in a cross-sectional view; a step of removing the first sacrificial layer; and a step of removing the carrier substrate.

[0018] In one embodiment, the step of etching the portion of the barrier layer that overlaps with the first opening may be further included.

[0019] In one embodiment, the step of placing the pixel circuit layer and the step of placing the wiring layer may be performed simultaneously.

[0020] In one embodiment, the width of the first-1 opening may be narrower than the width of the first-2 opening.

[0021] In one embodiment of the present invention, the method comprises: a step of disposing of a first sacrificial layer comprising a first-1 sacrificial opening and a first-2 sacrificial opening on a carrier substrate; a step of disposing of a first base layer on the first-1 sacrificial opening and the first-2 sacrificial opening; a step of disposing of a first barrier layer on the first sacrificial layer such that at least a portion thereof is disposed on the first-1 sacrificial opening; a step of disposing of a second base layer on the first base layer such that it is disposed on the first-1 sacrificial opening and the first-2 sacrificial opening; a step of disposing of a second barrier layer on the first barrier layer such that it covers the second base layer which overlaps with the first-1 sacrificial opening; a step of disposing of a pixel circuit layer on the second barrier layer such that it overlaps with the first-1 sacrificial opening; a step of disposing of a wiring layer on the second barrier layer such that it overlaps with the first-2 sacrificial opening; and a step of removing the first sacrificial layer. A method for manufacturing a display device is disclosed, comprising the step of removing the carrier substrate.

[0022] In one embodiment, in the step of disposing of the first barrier layer, the first barrier layer may come into contact with the inner surface of the first sacrificial layer forming the first-1 sacrificial opening.

[0023] In one embodiment, in the step of arranging the second barrier layer, the first barrier layer and the second barrier layer are in contact with each other, and the first barrier layer and the second barrier layer may surround the second base layer.

[0024] Other aspects, features, and advantages other than those described above will become clear from the following drawings, claims, and detailed description of the invention.

[0025] According to one embodiment of the present invention, a display device capable of preventing damage caused by stress concentration and capable of stretching in various directions can be provided. These effects are exemplary, and the scope of the present invention is not limited by the aforementioned effects.

[0026] FIG. 1 is a perspective view of a display device schematically showing a display device according to one embodiment of the present invention.

[0027] FIGS. 2A and FIGS. 2B are perspective views of a display device showing the display device of FIG. 1 extended in a first direction.

[0028] FIG. 2c is a perspective view of a display device showing the display device of FIG. 1 extended in a second direction.

[0029] FIG. 2d is a perspective view of a display device showing the display device of FIG. 1 extended in a first direction and a second direction.

[0030] FIG. 2e is a perspective view of a display device showing the display device of FIG. 1 extended in a third direction.

[0031] FIG. 3 is a schematic plan view of a display device according to one embodiment of the present invention.

[0032] FIG. 4a is a plan view of part IV of FIG. 3 as a part of a display device according to one embodiment of the present invention.

[0033] FIG. 4b is a plan view of part IV of FIG. 3 as a part of a display device according to one embodiment of the present invention.

[0034] FIG. 4c is a plan view of the IV portion of FIG. 3 as a part of a display device according to one embodiment of the present invention.

[0035] FIG. 5 is a cross-sectional view schematically showing a first island portion and a first bridge portion disposed in the display area of ​​a display device according to one embodiment of the present invention.

[0036] FIGS. 6a to 6c are equivalent circuit diagrams of subpixels of a display device according to one embodiment of the present invention.

[0037] FIG. 7a is a cross-sectional view schematically showing a light-emitting element of a display device according to one embodiment of the present invention.

[0038] FIG. 7b is a cross-sectional view schematically showing a light-emitting element of a display device according to one embodiment of the present invention.

[0039] FIG. 8a is an enlarged plan view of the first island portion of a display device according to one embodiment of the present invention.

[0040] FIG. 8b is a plan view showing the arrangement of wiring on the first bridge portion of a display device according to one embodiment of the present invention.

[0041] FIGS. 9a and 9b are schematic cross-sectional views of a display device according to one embodiment of the present invention.

[0042] FIG. 10 is a schematic flowchart of a method for manufacturing a display device according to one embodiment of the present invention.

[0043] FIGS. 11a to 11j are schematic cross-sectional views of a display device according to one embodiment of the present invention.

[0044] FIG. 12 is a schematic cross-sectional view of a display device according to one embodiment of the present invention.

[0045] FIG. 13 is a schematic flowchart of a method for manufacturing a display device according to one embodiment of the present invention.

[0046] FIGS. 14a to 14h are schematic cross-sectional views of a display device according to one embodiment of the present invention.

[0047] FIG. 15a is a schematic perspective view of an electronic device including a display device according to one embodiment of the present invention.

[0048] FIG. 15b is a block diagram schematically illustrating an electronic device including a display device according to one embodiment of the present invention.

[0049] FIGS. 16a to 16d are schematic perspective views illustrating embodiments of an electronic device including a display device according to one embodiment of the present invention.

[0050] FIGS. 17a to 17e are each schematic perspective views of an electronic device according to one embodiment of the present invention.

[0051] The present invention is capable of various modifications and may have various embodiments; specific embodiments are illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various forms.

[0052] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. When describing with reference to the drawings, identical or corresponding components are given the same reference numerals, and redundant descriptions thereof will be omitted.

[0053] In the following embodiments, terms such as first, second, etc. are used not in a limiting sense, but for the purpose of distinguishing one component from another component.

[0054] In the following examples, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0055] In the following embodiments, terms such as "include" or "have" mean that the features or components described in the specification are present, and do not preclude the possibility that one or more other features or components may be added.

[0056] In the following embodiments, when a part such as a film, region, or component is described as being on or above another part, it includes not only cases where it is directly on top of another part, but also cases where another film, region, or component is interposed in between.

[0057] In the drawings, the size of components may be exaggerated or reduced for convenience of explanation. For example, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, so the present invention is not necessarily limited to what is illustrated.

[0058] In the following embodiments, the x-axis, y-axis, and z-axis are not limited to three axes in an orthogonal coordinate system and can be interpreted in a broader sense that includes them. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but they may also refer to different directions that are not orthogonal to each other.

[0059] Where an embodiment can be implemented differently, a specific process sequence may be performed differently from the order described. For example, two processes described consecutively may be performed substantially simultaneously or proceed in the reverse order of the description.

[0060] In this specification, "on a plane" means a plane viewed from a direction perpendicular to the substrate (100, see FIG. 5). That is, "A and B spaced apart from each other on a plane" means "A and B spaced apart from each other when viewed from a direction perpendicular to the substrate (100, see FIG. 5)."

[0061] In this specification, "on a cross-section" means a plane cut in a direction perpendicular to the substrate (100, see FIG. 5). That is, "A and B spaced apart from each other on a cross-section" means "A and B spaced apart from each other on a plane cut in a direction perpendicular to the substrate (100, see FIG. 5)."

[0062] FIG. 1 is a schematic perspective view of a display device (1) according to an embodiment of the present invention. FIG. 2a and FIG. 2b are perspective views of a display device showing the display device (1) of FIG. 1 extended in a first direction. FIG. 2c is a perspective view of a display device showing the display device (1) of FIG. 1 extended in a second direction. FIG. 2d is a perspective view of a display device showing the display device of FIG. 1 extended in a first direction and a second direction. FIG. 2e is a perspective view of a display device showing the display device (1) of FIG. 1 extended in a third direction.

[0063] Referring to FIG. 1, a display device (1) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels. The display device (1) may provide a predetermined image using light emitted from a plurality of pixels. The non-display area (NDA) may be placed outside the display area (DA). The non-display area (NDA) is an area where pixels are not placed and may completely surround the display area (DA). The non-display area (NDA) may not include pixels.

[0064] The display device (1) can be extended or shortened in various directions. The display device (1) can be extended in a first direction (e.g., x direction and / or -x direction) by an external force applied by an external object or a user. In one embodiment, as shown in FIGS. 2a and 2b, the display area (DA) and / or non-display area (NDA) of the display device (1) can be extended in a first direction (e.g., x direction and / or -x direction). For example, as shown in FIG. 2a, it can be extended along the x direction and -x direction, or as shown in FIG. 2b, it can be extended along the x direction while one side of the display device (1) remains fixed.

[0065] The display device (1) can be extended in a second direction (e.g., the y direction and / or the -y direction) by an external force applied by an external object or a user. In one embodiment, as shown in FIG. 2c, the display area (DA) and / or non-display area (NDA) of the display device (1) can be extended in the y direction and the -y direction. In another embodiment, one side of the display device (1) can be extended in the y direction or the -y direction while remaining fixed.

[0066] The display device (1) can be extended in multiple directions, such as a first direction (e.g., x direction and / or -x direction) and a second direction (e.g., y direction and / or -y direction), by an external force applied by an external object or a part of a person's body. As shown in FIG. 2d, the display area (DA) and / or non-display area (NDA) of the display device (1) can be extended in the ±x direction and ±y direction.

[0067] The display device (1) can be extended in a third direction (e.g., z direction or -z direction) by an external force applied by an external object or a part of a person's body. In one embodiment, FIG. 2e shows a part of the display device (1), such as a part of the display area (DA), protruding in the z direction. In another embodiment, a part of the display device (1), such as a part of the display area (DA), can be protruded along the -z direction (or sunken along the z direction).

[0068] FIGS. 2a to 2e illustrate a display device (1) extended in a first direction, a second direction, and / or a third direction, but the present invention is not limited thereto. In other embodiments, the display device (1) may be varied into an irregular shape, such as having two or more axes, being bent or twisted.

[0069] FIG. 3 is a schematic plan view of a display device (1) according to one embodiment of the present invention.

[0070] A plurality of pixels may be arranged in the display area (DA) of the display device (1). Each pixel may include subpixels that emit light of different colors. A light-emitting element corresponding to each subpixel may be placed in the display area (DA). A circuit for providing electrical signals to the light-emitting elements placed in the display area (DA) and to the transistors electrically connected to the light-emitting elements may be located in the non-display area (NDA) surrounding the display area (DA). A gate driving circuit (GDC) may be placed in the first non-display area (NDA1) and the second non-display area (NDA2), respectively, which are placed on both sides of the display area (DA). The gate driving circuit (GDC) may include drivers for providing electrical signals to the gate electrodes of each of the transistors electrically connected to the light-emitting elements. FIG. 3 illustrates the placement of a gate driving circuit (GDC) in the first non-display area (NDA1) and the second non-display area (NDA2), respectively, but the present invention is not limited thereto. In another embodiment, the gate driving circuit (GDC) may be placed in either the first non-display area (NDA1) or the second non-display area (NDA2).

[0071] The data driving circuit (DDC) may be placed in a third non-display area (NDA3) and / or a fourth non-display area (NDA4) connecting the first non-display area (NDA1) and the second non-display area (NDA2). In one embodiment, FIG. 3 illustrates the data driving circuit (DDC) being placed in the fourth non-display area (NDA4). In another embodiment, the data driving circuit (DDC) may be placed in each of the third non-display area (NDA3) and the fourth non-display area (NDA4).

[0072] FIG. 3 illustrates a data driving circuit (DDC) placed in the fourth non-display area (NDA4) of a display device (1), but the present invention is not limited thereto. In another embodiment, the display device (1) may further include a flexible circuit board (not shown) electrically connected through a terminal portion (not shown) placed in the fourth non-display area (NDA4), and a data driving circuit (DDC) may be placed on the aforementioned flexible circuit board.

[0073] In some embodiments, the elongation of the non-display area (NDA) may be equal to or less than the elongation of the display area (DA). In one embodiment, the elongation of the non-display area (NDA) may differ from area to area. For example, the first non-display area (NDA1), the second non-display area (NDA2), and the third non-display area (NDA3) may have substantially the same elongation, but the elongation of the fourth non-display area (NDA4) may be less than the elongation of each of the first non-display area (NDA1), the second non-display area (NDA2), and the third non-display area (NDA3). In this specification, elongation refers to a numerical value representing the change in length (ΔL / L) by which the display device (1) can be extended without physical damage to the display device (1) when an external force is applied to the display device (1). Here, ΔL is the amount of change in length of the display device and L represents the initial length of the display device.

[0074] FIG. 4a is a plan view of the IV portion of FIG. 3 as a part of a display device (1) according to one embodiment of the present invention.

[0075] Referring to FIG. 4a, the display device (1) may include first island sections (11) spaced apart from each other along a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a display area (DA), and first bridge sections (12) connecting adjacent first island sections (11) to each other.

[0076] Each first island section (11) may be connected to a plurality of first bridge sections (12). For example, each first island section (11) may be connected to four first bridge sections (12). Two of the four first bridge sections (12) may be positioned on opposite sides of the first island section (11) along a first direction (e.g., x direction or -x direction), and the remaining two of the four first bridge sections (12) may be positioned on opposite sides of the first island section (11) along a second direction (e.g., y direction or -y direction). In one embodiment, the four first bridge sections (12) may each be connected to four sides of the first island section (11). Each of the four first bridge sections (12) may be adjacent to each corner of the first island section (11).

[0077] The first bridge sections (12) may be spaced apart from each other by a first opening (CS1) located between the first bridge sections (12). In one embodiment, a first opening (CS1) approximately H-shaped and a first opening (CS1) approximately I-shaped, which is the aforementioned H-shaped rotated 90 degrees, may be alternately arranged along a first direction (e.g., x-direction or -x-direction) and a second direction (e.g., y-direction or -y-direction), respectively. Both ends of each first bridge section (12) are connected to each of the adjacent first island sections (11), and one side of each first bridge section (12) may be spaced apart from one side of the adjacent first island section (11) and / or one side of the other first bridge section (12) by the first opening (CS1).

[0078] The display device (1) may include second island sections (21) spaced apart from each other in a non-display area, for example, a first non-display area (NDA1) shown in FIG. 4a, and second bridge sections (22) connecting adjacent second island sections (21) to each other.

[0079] Each second island section (21) may extend along a first direction (e.g., x direction or -x direction). The second island sections (21) may be spaced apart from each other along a second direction (e.g., y direction or -y direction) that intersects the first direction (e.g., x direction or -x direction). Each second island section (21) may include drivers of the gate driving circuit (GDC, FIG. 2) described with reference to FIG. 3.

[0080] The second bridge section (22) may have a serpentine shape. The length of the second bridge section (22) may be greater than the shortest distance between adjacent second island sections (21) along the second direction (e.g., the y direction or the -y direction). In one embodiment, the second bridge section (22) may have a shape of approximately omega (Ω) that is convex toward the first direction (e.g., the x direction or the -x direction). The second bridge sections (22) may be positioned between adjacent second island sections (21) but spaced apart from each other.

[0081] The second bridge sections (22) between adjacent second island sections (21) may be spaced apart from each other by a second opening (CS2). Between adjacent second island sections (21), the second openings (CS2) and the second bridge sections (22) may be arranged alternately along a first direction (e.g., x direction or -x direction). The second openings (CS2) may have the same shape as each other. Both ends of each second bridge section (22) are connected to adjacent second island sections (21), but one side of each second bridge section (22) may be spaced apart from the side of the adjacent second island section (21) and / or the side of the other second bridge section (22) by the second opening (CS2).

[0082] Any one second island section (21) placed in the first non-display area (NDA1) may correspond to a plurality of first island sections (11) arranged in the display area (DA). For example, any one second island section (21) placed in the first non-display area (NDA1) may correspond to the first island sections (11) arranged in the (i)th row and the first island sections (11) arranged in the (i+1)th row in the display area (DA) (where i is a positive number greater than 0). FIG. 4a illustrates that one second island section (21) corresponds to two rows of first island sections (11), but the present invention is not limited thereto. In another embodiment, any one second island section (21) placed in the first non-display area (NDA1) may correspond to n rows of first island sections (11) placed in the display area (DA) (where n is a positive number greater than or equal to 3).

[0083] A non-display area, such as a first non-display area (NDA1), may include a first sub-non-display area (SNDA1) in which the aforementioned second island sections (21) and second bridge sections (22) are arranged, and a second sub-non-display area (SNDA2) between the first sub-non-display area (SNDA1) and the display area (DA). In the second sub-non-display area (SNDA2), third bridge sections (23) for connecting the display area (DA) and the first sub-non-display area (SNDA1) may be arranged. One end of the third bridge section (23) may be connected to the second island section (21) and / or the second bridge section (22), and the other end of the third bridge section (23) may be connected to the first island section (11) and / or the first bridge section (12).

[0084] The third bridge section (23) may have a wavy shape. In one embodiment, the shape of the third bridge section (23) may differ from the shapes of the first bridge section (12) and the second bridge section (22), respectively. In one embodiment, as shown in FIG. 4a, the third bridge section (23) may have a shape of approximately omega (Ω) that is convex toward the second direction (e.g., the y direction or the -y direction). Adjacent third bridge sections (23) arranged along the second direction (e.g., the y direction or the -y direction) may have a structure that is symmetrical to each other, such that one of them is convex toward the y direction and the other is convex toward the -y direction. Between the third bridge sections (23), there may be a structure in which a third opening (CS3) and a fourth opening (CS4) of different shapes are repeated. The width of the third bridge section (23) may differ from the width of the first bridge section (12) and the width of the second bridge section (22). In one embodiment, the width of the third bridge section (23) may be greater than the width of the first bridge section (12) and smaller than the width of the second bridge section (22).

[0085] FIG. 4a shows that the second island portion (21) and the second bridge portion (22) of the non-display area, for example, the first non-display area (NDA1), each have different shapes from the first island portion (11) and the first bridge portion (12) of the display area (DA). In another embodiment of the present invention, the second island portion (21) and the second bridge portion (22) of the non-display area may each have the same shape as the first island portion (11) and the first bridge portion (12) of the display area (DA).

[0086] FIG. 4b is a plan view of the IV portion of FIG. 3 as a part of a display device (1) according to one embodiment of the present invention.

[0087] Referring to FIG. 4b, the display device (1) includes first island sections (11) spaced apart from each other in the display area (DA) and first bridge sections (12) that are spaced apart from each other by a first opening (CS1) and connect adjacent first island sections (11). The structure of the display area (DA) in FIG. 4b may be the same as the structure of the display area (DA) described above with reference to FIG. 4a.

[0088] The display device (1) may include second island sections (21) and second bridge sections (22) disposed in a non-display area, for example, a first non-display area (NDA1). In one embodiment, the second island sections (21) and the second bridge sections (22) may each have substantially the same shape as the first island sections (11) and the first bridge sections (12).

[0089] The second island sections (21) may be spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a non-display area, e.g., a first non-display area (NDA1). Each of the second bridge sections (22) may connect adjacent second island sections (21). The second bridge sections (22) may be spaced apart from each other by a second opening (CS2) located between the second bridge sections (22).

[0090] The second opening (CS2) may have substantially the same shape as the first opening (CS1). For example, a second opening (CS2) with an approximate H shape and a second opening (CS2) with an approximate I shape may be alternately arranged in a non-display area, such as a first non-display area (NDA1). Both ends of each second bridge section (22) are connected to each of the adjacent second island sections (21), and one side of each second bridge section (22) may be separated from one side of the adjacent second island section (21) and / or one side of the other second bridge section (22) by the second opening (CS2).

[0091] Each second island section (21) can be connected to four second bridge sections (22). Each second island section (21) may include drivers of the gate driving circuit (GDC, FIG. 2) described with reference to FIG. 3.

[0092] Any row of the second island portions (21) placed in the first non-display area (NDA1) may correspond to any row of the first island portions (11) arranged in the display area (DA). For example, the second island portions (21) arranged in the (i)th row along the first direction (e.g., x direction or -x direction) in the first non-display area (NDA1) may correspond to the first island portions (11) arranged in the same row, e.g., the (i)th row, in the display area (DA) (where i is a positive number greater than 0).

[0093] The display device (1) may include third bridge sections (23) disposed in a second sub-non-display area (SNDA2) to connect a display area (DA) and a first sub-non-display area (SNDA1). A non-display area, such as a first non-display area (NDA1), may include a first sub-non-display area (SNDA1) in which second island sections (21) and second bridge sections (22) are disposed, and a second sub-non-display area (SNDA2) located between the first sub-non-display area (SNDA1) and the display area (DA), which includes the third bridge sections (23). The third bridge section (23) may be substantially identical to the first bridge section (12) and the second bridge section (22). For example, the width of the third bridge section (23) may be the same as the width of the first bridge section (12) and the width of the second bridge section (22).

[0094] FIG. 4c is a plan view of the IV portion of FIG. 3 as a part of a display device according to one embodiment of the present invention.

[0095] Referring to FIG. 4c, the display device (1) may include first island sections (11) that are spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a display area (DA), and first bridge sections (12) that connect adjacent first island sections (11).

[0096] The first bridge sections (12) may be spaced apart from each other by a first opening (CS1) located between the first bridge sections (12). The first bridge section (12) may have a wavy shape. For example, as shown in FIG. 4c, the first bridge section (12) may have a shape of approximately the letter 'S', such as including two round sections (12R) and a straight section (12S) between the two round sections (12R).

[0097] Each first island section (11) may be connected to a plurality of first bridge sections (12). For example, each first island section (11) may be connected to four first bridge sections (12). Two of the four first bridge sections (12) may be positioned on both sides of the first island section (11) along a first direction (e.g., x direction or -x direction), and the remaining two of the four first bridge sections (12) may be positioned on both sides of the first island section (11) along a second direction (e.g., y direction or -y direction). The four first bridge sections (12) may each be connected to four sides of the first island section (11). Each of the four first bridge sections (12) may be adjacent to each corner of the first island section (11).

[0098] The display device (1) may include second island sections (21) that are spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a non-display area, e.g., a first non-display area (NDA1) shown in FIG. 4c, and second bridge sections (22) that connect adjacent second island sections (21).

[0099] The second bridge sections (22) may be spaced apart from each other by a second opening (CS2) located between the second bridge sections (22). The second bridge section (22) may have a wavy shape. For example, as shown in FIG. 4c, the second bridge section (22) may have a shape of approximately the letter 'S'. The size and / or width of the second bridge section (22) may differ from the size and / or width of the first bridge section (12). For example, the size and / or width of the second bridge section (22) may be larger than the size and / or width of the first bridge section (12). The radius of curvature of the rounded portion of the second bridge section (22) may differ from the radius of curvature of the rounded portion of the first bridge section (12). For example, the radius of curvature of the rounded portion of the second bridge section (22) may be larger than the radius of curvature of the rounded portion of the first bridge section (12).

[0100] Each second island section (21) may be connected to a plurality of second bridge sections (22). Each second island section (21) may be connected to four second bridge sections (22). Two of the four second bridge sections (22) may be positioned on both sides of the second island section (21) along a first direction (e.g., x direction or -x direction), and the remaining two of the four second bridge sections (22) may be positioned on both sides of the second island section (21) along a second direction (e.g., y direction or -y direction). In one embodiment, the four second bridge sections (22) may each be connected to four sides of the second island section (21). Each second bridge section (22) may be connected to the central part of each side of the second island section (21).

[0101] Any row of second island sections (21) placed in the first non-display area (NDA1) may correspond to multiple rows of first island sections (11) arranged in the display area (DA). For example, any row of second island sections (21) placed in the first non-display area (NDA1) may correspond to the first island sections (11) arranged in the (i)th row and the first island sections (11) arranged in the (i+1)th row of the display area (DA) (where i is a positive number greater than 0). In another embodiment, any row of second island sections (21) may correspond to n rows of first island sections (11) (where n is a positive number greater than or equal to 3).

[0102] A non-display area, such as a first non-display area (NDA1), may include a first sub-non-display area (SNDA1) in which the aforementioned second island sections (21) and second bridge sections (22) are arranged, and a second sub-non-display area (SNDA2) between the first sub-non-display area (SNDA1) and the display area (DA). In the second sub-non-display area (SNDA2), third bridge sections (23) may be arranged to connect the display area (DA) and the first sub-non-display area (SNDA1). One end of the third bridge section (23) may be connected to the second island section (21), and the other end of the third bridge section (23) may be connected to the first island section (11). For example, one end of the third bridge section (23) can be connected to the central part of one side of the second island section (21), and the other end of the third bridge section (23) can be connected to the central part of one side of the first island section (11).

[0103] The third bridge section (23) may have a wavy shape. In one embodiment, the shape of the third bridge section (23) may differ from the shape of the first bridge section (12) and the second bridge section (22), respectively. The width of the third bridge section (23) may differ from the width of the first bridge section (12) and the width of the second bridge section (22). The width of the third bridge section (23) may be greater than the width of the first bridge section (12) and smaller than the width of the second bridge section (22). In the second direction (e.g., the y direction or the -y direction), a third opening (CS3) and a fourth opening (CS4) of different shapes may be alternately arranged between the third bridge sections (23).

[0104] FIG. 5 is a schematic cross-sectional view showing a first island part (11) and a first bridge part (12) arranged in a display area (DA) of a display device (1) according to one embodiment of the present invention.

[0105] Referring to FIG. 5, the first island section (11) and the first bridge section (12) placed in the display area (DA) may be spaced apart with the first opening (CS1) in between. The first island section (11) includes light-emitting elements (LEDs) and a circuit for driving the light-emitting elements electrically connected thereto, such as a pixel driving circuit section (PC), and the first bridge section (12) may include wiring (WL) electrically connected to the pixel driving circuit sections (PCs) placed in each of the adjacent first island sections (11).

[0106] Looking at the first island section (11), a buffer layer (111) containing an inorganic insulating material is disposed on the substrate (100), and a pixel driving circuit section (PC) may be disposed on the buffer layer (111). An insulating layer (IL) containing an inorganic insulating material and / or an organic insulating material may be disposed between the pixel driving circuit section (PC) and the light-emitting element (LED). The light-emitting element (LED) is disposed on the insulating layer (IL) and may be electrically connected to the corresponding pixel driving circuit section (PC). The light-emitting elements (LEDs) may emit light of different colors or light of the same color. In one embodiment, the light-emitting elements (LEDs) may each emit red, green, and blue light. In some embodiments, the light-emitting elements (LEDs) may emit white light. In another embodiment, the light-emitting elements (LEDs) may each emit red, green, blue, and white light.

[0107] The substrate (100) may include a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. In one embodiment, the substrate (100) may be a single layer comprising the aforementioned polymer resin. In another embodiment, the substrate (100) may be a multilayer structure comprising a base layer comprising the aforementioned polymer resin and a barrier layer comprising an inorganic insulating material. The substrate (100) comprising the polymer resin may have flexible, rollable, and bendable properties.

[0108] In one embodiment, FIG. 5 illustrates three pixel driving circuit units (PCs) arranged in each first island unit (11) and three light-emitting elements (LEDs) connected to each pixel driving circuit unit (PC), but the present invention is not limited thereto. In another embodiment, the number of pixel driving circuit units (PCs) and light-emitting elements (LEDs) arranged in the first island unit (11) may be one, two, or four or more.

[0109] The encapsulation layer (300) may be placed on a light-emitting element (LED) and may protect the light-emitting element (LED) from external forces and / or moisture penetration. The encapsulation layer (300) may include an inorganic encapsulation layer and / or an organic encapsulation layer. In some embodiments, the encapsulation layer (300) may include a structure in which an inorganic encapsulation layer containing an inorganic insulating material, an organic encapsulation layer containing an organic insulating material, and an inorganic encapsulation layer containing an inorganic insulating material are laminated. In other embodiments, the encapsulation layer (300) may include an organic material such as resin. In some embodiments, the encapsulation layer (300) may include urethane epoxy acrylate. The encapsulation layer (300) may include a photosensitive material, such as a photoresist.

[0110] Looking at the first bridge section (12), an insulating layer (IL) containing an organic insulating material may be disposed on the substrate (100). When the display device (1) is stretched, the first bridge section (12), which undergoes relatively more deformation, may not have a layer containing an inorganic insulating material that is prone to cracking, unlike the first island section (11).

[0111] In one embodiment, the substrate (100) corresponding to the first bridge portion (12) may have the same stacked structure as the substrate (100) corresponding to the first island portion (11). In one embodiment, the substrate (100) corresponding to the first bridge portion (12) and the substrate (100) corresponding to the first island portion (11) may be polymer resin layers formed together in the same process. In another embodiment, the substrate (100) corresponding to the first bridge portion (12) may have a different stacked structure than the substrate (100) corresponding to the first island portion (11). In some embodiments, the substrate (100) corresponding to the first bridge portion (12) has a multilayer structure including a base layer containing a polymer resin and a barrier layer containing an inorganic insulating material, and the substrate (100) corresponding to the first bridge portion (12) may have a structure of a polymer resin layer without a layer containing an inorganic insulating material.

[0112] As previously described, the wiring (WL) of the first bridge section (12) may be signal lines (e.g., gate lines, data lines, etc.) for providing electrical signals to transistors included in the pixel driving circuit section (PC) of the first island section (11), or voltage lines (e.g., driving voltage lines, initialization voltage lines, etc.) for providing voltage. An encapsulation layer (300) may also be disposed in the first bridge section (12). In another embodiment, the encapsulation layer (300) may not exist in the first bridge section (12).

[0113] Referring to FIGS. 4a through 4e and FIG. 5, the substrate (100) corresponding to the first island portion (11) and the substrate (100) corresponding to the first bridge portion (12) can be connected to each other. In other words, the plan view shown in FIGS. 4a through 4e above may be substantially the same as the plan view of the substrate (100) in FIG. 5. In other words, the substrate (100) may include an area corresponding to the first island portion (11), an area corresponding to the first bridge portion (12), and an opening (100OP1) having the same shape as the first opening (CS1).

[0114] Similarly, the bag layer (300) corresponding to the first island portion (11) and the bag layer (300) corresponding to the first bridge portion (12) can be connected to each other. For example, the plan view shown in FIGS. 4a through 4e above may be substantially identical to the plan view of the bag layer (300). In other words, the bag layer (300) may include an area corresponding to the first island portion (11), an area corresponding to the first bridge portion (12), and an opening (300OP1) having the same shape as the first opening (CS1).

[0115] The circuit-light-emitting element layer (200) between the substrate (100) and the encapsulation layer (300) may include a buffer layer (111), a pixel driving circuit (PC), wiring (WL), an insulating layer (IL), and a light-emitting element (LED). Similar to the substrate (100), the plan view previously shown in FIGS. 4a through 4e may be substantially identical to the plan view of the circuit-light-emitting element layer (200). In other words, the circuit-light-emitting element layer (200) may include an opening (200OP1) having the same shape as the first opening (CS1).

[0116] FIGS. 6a to 6c are equivalent circuit diagrams of subpixels of a display device (1) according to one embodiment of the present invention.

[0117] Referring to FIG. 6a, a light-emitting element (LED) corresponding to a subpixel is electrically connected to a pixel driving circuit (PC), and the pixel driving circuit (PC) may include a first transistor (T1), a second transistor (T2), and a storage capacitor (Cst). The pixel driving circuit (PC) may be electrically connected to a signal line and a voltage line. The signal line may include a gate line such as a first scan line (SL1) and a data line (DL), and the voltage line may include a first voltage line (VDDL).

[0118] The second transistor (T2) can be electrically connected to the first scan line (SL1) and the data line (DL). The first scan line (SL1) can provide a first scan signal (GW) to the gate electrode of the second transistor (T2). The second transistor (T2) can transmit a data signal (Dm) input from the data line (DL) to the first transistor (T1) according to the first scan signal (GW) input from the first scan line (SL1).

[0119] The storage capacitor (Cst) is electrically connected to the second transistor (T2) and the first voltage line (VDDL), and can store a voltage corresponding to the difference between the voltage received from the second transistor (T2) and the first power supply voltage (VDD) supplied by the first voltage line (VDDL).

[0120] The first transistor (T1) is a driving transistor capable of controlling the driving current flowing through the light-emitting element (LED). The first transistor (T1) can be connected to the first voltage line (VDDL) and the storage capacitor (Cst). The first transistor (T1) can control the driving current flowing through the light-emitting element (LED) from the first voltage line (VDDL) in correspondence with the voltage value stored in the storage capacitor (Cst). The light-emitting element (LED) can emit light having a predetermined brightness by the driving current. The first electrode of the light-emitting element (LED) is electrically connected to the first transistor (T1), and the second electrode can be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0121] FIG. 6a illustrates that the pixel driving circuit (PC) includes two transistors and one storage capacitor, but in other embodiments, the pixel driving circuit (PC) may include three or more transistors.

[0122] Referring to FIG. 6b, the pixel driving circuit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), and a storage capacitor (Cst).

[0123] The pixel driving circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a first scan line (SL1), a second scan line (SL2), a third scan line (SL3), and a light emission control line (EML), and data lines (DL). The voltage lines may include first and second initialization voltage lines (VIL1, VIL2) and a first voltage line (VDDL).

[0124] The first voltage line (VDDL) can transmit the first power supply voltage (VDD) to the first transistor (T1). The first initialization voltage line (VIL1) can transmit the first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel driving circuit (PC). The second initialization voltage line (VIL2) can transmit the second initialization voltage (Vaint) that initializes the first electrode of the light-emitting element (LED) to the pixel driving circuit (PC).

[0125] The first transistor (T1) can be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The first transistor (T1) acts as a driving transistor and receives a data signal (Dm) according to the switching operation of the second transistor (T2) and supplies a driving current to the light-emitting element (LED).

[0126] The second transistor (T2) is a data write transistor and is electrically connected to the first scan line (SL1) and the data line (DL). The second transistor (T2) is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5). The second transistor (T2) is turned on according to the first scan signal (GW) received through the first scan line (SL1) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0127] The third transistor (T3) is electrically connected to the first scan line (SL1) and is electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The third transistor (T3) is turned on according to the first scan signal (GW) received through the first scan line (SL1) and can connect the first transistor (T1) to the diode.

[0128] The fourth transistor (T4) is a first initialization transistor and is electrically connected to the third scan line (SL3) and the first initialization voltage line (VIL1). The fourth transistor (T4) is turned on according to the third scan signal (GI) received through the third scan line (SL3) to transmit the first initialization voltage (Vint) from the first initialization voltage line (VIL1) to the gate electrode of the first transistor (T1), thereby initializing the voltage of the gate electrode of the first transistor (T1). The third scan signal (GI) may correspond to the first scan signal of another pixel driving circuit unit placed in the previous row of the corresponding pixel driving circuit unit (PC).

[0129] The fifth transistor (T5) may be an operation control transistor, and the sixth transistor (T6) may be a light-emitting control transistor. The fifth transistor (T5) and the sixth transistor (T6) are electrically connected to the light-emitting control line (EML) and are simultaneously turned on according to the light-emitting control signal (EM) received through the light-emitting control line (EML) to form a current path so that a driving current can flow from the first voltage line (VDDL) toward the light-emitting element (LED).

[0130] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the second scan line (SL2), the second initialization voltage line (VIL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the second scan signal (GB) received through the second scan line (SL2), and can initialize the first electrode of the light-emitting element (LED) by transmitting the second initialization voltage (Vaint) from the second initialization voltage line (VIL2) to the first electrode of the light-emitting element (LED).

[0131] The storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the first voltage line (VDDL). The storage capacitor (Cst) can maintain the voltage applied to the gate electrode of the first transistor (T1) by storing and maintaining a voltage corresponding to the difference between the voltages of the first voltage line (VDDL) and the gate electrode of the first transistor (T1).

[0132] Referring to FIG. 6c, the pixel driving circuit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), an eighth transistor (T8), a ninth transistor (T9), a storage capacitor (Cst), and an auxiliary capacitor (Ca).

[0133] The pixel driving circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a first scan line (SL1), a second scan line (SL2), a third scan line (SL3), and a light emission control line (EML), and a data line (DL). The voltage lines may include first and second initialization voltage lines (VIL1, VIL2), a holding voltage line (VSL), and a first voltage line (VDDL).

[0134] The first voltage line (VDDL) can transmit the first power supply voltage (VDD) to the first transistor (T1). The first initialization voltage line (VIL1) can transmit the first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel driving circuit (PC). The second initialization voltage line (VIL2) can transmit the second initialization voltage (Vaint) that initializes the first electrode of the light-emitting element (LED) to the pixel driving circuit (PC). The holding voltage line (VSL) can provide the holding voltage (VSUS) to the second electrode (CE2) of the second node (N2), for example, the storage capacitor (Cst), during the initialization section and the data writing section.

[0135] The first transistor (T1) can be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8), and can be electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The first transistor (T1) acts as a driving transistor and can receive a data signal (Dm) according to the switching operation of the second transistor (T2) and supply driving current to the light-emitting element (LED).

[0136] The second transistor (T2) is electrically connected to the first scan line (SL1) and the data line (DL), and is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8). The second transistor (T2) is turned on according to the first scan signal (GW) received through the first scan line (SL1) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0137] The third transistor (T3) is electrically connected to the first scan line (SL1) and is electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The third transistor (T3) is turned on according to the first scan signal (GW) received through the first scan line (SL1) and connects the first transistor (T1) to the diode, thereby compensating for the threshold voltage of the first transistor (T1).

[0138] The fourth transistor (T4) is electrically connected to the third scan line (SL3) and the first initialization voltage line (VIL1), and is turned on according to the third scan signal (GI) received through the third scan line (SL3) to transmit the first initialization voltage (Vint) from the first initialization voltage line (VIL1) to the gate electrode of the first transistor (T1) to initialize the voltage of the gate electrode of the first transistor (T1). The third scan signal (GI) may correspond to the first scan signal of another pixel driving circuit unit placed in the previous row of the corresponding pixel driving circuit unit (PC).

[0139] The fifth transistor (T5), the sixth transistor (T6), and the eighth transistor (T8) are electrically connected to the light emission control line (EML) and are simultaneously turned on according to the light emission control signal (EM) received through the light emission control line (EML) to form a current path so that driving current can flow from the first voltage line (VDDL) toward the light-emitting element (LED).

[0140] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the second scan line (SL2), the second initialization voltage line (VIL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the second scan signal (GB) received through the second scan line (SL2) and transmits the second initialization voltage (Vaint) from the second initialization voltage line (VIL2) to the first electrode of the light-emitting element (LED) to initialize the first electrode of the light-emitting element (LED).

[0141] The ninth transistor (T9) can be electrically connected to the second scan line (SL2), the second electrode (CE2) of the storage capacitor (Cst), and the holding voltage line (VSL). The ninth transistor (T9) is turned on according to the second scan signal (GB) received through the second scan line (SL2), and can transmit a holding voltage (VSUS) to the second node (N2), such as the second electrode (CE2) of the storage capacitor (Cst), during the initialization period and the data writing period.

[0142] The eighth transistor (T8) and the ninth transistor (T9) can each be electrically connected to the second node (N2), for example, the second electrode (CE2) of the storage capacitor (Cst). In some embodiments, the eighth transistor (T8) may be turned off and the ninth transistor (T9) may be turned on during the initialization period and the data writing period, and the eighth transistor (T8) may be turned on and the ninth transistor (T9) may be turned off during the light emission period. Since the second node (N2) receives the holding voltage (VSUS) during the initialization period and the data writing period, the uniformity of the brightness of the display device (e.g., LRU, Long Range Uniformity) due to the voltage drop of the first voltage line (VDDL) can be improved.

[0143] The storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the eighth transistor (T8) and the ninth transistor (T9).

[0144] The auxiliary capacitor (Ca) can be electrically connected to the sixth transistor (T6), the holding voltage line (VSL), and the first electrode of the light-emitting element (LED). By storing and maintaining a voltage corresponding to the voltage difference between the first electrode of the light-emitting element (LED) and the holding voltage line (VSL) while the seventh transistor (T7) and the ninth transistor (T9) are turned on, the auxiliary capacitor (Ca) can prevent the problem of the black brightness rising when the sixth transistor (T6) is turned off.

[0145] FIG. 7a is a cross-sectional view schematically showing a light-emitting element of a display device according to one embodiment of the present invention.

[0146] Referring to FIG. 7a, a light-emitting element according to one embodiment of the present invention may include an organic light-emitting diode (220) containing an organic material. The organic light-emitting diode (220) may include a first electrode (221) disposed on an insulating layer, a second electrode (225) facing the first electrode (221), and a light-emitting layer (223) interposed between the first electrode (221) and the second electrode (225). A first functional layer (222) may be disposed between the first electrode (221) and the light-emitting layer (223), and a second functional layer (224) may be disposed between the light-emitting layer (223) and the second electrode (225).

[0147] The edge of the first electrode (221) may be covered with a bank layer (BKL) containing an insulating material. The bank layer (BKL) may include an opening (B-OP) that overlaps the central portion of the first electrode (221).

[0148] The first electrode (221) may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In another embodiment, the first electrode (221) may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. In another embodiment, the first electrode (221) may further include a layer formed of ITO, IZO, ZnO, AZO, or In2O3 above and below the aforementioned reflective layer.

[0149] The light-emitting layer (223) may include a polymer or low-molecular-weight organic material that emits light of a predetermined color. The first functional layer (222) may include a hole transport layer (HTL) and / or a hole injection layer (HIL). The second functional layer (224) may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0150] The second electrode (225) may be made of a conductive material with a low work function. For example, the second electrode (225) may include a (semi)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. Alternatively, the second electrode (225) may further include a layer such as ITO, IZO, ZnO, AZO, or In2O3 on the (semi)transparent layer comprising the aforementioned materials.

[0151] FIG. 7b is a cross-sectional view schematically showing a light-emitting element of a display device according to one embodiment of the present invention.

[0152] Referring to FIG. 7b, in one embodiment of the present invention, the light-emitting element may include an inorganic light-emitting diode (230) comprising an inorganic material. The inorganic light-emitting diode (230) may include a first semiconductor layer (231), a second semiconductor layer (232), an intermediate layer (233) between the first semiconductor layer (231) and the second semiconductor layer (232), a first electrode (235) electrically connected to the first semiconductor layer (231), and a second electrode (238) electrically connected to the second semiconductor layer (232). The first electrode (235) and the second electrode (238) of the inorganic light-emitting diode (230) may each be electrically connected to a first electrode pad (241) and a second electrode pad (242) disposed on the same layer.

[0153] In some embodiments, the first semiconductor layer (231) may include a p-type semiconductor layer. The p-type semiconductor layer is In x Al y Ga 1-x-y A semiconductor material having the composition formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be selected from, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., and p-type dopants such as Mg, Zn, Ca, Sr, and Ba can be doped.

[0154] The second semiconductor layer (232) may include, for example, an n-type semiconductor layer. The n-type semiconductor layer is In x Al y Ga 1-x-y A semiconductor material having the composition formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be selected from, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., and can be doped with n-type dopants such as Si, Ge, and Sn.

[0155] The intermediate layer (233) is a region where electrons and holes recombine, and as electrons and holes recombine, they transition to a lower energy level and can generate light having a corresponding wavelength. The intermediate layer (233) is, for example, In x Al y Ga 1-x-y It can be formed by including a semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), and can be formed as a single quantum well structure or a multi-quantum well (MQW) structure. In addition, it may include a quantum wire structure or a quantum dot structure.

[0156] FIG. 7b illustrates that the first semiconductor layer (231) includes a p-type semiconductor layer and the second semiconductor layer (232) includes an n-type semiconductor layer, but the present invention is not limited thereto. In another embodiment, the first semiconductor layer (231) may include an n-type semiconductor layer and the second semiconductor layer (232) may include a p-type semiconductor layer.

[0157] FIG. 8a is an enlarged plan view of the first island portion (11) of a display device (1) according to one embodiment of the present invention, and FIG. 8b is a plan view showing the arrangement of wiring (WL) on the first bridge portion (12) of a display device (1) according to one embodiment of the present invention.

[0158] Specifically, FIG. 8b is a plan view of a display device (1) that is an enlarged portion of FIG. 8a.

[0159] Referring to FIG. 8a, the first island portion (11) placed in the display area (DA) may include light-emitting elements and a pixel driving circuit portion (PC) electrically connected thereto. As previously described, the pixel driving circuit portion (PC) may include transistors and at least one capacitor. FIG. 8a illustrates three pixel driving circuit portions (PC) placed in the first island portion (11), but the present invention is not limited thereto. In another embodiment, the number of pixel driving circuit portions (PC) and light-emitting elements placed in the first island portion (11) may be one, two, or four or more.

[0160] Referring to FIG. 8b, the first bridge section (12) may include a plurality of wires (WL) electrically connected to pixel driving circuit sections (PCs) disposed in each of the adjacent first island sections (11). As previously described, the wires (WL) may be signal lines (e.g., gate lines, data lines, etc.) for providing electrical signals to transistors included in the pixel driving circuit sections (PCs) of the first island sections (11), or voltage lines (e.g., driving voltage lines, initialization voltage lines, etc.) for providing voltage. FIG. 8b illustrates a plurality of wires (WL), such as first to third wires (WL1, WL2, WL3), disposed on the first bridge section (12), but the present invention is not limited thereto. In another embodiment, a single wire (WL) may be disposed on the first bridge section (12).

[0161] FIGS. 9a and FIGS. 9b are schematic cross-sectional views of a display device (1) according to one embodiment of the present invention.

[0162] Specifically, FIGS. 9a and FIGS. 9b are cross-sectional views of a display device (1) along the line IX-IX' of FIGS. 8a.

[0163] Referring to FIGS. 9a and 9b, the display device (1) may include a substrate (100), a mask layer (MLY), a pixel circuit layer (PCL), a wiring layer (WLL), and a light-emitting element (LED).

[0164] A substrate (100) overlapping with a plurality of first island portions (11) may include a first base layer (101), a first barrier layer (102), a second base layer (103), and a second barrier layer (104). The first barrier layer (102) may be disposed on the first base layer (101), the second base layer (103) may be disposed on the first barrier layer (102), and the second barrier layer (104) may be disposed on the second base layer (103).

[0165] The first base layer (101) and the second base layer (103) may each contain the same material. For example, the first base layer (101) and the second base layer (103) may each contain a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc. The first barrier layer (102) and the second barrier layer (104) may each contain the same material. The first barrier layer (102) and the second barrier layer (104) may each contain an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride.

[0166] A substrate (100) overlapping with a plurality of first bridge portions (12) may include the same material as the first base layer (101) and / or the second base layer (103). For example, a substrate (100) overlapping with a plurality of first bridge portions (12) may include a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc.

[0167] In such a structure, the substrate (100) may include a base layer that overlaps with each of the plurality of first island portions (11) and the plurality of first bridge portions (12). Although FIGS. 9a and 9b show that the substrate (100) overlapping with the plurality of first bridge portions (12) has a single base layer structure, this is merely an example, and the substrate (100) overlapping with the plurality of first bridge portions (12) may have a stacked structure of two base layers. Additionally, the substrate (100) may further include a barrier layer (e.g., a first barrier layer (102) and / or a second barrier layer (104)) that overlaps with the plurality of first island portions (11). The barrier layer may be arranged to be spaced apart from the plurality of first bridge portions (12).

[0168] A first mask layer (MLY1) may be disposed on a base layer (e.g., a second base layer (103)) so as to overlap with a plurality of first island portions (11). A barrier layer (e.g., a second barrier layer (104)) may be disposed on the first mask layer (MLY1). That is, the first mask layer (MLY1) may be disposed between the second base layer (103) and the second barrier layer (104). For example, the first mask layer (MLY1) may include at least one material among TCO, metal, and silicon oxide. The etching selectivity ratio of the first base layer (101) and the second base layer (103) with respect to the first mask layer (MLY1) may exceed 1. For example, the etching selectivity ratio of the first base layer (101) and the second base layer (103) with respect to the first mask layer (MLY1) may be 40 or more. However, this is exemplary, and the etching selectivity ratio of the first base layer (101) and the second base layer (103) with respect to the first mask layer (MLY1) is not limited thereto.

[0169] A pixel circuit layer (PCL) may be disposed on a first mask layer (MLY1). The pixel circuit layer (PCL) may include an inorganic insulating layer (IOL) and a pixel driving circuit unit (PC). For example, the inorganic insulating layer (IOL) may include a buffer layer (111), a gate insulating layer (113), a first interlayer insulating layer (115), and a second interlayer insulating layer (117). For example, the pixel driving circuit unit (PC) may include a thin-film transistor (TFT) and a storage capacitor (Cst).

[0170] A buffer layer (111) is disposed on the substrate (100), and a pixel driving circuit (PC) may be disposed on the buffer layer (111). The buffer layer (111) may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0171] A thin-film transistor (TFT) may include a semiconductor layer (Act), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). FIGS. 9a and 9b illustrate a top-gate type in which the gate electrode (GE) is placed on the semiconductor layer (Act) with the gate insulating layer (113) in between, but according to other embodiments, the thin-film transistor (TFT) may be a bottom-gate type.

[0172] The semiconductor layer (Act) may include polysilicon. Alternatively, the semiconductor layer (Act) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode (GE) may include a low-resistance metal material. The gate electrode (GE) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0173] The gate insulating layer (113) between the semiconductor layer (Act) and the gate electrode (GE) may include an inorganic insulating material such as silicon oxide, nitrogen oxide, silicon oxynitride, aluminum oxide, or titanium oxide. The gate insulating layer (113) may be a single layer or a multilayer containing the aforementioned materials.

[0174] The source electrode (SE) and the drain electrode (DE) may be located on the same layer, for example, the second interlayer insulating layer (117), and may contain the same material. The source electrode (SE) and the drain electrode (DE) may contain a conductive material and may be formed as a multilayer or a single layer. The second interlayer insulating layer (117) may contain an inorganic insulating material such as silicon oxide, nitrogen oxide, silicon oxynitride, aluminum oxide, or titanium oxide, and may be a single layer or a multilayer containing the aforementioned material.

[0175] A storage capacitor (Cst) may include a first electrode (CE1) and a second electrode (CE2) that overlap with a first interlayer insulating layer (115) in between. The storage capacitor (Cst) may overlap with a thin-film transistor (TFT). In this regard, FIGS. 9a and 9b illustrate that the gate electrode (GE) of the thin-film transistor (TFT) is the first electrode (CE1) of the storage capacitor (Cst). In another embodiment, the storage capacitor (Cst) may not overlap with the thin-film transistor (TFT). The storage capacitor (Cst) may be covered by a second interlayer insulating layer (207). The second electrode (CE2) of the storage capacitor (Cst) may include a conductive material and may be formed as a multilayer or a single layer. The first interlayer insulating layer (115) may be disposed between the gate insulating layer (113) and the second interlayer insulating layer (117). The first interlayer insulating layer (115) may include an inorganic insulating material such as silicon oxide, nitrogen oxide, silicon oxynitride, aluminum oxide, and titanium oxide, and may be a single layer or a multilayer containing the aforementioned material.

[0176] For example, the pixel circuit layer (PCL) may include a first organic insulating layer (119), a second organic insulating layer (121), and a third organic insulating layer (123). The first organic insulating layer (119) may be disposed on the second interlayer insulating layer (117), and the second organic insulating layer (121) may be disposed on the first organic insulating layer (119). The first organic insulating layer (119) and the second organic insulating layer (121) may each include an organic insulating material such as polyimide.

[0177] The second voltage line (VSSL) is disposed on the second organic insulating layer (121), and the third organic insulating layer (123) may be disposed on the second organic insulating layer (121) and the second voltage line (VSSL). The third organic insulating layer (123) may include an organic insulating material such as polyimide. The second voltage line (VSSL) may include a conductive material and may be formed as a multilayer or a single layer.

[0178] The first electrode pad (241) and the second electrode pad (242) may be disposed on the third organic insulating layer (123). The first electrode pad (241) may be electrically connected to a thin film transistor (TFT) through a first connecting electrode (CM1) between the first organic insulating layer (119) and the second organic insulating layer (121) and a second connecting electrode (CM2) between the second organic insulating layer (121) and the third organic insulating layer (123).

[0179] A light-emitting element (LED) may be disposed on a pixel circuit layer (PCL). The light-emitting element (LED) may include an organic light-emitting diode (220, see FIG. 7a) (LED) described with reference to FIG. 7a and / or an inorganic light-emitting diode (230) described with reference to FIG. 7b. Hereinafter, the description will be based on the premise that the light-emitting element (LED) includes an inorganic light-emitting diode (230).

[0180] A wiring layer (WLL) may be disposed on a substrate (100) so as to overlap with a plurality of first bridge portions (12). Since a barrier layer is not disposed on the plurality of first bridge portions (12), the wiring layer (WLL) may be disposed on a base layer that overlaps with the plurality of first bridge portions (12). The wiring layer (WLL) may include a first insulating layer (OL), a first organic insulating layer (119), a second organic insulating layer (121), a third organic insulating layer (123), and wiring (WL).

[0181] On the substrate (100) overlapping with a plurality of first bridge portions (12), an inorganic insulating layer (IOL) is not disposed, and a first insulating layer (OL), a first organic insulating layer (119), and a second organic insulating layer (121) may be disposed. The first insulating layer (OL) may include an organic insulating material such as polyimide. In one embodiment, the first insulating layer (OL) may have a thickness corresponding to that of the inorganic insulating layer (IOL). In some embodiments, the first insulating layer (OL) may be omitted.

[0182] A plurality of wirings (WL), for example, first to third wirings (WL1, WL2, WL3), may each be disposed on different layers but may be electrically connected to the same pixel driving circuit (PC). For example, the first wiring (WL1) may be disposed between the second organic insulating layer (121) and the third organic insulating layer (123), the second wiring (WL2) may be disposed between the first organic insulating layer (119) and the second organic insulating layer (121), and the third wiring (WL3) may be disposed between the first insulating layer (OL) and the first organic insulating layer (119). However, the present invention is not limited thereto, and in other embodiments, at least some of the first to third wirings (WL1, WL2, WL3) may be disposed on the same layer. In such a structure, the pixel circuit layer (PCL) and the wiring layer (WLL) can be placed on the same layer.

[0183] A first opening (CS1) positioned between a plurality of first island portions (11) and a plurality of first bridge portions (12) in a cross-section may include a first-1 opening (CS1-1) and a first-2 opening (CS1-2) positioned to overlap each other. The first-1 opening (CS1-1) penetrates the substrate (100) and the first mask layer (MLY1), and the first-2 opening (CS1-2) may penetrate the pixel circuit layer (PCL) and the wiring layer (WLL). In a cross-section, the substrate (100) overlapping with the plurality of first island portions (11) and the substrate (100) overlapping with the plurality of first bridge portions (12) may be spaced apart from each other with the first-1 opening (CS1-1) in between. In cross-section, the pixel circuit layer (PCL) and the wiring layer (WLL) may be spaced apart with the first and second openings (CS1-2) in between.

[0184] The width of the first mask layer (MLY1) may be the same as the width of the substrate (100) overlapping with the plurality of first island portions (11). The width of the first mask layer (MLY1) may be wider than the width of the pixel circuit layer (PCL). The width of the substrate (100) overlapping with the plurality of first bridge portions (12) may be wider than the width of the wiring layer (WLL). In such a structure, the width of the first-1 opening (CS1-1) in cross-section may be narrower than the width of the first-2 opening (CS1-2).

[0185] As illustrated in FIG. 9a, the display device (1) may further include a second mask layer (MLY2). The second mask layer (MLY2) may be disposed on a substrate (100) that overlaps with a plurality of first bridge portions (12). Since no barrier layer is disposed on the substrate (100) that overlaps with the first bridge portions (12), the second mask layer (MLY2) may be disposed on a base layer to overlap with a plurality of first bridges. The width of the second mask layer (MLY2) may be the same as the width of the substrate (100) that overlaps with a plurality of first bridge portions (12). The width of the second mask layer (MLY2) may be wider than the width of the wiring layer (WLL).

[0186] At this time, the first mask layer (MLY1) and the second mask layer (MLY2) are placed on the same layer and may contain the same material. The width of the second mask layer (MLY2) may be the same as the width of the substrate (100) that overlaps with the plurality of first bridge portions (12). The width of the second mask layer (MLY2) may be wider than the width of the wiring layer (WLL). For example, the second mask layer (MLY2) may contain at least one material among TCO, metal, and silicon oxide. However, this is merely an example, and the material contained in the second mask layer (MLY2) is not limited thereto.

[0187] As illustrated in FIG. 9b, the display device (1) may not include a second mask layer (MLY2). In such a structure, a wiring layer (WLL) may be disposed on a substrate (100) that overlaps with a plurality of first bridge portions (12). That is, a first insulating layer (OL) may be disposed on a substrate (100) that overlaps with a plurality of first bridge portions (12).

[0188] FIG. 10 is a schematic flowchart of a method (2) for manufacturing a display device according to one embodiment of the present invention, and FIG. 11a to 11j are schematic cross-sectional views of a display device (1) according to one embodiment of the present invention.

[0189] Referring to FIGS. 10 to 11j, the manufacturing method (2) of the display device described with reference to FIGS. 9a and 9b can be seen.

[0190] In FIGS. 10 to 11j, the same reference numerals as in FIG. 9a and FIG. 9b refer to the same components, so a redundant description thereof is omitted.

[0191] First, referring to FIG. 10 and FIG. 11a, a method for manufacturing a display device (2) may include a step (S11) of placing a base layer on a carrier substrate (CSUB). A first base layer (101) may be placed on the carrier substrate (CSUB). The carrier substrate (CSUB) performs the role of supporting the first base layer (101) during the process and may be provided with glass. A first barrier layer (102) may be placed on the first base layer (101). A second base layer (103) may be placed on the first base layer (101) to cover the first barrier layer (102).

[0192] Referring to FIG. 10 and FIG. 11b, the method for manufacturing a display device (2) may include the step (S12) of placing a first mask layer (MLY1) on a base layer, and the step (S13) of placing a second mask layer (MLY2) on a base layer.

[0193] In the step (S12) of placing the first mask layer (MLY1), the first mask layer (MLY1) may overlap with the first barrier layer (102). That is, the first barrier layer (102) may be placed on the first base layer (101), the second base layer (103) may be placed on the first barrier layer (102), and the first mask layer (MLY1) may be placed on the second base layer (103).

[0194] In the step (S13) of placing the second mask layer (MLY2), the second mask layer (MLY2) may be spaced apart from the first mask layer (MLY1) in cross-section. A second base layer (103) may be placed on the first base layer (101), and a second mask layer (MLY2) may be placed on the second base layer (103). The step (S12) of placing the first mask layer (MLY1) and the step (S13) of placing the second mask layer (MLY2) may be performed simultaneously.

[0195] Additionally, the method for manufacturing a display device (2) may include the step (S14) of forming a first opening (CS1-1) in a base layer. As the portion of the base layer that does not overlap with the first mask layer (MLY1) and the second mask layer (MLY2) is etched, the first opening (CS1-1) may be formed in the base layer. The first opening (CS1-1) may penetrate the first base layer (101) and the second base layer (103).

[0196] Etching of the base layer can be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. During the etching process of the base layer, the first mask layer (MLY1) and the second mask layer (MLY2) may not be etched. The portion of the base layer that overlaps with the first mask layer (MLY1) and the second mask layer (MLY2) may not be etched. The portion of the base layer that is spaced apart from the first mask layer (MLY1) and the second mask layer (MLY2) may be removed. The first base layer (101) and the second base layer (103) that overlap with the second mask layer (MLY2) may form a substrate (100) of a plurality of first bridge portions (12).

[0197] Referring to FIG. 10 and FIG. 11c, a method for manufacturing a display device (2) may include the step (S15) of placing a first sacrificial layer (SR1) in a first-1 opening (CS1-1). The first sacrificial layer (SR1) may be accommodated in the first-1 opening (CS1-1). The first sacrificial layer (SR1) may be supported by a carrier substrate (CSUB). The first sacrificial layer (SR1) may be surrounded by a first base layer (101), a first barrier layer (102), a second base layer (103), a first mask layer (MLY1), and a second mask layer (MLY2). The etching selectivity ratio of the first sacrificial layer (SR1) to the first base layer (101) and the second base layer (103) may exceed 1. For example, the first sacrificial layer (SR1) may include at least one of metal ink, metal paste, and liquid silicone.

[0198] Referring to FIG. 10 and FIG. 11d, the method of manufacturing a display device (2) may include the step (S16) of placing a barrier layer (e.g., a second barrier layer (104)) on a first mask layer (MLY1). The second barrier layer (104) may cover the first mask layer (MLY1) and the first sacrificial layer (SR1). The second barrier layer (104) may not overlap with the second mask layer (MLY2). The first base layer (101), the first barrier layer (102), the second base layer (103), and the second barrier layer (104) that overlap with the first mask layer (MLY1) may form a substrate (100) of a plurality of first island portions (11).

[0199] Referring to FIGS. 10, FIGS. 11e and FIGS. 11f, the manufacturing method (2) of a display device may include the step of placing a pixel circuit layer (PCL) on a barrier layer (e.g., a second barrier layer (104)) (S17), the step of placing a wiring layer (WLL) on a base layer (S18), and the step of etching the barrier layer (S19).

[0200] As illustrated in FIG. 11e, an insulating layer (IL), a pixel driving circuit (PC), wiring (WL), and a light-emitting element (LED) may be disposed on the second barrier layer (104) and the second mask layer (MLY2).

[0201] As illustrated in FIG. 11f, a planarization film (310) may be disposed on an insulating layer (IL) to cover a light-emitting element (LED). For example, the planarization film (310) may comprise an inorganic insulating material and / or an organic insulating material. For example, the planarization film (310) may comprise an inorganic material such as resin and / or urethane epoxy acrylate. For example, the planarization film (310) may comprise a photosensitive material, such as a photoresist.

[0202] The insulating layer (IL) can be etched so that a first-2 opening (CS1-2) is formed that overlaps with the first-1 opening (CS1-1) and penetrates the insulating layer (IL). The insulating layer (IL) can be etched by a known photolithography process. The etching of the insulating layer (IL) can be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. As the insulating layer (IL) is etched, a pixel circuit layer (PCL) and a wiring layer (WLL) can be formed. That is, the step of placing the pixel circuit layer (PCL) (S17) and the step of placing the wiring layer (WLL) (S18) can be performed simultaneously.

[0203] The pixel circuit layer (PCL) and the wiring layer (WLL) may be spaced apart from each other with a first-second opening (CS1-2) in between on a cross-section. At this time, considering the tolerance during the etching process, the width of the first-second opening (CS1-2) may be formed wider than the width of the first-first opening (CS1-1). That is, the width of the first-first opening (CS1-1) may be narrower than the width of the first-second opening (CS1-2).

[0204] The portion of the second barrier layer (104) that overlaps with the first opening (CS1-1) can be etched. The second barrier layer (104) can be etched by a known photolithography process. The etching of the second barrier layer (104) can be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. As the second barrier layer (104) is etched, the first sacrificial layer (SR1) can be exposed from the second barrier layer (104).

[0205] Referring to FIGS. 10, FIGS. 11f and FIGS. 11g, the method for manufacturing a display device (2) may include a step (S191) of removing a first sacrificial layer (SR1).

[0206] The first sacrificial layer (SR1) can be removed by an etching process. The etching of the first sacrificial layer (SR1) can be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. During the etching process of the first sacrificial layer (SR1), the first base layer (101) and the second base layer (103) may not be etched at all.

[0207] Referring to FIG. 10 and FIG. 11h, the method for manufacturing a display device (2) may include the step (S192) of placing a carrier film (CRF) on a pixel circuit layer (PCL). The carrier film (CRF) may be attached to a planarization film (310) by an adhesive layer. The carrier film (CRF) is a protective film that facilitates handling during subsequent processes and may include a flexible plastic material such as polyethylene terephthalate (PET) or polyimide.

[0208] Referring to FIG. 10 and FIG. 11i, the method (2) for manufacturing a display device may include a step (S193) of removing a carrier substrate (CSUB). The carrier substrate (CSUB) may be separated from the substrate (100) by a laser lift-off method by irradiating a laser beam onto the lower part of the carrier substrate (CSUB). Alternatively, the carrier substrate (CSUB) may be separated from the substrate (100) using a known physical or chemical method.

[0209] Referring to FIGS. 10, 11i, and 11j, the manufacturing method (2) of a display device may include a step (S194) of removing a carrier film (CRF). At this time, the first encapsulation layer (510) may be attached to the lower surface of the substrate (100) by a lamination process. The second encapsulation layer (520) may be attached to the upper surface of the planarization film (310) by a lamination process. That is, between the first encapsulation layer (510) and the second encapsulation layer (520), the substrate (100), the pixel circuit layer (PCL), the light-emitting element (LED), and the wiring layer (WLL) may be disposed.

[0210] The first encapsulation layer (510) and the second encapsulation layer (520) may be made of stretched sheets. The first encapsulation layer (510) may be provided with an elastomer film, a polydimethylsiloxane (PDMS) film and / or a silicone film, etc. The second encapsulation layer (520) may be made of a stretched sheet. The second encapsulation layer (520) may be provided with the same material as the first encapsulation layer (510). The second encapsulation layer (520) may be provided with an elastomer film, a polydimethylsiloxane (PDMS) film and / or a silicone film, etc.

[0211] In one embodiment, the step of etching the substrate (100) (specifically, the first base layer (101) and the second base layer (103)) and the step of etching the pixel circuit layer (PCL) and the wiring layer (WLL) (specifically, the insulating layer (IL)) may not proceed simultaneously. The substrate (100) may be etched first, and then the pixel circuit layer (PCL) and the wiring layer (WLL) may be etched.

[0212] In such a process, the substrate (100), the pixel circuit layer (PCL), and the wiring layer (WLL) may not be exposed to the etching process for a long time at once. Therefore, the phenomenon of damage to the pixel driving circuit (PC) and the wiring (WL) caused by the etching process for a long time may be reduced. In addition, the phenomenon of a height difference forming between the pixel circuit layer (PCL) and the wiring layer (WLL) after the etching process is completed may be reduced.

[0213] Unlike as illustrated in FIGS. 10 to 11i, the method for manufacturing a display device (2) may further include the step of removing a second mask layer (MLY2) after the step (S14) of forming a first opening (CS1-1). According to such a process, as a result, the second mask layer (MLY2) may not be placed in a plurality of first bridge parts (12) as illustrated in FIG. 9b. Accordingly, the elongation rate of a plurality of first bridge parts (12) may be improved.

[0214] As illustrated in FIGS. 10 to 11i, the manufacturing method (2) of the display device may not include the step of removing the second mask layer (MLY2). According to such a process, as a result, the second mask layer (MLY2) may be disposed in a plurality of first bridge portions (12) as illustrated in FIG. 9a. In such a process, the manufacturing process is simplified, so the manufacturing time and manufacturing cost of the display device (1) may be reduced.

[0215] FIG. 12 is a schematic cross-sectional view of a display device (1) according to one embodiment of the present invention.

[0216] Specifically, FIG. 12 is a cross-sectional view of a display device (1) along the line IX-IX' of FIG. 8a.

[0217] Referring to FIG. 12, the display device (1) may include a substrate (100), a pixel circuit layer (PCL), a wiring layer (WLL), and a light-emitting element (LED).

[0218] A substrate (100) overlapping with a plurality of first island portions (11) may include a first base layer (101), a first barrier layer (102), a second base layer (103), and a second barrier layer (104). The first barrier layer (102) may be disposed on the first base layer (101), the second base layer (103) may be disposed on the first barrier layer (102), and the second barrier layer (104) may be disposed on the second base layer (103).

[0219] The first barrier layer (102) and the second barrier layer (104) may surround the second base layer (103). The second base layer (103) may be sealed by the first barrier layer (102) and the second barrier layer (104). The second base layer (103) may be accommodated in the first barrier layer (102). The lower surface and side surface of the second base layer (103) may be in contact with the first barrier layer (102), and the upper surface of the second base layer (103) may be in contact with the second barrier layer (104). The first barrier layer (102) may include a first-1 barrier portion (102-1) and a first-2 barrier portion (102-2).

[0220] The first barrier portion (102-1) may be provided in a flat layer shape. The first barrier portion (102-1) may support the lower surface of the second base layer (103). The lower surface of the first barrier portion (102-1) may be in contact with the first base layer (101), and the upper surface of the first barrier portion (102-1) may be in contact with the second base layer (103).

[0221] The first-second barrier portion (102-2) may extend from the first-first barrier portion (102-1) toward the second barrier portion. The first-second barrier portion (102-2) may extend from the edge of the first-first barrier portion (102-1). The first-second barrier portion (102-2) may surround the second base layer (103). The second base layer (103) may be accommodated in the first-first barrier portion (102-1). The first-second barrier portion (102-2) and the second barrier layer (104) may be in contact with each other. The upper surface of the first-second barrier portion (102-2) may be connected to the edge of the second barrier layer (104).

[0222] The first base layer (101) and the second base layer (103) may each contain the same material. For example, the first base layer (101) and the second base layer (103) may each contain a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc. The first barrier layer (102) and the second barrier layer (104) may each contain the same material. The first barrier layer (102) and the second barrier layer (104) may each contain an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride.

[0223] A substrate (100) overlapping with a plurality of first bridge portions (12) may include the same material as the first base layer (101) and / or the second base layer (103). For example, a substrate (100) overlapping with a plurality of first bridge portions (12) may include a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc.

[0224] In such a structure, the substrate (100) may include a base layer that overlaps with each of the plurality of first island portions (11) and the plurality of first bridge portions (12). Although FIG. 12 illustrates that the substrate (100) overlapping with the plurality of first bridge portions (12) has a single base layer structure, this is merely an example, and the substrate (100) overlapping with the plurality of first bridge portions (12) may have a stacked structure of two base layers. Additionally, the substrate (100) may further include a barrier layer (e.g., a first barrier layer (102) and / or a second barrier layer (104)) that overlaps with the plurality of first island portions (11). The barrier layer may be arranged to be spaced apart from the plurality of first bridge portions (12).

[0225] A pixel circuit layer (PCL) may be disposed on a substrate (100) that overlaps with a plurality of first island portions (11). The pixel circuit layer (PCL) may include an inorganic insulating layer (IOL) and a pixel driving circuit portion (PC). For example, the inorganic insulating layer (IOL) may include a buffer layer (111), a gate insulating layer (113), a first interlayer insulating layer (115), and a second interlayer insulating layer (117). For example, the pixel driving circuit portion (PC) may include a thin-film transistor (TFT) and a storage capacitor (Cst).

[0226] A buffer layer (111) is disposed on a substrate (100) that overlaps with a plurality of first island portions (11), and a pixel driving circuit portion (PC) may be disposed on the buffer layer (111). The buffer layer (111) may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0227] A thin-film transistor (TFT) may include a semiconductor layer (Act), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). FIG. 12 illustrates a top-gate type in which the gate electrode (GE) is placed on the semiconductor layer (Act) with the gate insulating layer (113) in between, but according to other embodiments, the thin-film transistor (TFT) may be a bottom-gate type.

[0228] The semiconductor layer (Act) may include polysilicon. Alternatively, the semiconductor layer (Act) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode (GE) may include a low-resistance metal material. The gate electrode (GE) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0229] The gate insulating layer (113) between the semiconductor layer (Act) and the gate electrode (GE) may include an inorganic insulating material such as silicon oxide, nitrogen oxide, silicon oxynitride, aluminum oxide, or titanium oxide. The gate insulating layer (113) may be a single layer or a multilayer containing the aforementioned materials.

[0230] The source electrode (SE) and the drain electrode (DE) may be located on the same layer, for example, the second interlayer insulating layer (117), and may contain the same material. The source electrode (SE) and the drain electrode (DE) may contain a conductive material and may be formed as a multilayer or a single layer. The second interlayer insulating layer (117) may contain an inorganic insulating material such as silicon oxide, nitrogen oxide, silicon oxynitride, aluminum oxide, or titanium oxide, and may be a single layer or a multilayer containing the aforementioned material.

[0231] A storage capacitor (Cst) may include a first electrode (CE1) and a second electrode (CE2) that overlap along the z-direction with a first interlayer insulating layer (115) in between. The storage capacitor (Cst) may overlap with a thin-film transistor (TFT). In this regard, FIG. 12 illustrates that the gate electrode (GE) of the thin-film transistor (TFT) is the first electrode (CE1) of the storage capacitor (Cst). In another embodiment, the storage capacitor (Cst) may not overlap with the thin-film transistor (TFT). The storage capacitor (Cst) may be covered by a second interlayer insulating layer (207). The second electrode (CE2) of the storage capacitor (Cst) may include a conductive material and may be formed as a multilayer or a single layer. The first interlayer insulating layer (115) may be placed between the gate insulating layer (113) and the second interlayer insulating layer (117). The first interlayer insulating layer (115) may include an inorganic insulating material such as silicon oxide, nitrogen oxide, silicon oxynitride, aluminum oxide, and titanium oxide, and may be a single layer or a multilayer containing the aforementioned material.

[0232] For example, the pixel circuit layer (PCL) may include a first organic insulating layer (119), a second organic insulating layer (121), and a third organic insulating layer (123). The first organic insulating layer (119) may be disposed on the second interlayer insulating layer (117), and the second organic insulating layer (121) may be disposed on the first organic insulating layer (119). The first organic insulating layer (119) and the second organic insulating layer (121) may each include an organic insulating material such as polyimide.

[0233] The second voltage line (VSSL) is disposed on the second organic insulating layer (121), and the third organic insulating layer (123) may be disposed on the second organic insulating layer (121) and the second voltage line (VSSL). The third organic insulating layer (123) may include an organic insulating material such as polyimide. The second voltage line (VSSL) may include a conductive material and may be formed as a multilayer or a single layer.

[0234] The first electrode pad (241) and the second electrode pad (242) may be disposed on the third organic insulating layer (123). The first electrode pad (241) may be electrically connected to a thin film transistor (TFT) through a first connecting electrode (CM1) between the first organic insulating layer (119) and the second organic insulating layer (121) and a second connecting electrode (CM2) between the second organic insulating layer (121) and the third organic insulating layer (123).

[0235] A light-emitting element (LED) may be disposed on a pixel circuit layer (PCL). The light-emitting element (LED) may include an organic light-emitting diode (220, see FIG. 7a) (LED) described with reference to FIG. 7a and / or an inorganic light-emitting diode (230) described with reference to FIG. 7b. Hereinafter, the description will be based on the premise that the light-emitting element (LED) includes an inorganic light-emitting diode (230).

[0236] A wiring layer (WLL) may be disposed on a substrate (100) so as to overlap with a plurality of first bridge portions (12). Since a barrier layer is not disposed on the plurality of first bridge portions (12), the wiring layer (WLL) may be disposed on a base layer that overlaps with the plurality of first bridge portions (12). The wiring layer (WLL) may include a first insulating layer (OL), a first organic insulating layer (119), a second organic insulating layer (121), a third organic insulating layer (123), and wiring (WL).

[0237] On the substrate (100) overlapping with a plurality of first bridge portions (12), an inorganic insulating layer (IOL) is not disposed, and a first insulating layer (OL), a first organic insulating layer (119), and a second organic insulating layer (121) may be disposed. The first insulating layer (OL) may include an organic insulating material such as polyimide. In one embodiment, the first insulating layer (OL) may have a thickness corresponding to that of the inorganic insulating layer (IOL). In some embodiments, the first insulating layer (OL) may be omitted.

[0238] A plurality of wirings (WL), for example, first to third wirings (WL1, WL2, WL3), may each be disposed on different layers but may be electrically connected to the same pixel driving circuit (PC). For example, the first wiring (WL1) may be disposed between the second organic insulating layer (121) and the third organic insulating layer (123), the second wiring (WL2) may be disposed between the first organic insulating layer (119) and the second organic insulating layer (121), and the third wiring (WL3) may be disposed between the first insulating layer (OL) and the first organic insulating layer (119). However, the present invention is not limited thereto, and in other embodiments, at least some of the first to third wirings (WL1, WL2, WL3) may be disposed on the same layer. In such a structure, the pixel circuit layer (PCL) and the wiring layer (WLL) can be placed on the same layer.

[0239] A first opening (CS1) disposed between a plurality of first island portions (11) and a plurality of first bridge portions (12) in a cross-section may include a first-1 opening (CS1-1) and a first-2 opening (CS1-2) disposed to overlap each other. The first-1 opening (CS1-1) penetrates the substrate (100), and the first-2 opening (CS1-2) may penetrate the pixel circuit layer (PCL) and the wiring layer (WLL). In a cross-section, the substrate (100) overlapping with the plurality of first island portions (11) and the substrate (100) overlapping with the plurality of first bridge portions (12) may be spaced apart from each other with the first-1 opening (CS1-1) in between. In a cross-section, the pixel circuit layer (PCL) and the wiring layer (WLL) may be spaced apart with the first-2 opening (CS1-2) in between.

[0240] The width of the substrate (100) overlapping with the first island portion (11) may be wider than the width of the pixel circuit layer (PCL). The width of each of the first barrier layer (102) and the second barrier layer (104) may be wider than the width of the pixel circuit layer (PCL). The width of the substrate (100) overlapping with the first bridge portion (12) may be wider than the width of the wiring layer (WLL). In such a structure, the width of the first-1 opening (CS1-1) in cross-section may be narrower than the width of the first-2 opening (CS1-2).

[0241] FIG. 13 is a schematic flowchart of a method (2) for manufacturing a display device according to one embodiment of the present invention, and FIG. 14a to 14h are schematic cross-sectional views of a display device (1) according to one embodiment of the present invention.

[0242] Referring to FIGS. 13 to 14h, the manufacturing method (2) of the display device described with reference to FIG. 12 can be seen.

[0243] In FIGS. 13 to 14h, the same reference numerals as in FIG. 12 refer to the same components, so a redundant description thereof is omitted.

[0244] First, referring to FIG. 13 and FIG. 14a, the method for manufacturing a display device (2) may include the step (S21) of placing a first sacrificial layer (SR1) on a carrier substrate (CSUB).

[0245] The first sacrificial layer (SR1) may include a first-1 sacrificial opening (OPS1-1) and a first-2 sacrificial opening (OPS1-2). In cross-section, the first-1 sacrificial opening (OPS1-1) and the first-2 sacrificial opening (OPS1-2) may be spaced apart from each other. For example, the first sacrificial layer (SR1) may include at least one of metal ink, metal paste, and liquid silicon. The carrier substrate (CSUB) serves to support the first sacrificial layer (SR1) and the substrate (100, FIG. 14f) described later during the process and may be provided as glass.

[0246] Referring to FIG. 13 and FIG. 14b, the manufacturing method (2) of a display device may include the step (S22) of placing a first base layer (101) in a first-1 sacrificial opening (OPS1-1) and a first-2 sacrificial opening (OPS1-2), and the step (S23) of placing a first barrier layer (102) on the first sacrificial layer (SR1).

[0247] In the step (S22) of placing the first base layer (101), the first base layer (101) may be accommodated in each of the first-1 sacrificial opening (OPS1-1) and the first-2 sacrificial opening (OPS1-2). The first base layer (101) may be supported by a carrier substrate (CSUB). The height of the first base layer (101) may be lower than the height of the first sacrificial layer (SR1). In the step (S23) of placing the first barrier layer (102), at least a portion of the first barrier layer (102) may be placed in the first-1 sacrificial opening (OPS1-1). The first barrier layer (102) may cover the first base layer (101) placed in the first-1 sacrificial opening (OPS1-1). The first barrier layer (102) may come into contact with the inner surface of the first sacrificial layer (SR1) forming the first-1 sacrificial opening (OPS1-1). At this time, the first barrier layer (102) may not overlap with the first-2 sacrificial opening (OPS1-2).

[0248] Referring to FIG. 13 and FIG. 14c, the method (2) for manufacturing a display device may include the step (S24) of placing a second base layer (103) on a first base layer (101). The second base layer (103) may be placed in a first-1 sacrificial opening (OPS1-1) and a first-2 sacrificial opening (OPS1-2). The second base layer (103) placed in the first-1 sacrificial opening (OPS1-1) may be placed on a first barrier layer (102). The height of the upper surface of the second base layer (103) may be the same as the height of the upper surface of the first barrier layer (102). The etching selectivity ratio of the first sacrificial layer (SR1) to the first base layer (101) and the second base layer (103) may exceed 1. The first base layer (101) and the second base layer (103) disposed in the first-second sacrificial opening (OPS1-2) can form a substrate (100) of a plurality of first bridge portions.

[0249] Referring to FIGS. 13 and FIGS. 14d, the method of manufacturing a display device (2) may include the step (S25) of placing a second barrier layer (104) on a first barrier layer (102). In the step (S25) of placing the second barrier layer (104), the second barrier layer (104) may cover a second base layer (103) that overlaps with a first-1 sacrificial opening (OPS1-1). The first barrier layer (102) and the second barrier layer (104) are in contact with each other, and the first barrier layer (102) and the second barrier layer (104) may surround the second base layer (103). At this time, the second barrier layer (104) may not overlap with a first-2 sacrificial opening (OPS1-2). A first base layer (101), a first barrier layer (102), a second base layer (103), and a second barrier layer (104) overlapping with a first-1 sacrificial opening (OPS1-1) can form a substrate (100) of a plurality of first island portions (11).

[0250] Referring to FIGS. 13, 14e and 14f, the manufacturing method (2) of a display device may include the step of placing a pixel circuit layer (PCL) on a second barrier layer (104) (S26), the step of placing a wiring layer (WLL) on the second barrier layer (104) (S27), the step of etching the second barrier layer (104) (S28), and the step of etching the first barrier layer (102) (S29).

[0251] As illustrated in FIG. 14e, an insulating layer (IL), a pixel driving circuit (PC), wiring (WL), and a light-emitting element (LED) may be disposed on the second barrier layer (104) and the second base layer (103).

[0252] As illustrated in FIG. 14f, a planarization film (310) may be disposed on an insulating layer (IL) to cover a light-emitting element (LED). For example, the planarization film (310) may comprise an inorganic insulating material and / or an organic insulating material. For example, the planarization film (310) may comprise an inorganic material such as resin and / or urethane epoxy acrylate. For example, the planarization film (310) may comprise a photosensitive material, such as a photoresist.

[0253] The insulating layer (IL) can be etched so that a first-2 opening (CS1-2) penetrating the insulating layer (IL) is formed. The insulating layer (IL) can be etched by a known photolithography process. The etching of the insulating layer (IL) can be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. As the insulating layer (IL) is etched, a pixel circuit layer (PCL) and a wiring layer (WLL) can be formed. That is, the step of placing the pixel circuit layer (PCL) (S26) and the step of placing the wiring layer (WLL) (S27) can be performed simultaneously. The pixel circuit layer (PCL) may overlap with the first-1 sacrificial opening (OPS1-1), and the wiring layer (WLL) may overlap with the first-2 sacrificial opening (OPS1-2).

[0254] The pixel circuit layer (PCL) and the wiring layer (WLL) may be spaced apart from each other with a first-second opening (CS1-2) in between on a cross-section. At this time, considering the tolerance during the etching process, the width of the first-second opening (CS1-2) may be formed wider than the width of the first sacrificial layer (SR1). That is, the width of the first sacrificial layer (SR1) may be narrower than the width of the first-second opening (CS1-2).

[0255] The portion of the second barrier layer (104) that overlaps with the first sacrificial layer (SR1) may be etched. The second barrier layer (104) may be etched by a known photolithography process. The etching of the second barrier layer (104) may be carried out on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution.

[0256] The portion of the first barrier layer (102) that overlaps with the first sacrificial layer (SR1) may be etched. The first barrier layer (102) may be etched by a known photolithography process. The etching of the first barrier layer (102) may be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. As the second barrier layer (104) and the first barrier layer (102) are etched, the first sacrificial layer (SR1) may be exposed from the second barrier layer (104).

[0257] Referring to FIGS. 13, 14f and 14g, the method for manufacturing a display device (2) may include a step (S291) of removing a first sacrificial layer (SR1).

[0258] The first sacrificial layer (SR1) can be removed by an etching process. The etching of the first sacrificial layer (SR1) can be performed on the upper part of the display device (1) by dry etching using an etching gas or wet etching using an etching solution. During the etching process of the first sacrificial layer (SR1), the first base layer (101) and the second base layer (103) may not be etched at all. As the first sacrificial layer (SR1) is etched, a first-1 opening (CS1-1) may be formed at the location where the first sacrificial layer (SR1) is placed.

[0259] Referring to FIG. 13, FIG. 14g and FIG. 14h, the method for manufacturing a display device (2) may include the step (S292) of removing a carrier substrate (CSUB).

[0260] The carrier substrate (CSUB) can be separated from the substrate (100) by irradiating a laser beam onto the lower part of the carrier substrate (CSUB) using a laser lift-off method. Alternatively, the carrier substrate (CSUB) can be separated from the substrate (100) using known physical or chemical methods. Since the step (S292) of removing the carrier substrate (CSUB) has been described above with reference to FIGS. 11h to 11j, a detailed description will be omitted.

[0261] When the carrier substrate (CSUB) is removed, the first encapsulation layer (510) can be attached to the lower surface of the substrate (100) through a lamination process, and the second encapsulation layer (520) can be attached to the upper surface of the planarization film (310) through a lamination process. That is, between the first encapsulation layer (510) and the second encapsulation layer (520), the substrate (100), the pixel circuit layer (PCL), the light-emitting element (LED), and the wiring layer (WLL) can be arranged.

[0262] The first encapsulation layer (510) and the second encapsulation layer (520) may be made of stretched sheets. The first encapsulation layer (510) may be provided with an elastomer film, a polydimethylsiloxane (PDMS) film and / or a silicone film, etc. The second encapsulation layer (520) may be made of a stretched sheet. The second encapsulation layer (520) may be provided with the same material as the first encapsulation layer (510). The second encapsulation layer (520) may be provided with an elastomer film, a polydimethylsiloxane (PDMS) film and / or a silicone film, etc.

[0263] In one embodiment, the step of etching the substrate (100) (specifically, the first base layer (101) and the second base layer (103)) and the step of etching the pixel circuit layer (PCL) and the wiring layer (WLL) (specifically, the insulating layer (IL)) may not be performed simultaneously.

[0264] In such a process, the substrate (100), the pixel circuit layer (PCL), and the wiring layer (WLL) may not be exposed to the etching process for a long time at once. Therefore, the phenomenon of damage to the pixel driving circuit (PC) and the wiring (WL) caused by the etching process for a long time may be reduced. In addition, the phenomenon of a height difference forming between the pixel circuit layer (PCL) and the wiring layer (WLL) after the etching process is completed may be reduced.

[0265] FIG. 15a is a schematic perspective view of an electronic device (1000) including a display device according to one embodiment of the present invention, and FIG. 15b is a schematic block diagram of an electronic device (1000) including a display device (1) according to one embodiment of the present invention.

[0266] Referring to FIG. 15a, the electronic device (1000) can be freely deformed in three dimensions and can provide a three-dimensional image surface through the display area (DA). The statement that the electronic device (1000) can be freely deformed in three dimensions is distinguished from the operation of an electronic device having a rollable display device, such as when a part of the rolled-up display area is visible to the user, and then another part of the rolled-up display area is unfolded so that the entire display area is visible to the user (or when the entire unfolded display area is visible to the user, and then the display area is rolled up so that only a part of the display area is visible to the user). The electronic device (1000) according to embodiments of the present invention may exhibit a deformation such as the area of ​​the entire display area (DA) increasing or decreasing again as the electronic device (1000) is deformed in the x direction, y direction, and / or z direction.

[0267] Referring to FIG. 15b, the electronic device (1000) may include a processor (1100), memory (1200), input module (1300), display module (1400), power module (1500), built-in module (1600), and external module (1700). According to one embodiment, at least one of the above-described components may be omitted from the electronic device (1000), or one or more other components may be added. According to one embodiment, some of the above-described components (e.g., built-in module (1600)) may be integrated into another component (e.g., display module (1400)).

[0268] The processor (1100) can execute software to control at least one other component (e.g., a hardware or software component) of an electronic device (1000) connected to the processor (1100) and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (1100) can store commands or data received from other components (e.g., an input module (1300), a sensor module (1610), or a communication module (1730)) in a volatile memory (1210), process the commands or data stored in the volatile memory (1210), and store the resulting data in a non-volatile memory (1220).

[0269] The processor (1100) may include a main processor (1110) and an auxiliary processor (1120). The main processor (1110) may include at least one of a central processing unit (1111, CPU) and an application processor (AP). The main processor (1110) may further include at least one of a graphic processing unit (1112, GPU), a communication processor (CP), and an image signal processor (ISP). The main processor (1110) may further include a neural processing unit (1113, NPU). The neural processing unit is a processor specialized for processing artificial intelligence models, and the artificial intelligence model may be generated through machine learning. The artificial intelligence model may include a plurality of artificial neural network layers. An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially. At least two of the processing unit and processor described above may be implemented as a single integrated configuration (e.g., a single chip), or each may be implemented as an independent configuration (e.g., multiple chips).

[0270] The auxiliary processor (1120) may include a controller (1121). The controller (1121) may include an interface conversion circuit and a timing control circuit. The controller (1121) receives a video signal from the main processor (1110), converts the data format of the video signal to match the interface specifications with the display module (1400), and outputs video data. The controller (1121) may output various control signals required for driving the display module (1400).

[0271] The auxiliary processor (1120) may further include data processing circuits such as a data conversion circuit (1122), a gamma correction circuit (1123), and a rendering circuit (1124). The data conversion circuit (1122) receives image data from the controller (1121) and can compensate the image data so that the image is displayed at a desired brightness according to the characteristics of the electronic device (1000) or the user's settings, or can convert the image data to reduce power consumption or compensate for afterimages. The gamma correction circuit (1123) can convert image data or gamma reference voltage, etc. so that the image displayed on the electronic device (1000) has desired gamma characteristics. The rendering circuit (1124) receives image data from the controller (1121) and can render the image data by considering the pixel arrangement of the display device (1) applied to the electronic device (1000). At least one of the data conversion circuit (1122), gamma correction circuit (1123), and rendering circuit (1124) may be integrated into another component (e.g., main processor (1110) or controller (1121)). In one embodiment, the auxiliary processor (1120) may be integrated into the data driver (1430).

[0272] The memory (1200) can store various data used by at least one component of the electronic device (1000) (e.g., a processor (1100) or a sensor module (1610)) and input or output data for commands related thereto. The memory (1200) may include at least one of a volatile memory (1210) and a non-volatile memory (1220).

[0273] The input module (1300) can receive commands or data to be used for components of the electronic device (1000) (e.g., processor (1100), sensor module (1610) or sound output module (1630)) from outside the electronic device (1000) (e.g., user or external electronic device (2000)).

[0274] The input module (1300) may include a first input module (1310) into which commands or data are input from a user and a second input module (1320) into which commands or data are input from an external electronic device (2000).

[0275] The first input module (1310) may include a microphone, a mouse, a keyboard, or a pen (e.g., a passive pen or an active pen). The first input module (1310) may include mechanical input means or touch input means, such as a button, a dome switch, a jog wheel, a jog switch, etc., located on the rear or side of the electronic device (1000). The touch input means may include a touchscreen layer of the display device (1).

[0276] The second input module (1320) can be connected to various types of external electronic devices (2000) connected to the electronic device (1000) via wired or wireless connection. According to one embodiment, the second input module (1320) may include a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface. The second input module (1320) may include a connector capable of physically connecting the electronic device (1000) to the external electronic device (2000), for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector). The electronic device (1000) can perform appropriate control related to the connected external electronic device (2000) in response to the external electronic device (2000) being connected to the second input module (1320).

[0277] The display module (1400) provides information visually to the user. The display module (1400) may include a display device (1), a scan driver (1420), and a data driver (1430).

[0278] The display device (1) displays (outputs) information processed by the electronic device (1000). The display device (1) can display information on the execution screen of an application running on the electronic device (1000), or UI (User Interface) and GUI (Graphic User Interface) information based on the execution screen information.

[0279] The scan driver (1420) may be mounted on the display device (1) as a driving chip. Alternatively, the scan driver (1420) may be formed directly on the display device (1). For example, the scan driver (1420) may include an ASG (Amorphous Silicon TFT Gate driver circuit), an LTPS (Low Temperature Polycrystalline Silicon) TFT Gate driver circuit, or an OSG (Oxide Semiconductor TFT Gate driver circuit) embedded in the display device (1). The scan driver (1420) receives a control signal from the controller (1121) and outputs scan signals to the display device (1) in response to the control signal.

[0280] The display device (1) may further include a light emission control driver. The light emission driver outputs a light emission control signal to the display device (1) in response to a control signal received from the controller (1121). The light emission control driver may be formed separately from the scan driver (1420) or may be integrated into the scan driver (1420).

[0281] The data driver (1430) receives a control signal from the controller (1121), converts the image data into an analog voltage data voltage in response to the control signal, and then outputs the data voltages to the display device (1).

[0282] The data driver (1430) may be integrated with some components of the auxiliary processor (1120). For example, the data driver (1430) may be provided as a timing controller embedded driver integrated circuit (Timing controller embedded driver IC) including a controller (1121).

[0283] The power module (1500) supplies power to the components of the electronic device (1000). The power module (1500) may include a battery that charges the power voltage. Additionally, the power module (1500) is provided with a connection port, and the connection port may be included in a second input module (1320) to which an external charger that supplies power for charging the battery is connected. Alternatively, the power module (1500) may include a wireless power transmission and reception member so that the battery can be charged wirelessly. The wireless power transmission and reception member may include a plurality of coil-shaped antenna radiators. The power module (1500) may include a PMIC (power management integrated circuit). The PMIC supplies optimized power to each of the components of the electronic device (1000).

[0284] The electronic device (1000) may further include an internal module (1600) and an external module (1700). The internal module (1600) may include a sensor module (1610), an antenna module (1620), and an audio output module (1630). The external module (1700) may include a camera module (1710), a light module (1720), and / or a communication module (1730).

[0285] The sensor module (1610) may include touch electrodes of the touchscreen layer of the display device (1) and a touch sensor driver. The sensor module (1610) may detect input by the user's body or input by a pen and generate an electrical signal or data value corresponding to the input. The sensor module (1610) may include at least one of a fingerprint sensor (1611), an input sensor (1612), a digitizer (1613), and a strain sensor (1614).

[0286] The fingerprint sensor (1611) can generate a data value corresponding to the user's fingerprint. The fingerprint sensor (1611) may include either an optical or capacitive fingerprint sensor.

[0287] The input sensor (1612) can generate a data value corresponding to coordinate information of input by the user's body or input by a pen. The input sensor (1612) generates a data value of the amount of change in capacitance due to the input. The input sensor (1612) can detect input by a passive pen or transmit and receive data with an active pen.

[0288] The input sensor (1612) may measure biosignals such as blood pressure, water content, or body fat. For example, if a user contacts a part of their body to the sensor layer or sensing panel and does not move for a certain period of time, the input sensor (1612) may detect biosignals based on changes in the electric field caused by the part of the body and output information desired by the user to the display module (1400).

[0289] The digitizer (1613) can generate a data value corresponding to the coordinate information of the input by the pen. The digitizer (1613) generates the amount of electromagnetic change caused by the input as a data value. The digitizer (1613) can detect input by a passive pen or transmit and receive data with an active pen.

[0290] The strain sensor (1614) may include layers, patterns, or wirings in which a measurable physical quantity changes according to the stretching of the display device (1). For example, the strain sensor (1614) may include wirings in which resistance and / or capacitance changes due to the stretching of the display panel (DP). In another embodiment, the strain sensor (1614) may include an optical layer or optical pattern in which transmittance and / or reflectance changes due to the stretching of the display device (1).

[0291] Based on the physical quantity of the stretching of the display device (1) measured by the strain sensor (1614), the electronic device (1000) can improve the quality of the image implemented in the display device (1) or control the display device (1). The control operation of the display device (1) may include, for example, displaying an operation image for the protection of the display device (1), cutting off the voltage for driving the display device (1), or stopping the stretching operation of the display device (1).

[0292] In one embodiment, at least one of a fingerprint sensor (1611), an input sensor (1612), a digitizer (1613), and a strain sensor (1614) may be embedded in the display device (1). For example, at least one of the fingerprint sensor (1611), the input sensor (1612), the digitizer (1613), and the strain sensor (1614) may be formed through a process that is continuous with the process of forming the pixel circuits and light-emitting diodes of the display device (1). As a result, the display device (1) may function as one of the input modules (1300) that provide an input interface between the electronic device (1000) and the user, and may also function as a display module (1400) that provides an output interface between the electronic device (1000) and the user.

[0293] In one embodiment, at least two of the fingerprint sensor (1611), input sensor (1612), digitizer (1613), and strain sensor (1614) may be formed to be integrated into a single sensing panel through the same process. In one embodiment, the sensing panel may be positioned between the display device (1) and a window positioned above the display device (1), but the present invention is not limited thereto.

[0294] The antenna module (1620) may include one or more antennas for transmitting a signal or power to the outside or receiving it from the outside. According to one embodiment, the communication module (1730) may transmit a signal to an external electronic device or receive it from an external electronic device through an antenna suitable for a communication method. The antenna pattern of the antenna module (1620) may be integrated with one component of the display module (1400) (e.g., a display device (1)) or an input sensor (1612), etc.

[0295] The sound output module (1630) is a device for outputting sound signals to the outside of the electronic device (1000), and can output sound data received from the communication module (1730) or stored in the memory (1200) in call signal reception, call mode or recording mode, voice recognition mode, broadcast reception mode, etc. The sound output module (1630) can output sound signals related to functions performed in the electronic device (1000) (e.g., call signal reception sound, message reception sound, etc.). The sound output module (1630) may include a receiver and a speaker. At least one of the receiver and the speaker may be a sound generating device attached to the bottom of the display device (1) to vibrate the display device (1) and output sound. The sound generating device may be a piezoelectric element or a piezoelectric actuator that contracts and expands according to an electric signal, or an exciter that generates magnetic force using a voice coil to vibrate the display device (1).

[0296] The camera module (1710) can capture still images and video. According to one embodiment, the camera module (1710) may include one or more lenses, image sensors, or image signal processors. The camera module (1710) may further include an infrared camera capable of measuring the presence or absence of a user, the location of the user, the user's gaze, etc.

[0297] The light module (1720) can use light from a light source to output a signal to indicate the occurrence of an event or provide light for image acquisition. Here, examples of event occurrences may include receiving a message, receiving a call signal, a missed call, an alarm, a schedule notification, receiving an email, or receiving battery charge capacity information notifications. The light module (1720) may include a light-emitting diode or a xenon lamp. The light module (1720) may emit single-color or multiple-color light toward the front or rear of the electronic device (1000). The light module (1720) may operate in conjunction with the camera module (1710) or operate independently.

[0298] The communication module (1730) can support the establishment of a wired or wireless communication channel between an electronic device (1000) and an external electronic device (2000), and the performance of communication through the established communication channel. The communication module (1730) may include one or all of a wireless communication module such as a cellular communication module, a short-range wireless communication module, or a GNSS (global navigation satellite system) communication module, and a wired communication module such as a LAN (local area network) communication module or a power line communication module. The communication module (1730) can transmit and receive wireless signals over an internet network using at least one of WLAN (Wireless LAN), Wi-Fi (Wireless-Fidelity), Wi-Fi (Wireless Fidelity) Direct, and DLNA (Digital Living Network Alliance) technologies. Additionally, the communication module (1730) can support short-range communication by using at least one of Bluetooth, RFID (Radio Frequency Identification), Infrared Data Association (IrDA), Ultra Wideband (UWB), ZigBee, NFC (Near Field Communication), Wi-Fi (Wireless-Fidelity), Wi-Fi Direct, and Wireless USB (Wireless Universal Serial Bus) technologies. The various types of communication modules (1730) described above may be implemented as a single chip or as separate chips.

[0299] FIGS. 16a to 16d are schematic perspective views illustrating embodiments of an electronic device including a display device according to one embodiment of the present invention.

[0300] Referring to FIG. 16a, a display device according to one embodiment of the present invention can be utilized in a wearable electronic device (1000A) that can be worn on a part of a user's body. The wearable electronic device (1000A) may include a body part (3110) and a display part (3120) provided in the body part (3110). The display device according to embodiments of the present invention can be used as the display part (3120) of the wearable electronic device (1000A). As illustrated in FIG. 16a, the wearable electronic device (1000A) may be modified. In one embodiment, it can be used as a smart watch or a smartphone depending on the user's choice.

[0301] FIG. 16b illustrates a medical electronic device (1000B). In one embodiment, the medical electronic device (1000B) may include a body part (3210) and a light-emitting part (3220). A display device according to embodiments of the present invention may be used as the light-emitting part (3220) of the medical electronic device (1000B). The light-emitting part (3220) may emit light of a specific wavelength band (e.g., infrared, visible light, etc.) to the patient's body. In one embodiment, the body part (3210) may have a stretchable fiber material and may have a structure that can be worn on the body of the user of the light-emitting part.

[0302] FIG. 16c illustrates an educational electronic device (1000C). In one embodiment, the educational electronic device may include a display unit (3320) provided within a frame (3310). The display unit (3320) may utilize a display device according to embodiments of the present invention. The display unit (3320) may provide images such as a sea with waves, a snow-covered mountain, or a volcano with flowing lava, wherein the display unit (3320) may extend in the height direction (e.g., z-direction) to reflect the height of the waves, mountain, or volcano. In some embodiments, a portion of the display unit (3320) may sequentially vary in height along the direction of the lava flow to show the movement of the lava in three dimensions. The educational electronic device (1000C) may include a plurality of pins (or stroke units, 3330) arranged on the back of the display unit (3320) so that the display unit (3320) extends in the height direction. The pins (3330) can be implemented to move along a third direction (e.g., z direction or -z direction) so that the image displayed on the display unit (3320) has a three-dimensional height. FIG. 16c describes an educational electronic device (1000C), but its use is not limited as long as it provides a certain image information.

[0303] FIG. 16d illustrates that a display device is used in a wearable electronic device (1000D-1), such as a smart watch. In one embodiment, the display device corresponding to the display portion (3310) of the electronic device (1000D-1) can be stretched three-dimensionally, so it can provide various haptic information to the user. In one embodiment, the electronic device (1000D-1) can provide haptic information, such as Braille markings for the visually impaired or tactile stimulation linked to images, by using a plurality of pins (or stroke portions, 3330) placed below the display portion (3310). The display device forming the display portion (3310) can be stretched three-dimensionally, so it can provide the aforementioned haptic information to the user.

[0304] The embodiment described with reference to FIGS. 16a to 16d describes an electronic device (1000A, 1000B, 1000C, 1000D-1) in which the display portion can be deformed in three dimensions, but the present invention is not limited thereto. As in the embodiments described below, the display device according to the embodiments of the present invention may be used in an electronic device in which the shape of the portion capable of displaying an image (e.g., a screen) is fixed.

[0305] FIGS. 17a to 17e are each schematic perspective views of an electronic device according to one embodiment of the present invention.

[0306] FIG. 17a illustrates a display device being used in a wearable electronic device (1000D-2), such as a smart watch. The electronic device (1000D-2) illustrated in FIG. 10a includes a display unit (3310), wherein the display unit (3310) may be a three-dimensional dome shape (or hemispherical shape). In the manufacturing process of the electronic device (1000D-2), the display device may be assembled on a dome-shaped body frame, and since the display device is three-dimensionally stretchable, it may be assembled in a stretched state along the shape of a hemispherical body frame.

[0307] FIG. 17b illustrates that, in one embodiment of the present invention, another electronic device (1000E) includes a robot. The robot can move or perceive objects using a camera module (1710) and can display a predetermined image to a user through a display unit (3420, 3430). In some embodiments, since the display devices according to one embodiment of the present invention can be extended in various directions as described above, they can be assembled to a body frame having a hemispherical shape, and thus the robot may include a hemispherical display unit (3420, 3430).

[0308] FIG. 17c illustrates a vehicle display device (1000F) as another electronic device in one embodiment of the present invention. The vehicle display device (1000F) may include a cluster (3510), a Center Information Display (CID) (3520), and / or a co-driver display (3530). Since the display device according to an embodiment of the present invention can be extended in various directions, it can be used for the cluster (3510), the Center Information Display (CID) (3520), and / or the co-driver display (3530) without being constrained by the shape of the vehicle's internal frame.

[0309] FIG. 17c illustrates the cluster (3510), the Center Information Display (CID) (3520), and / or the co-driver display (3530) being separated, but the invention is not limited thereto. In another embodiment, two or more selected from the cluster (3510), the Center Information Display (CID) (3520), and the co-driver display (3530) may be connected as a single unit.

[0310] In some embodiments, the vehicle display device (1000F) may include a button (3540) capable of displaying a predetermined image. Referring to the enlarged view of FIG. 17c, the hemispherical button (3540) may include an object (3542) that provides a sense of use of the button while moving in the z-direction or -z-direction, and a display device placed on the object (3542). In some embodiments, if the object (3542) has a three-dimensionally rounded surface, the display device may also have a three-dimensionally rounded surface.

[0311] FIG. 17d illustrates that an electronic device according to one embodiment of the present invention is an electronic device (1000G) for advertising or display. In some embodiments, the electronic device (1000G) for advertising or display may be installed on a fixed structure (3610), such as a wall or a column. If the structure (3610) includes an uneven surface as shown in FIG. 17d, the electronic device (1000G) for advertising or display may also be placed along the uneven surface of the structure (3610). In some embodiments, the electronic device (1000G) for advertising or display may be installed on the structure (3610) using a heat-shrink film or the like.

[0312] FIG. 17e illustrates that an electronic device (1000H) according to one embodiment of the present invention is a controller. The controller may include image-type buttons. For example, the controller may include first to third button areas (3720, 3730, 3740) in which a portion of the display portion (3710) protrudes in the z-direction or protrudes in the -z-direction (or is recessed in the z-direction). In some embodiments, the first and third button areas (3720, 3740) may protrude in the z-direction, and the second button area (3730) may protrude in the -z-direction (or be recessed in the z-direction).

[0313] As such, the present invention has been described with reference to an embodiment illustrated in the drawings, but this is merely illustrative, and those skilled in the art will understand that various modifications and variations of the embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims.

Claims

1. A display device comprising a plurality of first island sections and a plurality of first bridge sections connecting the plurality of first island sections to each other, A substrate comprising a base layer overlapping each of the plurality of first island portions and the plurality of first bridge portions; A first mask layer disposed on the base layer to overlap with the plurality of first island portions; A pixel circuit layer disposed on the first mask layer; A wiring layer disposed on a base layer overlapping the plurality of first bridge sections; and A display device comprising: a light-emitting element disposed on the pixel circuit layer.

2. In Paragraph 1, A display device comprising: a substrate, further comprising a barrier layer disposed on the first mask layer.

3. In Paragraph 1, A display device in which the width of the first mask layer is wider than the width of the pixel circuit layer.

4. In Paragraph 1, A display device further comprising: a second mask layer disposed on the base layer to overlap with the plurality of first bridge portions.

5. In Paragraph 4, A display device in which the first mask layer and the second mask layer are disposed on the same layer.

6. In Paragraph 4, A display device in which the first mask layer and the second mask layer each contain the same material.

7. In Paragraph 4, A display device in which the width of the second mask layer is wider than the width of the wiring layer.

8. A display device comprising a plurality of first island portions and a plurality of first bridge portions connecting the plurality of first island portions to each other, Substrate; A pixel circuit layer disposed on the substrate to overlap with the plurality of first island sections; A wiring layer disposed on the substrate to overlap with the plurality of first bridge portions; and A light-emitting element disposed on the pixel circuit layer; comprising, The above substrate is, A first base layer overlapping the above plurality of first island parts; A first barrier layer disposed on the first base layer; A second base layer disposed on the first barrier layer; and A second barrier layer disposed on the second base layer; comprising A display device in which the first barrier layer and the second barrier layer surround the second base layer.

9. In Paragraph 8, The first barrier layer above is, A first-1 barrier portion supporting the lower surface of the second base layer; and A display device comprising: a first-2 barrier portion extending from the first-1 barrier portion toward the second barrier layer and surrounding the second base layer.

10. In Paragraph 9, A display device in which the first and second barrier portions and the second barrier layer are in contact with each other.

11. In Paragraph 9, A display device in which the second base layer is accommodated in the first- and second barrier portions.

12. In Paragraph 8, A display device in which the width of the second barrier layer is wider than the width of the pixel circuit layer.

13. An electronic device comprising a plurality of first island sections and a plurality of first bridge sections connecting the plurality of first island sections to each other, and a retractable display device, wherein The above display device is, A substrate comprising a base layer overlapping each of the plurality of first island portions and the plurality of first bridge portions; A first mask layer disposed on the base layer to overlap with the plurality of first island portions; A pixel circuit layer disposed on the first mask layer; A wiring layer disposed on a base layer overlapping the plurality of first bridge sections; and An electronic device comprising: a light-emitting element disposed on the pixel circuit layer.

14. Step of placing a base layer on a carrier substrate; A step of placing a first mask layer on the base layer; A step of placing a second mask layer on the base layer so as to be spaced apart from the first mask layer in cross-section; A step of etching a portion of the base layer that does not overlap with the first mask layer and the second mask layer to form a first-1 opening in the base layer; A step of placing the first sacrificial layer in the first opening; A step of placing a barrier layer on the first mask layer; A step of placing a pixel circuit layer on the above barrier layer; A step of arranging a wiring layer on the base layer so as to be spaced apart from the pixel circuit layer with first and second openings in between on a cross-section; Step of removing the first sacrificial layer; and A method for manufacturing a display device comprising the step of removing the carrier substrate.

15. In Paragraph 14, A method for manufacturing a display device, further comprising the step of etching a portion of the barrier layer that overlaps with the first-1 opening.

16. In Paragraph 14, A method for manufacturing a display device, wherein the step of arranging the pixel circuit layer and the step of arranging the wiring layer are performed simultaneously.

17. In Paragraph 14, A method for manufacturing a display device in which the width of the first opening is narrower than the width of the second opening.

18. A step of disposing of a first sacrificial layer comprising a first-1 sacrificial opening and a first-2 sacrificial opening on a carrier substrate; A step of placing a first base layer in the first-1 sacrificial opening and the first-2 sacrificial opening; A step of placing a first barrier layer on the first sacrificial layer such that at least a portion thereof is placed in the first-1 sacrificial opening; A step of placing a second base layer on the first base layer so as to be placed in the first-1 sacrificial opening and the first-2 sacrificial opening; A step of placing a second barrier layer on the first barrier layer to cover the second base layer overlapping the first-1 sacrificial opening; A step of placing a pixel circuit layer on the second barrier layer so as to overlap with the first-1 sacrificial opening; A step of placing a wiring layer on the second barrier layer so as to overlap with the first and second sacrificial openings; Step of removing the first sacrificial layer; and A method for manufacturing a display device comprising the step of removing the carrier substrate.

19. In Paragraph 18, In the step of placing the first barrier layer, A method for manufacturing a display device in which the first barrier layer contacts the inner surface of the first sacrificial layer forming the first-1 sacrificial opening.

20. In Paragraph 18, In the step of placing the second barrier layer, The first barrier layer and the second barrier layer are in contact with each other, A method for manufacturing a display device in which the first barrier layer and the second barrier layer surround the second base layer.

Images