Radio frequency switch circuit

Abstract

A radio frequency switch circuit, comprising: a switching transistor, which is at least related to an ON state and an OFF state of the radio frequency switch circuit; and a parallel branch, which is connected in parallel with the switching transistor and comprises a first inductor.

Description

A radio frequency switching circuit Technical Field

[0001] This disclosure relates to the field of radio frequency technology, and in particular to a radio frequency switching circuit. Background Technology

[0002] In future wireless systems, it is envisioned that densely distributed sensor nodes can be spatially addressed by controlling the antenna radiation beam.

[0003] The key to this wireless system is controlling the radiating element to set the direction of the radiated beam. The spatial resolution of the radiated beam is determined by the ratio D / λ, which is the antenna size D to the radiated wavelength λ. The higher the D / λ value, the higher the spatial resolution of the radiated beam; typically, a D / λ > 10 is required in practice.

[0004] For applications above GHz, since the required antenna size is close to the meter level, RF switches can be fabricated using glass substrates with large area advantages.

[0005] However, glass-based RF switches are usually made of thin-film transistors. Due to the low-temperature fabrication process and lattice matching of glass-based thin-film transistors, the channel material mobility of the thin-film transistors is low, which leads to a decrease in the RF performance of the glass-based thin-film transistors, and consequently, a decrease in the RF performance of the RF switch. Summary of the Invention

[0006] This disclosure provides a radio frequency switching circuit to solve the aforementioned technical problems in the prior art.

[0007] In a first aspect, to solve the above-mentioned technical problems, embodiments of this disclosure provide a radio frequency switching circuit, including:

[0008] A switching transistor, which is at least related to the on and off states of the radio frequency switching circuit;

[0009] A parallel branch is connected in parallel with the switching transistor; the parallel branch includes a first inductor.

[0010] In one possible implementation, the switching transistor includes:

[0011] The first electrode, the second electrode, and the gate are all comb-tooth structures, and the comb-tooth structure of the first electrode and the comb-tooth structure of the second electrode mesh with each other; the comb-tooth structure includes multiple strip-shaped comb teeth and a connecting part, and the connecting part is connected to the same end of the multiple strip-shaped comb teeth.

[0012] The bar-shaped teeth of the gate are located between the bar-shaped teeth of the first electrode and the bar-shaped teeth of the second electrode, and the total number of bar-shaped teeth of the gate is less than the total number of bar-shaped teeth of the first electrode.

[0013] In one possible implementation, the first pole includes: a first metal portion having the comb tooth structure, and a plurality of first conductor portions corresponding one-to-one with the plurality of strip-shaped comb teeth of the first metal portion; the first metal portion and the plurality of first conductor portions are disposed in different layers, and the strip-shaped comb teeth of the first metal portion are connected to the corresponding first conductor portions;

[0014] The second pole includes: a second metal part having the comb tooth structure, and a plurality of second conductor parts corresponding one-to-one with the plurality of strip-shaped comb teeth of the second metal part; the second metal part and the plurality of second conductor parts are disposed in different layers, and the strip-shaped comb teeth of the second metal part are connected to the corresponding second conductor parts.

[0015] In one possible implementation, the switching transistor further includes:

[0016] Substrate;

[0017] An active layer is located on one side of the substrate; the active layer includes a plurality of semiconductor structures and a plurality of conductor structures extending along a first direction and alternately arranged along a second direction; the first direction and the second direction intersect, one of the plurality of conductor structures serves as the plurality of first conductor portions, and another of the plurality of conductor structures serves as the plurality of second conductor portions;

[0018] A gate insulating layer is located on the side of the substrate away from the active layer;

[0019] The gate is located on the side of the active layer away from the substrate; each bar-shaped tooth of the gate overlaps with one of the semiconductor structures, and the connection portion of the gate does not overlap with the active layer;

[0020] An insulating layer is located on the side of the gate away from the substrate.

[0021] The first metal portion and the second metal portion are located on the side of the insulating layer away from the substrate; the first metal portion is connected to the corresponding first conductor portion through a first connecting hole, and the second metal portion is connected to the corresponding second conductor portion through a second connecting hole; both the first connecting hole and the second connecting hole penetrate the gate insulating layer and the insulating layer in the thickness direction.

[0022] In one possible implementation, the first connecting hole and the second connecting hole are elongated grooves in the orthographic projection of the substrate, and the extension direction of the elongated grooves is the extension direction of the conductor structure.

[0023] Alternatively, the first and second connecting holes have a circular orthographic projection shape on the substrate, and there are multiple first or second connecting holes corresponding to the same conductor structure, arranged along the extension direction of the conductor structure.

[0024] One possible implementation, the first inductor includes:

[0025] A first lead-out portion, a body, and a second lead-out portion are connected in sequence; the first lead-out portion is disposed on the same layer as the body, and the second lead-out portion is disposed on a different layer from the body; the orthographic projection of the body onto the substrate is a planar spiral, and the second lead-out portion is connected to the end inside the planar spiral.

[0026] In one possible implementation, the first lead-out portion and the body are disposed in the same layer as the first metal portion and the second metal portion, and the second lead-out portion is disposed in the same layer as the gate.

[0027] The insulating layer also includes a through hole extending through the thickness direction. The through hole is located in the overlapping area of ​​the second lead-out portion and the end inside the planar spiral when projected onto the substrate. The body is connected to the second lead-out portion through the through hole.

[0028] In one possible implementation, the parallel branch further includes a frequency modulation device; the frequency modulation device is connected in series with the first inductor, and the frequency modulation device is used to reconstruct the operating frequency of the radio frequency switching circuit.

[0029] In one possible implementation, the parallel branch further includes:

[0030] A second inductor and a third inductor, one end of the second inductor being connected to one end of the frequency modulation device, and one end of the third inductor being connected to the other end of the frequency modulation device; the other ends of the second inductor and the other ends of the third inductor are used to receive the DC voltage applied to the frequency modulation device.

[0031] In one possible implementation, the second inductor and the third inductor have the same structure as the first inductor.

[0032] One possible implementation of the frequency modulation device includes:

[0033] Diodes or adjustable parallel plate capacitors.

[0034] One possible implementation of the diode includes:

[0035] A P-type semiconductor structure and an N-type semiconductor structure; at least one of the P-type semiconductor structure and the N-type semiconductor structure is disposed on the same layer as the active layer of the switching transistor.

[0036] In one possible implementation, the diode further includes:

[0037] A first electrode and a second electrode, wherein the first electrode is connected to the P-type semiconductor structure and the second electrode is connected to the N-type semiconductor structure;

[0038] The first electrode and the second electrode are disposed in the same layer as the first metal part and the second metal part.

[0039] In one possible implementation, one of the P-type semiconductor structure and the N-type semiconductor structure is disposed on the same layer as the active layer of the switching transistor; the P-type semiconductor structure is located on the side of the N-type semiconductor structure closest to the substrate.

[0040] The diode further includes a lead structure located on the side of the P-type semiconductor structure close to the substrate, and a portion of the lead structure overlaps with the P-type semiconductor structure;

[0041] The first electrode is connected to the lead structure through a third connection hole; the orthographic projection of the third connection hole on the substrate is located within the orthographic projection of the overlap area of ​​the lead structure and the first electrode on the substrate, and does not overlap with the P-type semiconductor structure and the N-type semiconductor structure.

[0042] One possible implementation of the adjustable parallel-plate capacitor includes:

[0043] A third electrode and a fourth electrode are disposed opposite to each other, and a dielectric layer is disposed between the third electrode and the fourth electrode; in the first direction, the dielectric layer has a first surface and a second surface opposite to each other, the end of the third electrode near the first surface is recessed relative to the dielectric layer, and the second surface is recessed relative to the other end of the third electrode;

[0044] The third electrode is disposed in the same layer as the second metal layer, and the fourth electrode is located on the side of the dielectric layer away from the third electrode; in the first direction, a connecting line is disposed at one end of the fourth electrode near the first surface, and the connecting line extends along the side of one end of the dielectric layer to the surface of the insulating layer.

[0045] In one possible implementation, in the first direction, the end of the fourth electrode near the second surface is recessed relative to the dielectric layer.

[0046] In one possible implementation, the dielectric layer is made of a piezoelectric or ferroelectric material.

[0047] In one possible implementation, the value of the first inductor is the inductance value corresponding to the resonant point of a resonant circuit formed by the equivalent capacitance and the first inductor connected in parallel; wherein, the equivalent capacitance is the capacitance corresponding to the switch when it is in the off state. Attached Figure Description

[0048] Figure 1 is a schematic diagram of a radio frequency switch circuit in the related art;

[0049] Figure 2 is the equivalent circuit diagram of the RF switch circuit in the on state;

[0050] Figure 3 shows the equivalent circuit diagram of the RF switch circuit in the off state;

[0051] Figure 4 is a partial schematic diagram of a radio frequency switch circuit provided in an embodiment of this disclosure;

[0052] Figure 5 is a schematic diagram of a radio frequency switch circuit provided in an embodiment of this disclosure;

[0053] Figure 6 is an equivalent schematic diagram corresponding to Figure 4 provided in an embodiment of this disclosure;

[0054] Figure 7 is a partial top view of a radio frequency switching circuit provided in an embodiment of this disclosure;

[0055] Figure 8 is a cross-sectional view along the AA' direction in Figure 7 provided by an embodiment of this disclosure;

[0056] Figure 9 is a schematic diagram of a comb tooth structure provided in an embodiment of this disclosure;

[0057] Figure 10 is a cross-sectional view along the BB' direction in Figure 7 provided in an embodiment of this disclosure;

[0058] Figure 11 is a cross-sectional view along the CC' direction in Figure 7 provided in an embodiment of this disclosure;

[0059] Figure 12 is another cross-sectional view along the AA' direction in Figure 7 provided by an embodiment of this disclosure;

[0060] Figure 13 is a top view of an active layer provided in an embodiment of this disclosure;

[0061] Figure 14 is a top view of a first inductor provided in an embodiment of this disclosure;

[0062] Figures 15 and 16 are simulation diagrams corresponding to Figure 4 provided in the embodiments of this disclosure;

[0063] Figure 17 is a partial schematic diagram of another radio frequency switch circuit provided in an embodiment of this disclosure;

[0064] Figure 18 is a partial schematic diagram of another radio frequency switch circuit provided in an embodiment of this disclosure;

[0065] Figures 19 and 20 are partial schematic diagrams of another radio frequency switch circuit provided in an embodiment of this disclosure;

[0066] Figure 21 is a partial top view of another radio frequency switch provided in an embodiment of this disclosure;

[0067] Figures 22 and 23 are top cross-sectional views along the DD' direction in Figure 21 provided in the embodiments of this disclosure;

[0068] Figure 24 is a top view of another radio frequency switch circuit provided in an embodiment of this disclosure;

[0069] Figures 25 and 26 are cross-sectional views along the EE' direction in Figure 24 provided in the embodiments of this disclosure;

[0070] Figure 27 is a flowchart of a method for manufacturing a radio frequency switch circuit according to an embodiment of this disclosure;

[0071] Figure 28 is a schematic diagram of a radio frequency switch circuit provided in an embodiment of this disclosure.

[0072] Figure label: Radio frequency input terminal RF in RF output terminal out First thin-film transistor T1, second thin-film transistor T2, first resistor R1, second resistor R2, first control terminal V G1 Second control terminal V G2 Switch T, parallel branch P, first inductor L1, frequency modulation device F, second inductor L2, third inductor L3, first pole T s Second pole T d Gate T g Substrate 1, Buffer layer 2, Active layer T a Semiconductor layer 3, gate insulating layer 4, first metal layer 5, insulating layer 6, second metal layer 7, first metal part 71, first conductor part 311, second metal part 72, second conductor part 312, first connecting hole H1, second connecting hole H2, first direction X, second direction Y, semiconductor structure 32, conductor structure 31, first lead-out part 73a, body 73, second lead-out part 5b, through hole H3, P-type semiconductor structure 33, N-type semiconductor structure 34, first electrode 74, second electrode 75, third electrode 76, fourth electrode 91, dielectric layer 8F, connecting line 92, third connecting hole H4, original active layer T'a. Detailed Implementation

[0073] This disclosure provides a radio frequency switch, a method for manufacturing the same, and a radio frequency circuit to solve the aforementioned technical problems in the prior art.

[0074] It should be understood that the specific structural and functional details disclosed in the embodiments of this disclosure are merely representative and are intended to describe exemplary embodiments of this application. However, this application can be implemented in many alternative or combined forms and should not be construed as being limited solely to the embodiments set forth herein.

[0075] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "multiple" means two or more. Furthermore, the term "comprising" and any variations thereof are intended to cover non-exclusive inclusion.

[0076] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit exemplary embodiments. Unless the context clearly indicates otherwise, the singular forms “a” and “an” as used herein are also intended to include the plural. It should also be understood that the terms “comprising” and / or “including” as used herein specify the presence of the stated features, integers, steps, operations, units, and / or components, without excluding the presence or addition of one or more other features, integers, steps, operations, units, components, and / or combinations thereof.

[0077] To make the above-described objects, features, and advantages of this disclosure more apparent and understandable, the disclosure will be further described below in conjunction with the accompanying drawings and embodiments. However, the exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the disclosure more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the figures denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms describing position and direction as described in this disclosure are illustrative of the accompanying drawings, but changes may be made as needed, and all such changes are included within the scope of protection of this disclosure. The accompanying drawings of this disclosure are for illustrative purposes only and do not represent actual scale.

[0078] It should be noted that specific details are set forth in the following description to provide a full understanding of this disclosure. However, this disclosure can be implemented in many ways other than those described herein, and those skilled in the art can make similar extensions without departing from the spirit of this disclosure. Therefore, this disclosure is not limited to the specific embodiments disclosed below. The following description is a preferred embodiment for carrying out this application; however, the description is for the purpose of illustrating the general principles of this application and is not intended to limit the scope of this application. The scope of protection of this application shall be determined by the appended claims.

[0079] Please refer to Figure 1, which is a schematic diagram of a radio frequency (RF) switch circuit in the related art. The RF switch circuit in Figure 1 includes:

[0080] RF input terminal in and RF output terminal out ;

[0081] The first thin-film transistor T1, whose source S1 and drain D1 are respectively connected to the radio frequency input terminal RF in and RF output terminal out connect;

[0082] The second thin-film transistor T2, the source S2 of the second thin-film transistor T2 is connected to the radio frequency input terminal RF in Connect the drain D2 of the second thin-film crystal to ground;

[0083] The first resistor R1 is connected to the gate G1 of the first thin-film transistor T1 and the first control terminal V. G1 Between; First control terminal V G1 Used to receive a first signal that controls the first thin-film transistor T1 to turn on or off;

[0084] The second resistor R2 is connected to the gate G2 of the second thin-film transistor T2 and the second control terminal V. G2 Between; second control terminal V G2 Used to receive a second signal that controls the second thin-film transistor T2 to turn on or off.

[0085] When the first control terminal V G1 The first received signal is high level, and the second control terminal V G2 When the received second signal is low, the first thin-film transistor T1 is turned on and the second thin-film transistor T2 is turned off, allowing the signal to flow from the RF input terminal. in The input radio frequency signal is transmitted to the radio frequency output terminal RF via the first thin film transistor T1. out At this time, the RF switch is turned on, and the RF signal is conducted.

[0086] Conversely, when the first control terminal V G1 The first received signal is low level, and the second control terminal V G2 When the received second signal is high, the first thin-film transistor T1 is turned off and the second thin-film transistor T2 is turned on. The radio frequency signal is conducted to ground through the second thin-film transistor T2, and the radio frequency switch is turned off at this time.

[0087] When a thin-film transistor is turned on, it is equivalent to a resistor (denoted as R). on When a thin-film transistor is off, it is equivalent to a capacitor (C). off Both of these values ​​are better the smaller they are, R.on ×C off It can indirectly reflect the radio frequency performance of a thin-film transistor. The equivalent resistance (R) when a thin-film transistor is turned on is... on The calculation formula for ) is as follows:

[0088] Where μ is the mobility of the channel material in the thin-film transistor, and C ox V is the capacitance of the gate insulating layer of the thin-film transistor, W and L are the channel width and length of the thin-film transistor, respectively. gs and V th These represent the gate-drain voltage and threshold voltage of the thin-film transistor, respectively. Please refer to Figures 2 and 3. Figure 2 shows the equivalent circuit diagram of the RF switch in the on state, and Figure 3 shows the equivalent circuit diagram of the RF switch circuit in the off state. Wherein, R... T1 R T2 The equivalent resistances (equivalent to R) when the first thin-film transistor T1 and the second thin-film transistor T2 are turned on are respectively. on ), C T1 C T2 The equivalent capacitances (equivalent to C) of the first thin-film transistor T1 and the second thin-film transistor T2 when they are turned off are respectively. off ).

[0089] For glass-based thin-film transistors, due to factors such as low-temperature processing and lattice matching, the mobility of the channel material in thin-film transistors is relatively low. For example, the mobility of low-temperature poly-silicon (LTPS) is about 100, which is an order of magnitude smaller than that of single-crystal silicon (about 1400). This results in a higher on-resistance for glass-based thin-film transistors.

[0090] As can be seen from formula (1), increasing the width-to-length ratio W / L can reduce the on-resistance of the thin-film transistor. However, increasing W / L will lead to an increase in the parasitic capacitance of the thin-film transistor, which will in turn lead to a decrease in the radio frequency performance of the thin-film transistor, and consequently, a decrease in the radio frequency performance of the radio frequency switch.

[0091] To address the aforementioned technical problems, this disclosure provides an RF switch, its manufacturing method, and an RF circuit, which will be described in detail below with reference to the accompanying drawings.

[0092] Please refer to Figure 4, which is a partial schematic diagram of a radio frequency switch circuit provided in an embodiment of this disclosure. The radio frequency switch circuit includes:

[0093] The switching transistor T is related to at least the on and off states of the RF switching circuit;

[0094] Parallel branch P is connected in parallel with the switching transistor T; parallel branch P includes a first inductor L1. Parallel branch P can consist of only the first inductor L1, or it can consist of the first inductor L1 and other components.

[0095] The switching transistor T can be a thin-film transistor, a field-effect transistor, etc. An RF switching circuit may include multiple switching transistors T, but each switching transistor T, at least in relation to the on and off states of the RF switching circuit, is provided with a parallel branch P including a first inductor L1.

[0096] For example, if the schematic diagram of the RF switch circuit adopts the schematic diagram in Figure 1, since the on and off states of the RF switch circuit in Figure 1 are related to the first thin-film transistor T1 and the second thin-film transistor T2, the first thin-film transistor T1 and the second thin-film transistor T2 in Figure 1 are both the switch transistor T described in the embodiments of this disclosure. It is necessary to set a parallel branch P including the first inductor L1 for each of the first thin-film transistor T1 and the second thin-film transistor T2. Figure 5 shows a schematic diagram of an RF switch circuit provided in an embodiment of this disclosure. In Figure 5, L... T1 L T2 These are the first inductors connected in parallel with the first thin-film transistor T1 and the first inductors connected in parallel with the second thin-film transistor T2, respectively.

[0097] Of course, the RF switch circuit can also be implemented using other schematic diagrams besides Figure 1. There are no specific restrictions. In the RF switch circuit, not only can the switch transistor T related to the on and off states of the RF switch circuit be set with a corresponding parallel branch P containing the first inductor L1, but other switch transistors T in the RF switch circuit can also be set with a parallel branch P containing the first inductor L1. For example, each switch transistor T in the RF switch circuit can be set with a parallel branch P that is connected in parallel with it and contains the first inductor L1.

[0098] Please refer to Figure 6, which is an equivalent schematic diagram corresponding to Figure 4 provided in an embodiment of this disclosure. Figure 6 is the equivalent schematic diagram when the switch T in Figure 4 is in the off state. When the switch T in Figure 4 is in the off state, it can be equivalent to a capacitor C, and the equivalent capacitance C of this capacitor C connected in parallel with the first inductor L1 is C. ceff It can be calculated using the following formula:

[0099] Where j is an imaginary number and ω is the angular frequency.

[0100] By transforming formula (2), we can obtain:

[0101] As can be seen from formula (3), the parallel branch P including the first inductor L1 in parallel with the switch T can reduce the equivalent capacitance of the switch T in the off state, thereby improving the isolation and RF performance of the switch T.

[0102] Please refer to Figures 7 and 8. Figure 7 is a partial top view of a radio frequency switching circuit provided in an embodiment of this disclosure, and Figure 8 is a cross-sectional view along the AA' direction in Figure 7 provided in an embodiment of this disclosure. As shown in Figure 7, the switching transistor T includes:

[0103] First pole T s Second pole T d and gate T g First pole T s Second pole T d and gate T g All are comb-tooth structures, and the first pole T s The comb-tooth structure and the second pole T are used d The comb teeth structure is interlocked; please refer to Figure 9, which is a schematic diagram of a comb tooth structure provided in an embodiment of this disclosure. The comb tooth structure includes multiple strip comb teeth S1 and a connecting part S2, and the connecting part S2 is connected to the same end of the multiple strip comb teeth S1.

[0104] Gate T g T-shaped comb teeth g1 The strip-shaped comb teeth T located at the first pole Ts s1 With the second pole T d T-shaped comb teeth d1 Between, and gate T g T-shaped comb teeth g1 The total number is less than the first pole T s T-shaped comb teeth s1 Total. First pole T s T-shaped comb teeth s1 Total number and second pole T d T-shaped comb teeth d1 The total number is the same.

[0105] By passing the first terminal T of the switching transistor T s Second pole T d and gate T g All are designed with a comb-like structure, and the first pole T is made... s The comb-tooth structure and the second pole T are used d The comb-like structure used meshes with each other, and the gate T... g T-shaped comb teeth g1 Located at the first pole T s The bar-shaped comb teeth Ts1 and the second pole T d T-shaped comb teeth d1 Between, and gate T g T-shaped comb teeth g1 The total number is less than the first pole T s T-shaped comb teeth s1The total number of channels allows the switching transistor T to have a larger channel width-to-length ratio, thereby reducing the on-resistance of the switching transistor T.

[0106] Please refer to Figure 8. The film layers of the RF switch circuit include:

[0107] Substrate 1;

[0108] Buffer layer 2 is located on one side of substrate 1; the material of buffer layer 2 can be a stacked structure of silicon nitride and silicon oxide.

[0109] Semiconductor layer 3 is located on the side of buffer layer 2 away from substrate 1; the thickness of active layer 3 ranges from 50nm to 300nm, and the material of active layer 3 can be low-temperature polycrystalline silicon; the active layer T of switch transistor T a Set in semiconductor layer 3;

[0110] The gate insulating layer 4 is located on the side of the semiconductor layer 3 away from the substrate 1; the material of the gate insulating layer 4 can be silicon nitride, silicon oxide or other dielectric materials, and the thickness of the gate insulating layer 4 ranges from 40 nm to 150 nm.

[0111] The first metal layer 5 is located on the side of the gate insulating layer 3 away from the substrate 1; the gate T of the switch transistor T g Set in the first metal layer 5;

[0112] An insulating layer 6 is located on the side of the first metal layer 5 away from the substrate 1; the thickness of the insulating layer 6 ranges from 300 nm to 800 nm.

[0113] The second metal layer 7 is located on the side of the insulating layer 6 away from the substrate 1.

[0114] In some embodiments, the RF switch circuit may not have a buffer layer 2, but a buffer layer 2 is provided between the substrate 1 and the semiconductor layer 3 of the RF switch circuit, which can effectively improve the adhesion between the active layer 3 and the substrate 1.

[0115] As shown in Figure 8, the first terminal T of the switching transistor T s Second pole T d It can be made of metal from the second metal layer 7; as shown in Figures 10 and 11, the first electrode T of the switch transistor T s Second pole T d It can be composed of metal in the second metal layer 7 and conductor in the semiconductor layer 3. FIG10 is a cross-sectional view in the BB' direction of FIG7 provided in the embodiment of the present disclosure, and FIG11 is a cross-sectional view in the CC' direction of FIG7 provided in the embodiment of the present disclosure.

[0116] As shown in Figure 10, the first pole T sIt includes: a first metal part 71 with a comb tooth structure, and a plurality of first conductor parts 311 corresponding one-to-one with a plurality of strip-shaped comb teeth 711 of the first metal part 71; the first metal part 71 and the plurality of first conductor parts 311 are disposed in different layers, and the strip-shaped comb teeth 711 of the first metal part 71 are connected to the corresponding first conductor parts 311; the strip-shaped comb teeth 711 of the first metal part 71 can be connected through the first conductor parts 311 corresponding to the first connecting hole H1, the first connecting hole H1 is located in the overlapping area of ​​the strip-shaped comb teeth 711 of the first metal part 71 and the first conductor parts 311, and penetrates the film layer between the strip-shaped comb teeth 711 of the first metal part 71 and the first conductor parts 311;

[0117] As shown in Figure 11, the second pole T d It includes: a second metal part 72 with a comb tooth structure, and a plurality of second conductor parts 312 corresponding one-to-one with a plurality of strip-shaped comb teeth 721 of the second metal part 72; the second metal part 72 and the plurality of second conductor parts 312 are disposed in different layers, and the strip-shaped comb teeth of the second metal part 72 are connected to the corresponding second conductor parts 312; the strip-shaped comb teeth 721 of the second metal part 72 can be connected through the second conductor parts 312 corresponding to the second connecting hole H2, the second connecting hole H2 is located in the overlapping area of ​​the strip-shaped comb teeth 721 of the second metal part 72 and the second conductor parts 312, and penetrates the film layer between the strip-shaped comb teeth 721 of the second metal part 72 and the second conductor parts 312.

[0118] In the embodiments provided in this disclosure, by using the second pole T d The configuration includes: a second metal portion 72 having a comb-like structure, and a plurality of second conductor portions 312 corresponding one-to-one with the plurality of strip-shaped comb teeth 721 of the second metal portion 72; the second metal portion 72 and the plurality of second conductor portions 312 are disposed in different layers, and the strip-shaped comb teeth of the second metal portion 72 are connected to the corresponding second conductor portions 312; and the second electrode T is connected to the second conductor portion 312. d The device always includes: a second metal portion 72 with a comb-like structure, and a plurality of second conductor portions 312 corresponding one-to-one with the plurality of strip-shaped comb teeth 721 of the second metal portion 72; the second metal portion 72 and the plurality of second conductor portions 312 are disposed in different layers, and the strip-shaped comb teeth of the second metal portion 72 are connected to the corresponding second conductor portions 312; unlike in related technologies, it is not necessary to connect the first electrode T of the switching transistor T. s Second pole T d It is positioned between the active layer and the gate insulating layer, thereby effectively reducing the metal layer, saving materials, and reducing the thickness and manufacturing cost of the RF switch circuit.

[0119] Please refer to Figure 12, which is another cross-sectional view along the AA' direction in Figure 7 provided by an embodiment of this disclosure. The switching transistor T further includes:

[0120] Substrate 1;

[0121] Active layer T a Located on one side of the substrate 1; Figure 13 shows a top view of an active layer provided in an embodiment of this disclosure, the active layer T a It includes a plurality of semiconductor structures 32 extending along a first direction X and alternately arranged along a second direction Y and a plurality of conductor structures 31; the first direction X and the second direction Y intersect, one of the semiconductor structures 31 among the plurality of conductor structures 31 serves as a plurality of first conductor portions 311, and another semiconductor structure 31 among the plurality of conductor structures 31 serves as a plurality of second conductor portions 312; the semiconductor structures 32 may be made of low-temperature semiconductor materials, and the conductor structures 31 may be made of low-temperature semiconductor materials doped with conductive particles, such as phosphorus particles.

[0122] Gate insulating layer 4 is located on substrate 1 away from active layer T. a one side;

[0123] Gate T g Located in the active layer T a The side away from the substrate 1; as shown in Figure 7, gate T g Each bar comb tooth T g1 Overlapping with a semiconductor structure 32, and with gate T g Connection part T g2 With active layer T a No overlap;

[0124] Insulating layer 6 is located on the side of the gate away from the substrate 1;

[0125] The first metal portion 71 and the second metal portion 72 are located on the side of the insulating layer 6 away from the substrate 1. The first metal portion 71 is connected to the corresponding first conductor portion 311 through the first connection hole H1, and the second metal portion 72 is connected to the corresponding second conductor portion 312 through the second connection hole H2. Both the first connection hole H1 and the second connection hole H2 penetrate the gate insulating layer 4 and the insulating layer 6 in the thickness direction.

[0126] In the embodiments provided in this disclosure, by using the active layer T a The device is configured to include multiple semiconductor structures 32 and multiple conductor structures 31 extending along a first direction X and alternately arranged along a second direction Y. One of the semiconductor structures 31 serves as a plurality of first conductor portions 311, and another semiconductor structure 31 serves as a plurality of second conductor portions 312. This not only effectively saves film layers but also increases the channel width of the switching transistor T. Furthermore, by connecting the first metal portion 71 to the corresponding conductor structure 31 through a first connection hole H1 penetrating the gate insulating layer 4 and the insulating layer 6, and by connecting the second metal portion 72 to the corresponding conductor structure 31 through a second connection hole H2 penetrating the gate insulating layer 4 and the insulating layer 6, a first electrode T with a comb-like structure can be formed.s Second pole T d This improves the device performance of the switching transistor T.

[0127] In some embodiments, the first connection hole H1 and the second connection hole H2 are projected onto the substrate 1 in the shape of an elongated groove, and the extension direction of the elongated groove is the extension direction of the conductor structure 31; at this time, one conductor structure 31 corresponds to one first connection hole H1 or one second connection hole H2, and the connection form of the second connection hole H2 in FIG11 can be referred to.

[0128] In other embodiments, the first connection hole H1 and the second connection hole H2 are circular in the orthographic projection shape on the substrate. There are multiple first connection holes H1 or second connection holes H2 corresponding to the same conductor structure 31, and they are arranged along the extension direction of the conductor structure 31. The connection form of the first connection hole H1 in FIG10 can be referred to.

[0129] It should be noted that Figures 10 and 11 show two shapes of connecting holes to avoid repetition. In actual applications, the shapes of the first connecting hole H1 and the second connecting hole H2 are actually the same and will not be set to be different, so that the first connecting hole H1 and the second connecting hole H2 can be formed simultaneously using the same process.

[0130] In the embodiments provided in this disclosure, by making the orthographic projection shape of the first connection hole H1 and the second connection hole H2 on the substrate 1 an elongated groove shape, with the extension direction of the elongated groove shape being the extension direction of the conductor structure 31; or by making the orthographic projection shape of the first connection hole H1 and the second connection hole H2 on the substrate a circle, and having multiple first connection holes H1 or second connection holes H2 corresponding to the same conductor structure 31 and arranged along the extension direction of the conductor structure 31, the resistance between the first metal part 71 and the first conductor part 311 and the resistance between the second metal part 72 and the second conductor part 312 can be reduced, thereby improving the device performance of the switching transistor T.

[0131] Please refer to Figure 14, which is a top view of a first inductor provided in an embodiment of this disclosure. The first inductor L1 includes:

[0132] The first lead-out portion 73a, the body 73, and the second lead-out portion 5b are connected in sequence; the first lead-out portion 73a is disposed on the same layer as the body 73, and the second lead-out portion 5b is disposed on a different layer from the body 73; the orthographic projection of the body 73 onto the substrate 1 is a planar spiral, and the second lead-out portion 5b is connected to the end inside the planar spiral.

[0133] The end of the main body 73 away from the second lead-out 5b can be used as the first lead-out 73a, or a line segment connected to the end of the main body 73 away from the second lead-out 5b can be set separately as the first lead-out 73a, as shown in Figure 13. There is no restriction on how the first lead-out 73a is set.

[0134] In the embodiments provided in this disclosure, the first inductor L1 is configured as a first lead-out portion 73a, a body 73, and a second lead-out portion 5b connected in sequence; the first lead-out portion 73a is disposed on the same layer as the body 73, and the second lead-out portion 5b is disposed on a different layer than the body 73; the orthographic projection of the body 73 on the substrate 1 is a planar spiral, and the second lead-out portion 5b is connected to the end inside the planar spiral. The first inductor L1 can be manufactured using the manufacturing process of the display panel. Furthermore, by displacing the second lead-out portion 5b from the body 73 and connecting the second lead-out portion 5b to the end inside the planar spiral, short circuits in the body 73 can be prevented, facilitating connection with other components.

[0135] Please refer to Figure 12. The first lead-out portion (not shown in Figure 12) and the body 73 are disposed on the same layer as the first metal portion 71 and the second metal portion 72. The second lead-out portion 5b is connected to the gate T. g Same-layer settings;

[0136] The insulating layer 6 also includes a through hole H3 that extends through the thickness direction. The through hole H3 is located in the overlapping area of ​​the second lead-out portion 5b and the end of the planar spiral line when projected onto the substrate 1. The body 73 is connected to the second lead-out portion 5b through the through hole H3.

[0137] In some embodiments, the dielectric constant of the gate insulating layer 4 is greater than that of silicon nitride, which can give the gate insulating layer 4 a higher dielectric constant, thereby reducing the capacitance C of the gate insulating layer 4. ox From formula (1), it can be seen that the capacitance C of the gate insulating layer 4 is... ox The larger the dielectric constant, the smaller the on-resistance of the switch transistor T. Therefore, setting the dielectric constant of the gate insulating layer 4 to be greater than that of silicon nitride can effectively reduce the on-resistance of the switch transistor T, thereby improving the device performance of the switch transistor T.

[0138] In other embodiments, the value of the first inductor L1 is the inductance value corresponding to the resonant point of the resonant circuit formed by the equivalent capacitance and the first inductor L1 connected in parallel; wherein, the equivalent capacitance is the capacitance corresponding to the switch T when it is in the off state.

[0139] Please refer to Figure 6. When the switch T is in the off state, the equivalent capacitance C of the switch T and the first inductor L1 form an LC resonant circuit. The resonant frequency f of this LC resonant circuit at the resonant point can be expressed as:

[0140] Where L' is the inductance value of the resonant circuit at the resonant point.

[0141] Since the equivalent capacitance of the resonant circuit is minimized at the resonant point, setting the first inductor L1 to the equivalent capacitance C corresponding to the switch T in the off state, and setting the inductance value of the resonant circuit corresponding to the resonant point of the circuit formed by the first inductor L1, can minimize the equivalent capacitance of the switch T and the parallel branch P, thereby further improving the isolation and RF performance of the RF switch. Figures 15 and 16 are simulation schematic diagrams corresponding to Figure 4 provided in the embodiments of this disclosure. In Figure 4, corresponding to Figures 15 and 16, the channel width-to-length ratio of the switch T is 800, and the value of the first inductor L1 is 6.6nH. It can be seen from Figure 15 that the resonant frequency of the resonant circuit formed by the equivalent capacitance of the switch T in the off state and the first inductor L1 is about 3.5GHz. It can be seen from Figure 16 that at 3.5GHz, the capacitance of the equivalent circuit formed by the equivalent capacitance of the switch T in the off state and the first inductor L1 decreases from 0.4pF to 0.07pF. Therefore, the S21 value is at a low level near the resonant point corresponding to the resonant frequency, and the isolation is high. In the embodiments provided in this disclosure, by providing a parallel branch P including a first inductor L1 for the switching transistor T in the RF switch that is related to the switching state of the RF switch, the isolation of the RF switching transistor T can be effectively improved and the RF performance of the RF switching transistor T can be enhanced.

[0142] Although the structure shown in Figure 4 can improve the RF performance of the RF switch, it can also be seen from Figure 15 that if the switch operates near the resonant point, the bandwidth of the structure shown in Figure 4 is narrow, which limits the operating frequency of the RF switch.

[0143] To address the aforementioned issues, please refer to Figure 17, which is a partial schematic diagram of another radio frequency (RF) switch circuit provided in an embodiment of this disclosure. The parallel branch P connected in parallel with the switching transistor T in the RF switch circuit further includes a frequency modulation (FM) device F; the FM device F is connected in series with the first inductor L1, and the FM device F is used to reconstruct the operating frequency of the RF switch circuit.

[0144] In the embodiments provided in this disclosure, by connecting the first inductor L1 in series with the frequency modulation device F used to reconstruct the operating frequency of the RF switch circuit to form a parallel branch P of the switch transistor T, the operating frequency of the RF switch circuit can be reconstructed using the frequency modulation device F, thereby increasing the available frequency bands of the RF switch circuit.

[0145] Please refer to Figure 18 for a partial schematic diagram of another radio frequency switching circuit provided in an embodiment of this disclosure. The parallel branch P further includes:

[0146] A second inductor L2 and a third inductor L3 are connected, with one end of the second inductor L2 connected to one end of the frequency modulation device F and one end of the third inductor L3 connected to the other end of the frequency modulation device F. The other ends of the second inductor L2 and the third inductor L3 are used to receive the DC voltage applied to the frequency modulation device F. By changing the DC voltage applied to the frequency modulation device F, the operating frequency of the reconfigurable RF switching circuit of the frequency modulation device F can be changed.

[0147] In the embodiments provided in this disclosure, by providing a first inductor L1 and a second inductor L2 connected to the two ends of the frequency modulation device F respectively, radio frequency signals can be blocked from being output through the two DC voltage terminals of the frequency modulation device F.

[0148] Please refer to Figures 19 and 20 for a partial schematic diagram of another radio frequency switch provided in an embodiment of this disclosure. The frequency modulation device F includes:

[0149] Diodes or adjustable parallel plate capacitors.

[0150] In Figure 19, the frequency modulation device F is a diode, and the equivalent capacitance C of the diode is... PN for:

[0151] Where ε' is the dielectric constant of the diode, S' is the area of ​​the PN junction of the diode, W' is the width of the depletion region of the diode, and V bi V is the built-in potential of the diode. bi Related to the doping concentration of the diode, N B Let V be the doping concentration of the diode, and V be the DC voltage (also known as reverse bias) applied across the diode. Therefore, once the diode is fabricated, the width of the depletion region is only related to the reverse bias applied across the diode.

[0152] When the reverse bias voltage applied across the diode is less than 0, the width of the depletion region increases with the increase of the reverse bias voltage, and the equivalent capacitance of the diode decreases with the increase of the reverse bias voltage. Therefore, the equivalent capacitance of the diode can be controlled by controlling the magnitude of the reverse bias voltage applied across the diode, thereby adjusting the inductance value of the parallel branch P, so that the resonant frequency of the circuit structure in Figure 16 operates at the optimal frequency point.

[0153] Please refer to Figures 21-23. Figure 21 is a partial top view of another RF switch provided in an embodiment of this disclosure. Figures 22 and 23 are cross-sectional top views along the DD' direction in Figure 21 provided in an embodiment of this disclosure. The second inductor L2 and the third inductor L3 can adopt the same structure as the first inductor L1, which facilitates the simultaneous formation of the second inductor L2, the third inductor L3, and the first inductor L1, thus saving on process costs. In Figure 21, the frequency modulation device F is a diode.

[0154] As shown in Figures 22 and 23, the diode includes:

[0155] P-type semiconductor structure 33 and N-type semiconductor structure 34; at least one of the P-type semiconductor structure 33 and N-type semiconductor structure 34 is disposed on the same layer as the active layer Ta of the switching transistor T.

[0156] As shown in Figure 22, the diode can be a lateral structure, in which case both the P-type semiconductor structure 33 and the N-type semiconductor structure 34 are set on the same layer as the source layer Ta. Alternatively, as shown in Figure 23, the diode can be a vertical structure, in which case the P-type semiconductor structure 33 is set on the same layer as the source layer Ta, and the N-type semiconductor structure 34 is set on a different layer from the source layer Ta.

[0157] In the embodiments provided in this disclosure, at least one of the P-type semiconductor structure 33 and the N-type semiconductor structure 34 in the diode is connected to the active layer T of the switching transistor T. a Setting them on the same layer allows at least a portion of the diodes to be connected to the active layer T. a Formed in the same process, it is easy to save on process costs.

[0158] Please refer to Figure 22. The diode also includes:

[0159] First electrode 74 and second electrode 75, the first electrode 74 is connected to the P-type semiconductor structure 33 and the second electrode 75 is connected to the N-type semiconductor structure 34.

[0160] The first electrode 74 and the second electrode 75 are disposed in the same layer as the first metal part 71 and the second metal part 72.

[0161] In the embodiments provided in this disclosure, by having the first electrode 74 and the second electrode 75 of the diode disposed on the same layer as the first metal portion 71 and the second metal portion 72, the first electrode 74 and the second electrode 75, as well as the first metal portion 71 and the second metal portion 72, can be formed in one process, thereby saving process time and facilitating wiring.

[0162] Please continue to refer to Figure 23, where one of the P-type semiconductor structure 33 and the N-type semiconductor structure 34 is connected to the active layer T of the switch transistor T. a They are arranged in the same layer; the P-type semiconductor structure 33 is located on the side of the N-type semiconductor structure 34 closest to the substrate 1;

[0163] The diode also includes a lead structure 5F located on the side of the P-type semiconductor structure 33 close to the substrate 1, and a portion of the lead structure 5F overlaps with the P-type semiconductor structure 33.

[0164] The first electrode 74 is connected to the lead structure 5F through the third connection hole H4; the orthographic projection of the third connection hole H4 on the substrate 1 is located within the orthographic projection of the overlap area between the lead structure 5F and the first electrode 74 on the substrate 1, and does not overlap with the P-type semiconductor structure 33 and the N-type semiconductor structure 34.

[0165] In the embodiments provided in this disclosure, when the P-type semiconductor structure 33 is located on the side of the N-type semiconductor structure 34 close to the substrate 1, a lead structure 5F is provided on the side of the P-type semiconductor structure 33 close to the substrate 1, and a part of the lead structure 5F overlaps with the P-type semiconductor structure 33, so that the first electrode 74 is connected to the lead structure 5F through the third connection hole H4; the orthographic projection of the third connection hole H4 on the substrate 1 is located within the orthographic projection of the overlap area of ​​the lead structure 5F and the first electrode 74 on the substrate 1, and does not overlap with the P-type semiconductor structure 33 and the N-type semiconductor structure 34, thereby improving the device performance of the diode and facilitating the connection of the two ends of the diode to other components.

[0166] In Figure 20, the frequency modulation device F is an adjustable parallel plate capacitor.

[0167] Please refer to Figures 24-26. Figure 24 is a top view of another radio frequency switching circuit provided in the embodiment of this disclosure. Figures 25-26 are cross-sectional views in the direction of EE' in Figure 24 provided in the embodiment of this disclosure. The frequency modulation device F in Figure 24 is an adjustable parallel plate capacitor.

[0168] Adjustable parallel plate capacitor, including:

[0169] A third electrode 76 and a fourth electrode 91 are disposed opposite to each other, and a dielectric layer 8F is disposed between the third electrode 76 and the fourth electrode 91. In the first direction X, the dielectric layer 8F has a first surface 8Fa and a second surface 8Fb opposite to each other. The end of the third electrode 76 near the first surface 8Fa is recessed relative to the first surface 8Fa, and the second surface 8Fb is recessed relative to the other end of the third electrode 76.

[0170] The third electrode 76 is disposed in the same layer as the first metal part 71, and the fourth electrode 91 is located on the side of the dielectric layer 8F away from the third electrode 76; in the first direction X, a connecting line 92 is provided at one end of the fourth electrode 91 near the first surface 8Fa, and the connecting line 92 extends along the first surface 8Fa to the surface of the insulating layer 6.

[0171] In the embodiments provided in this disclosure, the dielectric layer 8F has a first surface 8Fa and a second surface 8Fb in the first direction X. The end of the third electrode 76 near the first surface 8Fa is recessed relative to the first surface 8Fa, and the second surface 8Fb is recessed relative to the other end of the third electrode 76. The third electrode 76 is disposed in the same layer as the first metal 71, and the fourth electrode 91 is located on the side of the dielectric layer 8F away from the third electrode 76. In the first direction X, a connecting line 92 is provided at the end of the fourth electrode 91 near the first surface 8Fa. The connecting line 92 extends along the first surface 8Fa to the surface of the insulating layer 6, which facilitates the connection of the adjustable parallel plate capacitor to other components and does not cause a short circuit between the third electrode 76 and the fourth electrode 91.

[0172] As shown in Figures 25 and 26, in the first direction X, the end of the fourth electrode 91 near the second surface 8Fb is recessed relative to the dielectric layer 8F. This prevents the fourth electrode 91 from being connected to the third electrode 76 via the second surface 8Fb during fabrication, thereby preventing a short circuit between the third electrode 76 and the fourth electrode 91.

[0173] In some embodiments, the dielectric layer 8F of the adjustable parallel plate capacitor may be made of a piezoelectric material or a ferroelectric material.

[0174] In Figure 25, the dielectric layer 8F is made of piezoelectric material, which can be lead zirconate titanate (PZT). When a DC voltage difference is generated at the two ends of the dielectric layer 8F made of piezoelectric material, it will deform. Therefore, by applying a suitable DC voltage to the two ends of the adjustable parallel plate capacitor made of piezoelectric material 8F, the relative distance between the adjustable parallel plate capacitors can be changed, thereby changing the capacitance of the adjustable parallel plate capacitors and reconstructing the operating frequency of the RF switching circuit.

[0175] In Figure 26, the dielectric layer 8F is made of ferroelectric material, such as barium titanate. By applying different external electric fields to the ferroelectric material, the arrangement and orientation of the ferroelectric domains can be changed, thereby changing the dielectric constant of the dielectric layer 8F of the adjustable parallel plate capacitor, and thus changing the capacitance of the adjustable parallel plate capacitor, so as to reconstruct the operating frequency of the RF switching circuit.

[0176] Based on the same inventive concept, this disclosure provides a method for manufacturing a radio frequency switch circuit. Figure 27 shows a flowchart of a method for manufacturing a radio frequency switch circuit according to an embodiment of this disclosure. The method includes:

[0177] S11: Provide a substrate;

[0178] S12: A parallel switching transistor and a parallel branch are formed on one side of the substrate; the parallel branch includes at least a first inductor.

[0179] For example, taking the fabrication of the radio frequency switch circuit in Figure 12 as an example, please refer to Figure 28, which is a schematic diagram of fabricating a radio frequency switch according to an embodiment of this disclosure.

[0180] S21. Provide a substrate 1;

[0181] S22. A buffer layer 2 is formed on one side of the substrate 1;

[0182] S23. A semiconductor layer 3 is formed on the side of the buffer layer 2 away from the substrate 1;

[0183] Semiconductor layer 3 can be formed by directly depositing low-temperature polycrystalline silicon and then patterning it to obtain the original active layer T'a. Alternatively, amorphous silicon can be deposited first and then crystallized using a laser to form low-temperature polycrystalline silicon.

[0184] S24. A gate insulating layer 4 is formed on the side of the semiconductor layer 3 away from the substrate 1;

[0185] S25. A first metal layer 5 is deposited on one side of the gate insulating layer 4, and the first metal layer 5 is patterned to obtain the gate T. g Second lead-out section 5b; simultaneously, the original active layer T' a Phosphorus ions were injected into a portion of the original active layer T' a A portion of the region becomes a highly doped N+ type conductor structure, resulting in multiple semiconductor structures 32 and multiple conductor structures 31 extending along the first direction X and alternating along the second direction Y, thus obtaining the active layer T. a Half of the multiple conductor structures 31 serves as the first electrode T of the switching transistor T. s The first conductor portion 311, and the other half of the plurality of conductor structures 31 serve as the second pole T. d The second conductor portion 312 and the semiconductor structure 32 are still low-temperature polycrystalline silicon.

[0186] Among them, the amount of phosphorus ions injected is greater than 3×10 -15 cm -2 .

[0187] S26, at gate T g An insulating layer 6 is formed on the side away from the substrate 1;

[0188] S27, The orthographic projection of the insulating layer 6 and the gate insulating layer 4 is located at the first pole T. s Second pole T d Holes are drilled at the positions to form the first connection hole H1 and the second connection hole H2, which are projected onto the gate T on the insulating layer 6. gHoles are drilled at the positions of the second lead-out portion 5b to form a third connecting hole H4; a second metal layer 7 is formed on the side of the insulating layer 6 away from the substrate 1, and the second metal layer 7 is patterned to obtain a first metal portion 71 and a second metal portion 72, as well as the body 73 and the first lead-out portion 73a of the first inductor L1, so that the first metal portion 71 and the second metal portion 72 are connected to the first conductor portion 311 and the second conductor portion 312 through the first connecting hole H1 and the second connecting hole H2, respectively, and the body 73 of the first inductor L1 is connected to the second lead-out portion 5b through the through hole H3.

[0189] Similarly, the process for fabricating the RF switch circuit in Figure 21 is roughly the same, except that when fabricating the diode, the N-type semiconductor structure 34 in the diode is doped with phosphorus ions and the P-type semiconductor structure 33 is doped with boron. When fabricating a vertically oriented diode, a connecting line 5F needs to be fabricated below it before forming the diode.

[0190] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0191] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

1. A radio frequency switching circuit, wherein, include: A switching transistor, which is at least related to the on and off states of the radio frequency switching circuit; A parallel branch is connected in parallel with the switching transistor; the parallel branch includes a first inductor.

2. The radio frequency switching circuit as described in claim 1, wherein, The switching transistor includes: The first electrode, the second electrode, and the gate are all comb-tooth structures, and the comb-tooth structure of the first electrode and the comb-tooth structure of the second electrode mesh with each other; the comb-tooth structure includes multiple strip-shaped comb teeth and a connecting part, and the connecting part is connected to the same end of the multiple strip-shaped comb teeth. The bar-shaped teeth of the gate are located between the bar-shaped teeth of the first electrode and the bar-shaped teeth of the second electrode, and the total number of bar-shaped teeth of the gate is less than the total number of bar-shaped teeth of the first electrode.

3. The radio frequency switching circuit as described in claim 2, wherein, The first pole includes: a first metal part having the comb tooth structure, and a plurality of first conductor parts corresponding one-to-one with the plurality of strip-shaped comb teeth of the first metal part; the first metal part and the plurality of first conductor parts are disposed in different layers, and the strip-shaped comb teeth of the first metal part are connected to the corresponding first conductor parts; The second pole includes: a second metal part having the comb tooth structure, and a plurality of second conductor parts corresponding one-to-one with the plurality of strip-shaped comb teeth of the second metal part; the second metal part and the plurality of second conductor parts are disposed in different layers, and the strip-shaped comb teeth of the second metal part are connected to the corresponding second conductor parts.

4. The radio frequency switching circuit as described in claim 3, wherein, The switching transistor also includes: Substrate; An active layer is located on one side of the substrate; the active layer includes a plurality of semiconductor structures and a plurality of conductor structures extending along a first direction and alternately arranged along a second direction; the first direction and the second direction intersect, one of the plurality of conductor structures serves as the plurality of first conductor portions, and another of the plurality of conductor structures serves as the plurality of second conductor portions; A gate insulating layer is located on the side of the substrate away from the active layer; The gate is located on the side of the active layer away from the substrate; each bar-shaped tooth of the gate overlaps with one of the semiconductor structures, and the connection portion of the gate does not overlap with the active layer; An insulating layer is located on the side of the gate away from the substrate. The first metal portion and the second metal portion are located on the side of the insulating layer away from the substrate; the first metal portion is connected to the corresponding first conductor portion through a first connecting hole, and the second metal portion is connected to the corresponding second conductor portion through a second connecting hole; both the first connecting hole and the second connecting hole penetrate the gate insulating layer and the insulating layer in the thickness direction.

5. The radio frequency switching circuit as described in claim 4, wherein, The first connecting hole and the second connecting hole are elongated grooves in the orthographic projection of the substrate, and the extension direction of the elongated grooves is the extension direction of the conductor structure. Alternatively, the first and second connecting holes have a circular orthographic projection shape on the substrate, and there are multiple first or second connecting holes corresponding to the same conductor structure, arranged along the extension direction of the conductor structure.

6. The radio frequency switching circuit according to any one of claims 2-5, wherein, The first inductor includes: A first lead-out portion, a body, and a second lead-out portion are connected in sequence; the first lead-out portion is disposed on the same layer as the body, and the second lead-out portion is disposed on a different layer from the body; the orthographic projection of the body onto the substrate is a planar spiral, and the second lead-out portion is connected to the end inside the planar spiral.

7. The radio frequency switching circuit as described in claim 6, wherein, The first lead-out portion and the body are disposed in the same layer as the first metal portion and the second metal portion, and the second lead-out portion is disposed in the same layer as the gate. The insulating layer also includes a through hole extending through the thickness direction. The through hole is located in the overlapping area of ​​the second lead-out portion and the end inside the planar spiral when projected onto the substrate. The body is connected to the second lead-out portion through the through hole.

8. The radio frequency switching circuit according to any one of claims 1-7, wherein, The parallel branch also includes a frequency modulation device; the frequency modulation device is connected in series with the first inductor, and the frequency modulation device is used to reconstruct the operating frequency of the radio frequency switching circuit.

9. The radio frequency switching circuit as described in claim 8, wherein, The parallel branch also includes: A second inductor and a third inductor, one end of the second inductor being connected to one end of the frequency modulation device, and one end of the third inductor being connected to the other end of the frequency modulation device; the other ends of the second inductor and the other ends of the third inductor are used to receive the DC voltage applied to the frequency modulation device.

10. The radio frequency switching circuit of claim 9, wherein the second inductor and the third inductor have the same structure as the first inductor.

11. The radio frequency switching circuit according to any one of claims 8-10, wherein, The frequency modulation device includes: Diodes or adjustable parallel plate capacitors.

12. The radio frequency switching circuit as described in claim 11, wherein, The diode includes: A P-type semiconductor structure and an N-type semiconductor structure; at least one of the P-type semiconductor structure and the N-type semiconductor structure is disposed on the same layer as the active layer of the switching transistor.

13. The radio frequency switching circuit as described in claim 12, wherein, The diode also includes: A first electrode and a second electrode, wherein the first electrode is connected to the P-type semiconductor structure and the second electrode is connected to the N-type semiconductor structure; The first electrode and the second electrode are disposed in the same layer as the first metal part and the second metal part.

14. The radio frequency switching circuit as described in claim 13, wherein, One of the P-type semiconductor structure and the N-type semiconductor structure is disposed on the same layer as the active layer of the switching transistor; the P-type semiconductor structure is located on the side of the N-type semiconductor structure closest to the substrate. The diode further includes a lead structure located on the side of the P-type semiconductor structure close to the substrate, and a portion of the lead structure overlaps with the P-type semiconductor structure; The first electrode is connected to the lead structure through a third connection hole; the orthographic projection of the third connection hole on the substrate is located within the orthographic projection of the overlap area of ​​the lead structure and the first electrode on the substrate, and does not overlap with the P-type semiconductor structure and the N-type semiconductor structure.

15. The radio frequency switching circuit as described in claim 11, wherein, The adjustable parallel plate capacitor includes: A third electrode and a fourth electrode are disposed opposite to each other, and a dielectric layer is disposed between the third electrode and the fourth electrode; in the first direction, the dielectric layer has a first surface and a second surface opposite to each other, the end of the third electrode near the first surface is recessed relative to the dielectric layer, and the second surface is recessed relative to the other end of the third electrode; The third electrode is disposed in the same layer as the second metal layer, and the fourth electrode is located on the side of the dielectric layer away from the third electrode; in the first direction, a connecting line is disposed at one end of the fourth electrode near the first surface, and the connecting line extends along the side of one end of the dielectric layer to the surface of the insulating layer.

16. The radio frequency switching circuit as described in claim 15, wherein, In the first direction, the end of the fourth electrode near the second surface is recessed relative to the dielectric layer.

17. The radio frequency switching circuit as described in claim 15, wherein, The dielectric layer is made of piezoelectric or ferroelectric materials.

18. The radio frequency switching circuit according to any one of claims 1-17, wherein, The value of the first inductor is the inductance value corresponding to the resonant point of the resonant circuit formed by the equivalent capacitance and the first inductor connected in parallel; wherein, the equivalent capacitance is the capacitance corresponding to the switch when it is in the off state.

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