Computing system, computing method, chip and computing board

By introducing shared processing units and multiple processing units and optical computing units into the computing system, and using a bus for communication and data transmission, the problem of the difficulty in flexibly configuring optical computing hardware is solved, and flexible configuration of computing resources and efficient computing are realized.

WO2026138351A1PCT designated stage Publication Date: 2026-07-02SHANGHAI XIZHI TECH CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
SHANGHAI XIZHI TECH CO LTD
Filing Date
2025-11-27
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

The hardware for optical computing in existing computing systems is difficult to configure flexibly, resulting in poor computing efficiency.

Method used

Design a computing system comprising a shared processing unit, multiple processing units, and an optical computing unit. The processing units and optical computing units are flexibly matched and recombined via a first bus, and computing data and instructions are transmitted via a second bus. The shared processing unit performs preprocessing and postprocessing, and collaboratively completes the computing task.

Benefits of technology

It enables flexible configuration of processing units and optical computing units, optimizes computing resource allocation, improves computing efficiency and flexibility, and can collaboratively complete complex computing workloads.

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Abstract

The present invention relates to a computing system, a computing method, a chip and a computing board. The computing system comprises: a shared processing element; a plurality of processing elements, each of the processing elements being electrically coupled to the shared processing element, wherein the plurality of processing elements comprise a first processing element and a second processing element; and a plurality of optical computing units, each of the optical computing units being electrically coupled to the shared processing element, wherein the plurality of optical computing units comprise a first optical computing unit and a second optical computing unit.
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Description

Computing systems, computing methods, chips and computing boards

[0001] This invention claims priority to Chinese Patent Application No. 202411946043.9, filed with the China National Intellectual Property Administration on December 26, 2024, entitled "Computing System, Computing Method, Chip Packaging and Computing Board", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of chips, specifically to a computing system, computing method, chip packaging, and computing board. Background Technology

[0003] The development of technologies such as artificial intelligence and big data has placed increasingly higher demands on computing power. Currently, there are proposals to utilize light for computation and to perform certain computational tasks. Summary of the Invention

[0004] According to one aspect of the present invention, a computing system is provided, comprising: a shared processing unit; a plurality of processing units, each of the processing units being electrically coupled to the shared processing unit, wherein the plurality of processing units includes a first processing unit and a second processing unit; and a plurality of optical computing units, each of the optical computing units being electrically coupled to the shared processing unit, wherein the plurality of optical computing units includes a first optical computing unit and a second optical computing unit.

[0005] According to one aspect of the present invention, a chip package is provided that includes the computing system described herein.

[0006] According to one aspect of the present invention, a computing board is provided, which includes the computing system disclosed herein.

[0007] According to one aspect of the present invention, a computing method is provided, the computing method performing calculations through a computing system comprising: a shared processing unit, a plurality of processing units, and a plurality of optical computing units, wherein each of the plurality of processing units and each of the plurality of optical computing units is electrically coupled to the shared processing unit; the computing method comprising: at least one of the plurality of processing units receiving a corresponding instruction; according to the corresponding instruction, the at least one processing unit performing a corresponding computational process, and the shared processing unit performing the corresponding process; and the at least one processing unit invoking at least one of the plurality of optical computing units, causing the at least one optical computing unit to perform the corresponding computational process.

[0008] The technical effects of this invention are multifaceted. Depending on the application scenario and computational requirements, the processing unit can be matched and recombined with the optical computing unit. Furthermore, the processing unit can independently control one or more optical computing units, enabling flexible configuration of computing resources and collaborative completion of computational tasks / workloads. A shared processing unit can be shared by multiple processing units and multiple optical computing units. For example, the first bus provides a dedicated communication bus between multiple processing units and optical computing units, allowing simultaneous data transmission and communication with other data transfers within the computing system, while the second bus can transmit the initial data required for computation and also communicate with external devices and units. Attached Figure Description

[0009] Figure 1 is a schematic diagram of the computing system in some implementations.

[0010] Figures 2a and 2b are schematic diagrams of the computing system in some implementation methods.

[0011] Figure 3 is a schematic diagram of the processing unit in some embodiments.

[0012] Figure 4 is a schematic diagram of an optical computing unit in some implementations.

[0013] Figure 5 is a schematic diagram of a multiplier in some implementations.

[0014] Figure 6 is a schematic diagram of the modulator in some implementations.

[0015] Figure 7 is a schematic diagram of an optical computing unit in some implementations.

[0016] Figure 8 is a schematic diagram of chip packaging in some implementation methods.

[0017] Figure 9 is a schematic diagram of a computing board in some implementations.

[0018] Figure 10 is a schematic diagram of the calculation method in some implementations.

[0019] Figure 11 is a schematic diagram of the calculation method in some implementations.

[0020] Figure 12 is a schematic diagram of a photonic integrated circuit chip in some implementations.

[0021] Figure 13 is a schematic diagram of the computing system in some implementations. Embodiments of the present invention

[0022] To facilitate understanding of the various aspects, features, and advantages of the technical solution of this invention, the invention will be described in detail below with reference to the accompanying drawings. It should be understood that the various embodiments described below are for illustrative purposes only and are not intended to limit the scope of protection of this invention.

[0023] The terminology used herein is for the purpose of describing particular embodiments and is not intended to limit the invention. As used herein, the word "a" is intended to include plural cases unless the context clearly indicates that it refers to a single quantity. The terms "first," "second," or other similar expressions are used to distinguish objects and do not imply order or sequence unless their order of representation is clearly indicated. When inventors are referred to, it refers to the inventors of this disclosure (the present invention).

[0024] Unless otherwise specified in the following embodiments of this disclosure, the quantity of a component or element is implied to mean that there may be one or more, or it may be understood as at least one. “At least one” means one or more, and “more than one” means at least two.

[0025] The various embodiments of the present invention do not impose any particular limitation on the execution order of each step, as long as the purpose or function of the invention can be achieved. Some steps or sequences may be executed in parallel, sequentially, or alternately.

[0026] In this disclosure, different entities (which may be referred to differently as “cells,” “circuits,” other components, etc.) may be described or claimed to be “configured to” perform / complete one or more tasks or operations. This expression—an [entity] configured to [perform one or more tasks]—is used herein to refer to a structure (i.e., a physical thing). More specifically, this expression is used to indicate that the structure is arranged to perform one or more tasks during operation. A structure may be said to be “configured” to perform a certain task even if the structure is not currently being operated.

[0027] In this disclosure, when it is mentioned that A and B collaborate (cooperate) to complete / execute task X, it means that completing task X includes A and B jointly participating in the collaboration to complete X, and does not exclude other structures / units participating in the collaboration to jointly complete X.

[0028] Through research, the inventors (hereinafter referred to as the inventors) have discovered that when using optical computing, the hardware (units) of the optical computing part is usually difficult to configure flexibly. In addition, the computing system designed by the inventors also includes hardware (units) for electrical signal transmission / computation. The inventors realized that the architecture of the computing system needs to be properly designed in order to optimize the computing efficiency of the entire computing system.

[0029] Figure 1 illustrates a computing system 1000, comprising: a shared processing unit 190; multiple processing elements (PEs), shown in Figure 1 as processing elements 113a, 113b, 113c, and 113d, each of which is electrically coupled to the shared processing unit 190, wherein the multiple processing elements include a first processing element 113a and a second processing element 113b; and multiple optical computing units (shown in Figure 1 as 121a~121f, a total of 6), each of which is electrically coupled to the shared processing unit 190, wherein the multiple optical computing units include a first optical computing unit 121a and a second optical computing unit 121b.

[0030] The shared processing unit 190 can be shared by multiple processing units 113a-113d. Alternatively, the shared processing unit 190 can also be considered to be shared by multiple optical computing units 121a-121f. Thus, multiple processing units and multiple optical computing units can execute tasks independently, while the shared processing unit can perform shared functions and also implement some control functions. Furthermore, depending on the application scenario and computing requirements, an appropriate number of processing units and optical computing units can be matched and combined to achieve optimized computing effects.

[0031] In some embodiments, the shared processing unit is configured to preprocess the data and output the preprocessed result to at least one of the plurality of optical computing units. In some embodiments, the shared processing unit is configured to post-process the computation results from at least one of the plurality of optical computing units. Exemplarily, the at least one processing unit receives the post-processed result.

[0032] For example, the data for which the preprocessing is performed comes from at least one of a plurality of processing units.

[0033] In some implementations, the preprocessing includes data transformation processing, such as converting high-precision data into low-precision data. For example, the preprocessing includes quantizing the data from a neural network model.

[0034] In some implementations, the data conversion process includes converting the data type from signed numbers to unsigned numbers.

[0035] Data conversion processing includes, for example, converting high-precision data to low-precision data, converting data types from signed numbers to unsigned numbers, or processing data of a precision or format that is suitable for the optical computing unit hardware itself, or facilitating processing in computing tasks.

[0036] In some implementations, the shared processing unit is configured to distribute the required data to at least two optical computing units.

[0037] In some embodiments, the shared processing unit is configured to receive a first calculation result from the first optical computing unit and to post-process the first calculation result.

[0038] In some implementations, the post-processing includes data transformation processing.

[0039] In some implementations, the post-processing includes computational processing.

[0040] In some implementations, the post-processing includes dequantizing the data of the neural network model.

[0041] In some embodiments, the shared processing unit is configured to receive a first calculation result from a first optical computing unit and a second calculation result from a second optical computing unit, and to perform post-processing based on the first calculation result and the second calculation result, and to output the post-processed result to the first processing unit.

[0042] In some implementations, the shared processing unit is configured to arbitrate instructions from at least two of the processing units to determine the execution order of the instructions. Exemplarily, the shared processing unit may include an arbitrator (arbitration logic) to perform the above function, i.e., to arbitrate instructions from at least two of the processing units using the arbitrator.

[0043] In some implementations, the shared processing unit includes at least one of preprocessing logic 191 and postprocessing logic 192 to perform the preprocessing and postprocessing respectively, see Figures 2a and 2b.

[0044] In some embodiments, the plurality of optical computing units include optical computing units with different computing capabilities.

[0045] As shown in FIG2a, in some embodiments, the computing system includes an electrical signal conversion unit 170. Exemplarily, the shared processing unit is coupled to the plurality of optical computing units via the electrical signal conversion unit, the electrical signal conversion unit 170 including at least one of a DAC 171 and an ADC 172, the electrical signal conversion unit converting electrical signals representing data for communicative connection with the optical computing units.

[0046] In the computing system 1000, the optical computing unit is configured to perform computational processing, including optical computation operations using optical signals. Furthermore, the optical computing unit may also be configured to include at least one of implementing electrical signal input and output; that is, the optical computing unit can implement electrical signal input, or electrical signal output, or both. Thus, data / information can be input to or output to the optical computing unit using electrical signals, or the optical computing unit can be controlled using electrical signals, etc.

[0047] Referring to Figure 2b, in some embodiments, the computing system 1000 may include a first bus 130, through which multiple processing units may be coupled to a shared processing unit 190. The first bus 130 is configured to provide a communication path between the multiple processing units and the multiple optical computing units, such that each of the multiple processing units is communicatively connected to each of the multiple optical computing units. Thus, the first bus 130 can provide a communication path between any one of the processing units and any one of the optical computing units, allowing the processing unit to communicate with the optical computing units as needed. Therefore, during system operation, at least one of the multiple processing units can communicate with at least one of the multiple optical computing units as needed, flexibly coordinating to complete workloads, such as collaboratively completing tasks. The processing units and optical computing units can be matched and recombined according to the application scenario and computing requirements. Furthermore, the processing units can call upon an appropriate number of optical computing units as needed to complete the workload. In addition, the first bus provides a dedicated communication bus between the multiple processing units and the optical computing units, allowing simultaneous data transmission and communication with other systems.

[0048] For example, in a certain operating mode of the computing system, the processing unit 113a can communicate with the required optical computing units 121a~121d according to instructions.

[0049] It should be understood that the first bus 130 is configured to enable each of the plurality of processing units to communicate with each of the plurality of optical computing units. This means that the first bus can provide the aforementioned communication connection path, but does not mean that such communication is occurring, nor does it mean that each processing unit necessarily communicates with each optical computing unit during the operation of the computing system.

[0050] Referring to Figures 2a and 2b, in some embodiments, the computing system 1000 includes a second bus 150, each of the plurality of processing units (PEs) being configured to be coupled to the second bus 150. The second bus 150 may be referred to as the main bus.

[0051] In some implementations, a first bus, multiple processing units (PEs), and a second bus are formed on the same chip.

[0052] In some embodiments, the second bus 150 is configured to allow at least one of the plurality of processing units (PEs) to receive or send instructions, data, etc., via the second bus 150. A processing unit can execute a computational task based on the received instructions. For example, based on data received from the second bus (referred to as initial data), the processing unit and at least one corresponding optical computing unit perform computational processing to collaboratively complete the computational task. The first bus can transmit data generated during / in the computational task (referred to as intermediate data), or the first bus can transmit data from the second bus.

[0053] In some embodiments, the second bus 150 is configured to enable the first processing unit to communicate with the second processing unit.

[0054] In some embodiments, the second bus 150 is configured to cause the first processing unit to broadcast information to at least two other processing units.

[0055] The first bus enables a dedicated communication bus between the processing unit and the optical computing unit, allowing communication with other data transmissions in the system to occur simultaneously, without having to occupy the second bus.

[0056] In some embodiments, the first processing unit 113a is configured to receive an instruction, according to which the first processing unit 113a and at least one optical computing unit cooperate to complete a computing task; wherein the first processing unit is configured to communicate with each of the at least one optical computing unit via the first bus 130 so that they cooperate to complete the computing task, the first processing unit performs computing processing, and each of the at least one optical computing unit performs its own corresponding computing processing.

[0057] For example, the first processing unit 113a is configured to execute a first computational process P1, which controls / calls optical computing units 121a-121c to execute their respective second computational processes. For instance, optical computing unit 121a executes second computational process P2a, optical computing unit 121b executes second computational process P2b, and optical computing unit 121c executes second computational process P2c. For example, the second computational processes of each of the optical computing units 121a-121c can be executed in parallel.

[0058] For example, the first bus 130 may transmit data related to the second computing subtask, such as sending data to the optical computing units 121a-121c for them to perform calculations, or the first bus 130 may receive (transmit) data of the calculation results from the optical computing units 121a-121c, or the first bus 130 may transmit data of intermediate calculation results in the computing task.

[0059] The computing system can handle complex computing workloads. A computing workload may include multiple computing tasks, at least one of which can be assigned to a processing unit for execution and at least one corresponding optical computing unit. For example, for a certain workload, processing units 113a-113b and optical computing units 121a-121d cooperate to complete the computing workload.

[0060] In some embodiments, a computing task includes a first computing subtask and a second computing subtask. The first computing subtask includes computing processing executed in a processing unit, and the second computing subtask includes computing processing executed in an optical computing unit. The processing unit invokes at least one corresponding optical computing unit to collaboratively complete the computing task. For example, the first bus 130 is configured to transmit the computing result of the second computing subtask. In some embodiments, the first processing unit and the second processing unit are configured to receive a first instruction and a second instruction, respectively. According to the received instructions, the first processing unit and the first optical computing unit execute their respective computing processes to collaboratively complete the first computing task, and the second processing unit and the second optical computing unit execute their respective computing processes to collaboratively complete the second computing task. The first processing unit is configured to communicate with the first optical computing unit via the first bus to collaboratively complete the first computing task, and the second processing unit is configured to communicate with the second optical computing unit via the first bus 130 to collaboratively complete the second computing task. In some embodiments, the first computing task and the second computing task are executed in parallel. In some embodiments, the first computing task and the second computing task are part of a computing workload.

[0061] As shown in Figures 2a and 2b, in some embodiments, the computing system includes an electrical signal conversion unit 170, which includes at least one of a digital-to-analog converter (DAC) 171 and an analog-to-digital converter (ADC) 172. The electrical signal conversion unit converts electrical signals representing data for communication with the optical computing units. In some embodiments, the plurality of optical computing units 121a-121d may be part of an optical processor 120.

[0062] In some embodiments, the computing system includes an electrical signal conversion unit 170, which includes at least one of a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC). The electrical signal conversion unit converts electrical signals representing data for communication with the optical computing unit. The number of DACs and ADCs can be determined as needed.

[0063] For example, a digital-to-analog converter (DAC) converts digital electrical signals into analog electrical signals for input to an optical computing unit. The analog electrical signals representing data can serve as the data source in the optical computing unit, participating in computational tasks. For instance, the analog electrical signals can control the modulator of a multiplier in the optical computing unit, allowing data to be input into the multiplier for multiplication calculations, thereby obtaining the output result. Alternatively, an appropriate number of DACs can be configured for the optical encoder, whereby the analog electrical signals representing data can also serve as data inputs to the optical encoder, controlling the modulator in the encoder to encode light and outputting an optical signal carrying the data via the encoder.

[0064] In some implementations, the optical computing unit performs photoelectric conversion on the optical computing results and then outputs an analog electrical signal, which can then be converted into a digital electrical signal by an analog-to-digital converter.

[0065] In some embodiments, the first bus 130 is coupled to the plurality of optical computing units via the electrical signal conversion unit 170 (see FIG2b).

[0066] Processing Unit

[0067] Figure 3 illustrates an example of the processing unit 113. The processing unit can receive and decode instructions via a second bus, and can also control at least one optical computing unit to collaboratively perform computing tasks. In some embodiments, as shown in Figure 3, the processing unit (PE) includes an electrical computing unit 1133 and a cache 1135, wherein a memory can serve as the cache 1135 within the processing unit.

[0068] The electrical computing unit 1133 can be used to execute computing tasks (computational subtasks) or required computing processes that are required to be performed in the processing unit. When the processing unit calls on related optical computing units to cooperate in executing computing tasks, the electrical computing unit in the processing unit can cooperate with one or more optical computing units to participate in completing the computing tasks.

[0069] In some implementations, the electrical computing unit can perform nonlinear operations (operations) on matrices, such as activation operations in a neural network model. In some implementations, the optical computing unit can perform multiplication and summation operations, such as accumulating multiple products to complete linear matrix calculations, such as matrix-vector multiplication and matrix-matrix multiplication. Nonlinear matrix calculations can be performed in the electrical computing unit.

[0070] Cache 1135 can be static random access memory (SRAM), which can be used as a cache in a processing unit to store information such as data or instructions. The cache of a processing unit can be accessed by the electronic computing unit within that processing unit, or by other processing units. For example, a second processing unit can communicate with the cache of the first processing unit via a second bus to access the information stored in the cache.

[0071] The processing unit (PE) may include a control unit 1131, which controls the electrical computing unit to cooperate with at least one optical computing unit, enabling the processing unit to collaborate with the corresponding optical computing unit to complete calculations. The control unit 1131 can receive instructions via a second bus, then decode the instructions. Based on the decoded instructions, the electrical computing unit performs corresponding calculation operations, and the at least one optical computing unit performs corresponding calculation operations. The electrical computing unit and the corresponding at least one optical computing unit cooperate to complete the calculation task. The control unit can allocate the calculation processing performed by the electrical computing unit and the optical computing unit. In some embodiments, the control unit may include a CPU.

[0072] Optical Computing Unit

[0073] Each of the plurality of optical computing units is configured to perform computational processing, which includes optical computation operations using optical signals. Exemplarily, the optical computation operations include multiplication operations, summation operations, etc.

[0074] The optical computing unit can also be configured to include at least one of the functions of inputting and outputting electrical signals; that is, the optical computing unit can input electrical signals, output electrical signals, or simultaneously input and output electrical signals. Thus, data / information can be input to or output to the optical computing unit as electrical signals, or the optical computing unit can be controlled by electrical signals, etc. Therefore, it should be understood that the term "optical computing unit" indicates the ability to participate in computation in the form of optical signals, but does not exclude the possibility of having electrical signal input / output.

[0075] In some embodiments, the computational processing includes photoelectric conversion of the results of the optical computational operation.

[0076] In some embodiments, the optical computing unit is configured to output the results of the computational processing as electrical signals.

[0077] In some implementations, the first bus is configured to transmit the computation results output by the optical computing unit. Alternatively, the first bus is configured to transmit intermediate computation results in a computing task.

[0078] See Figure 4, which shows an optical computing unit 121.

[0079] In some embodiments, the optical computing unit 121 can perform photoelectric conversion on the results of optical computing operations. For example, the optical computing unit may include a photoelectric converter, such as a photodetector, which can convert optical signals into electrical signals, thereby using electrical signals to represent the computing results. Exemplarily, the optical computing unit is configured to output the results of the computing process as electrical signals.

[0080] In some implementations, the first bus is configured to transmit intermediate calculation results, which may be obtained by further processing based on the calculation results of the optical computing unit, or by further processing based on the calculation results of the processing unit (or the electrical computing unit therein), so that the optical computing unit and the corresponding processing unit (or the electrical computing unit therein) cooperate to complete the calculation task.

[0081] In some embodiments, the optical computing unit includes a plurality of multipliers, each of which is configured to perform a multiplication operation on a first number and a second number, wherein at least one of the first number and the second number is represented by an optical signal to perform the multiplication operation.

[0082] As shown in Figure 4, the optical computing unit 121 includes multipliers 1211a, 1211b, 1211c, and 1211d, and summers 1213a and 1213b. Each of the multipliers 1211a-d is configured to perform a multiplication operation on a first number and a second number. One multiplier V1 of multiplier 1211a is input as an optical signal, while another multiplier M... 11 Then, by inputting an electrical signal, M can be executed. 11 The calculation of V1. One multiplier V2 of multiplier 1211b is input as an optical signal, while one multiplier M... 12 Then, by inputting an electrical signal, M can be executed. 12 • V2 calculation. The summer 1213a performs a summation calculation on the outputs of multipliers 1211a and 1211b. One multiplier V1 of multiplier 1211c is input as an optical signal, while one multiplier M... 21 Then, by inputting an electrical signal, M can be executed. 21 The calculation of V1. One multiplier V2 of multiplier 1211d is input as an optical signal, while one multiplier M... 22 Then, by inputting an electrical signal, M can be executed. 22 The calculation of V2. The summer 1213b performs a summation calculation on the outputs of multipliers 1211c and 1211d.

[0083] For example, the optical computing unit 121 can perform vector and matrix multiplication operations. For example, M 11 M 12 M 21and M 22 Then V1 and V2 represent the four elements in a 2×2 matrix M, and V1 and V2 represent the two elements in a vector V.

[0084] In some implementations, the multiplier may include a modulator that can take in an input optical signal (which can be regarded as a data optical signal) representing a first number and apply an electrical signal representing a second number for modulation. The applied electrical signal represents another element (number) of the multiplication operation, thereby changing the nature of the output optical signal of the modulator. As a result, the intensity of the light changes when it is input to and output from the modulator, thus completing the multiplication calculation. The light output from the modulator can represent the product.

[0085] In some embodiments, as shown in Figure 5, a multiplier 1211 may be included, in addition to a modulator 5100, and may further include a photodetector 5300 connected to an optical output of the modulator for photoelectric conversion. Thus, the multiplication result of the multiplier is represented as an electrical signal. It should be understood that if other calculations are performed on the photoelectric converted electrical signal, and such calculations are performed solely in the electrical domain, then this part is considered a purely electrical calculation.

[0086] Referring to Figure 4, any of the multipliers 1211a~1211d can be multiplier 1211 as shown in Figure 5. As shown in Figure 5, multiplier 1211 includes a modulator 5100, where the optical signal can be used as a multiplier input to the modulator 5100, and the electrical signal can be used as the modulation signal input to the modulator, representing another multiplier. The output optical signal of the modulator can represent the product result. For example, for multiplier 1211a, V1 represents the number corresponding to the optical signal input to the modulator in the multiplier, M... 11 The input signal to the modulator corresponds to the electrical signal in the multiplier, while the modulated optical signal represents the product M. 11 ·V1.

[0087] The multiplier 1211 may also have a photodetector 5300. Thus, after performing optical multiplication, the multiplier 1211 can output the product result using an electrical signal.

[0088] Referring to Figure 4, by way of example, summers 1213a and 1213b can perform summation operations in the electrical domain, that is, sum the data represented by electrical signals. For example, if multipliers 1211a~d use electrical signals to output to the corresponding summers, then summers 1213a and 1213b can perform summation in the electrical domain. Multiple multipliers and corresponding summers constitute a multiply-add unit.

[0089] For example, the modulator can be a Mach-Zehnder interferometer modulator, i.e., an MZI (Mach-Zehnder Interferometer) modulator. An MZI modulator may include a first arm (first optical path) and a second arm (second optical path). At least one of the first and second arms can change its refractive index according to an electrical signal, thereby adjusting the optical path difference between the light from the first and second arms. The light outputs from the first and second arms merge and produce interference. Thus, the intensity of the interference light can be adjusted according to the electrical signal, thereby achieving the purpose of modulating the optical signal. For example, the MZI includes an optical splitter to distribute the optical power at the input port of the MZI to the first and second arms. The MZI modulator can be implemented based on semiconductor technology.

[0090] Figure 6 shows an example of an MZI modulator 5100, which includes an input waveguide 5110, a first arm 5130, a second arm 5140, and an output waveguide 5150. The first arm 5130 includes a waveguide 5133 and a phase shifter 5131. The phase shifter 5131 can change the phase of the waveguide segment (corresponding optical path) in the phase shifter according to the electrical signal. Here, the phase shifter can be regarded as a phase modulator.

[0091] In some implementations, the MZI modulator may include a directional coupler. The two arms of the MZI modulator can be connected to the two inputs of a directional coupler, which may also have two outputs; that is, it is a 2-input, 2-output directional coupler. The output of any one of the directional couplers can be considered as an output of the MZI modulator; that is, the output of the directional coupler can be regarded as the output of the MZI modulator. When this MZI modulator is used in the multiplier in Figure 5, either both optical outputs of the directional coupler in the MZI modulator can be used simultaneously, or only one of the optical outputs can be used.

[0092] When we mention optical computing in this article, we are referring to the computation in which data in the form of optical signals participates in the calculation. If data represented by electrical signals is also involved in the calculation, it can also be called photoelectric computing. For example, in the multiplier containing the MZI modulator mentioned above, the optical signal (optical power) input to the MZI represents one multiplier, and the electrical signal used for modulation represents another multiplier to complete the multiplication operation. In this case, considering that data represented in optical form participates in the calculation, we can use the term optical computing. If we consider that both electrical and optical signal data participate in the calculation simultaneously, we can also use the term photoelectric computing. Furthermore, some computational processes are performed in the optical domain for one part and in the electrical domain for another part. This entire computational process can be called either optical computing (because it includes computation performed using light) or photoelectric computing. That is, when we mention optical computing, at least one part of the computation process involves data represented by optical signals.

[0093] For example, data required by the optical computing unit, such as input data of multiple multipliers, can be transmitted via a first bus. In some embodiments, transmitting data required by the optical computing unit via the first bus also includes processing the data transmitted via the first bus before inputting it into the optical computing unit for computation.

[0094] In some embodiments, the optical computing unit includes multiple multipliers and a summer; the summer sums the products obtained by the multiple multipliers. In some embodiments, the summer performs the summation in the electrical domain, that is, sums the data represented by electrical signals.

[0095] In some embodiments, as shown in FIG7, one of the optical computing units 121 includes optical encoders 1215a and 1215b. The optical encoders 1215a and 1215b can encode light based on data, and their output optical signals represent the data, generating data optical signals. The data optical signals can participate in computation; for example, the data optical signals can represent the first number input to a multiplier. Multiple optical encoders can constitute an optical encoding unit.

[0096] For example, the optical encoder may include a modulator, which can input an electrical signal representing data and an unmodulated optical signal. The modulator modulates the input optical signal based on the electrical signal representing data to generate an optical signal representing the data. For example, the intensity of the output optical signal of the output modulator can be controlled by an electrical signal, such as a first intensity representing 1 and a second intensity representing 0. The modulator may be an MZI modulator, as shown in Figure 6.

[0097] The optical computing unit 121 may further include optical ports 1214a and 1214b for inputting optical signals. In Figure 7, optical ports 1214a and 1214b can be connected to optical encoders 1215a and 1215b respectively via waveguides. These optical ports 1214a and 1214b are used to input unencoded light into the optical encoders. An optical fiber or laser can be coupled to optical ports 1214a and 1214b to provide unencoded light to them. Exemplarily, the input data for optical encoders 1215a and 1215b originates from data in a computing task; for example, it can acquire relevant data via a first bus. This relevant data can be input to the electrical signal port of the optical encoder in the form of an electrical signal. The output of the optical signal is controlled by the electrical signal to encode the unencoded optical signal, thereby enabling the optical signal to carry data; that is, the optical encoder outputs an encoded optical signal carrying relevant data.

[0098] In some embodiments, the optical computing unit includes optical replicators 1217a and 1217b (see Figure 7), which can replicate the data represented by the optical signal. For example, the optical encoder 1215a outputs an optical signal representing a number V1. The optical encoder is connected to the optical replicator via a waveguide. Through the data replication function of the optical replicator 1217a, two optical signals are output, both representing V1. Exemplarily, the optical replicator can be a device that performs optical power distribution, such as including one or more optical beamsplitters or directional couplers. Exemplarily, it can distribute the light from one input port to two output ports. For example, ignoring light propagation loss, the light is evenly distributed to the two output ports, with each output port receiving 50% of the light from the input port. As needed, the optical replicator can also distribute the light from one input port to N output ports, or in other words, the optical replicator replicates the optical data from the input port to N output ports.

[0099] In Figure 7, the two outputs of the optical replicator 1217a are connected to multipliers 1211a and 1211c via waveguides, respectively. The optical replicator 1217a performs the function of replicating optical information. Of course, if needed, multipliers 1211a and 1211c can be connected to their respective optical encoders independently, instead of sharing the same optical encoder through the optical replicator.

[0100] [Chip or chip package]

[0101] Various components of the computing system 1000 can be manufactured into chips or chip packages. For example, a computing chip may include the aforementioned computing system 1000, and the computing chip may be manufactured into a chip package. In some embodiments, the computing system is manufactured into a chip package, for example, the chip package may include a first chip and a second chip. The first chip includes a first bus, multiple processing units (PEs), a second bus, and may also include an electrical signal conversion unit or other components; the second chip includes multiple optical computing units. The first chip and the second chip may be bare dies. In some cases, if the first chip and the second chip are each inseparably packaged together from bare dies, they can be considered as a single computing chip.

[0102] For example, FIG8 illustrates a chip package 800, which includes a first chip 810 and a second chip 830, wherein the first chip 810 is electrically connected to the second chip 830. For example, the first chip 810 may be electrically connected to the second chip 830 via a first bonding layer 802.

[0103] Multiple optical computing units can be formed in a photonic integrated circuit chip, that is, a photonic integrated circuit chip can be manufactured, which includes the multiple optical computing units in the embodiments of the present invention. The photonic integrated circuit chip can constitute the second chip described above.

[0104] A photonic integrated circuit chip may include photonic devices such as optical ports, waveguides, photoelectric converters, electro-optic converters, and light sources. The number of various photonic devices can be configured as needed, and there may be one or more. For example, the electro-optic converter may include a modulator to convert an electrical signal into an optical signal (modulating the information of the electrical signal into an optical signal). For example, the optical port may be used for optical coupling with a light source such as a laser or an optical fiber, thereby inputting or outputting an optical signal to or from the photonic integrated circuit chip; for example, using an optical fiber for optical signal input and output; the optical port may include an optical coupling structure, such as a grating coupler or an end-face coupler. For example, the waveguide may be used to propagate optical signals, serving as a channel for information propagation. For example, the photoelectric conversion unit may include a photodetector for converting the optical signal into an electrical signal; the photodetector may include, for example, a photodiode. For example, the photonic integrated circuit chip includes a light source; the light generated by the light source can be coupled to the waveguide and can also be modulated by an electrical signal.

[0105] For example, the waveguide in the photonic integrated circuit chip can input an uncoded optical signal through the first optical port. After being modulated by the electrical signal of the optical encoder, an information-carrying optical signal, i.e., the encoded optical signal, is generated.

[0106] According to one aspect of this disclosure, a computing device, such as a computing board, is provided. In some embodiments of the invention, the computing board includes a computing system as described in the embodiments of the invention, and a connector for insertion into an external slot to transmit electrical signals, wherein a second bus (or main bus) of the computing system is configured to be communicatively coupled to the connector. Exemplarily, the connector is a PCIe connector capable of transmitting PCIe electrical signals.

[0107] Figure 9 illustrates an example of a computing board 2000, which may include a chip package 800 electrically connected to a substrate 950 via a second bonding layer 904. The chip package 800 is also electrically connected to a connector 910 via wiring lines 908. The connector 910 is used to insert into an external slot to transmit electrical signals. The chip package 800 may include the computing system described in this embodiment of the invention.

[0108] Example of calculation method

[0109] According to one aspect of this disclosure, a calculation method is provided. Figure 10 shows a schematic diagram of the steps in the calculation method. In some embodiments, the calculation method includes: at least one of the plurality of processing units receiving a corresponding instruction (S100); according to the corresponding instruction, the at least one processing unit performs a corresponding calculation process, wherein the at least one processing unit calls at least one of the plurality of optical computing units via a first bus, causing the at least one optical computing unit to perform the corresponding calculation process (S200).

[0110] According to one aspect of this disclosure, as shown in FIG11, a computation method is provided. In some embodiments, the computation method includes: at least one of the plurality of processing units receiving a corresponding instruction (S100); according to the corresponding instruction, the at least one processing unit performs a corresponding computational process, and a shared processing unit performs a corresponding process; and the at least one processing unit invokes at least one optical computing unit among the plurality of optical computing units, causing the at least one optical computing unit to perform the corresponding computational process (S300). Thus, the at least one processing unit invokes the shared processing unit, and the at least one processing unit invokes the at least one optical computing unit via the shared processing unit, allowing the at least one processing unit, the shared processing unit, and the at least one optical computing unit to collaboratively perform computational tasks.

[0111] The above calculation method can be implemented by the computing system in the embodiments of the present invention. The functional descriptions of the computing system and its various structures / units herein also apply to the execution of related functions by the calculation method. The computing system can be formed in the chip, chip package, or computing board in the embodiments of the present invention.

[0112] In some embodiments, the at least one processing unit receives instructions via a second bus.

[0113] In some embodiments, a computational task includes a first computational subtask and a second computational subtask. The first computational subtask includes computational processing executed in a processing unit, and the second computational subtask includes computational processing executed in an optical computing unit. The processing unit calls at least one corresponding optical computing unit to collaboratively complete the computational task. The method further includes transmitting the computational results of the second computational subtask via a first bus. The computational method can be understood by referring to the accompanying drawings of the computational system and its configuration disclosed herein.

[0114] In some embodiments, the at least one processing unit includes a processing unit 113a, which invokes optical computing units 121a, 121b, and 121c when completing a computing task.

[0115] In some embodiments, the at least one processing unit includes processing units 113a and 113b, each of which receives instructions, wherein processing unit 113a invokes optical computing units 121a and 121b to complete the computing task, and processing unit 113b invokes optical computing units 121c and 121d to complete the computing task.

[0116] For example, when performing its corresponding computational task, the processing unit may invoke the electrical computing unit within the processing unit to perform computations. For example, the at least one processing unit assigns computational processing to its respective electrical computing unit and at least one corresponding optical computing unit. For instance, processing unit 113a assigns computational processing to its electrical computing unit and at least one corresponding optical computing unit (e.g., optical computing units 121a and 121b), and processing unit 113b assigns computational processing to its electrical computing unit and at least one corresponding optical computing unit (e.g., optical computing units 121c and 121d).

[0117] In some embodiments, the first processing unit 113a, according to received instructions, causes itself and at least one optical computing unit to collaboratively complete a computational task. The first processing unit 113a communicates with each of the at least one optical computing unit via the first bus 130, enabling them to collaboratively complete the computational task. The first processing unit performs corresponding computational processing, and each of the at least one optical computing unit performs its own computational processing. For example, when performing a computational task, the first processing unit 113a communicates with optical computing units 121a, 121b, and 121c, respectively, causing the first processing unit 113a to perform its assigned computational processing, and each of the optical computing units 121a, 121b, and 121c to perform its assigned computational processing. In some embodiments, at least one processing unit and at least one associated optical computing unit collaborate to complete computational tasks within a computational workload, such as a first computational task and a second computational task. At least one processing unit receives an instruction; for example, first processing unit 113a receives a first instruction, and second processing unit 113b receives a second instruction. First processing unit 113a invokes optical computing units 121a and 121b, enabling them to collaborate to complete a first computational task related to the first instruction. Second processing unit 113b invokes optical computing units 121c and 121d, enabling them to collaborate to complete a second computational task related to the second instruction. Optionally, the cache of the first processing unit can store data related to the computational task, such as computation results. The second processing unit can access the cache of the first processing unit via a second bus to obtain the computation results. These computation results may include those related to the first computational task, including intermediate results; furthermore, intermediate results may also be the results generated by other steps in the computational task. For example, the calculation results related to the first calculation task include the calculation results generated by the first processing unit 113a, or the calculation results generated by the optical computing unit 121a, or the calculation results generated by the optical computing unit 121b, or data generated by further processing based on the calculation results of at least one of the first processing unit 113a, the optical computing unit 121a and 121b.

[0118] In some embodiments, the method includes: storing corresponding intermediate calculation results in a cache in each of the at least one processing unit.

[0119] In some implementations, the method includes the second processing unit accessing a cache in the first processing unit.

[0120] In some implementations, the first computing task and the second computing task are executed in parallel. In some implementations, based on the data received from the second bus (referred to as initial data), the processing unit and at least one corresponding optical computing unit perform computational processing to collaboratively complete the computing task.

[0121] In some embodiments, the computing system includes a second bus, and the method includes: the at least one processing unit receiving initial data via the second bus for computational processing to be performed by the at least one processing unit and a corresponding at least one optical computing unit. Furthermore, the first bus can transmit data generated during / in the computational task (referred to as intermediate data).

[0122] In some embodiments, the control unit 1131 controls the electrical computing unit to cooperate with at least one optical computing unit, so that the processing unit cooperates with the corresponding optical computing unit to complete the calculation. The control unit 1131 can receive instructions via a second bus, then decode the instructions. Based on the decoded instructions, the electrical computing unit performs a corresponding calculation operation, and the at least one optical computing unit performs a corresponding calculation operation. The electrical computing unit and the corresponding at least one optical computing unit cooperate to complete the calculation task. The control unit can allocate the calculation processing performed by the electrical computing unit and the optical computing unit.

[0123] Before or after the optical computing unit performs processing, the shared processing unit 190 performs at least one function or requirement commonly required by the optical computing unit.

[0124] For example, in some embodiments, the first processing unit 113a, according to received instructions, invokes a shared processing unit 190 and at least one optical computing unit to collaboratively complete a computational task. Exemplarily, the first processing unit 113a communicates with the shared processing unit 190, for example, by transmitting data and instructions. The shared processing unit 190 can process the data from the first processing unit 113a, including preprocessing, and then transmits the processing results to at least one optical computing unit for further processing. Exemplarily, during the execution of a computational task, the shared processing unit 190 communicates with optical computing units 121a, 121b, and 121c. The shared processing unit 190 can allocate data to the optical computing units 121a, 121b, and 121c, and each of the optical computing units 121a, 121b, and 121c performs the assigned computational processing task. After optical computing units 121a, 121b, and 121c complete their respective calculations, the calculation results are transmitted to shared processing unit 190. Shared processing unit 190 performs post-processing, and the results of the post-processing can be transmitted to first processing unit 113a. Thus, before or after processing by the optical computing units, shared processing unit 190 performs at least one function or requirement commonly required by the optical computing units.

[0125] In some embodiments, the at least one processing unit includes processing units 113a and 113b, each receiving an instruction. Processing units 113a and 113b respectively transmit data to a shared processing unit 190. The shared processing unit 190 performs preprocessing and outputs the data to the corresponding optical computing units. For example, data from processing unit 113a, after processing by the shared processing unit 190, is output to optical computing units 121a and 121b, and data from processing unit 113b, after processing by the shared processing unit 190, is output to optical computing units 121c and 121d. The shared processing unit 190 can execute the corresponding processing tasks in parallel. Furthermore, the output results from optical computing units 121a-121d can also be output to the shared processing unit 190 for further processing, such as post-processing. The shared processing unit 190 can then further output the results to at least one processing unit. In some embodiments, the shared processing unit 190 further processes and outputs the results based on the results from the four optical computing units 121a-121d. For example, the results from optical computing units 121a and 121b are further processed and output to processing unit 113a, and the results from optical computing units 121c and 121d are further processed and output to processing unit 113b. Figure 12 shows a top view of the photonic integrated circuit chip 1200 in some embodiments. The photonic integrated circuit chip can be a second chip in a chip package. Exemplarily, the photonic integrated circuit chip 1200 may include multiple optical computing units 121a-121j. In the computing system, the optical computing units may have different computing capabilities; for example, each of the optical computing units 121a-121d has a first computing capability, and each of the optical computing units 121e-121j has a second computing capability. For example, each of the optical computing units 121a-121d can calculate the product of a 1×32 vector and a 32×32 matrix (i.e., the vector contains 32 elements and the matrix is ​​a 32×32 matrix), while each of the optical computing units 121e-121j can calculate the product of a 1×16 vector and a 16×16 matrix. As another example: each of the optical computing units 121a-121d can calculate the product of a 1×32 vector and a 32×32 matrix, while each of the optical computing units 121e-121j can calculate the product of a 1×8 vector and an 8×8 matrix.

[0126] Referring to Figure 13, in some embodiments, the computing system 1000 further includes a management controller, which may be a management control core 115. The management control core 115 can manage and control multiple processing units, shared processing units 190, or multiple optical computing units. For example, the management control core 115 may be coupled to a second bus 150 (i.e., the main bus) and communicate with multiple processing units and shared processing units via the second bus 150.

[0127] For example, the management control core 115 can schedule tasks for multiple processing units, such as assigning computation task-related instructions to at least one processing unit. After receiving the corresponding instructions, the at least one processing unit cooperates with the shared processing unit and the corresponding optical computing unit to complete the computation task. For example, in the computation method or process, the at least one processing unit includes processing units 113a and 113b. Each of the processing units 113a and 113b receives instructions from the management control core 115. According to the instructions, processing unit 113a cooperates with the shared processing unit 190 and optical computing units 121a and 121b to complete the computation task, and processing unit 113b cooperates with the shared processing unit 190 and optical computing units 121c and 121d to complete the computation task.

[0128] Those skilled in the art should understand that the above-disclosed embodiments are merely implementations of the present invention and should not be construed as limiting the scope of the patent protection claimed by the present invention. Equivalent variations made according to the embodiments of the present invention are still within the scope of the claims of the present invention.

Claims

1. A computing system, comprising: Shared processing unit; Multiple processing units, each of which is electrically coupled to the shared processing unit, wherein the multiple processing units include a first processing unit and a second processing unit; Multiple optical computing units, each of which is electrically coupled to the shared processing unit, wherein the multiple optical computing units include a first optical computing unit and a second optical computing unit.

2. The computing system of claim 1, wherein, The shared processing unit is configured to preprocess the data and output the preprocessed result to at least one of the plurality of optical computing units.

3. The computing system of claim 1, wherein, The shared processing unit is configured to post-process the computation results from at least one of the plurality of optical computing units.

4. The computing system of claim 2, wherein, The data to be preprocessed comes from at least one of the plurality of processing units.

5. The computing system according to claim 2, wherein the preprocessing includes data transformation processing.

6. The computing system according to claim 5, wherein the data conversion processing includes converting the data from high-precision data to low-precision data.

7. The computing system of claim 5, wherein, The data transformation process includes quantization of the data from the neural network model.

8. The computing system of claim 5, wherein, The data conversion process includes converting the data type from signed numbers to unsigned numbers.

9. The computing system of claim 2, wherein, The preprocessing includes computational processing.

10. The computing system of claim 3, wherein, The post-processing includes data transformation processing.

11. The computing system of claim 3, wherein, The post-processing includes computational processing.

12. The computing system according to claim 10, wherein the data conversion processing includes dequantizing the data of the neural network model.

13. The computing system according to claim 1, wherein the shared processing unit is configured to receive a first calculation result from the first optical computing unit and to perform post-processing on the first calculation result.

14. The computing system of claim 3, wherein, The shared processing unit is configured to receive a first calculation result from a first optical computing unit and a second calculation result from a second optical computing unit, perform post-processing based on the first calculation result and the second calculation result, and output the post-processing result to the first processing unit.

15. The computing system of claim 1, wherein, The shared processing unit is configured to distribute the required data to at least two optical computing units.

16. The computing system of claim 1, wherein the shared processing unit is configured to arbitrate instructions from at least two of the processing units to determine the execution order of the instructions.

17. The computing system of claim 1, wherein, The computing system includes an electrical signal conversion unit, and the shared processing unit is coupled to the plurality of optical computing units via the electrical signal conversion unit. The electrical signal conversion unit includes at least one of a DAC and an ADC, and the electrical signal conversion unit converts the electrical signals representing data to establish a communication connection with the optical computing units.

18. The computing system of claim 1, wherein, The plurality of processing units are configured to be coupled to the shared processing unit via a first bus, and the first bus is coupled to the plurality of optical computing units via the shared processing unit.

19. The computing system of claim 2, wherein, The shared processing unit includes preprocessing logic to perform the preprocessing.

20. The computing system of claim 2, wherein, The shared processing unit includes post-processing logic to perform the post-processing.

21. The computing system of claim 2, wherein, The shared processing unit includes arbitration logic to perform the arbitration process.

22. The computing system of claim 1, wherein, The plurality of optical computing units include optical computing units with different computing capabilities.

23. The computing system of claim 1, wherein, Each of the plurality of processing units includes an electrical computing unit.

24. The computing system of claim 1, wherein, Each of the plurality of processing units includes a cache configured to store data related to computing tasks.

25. The computing system of claim 1, wherein, Each of the plurality of processing units includes a control unit configured to control its respective processing unit and at least one of the corresponding optical computing units to collaboratively complete a computing task.

26. The computing system of claim 1, wherein, Each of the plurality of optical computing units is configured to perform computational processing, which includes optical computation operations using optical signals.

27. The computing system of claim 1, wherein, The optical computing unit is configured to perform at least one of electrical signal input and output.

28. The computing system of claim 26, wherein, The computational processing includes photoelectric conversion of the results of the optical computation operation.

29. A chip package comprising a computing system as described in any one of claims 1 to 28.

30. The chip package of claim 29, comprising a chip, said chip comprising the computing system of any one of claims 1 to 28.

31. The chip package according to claim 29, comprising a first chip and a second chip, wherein the first chip includes the plurality of processing units and the shared processing unit, and the second chip includes the plurality of optical computing units.

32. A computing board, comprising a computing system as described in any one of claims 1 to 28, and a connector for insertion into an external slot to transmit electrical signals.

33. The computing board according to claim 32, wherein the connector is a PCIe connector.

34. A computing method for computing by a computing system, the computing system comprising: A shared processing unit, multiple processing units, and multiple optical computing units, wherein each of the multiple processing units and each of the multiple optical computing units are electrically coupled to the shared processing unit; the computing method includes: At least one of the multiple processing units receives the corresponding instruction; According to the corresponding instructions, the at least one processing unit performs the corresponding computational processing, and the shared processing unit performs the corresponding processing, and the at least one processing unit calls at least one optical computing unit among a plurality of optical computing units, so that the at least one optical computing unit performs the corresponding computational processing.

35. The calculation method according to claim 34, wherein, The shared processing unit performs the following processing: preprocessing the data and outputting the preprocessing result to the at least one optical computing unit.

36. The calculation method according to claim 34, wherein, The shared processing unit performs the following processing: post-processing the calculation results from at least one of the multiple optical computing units.

37. The calculation method according to claim 35, wherein, The data to be preprocessed comes from at least one of the plurality of processing units.

38. The calculation method according to claim 36, comprising: The at least one processing unit receives the result of the post-processing.