Back electromotive force electric energy recovery circuit and method for unmanned aerial vehicle, and unmanned aerial vehicle

Abstract

The present application provides a back electromotive force electric energy recovery circuit and method for an unmanned aerial vehicle, and an unmanned aerial vehicle. Combining output circuits combine a plurality of battery voltages to supply power to a load; and when back electromotive force is present due to deceleration of the unmanned aerial vehicle, comparison circuits detect the plurality of battery voltages, and if a back electromotive force voltage is greater than each of the battery voltages, at least one reverse charging circuit is turned on to charge a battery. The embodiments achieve that when a plurality of batteries supply power to the unmanned aerial vehicle, mutual charging between the batteries can be prevented, back electromotive force electric energy generated when a motor slows down can be absorbed by means of the batteries, and uninterrupted power supply to the unmanned aerial vehicle can be achieved by means of hot-swapping of the batteries when the unmanned aerial vehicle is in a standby state, thereby reducing power cycling and initialization time of the unmanned aerial vehicle caused by battery replacement, and improving the operational efficiency of the unmanned aerial vehicle.

Description

A back EMF energy recovery circuit and method for unmanned aerial vehicles (UAVs) and the UAV itself.

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. CN202411911818.9, filed on December 23, 2024, entitled "A circuit, method and drone for recovering back electromotive force energy of a drone", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of electronic technology, and more specifically, to a back EMF energy recovery circuit, method, and drone for unmanned aerial vehicles (UAVs). Background Technology

[0004] It is common for multi-rotor drones to generate back electromotive force during deceleration. If the excessively high back electromotive force voltage is not properly handled, it will damage electronic components, affect the normal operation of circuits, and in severe cases, may directly lead to the drone crashing.

[0005] Currently, for drones powered by a single battery, the back electromotive force generated by the motor deceleration can be directly absorbed by the battery, and the back electromotive force has virtually no impact on the electronic circuitry.

[0006] However, for drones powered by multiple batteries and supporting hot-swappable batteries, the back electromotive force (EMF) cannot be directly absorbed by the batteries. Because batteries require hot-swappable charging, the charging circuit is blocked, meaning the back EMF generated during deceleration cannot be absorbed. This results in the back EMF having nowhere to dissipate, potentially damaging the aircraft's electronic components. Currently, a common protection method is to add a high-power TVS diode at the voltage input to discharge the instantaneous back EMF voltage, maintaining the voltage within the normal power supply range to ensure stable operation of the electronic circuitry. Summary of the Invention

[0007] The purpose of this application is to provide a back EMF energy recovery circuit, method, and drone for drones, in order to solve the problem that existing drones powered by multiple batteries and supporting hot battery replacement have difficulty recovering back EMF energy.

[0008] This application provides a back EMF energy recovery circuit for a drone, comprising: at least two combined output circuits, at least two comparison circuits, and at least two reverse charging circuits.

[0009] The first terminal of the combiner output circuit is used to connect to the output terminal of a battery module. The first terminal of the combiner output circuit is also connected to the first terminal of the comparator circuit. The second terminal of the combiner output circuit is connected to the third terminal of the comparator circuit. The third terminal of the combiner output circuit is connected to the second terminal of the comparator circuit. The fourth terminal of the comparator circuit is connected to the second terminal of the reverse charging circuit. The second terminal of the combiner output circuit is also connected to the third terminal of the reverse charging circuit. The first terminal of the reverse charging circuit is used to connect to the input terminal of the battery module. The second terminal of the combiner output circuit is also used to connect to the flight control system.

[0010] At least two combined output circuits are used to combine at least two battery voltages and output a first battery voltage to power the load; wherein the first battery voltage is the highest voltage among the at least two battery voltages;

[0011] At least two comparator circuits are used to detect whether the voltage of each battery is less than the back EMF voltage when the flight control system generates a back EMF voltage.

[0012] At least two reverse charging circuits are provided to activate the reverse charging circuit corresponding to at least one battery module when the voltage of each battery is less than the back electromotive force voltage, so that the back electromotive force voltage charges the battery module.

[0013] In the above technical solution, multiple battery voltages are combined using a combined output circuit to supply power to the load. When back electromotive force (EMF) is generated due to drone deceleration, a comparison circuit detects the voltages of multiple batteries. If the back EMF voltage is greater than the voltage of each battery, at least one reverse charging circuit is activated to charge the battery. This embodiment prevents mutual charging between batteries when multiple batteries are supplying power to the drone, absorbs the back EMF energy generated during motor deceleration through the batteries, and supports hot-swapping of batteries in standby mode to ensure uninterrupted power supply to the drone. This reduces the time required for drone power-on / off and initialization due to battery replacement, thereby improving the drone's operational efficiency.

[0014] In some alternative implementations, control signal logic circuitry is also included;

[0015] The output of the first comparator circuit is connected to the first terminal of the control signal logic circuit, the output of the second comparator circuit is connected to the second terminal of the control signal logic circuit, the third terminal of the control signal logic circuit is connected to the second terminal of the first reverse charging circuit, and the third terminal of the control signal logic circuit is also connected to the second terminal of the second reverse charging circuit.

[0016] In the above technical solution, the control signal logic circuit outputs a corresponding control signal based on the comparison result of the first comparison circuit and the second comparison circuit, thereby controlling the opening or closing of the first reverse charging circuit and the second reverse charging circuit.

[0017] In some alternative implementations, the first comparison circuit includes a first comparator and a third comparator; the second comparison circuit includes a second comparator and a fourth comparator.

[0018] The output terminal Vbat1 of the first battery module is connected to the VIN- terminal of the first comparator, and the VIN+ terminal of the first comparator is connected to the output voltage terminal VCC_POWER.

[0019] The output terminal Vbat1 of the first battery module is connected to the VIN- terminal of the third comparator, and the VIN+ terminal of the third comparator is connected to the third terminal of the first combined output circuit.

[0020] The output terminal Vbat2 of the second battery module is connected to the VIN- terminal of the second comparator, and the VIN+ terminal of the second comparator is connected to the output voltage terminal VCC_POWER.

[0021] The output terminal Vbat2 of the second battery module is connected to the VIN- terminal of the fourth comparator, and the VIN+ terminal of the fourth comparator is connected to the third terminal of the second combined output circuit.

[0022] In the above technical solution, the first comparator circuit compares the voltage Vbat1 of the first battery module with the output voltage Vout of the output voltage terminal VCC_POWER, and compares the voltage Vbat1 of the first battery module with the voltage Vgate1 of the third terminal of the first combined output circuit. When Vout > Vbat1, the first comparator output terminal OUT_O_1 outputs a high-level signal; when Vout < Vbat1, the first comparator output terminal OUT_O_1 outputs a low-level signal; when Vgate1 > Vbat1, the third comparator outputs a high-level signal; when Vgate1 < Vbat1, the third comparator outputs a low-level signal.

[0023] In the second comparator circuit, the voltage Vbat2 of the second battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat2 of the second battery module is compared with the voltage Vgate2 of the third terminal of the second combined output circuit. When Vout > Vbat2, the output terminal OUT_O_2 of the second comparator outputs a high-level signal; when Vout < Vbat2, the output terminal OUT_O_2 of the second comparator outputs a low-level signal; when Vgate2 > Vbat2, the fourth comparator outputs a high-level signal; when Vgate2 < Vbat2, the fourth comparator outputs a low-level signal.

[0024] In some alternative implementations, the control signal logic circuitry includes AND gate modules and OR gate modules;

[0025] The output of the first comparator is connected to the first terminal of the AND gate module, and the output of the second comparator is connected to the second terminal of the AND gate module.

[0026] The output of the third comparator is connected to the first terminal of the OR gate module, and the output of the fourth comparator is connected to the second terminal of the OR gate module.

[0027] In the above technical solution, when Vout > Vbat1 and Vout > Vbat2, the AND gate module outputs a high level; when Vout < Vbat1 and / or Vout > Vbat2, the AND gate module outputs a low level; when Vgate1 > Vbat1 and / or Vgate2 > Vbat2, the OR gate module outputs a high level; when Vgate1 < Vbat1 and Vgate2 < Vbat2, the OR gate module outputs a low level.

[0028] In some alternative implementations, the first combined output circuit includes a first MOSFET, a third MOSFET, and a first ORing controller;

[0029] The GATE terminal Vgate1 of the first ORing controller is connected to the gate of the first MOSFET and the gate of the third MOSFET. The source of the first MOSFET and the source of the third MOSFET are connected to the output terminal Vbat1 of the first battery module. The drain of the first MOSFET and the drain of the third MOSFET are connected to the output voltage terminal VCC_POWER.

[0030] In the above technical solution, the first ORing controller is connected to two MOSFETs in parallel, which improves the current carrying capacity of the circuit. The first ORing controller provides charge pump gate drive for the external N-channel MOSFETs (the first MOSFET and the third MOSFET) to turn off the first MOSFET and the third MOSFET when the current flows in the reverse direction.

[0031] In some alternative implementations, the second combiner output circuit includes a second MOSFET, a fourth MOSFET, and a second ORing controller;

[0032] The GATE terminal Vgate2 of the second ORing controller is connected to the gate of the second MOSFET and the gate of the fourth MOSFET. The source of the second MOSFET and the source of the fourth MOSFET are connected to the output terminal Vbat2 of the second battery module. The drain of the second MOSFET and the drain of the fourth MOSFET are connected to the output voltage terminal VCC_POWER.

[0033] In the above technical solution, the second ORing controller is connected to two MOSFETs in parallel, which improves the current carrying capacity of the circuit. The second ORing controller provides charge pump gate drive for the external N-channel MOSFETs (the second MOSFET and the fourth MOSFET) to turn off the second MOSFET and the fourth MOSFET when the current flows in the reverse direction.

[0034] In some alternative implementations, the first reverse charging circuit includes: a fifth MOSFET, a sixth MOSFET, an eleventh MOSFET, a twelfth MOSFET, a fifteenth MOSFET, and a sixteenth MOSFET;

[0035] The output terminal Vbat1 of the first battery module is connected to the drain of the fifth MOSFET, the source of the fifth MOSFET is connected to the source of the sixth MOSFET, and the drain of the sixth MOSFET is connected to the output voltage terminal VCC_POWER.

[0036] The gate of the fifth MOSFET is connected to the drain of the eleventh MOSFET, the source of the eleventh MOSFET is grounded, the gate of the eleventh MOSFET is connected to the drain of the fifteenth MOSFET, the source of the fifteenth MOSFET is grounded, the gate of the fifteenth MOSFET is connected to the output of the OR gate module, and the gate of the eleventh MOSFET is also connected to the output of the AND gate module.

[0037] The gate (G) of the sixth MOSFET is connected to the drain (D) of the twelfth MOSFET, the source (S) of the twelfth MOSFET is grounded, the gate (G) of the twelfth MOSFET is connected to the drain (D) of the sixteenth MOSFET, the source (S) of the sixteenth MOSFET is grounded, the gate (G) of the sixteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the twelfth MOSFET is also connected to the output of the AND gate module.

[0038] In the above technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND gate module outputs a low level, turning off the eleventh and twelfth MOSFETs, thereby turning off the fifth and sixth MOSFETs, and shutting down the first reverse charging circuit.

[0039] When Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first and second battery modules is powered normally. When the OR gate module outputs a high level, the fifteenth and sixteenth MOSFETs are turned on, and the eleventh and twelfth MOSFETs are turned off, thereby turning off the fifth and sixth MOSFETs and shutting down the first reverse charging circuit.

[0040] When Vgate1 < Vbat1 and Vgate2 < Vbat2, neither the first nor the second battery module is powered. The OR gate module outputs a low level, turning off the fifteenth and sixteenth MOSFETs. At this time, if Vout > Vbat1 and Vout > Vbat2, the AND gate module outputs a high level, turning on the eleventh and twelfth MOSFETs. The output voltage terminal VCC_POWER charges the first battery module through the first reverse charging circuit.

[0041] In some alternative implementations, the second reverse charging circuit includes: a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET;

[0042] The output terminal Vbat2 of the second battery module is connected to the drain of the seventh MOSFET, the source of the seventh MOSFET is connected to the source of the eighth MOSFET, and the drain of the eighth MOSFET is connected to the output voltage terminal VCC_POWER.

[0043] The gate (G) of the seventh MOSFET is connected to the drain (D) of the ninth MOSFET, the source (S) of the ninth MOSFET is grounded, the gate (G) of the ninth MOSFET is connected to the drain (D) of the thirteenth MOSFET, the source (S) of the thirteenth MOSFET is grounded, the gate (G) of the thirteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the ninth MOSFET is also connected to the output of the AND gate module.

[0044] The gate (G) of the eighth MOSFET is connected to the drain (D) of the tenth MOSFET, the source (S) of the tenth MOSFET is grounded, the gate (G) of the tenth MOSFET is connected to the drain (D) of the fourteenth MOSFET, the source (S) of the fourteenth MOSFET is grounded, the gate (G) of the fourteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the tenth MOSFET is also connected to the output of the AND gate module.

[0045] In the above technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND gate module outputs a low level, turning off the ninth and tenth MOSFETs, thereby turning off the seventh and eighth MOSFETs, and shutting down the second reverse charging circuit.

[0046] When Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first and second battery modules is powered normally. When the OR gate module outputs a high level, the thirteenth and fourteenth MOSFETs are turned on, and the ninth and tenth MOSFETs are turned off, thereby turning off the seventh and eighth MOSFETs and shutting down the second reverse charging circuit.

[0047] When Vgate1 < Vbat1 and Vgate2 < Vbat2, neither the first nor the second battery module is powered. The OR gate module outputs a low level, turning off the thirteenth and fourteenth MOSFETs. At this time, if Vout > Vbat1 and Vout > Vbat2, the AND gate module outputs a high level, turning on the ninth and tenth MOSFETs. The output voltage terminal VCC_POWER charges the second battery module through the second reverse charging circuit.

[0048] In some optional implementations, the control signal logic circuitry further includes a ninth comparator and a tenth comparator;

[0049] The VIN+ terminal of the ninth comparator is connected to the output terminal of the second battery module, and the VIN- terminal of the ninth comparator is connected to the output terminal of the first comparator; the VIN+ terminal of the tenth comparator is connected to the output terminal of the first battery module, and the VIN- terminal of the tenth comparator is connected to the output terminal of the second battery module.

[0050] In some alternative implementations, the first reverse charging circuit includes: a fifth MOSFET, a sixth MOSFET, an eleventh MOSFET, a twelfth MOSFET, a fifteenth MOSFET, and a sixteenth MOSFET;

[0051] The output terminal of the first battery module is connected to the drain of the fifth MOSFET, the source of the fifth MOSFET is connected to the source of the sixth MOSFET, and the drain of the sixth MOSFET is connected to the output voltage terminal.

[0052] The gate (G) of the fifth MOSFET is connected to the drain (D) of the eleventh MOSFET, the source (S) of the eleventh MOSFET is grounded, the gate (G) of the eleventh MOSFET is connected to the drain (D) of the fifteenth MOSFET, and the source (S) of the fifteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the fifteenth MOSFET through a diode, and the output of the tenth comparator is connected to the gate (G) of the fifteenth MOSFET through a diode; the output of the AND gate module is connected to the gate (G) of the eleventh MOSFET through a diode, and the output of the ninth comparator is connected to the gate (G) of the eleventh MOSFET through a diode;

[0053] The gate (G) of the sixth MOSFET is connected to the drain (D) of the twelfth MOSFET, the source (S) of the twelfth MOSFET is grounded, the gate (G) of the twelfth MOSFET is connected to the drain (D) of the sixteenth MOSFET, and the source (S) of the sixteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the sixteenth MOSFET through a diode, and the output of the tenth comparator is connected to the gate (G) of the sixteenth MOSFET through a diode; the output of the AND gate module is connected to the gate (G) of the twelfth MOSFET through a diode, and the output of the ninth comparator is connected to the gate (G) of the twelfth MOSFET through a diode.

[0054] In some alternative implementations, the second reverse charging circuit includes: a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET;

[0055] The output terminal of the second battery module is connected to the drain of the seventh MOSFET, the source of the seventh MOSFET is connected to the source of the eighth MOSFET, and the drain of the eighth MOSFET is connected to the output voltage terminal.

[0056] The gate (G) of the seventh MOSFET is connected to the drain (D) of the ninth MOSFET, the source (S) of the ninth MOSFET is grounded, the gate (G) of the ninth MOSFET is connected to the drain (D) of the thirteenth MOSFET, and the source (S) of the thirteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the thirteenth MOSFET through a diode, and the output of the ninth comparator is connected to the gate (G) of the thirteenth MOSFET through a diode; the output of the AND gate module is connected to the gate (G) of the ninth MOSFET through a diode, and the output of the tenth comparator is connected to the gate (G) of the ninth MOSFET through a diode.

[0057] The gate (G) of the eighth MOSFET is connected to the drain (D) of the tenth MOSFET, the source (S) of the tenth MOSFET is grounded, the gate (G) of the tenth MOSFET is connected to the drain (D) of the fourteenth MOSFET, and the source (S) of the fourteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the fourteenth MOSFET through a diode, and the output of the ninth comparator is connected to the gate (G) of the fourteenth MOSFET through a diode; the output of the AND gate module is connected to the gate (G) of the tenth MOSFET through a diode, and the output of the tenth comparator is connected to the gate (G) of the tenth MOSFET through a diode.

[0058] In the above technical solution, the ninth and tenth comparators are configured to turn the first and second reverse charging circuits on or off: if Vout > Vbat1, Vout > Vbat2, and Vbat2 > Vbat1, the first battery module is charged; if Vout > Vbat1, Vout > Vbat2, and Vbat1 > Vbat2, the second battery module is charged. This embodiment ensures that when absorbing reverse electromotive force, the low-voltage battery is charged preferentially.

[0059] This application provides an embodiment of a drone, comprising: at least two battery modules, a flight control system, and a back EMF energy recovery circuit for the drone according to any one of the above.

[0060] This application provides a method for recovering back electromotive force energy from a drone, comprising:

[0061] Using a combiner output circuit, at least two battery voltages are combined to output a first battery voltage to power the load; wherein, the first battery voltage is the highest voltage among the at least two battery voltages;

[0062] When the drone decelerates, it generates a back electromotive force (EMF) voltage. A comparison circuit is used to detect the voltage of each battery. If the voltage of each battery is less than the back EMF voltage, the reverse charging circuit corresponding to at least one battery module is activated, and the back EMF voltage charges the battery module.

[0063] In some optional implementations, activating the reverse charging circuit corresponding to at least one battery module includes:

[0064] Open the reverse charging circuit corresponding to all battery modules;

[0065] Alternatively, turn on the reverse charging circuit corresponding to the battery module with the lowest battery voltage. Attached Figure Description

[0066] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0067] Figure 1 is a circuit connection diagram of back EMF energy recovery for a drone provided in an embodiment of this application;

[0068] Figure 2 is a schematic diagram of the back electromotive force energy recovery circuit including two battery modules provided in an embodiment of this application;

[0069] Figure 3 is a structural diagram of the first combined output circuit provided in an embodiment of this application;

[0070] Figure 4 is a structural diagram of the second combiner output circuit provided in an embodiment of this application;

[0071] Figure 5 is a structural diagram of the first comparison circuit provided in an embodiment of this application;

[0072] Figure 6 is a structural diagram of the second comparison circuit provided in an embodiment of this application;

[0073] Figure 7 is a control signal logic circuit structure diagram provided in an embodiment of this application;

[0074] Figure 8 is a structural diagram of a first reverse charging circuit provided in an embodiment of this application;

[0075] Figure 9 is a structural diagram of a second reverse charging circuit provided in an embodiment of this application;

[0076] Figure 10 is a control signal logic circuit structure diagram provided in another embodiment of this application;

[0077] Figure 11 is a structural diagram of a first reverse charging circuit provided in another embodiment of this application;

[0078] Figure 12 is a structural diagram of a second reverse charging circuit provided in another embodiment of this application. Detailed Implementation

[0079] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0080] Please refer to Figure 1. Figure 1 is a circuit connection diagram of a UAV back EMF energy recovery circuit provided in an embodiment of this application, including: at least two combined output circuits, at least two comparison circuits, and at least two reverse charging circuits.

[0081] The first terminal of the combiner output circuit is used to connect to the output terminal of a battery module. The first terminal of the combiner output circuit is also connected to the first terminal of the comparator circuit. The second terminal of the combiner output circuit is connected to the third terminal of the comparator circuit. The third terminal of the combiner output circuit is connected to the second terminal of the comparator circuit. The fourth terminal of the comparator circuit is connected to the second terminal of the reverse charging circuit. The second terminal of the combiner output circuit is also connected to the third terminal of the reverse charging circuit. The first terminal of the reverse charging circuit is used to connect to the input terminal of the battery module. The second terminal of the combiner output circuit is also used to connect to the flight control system.

[0082] Among them, at least two combined output circuits are used to combine at least two battery voltages and output a first battery voltage to power the load; wherein the first battery voltage is the highest voltage among the at least two battery voltages.

[0083] At least two comparator circuits are used to detect whether the voltage of each battery is less than the back EMF voltage when the flight control system generates a back EMF voltage.

[0084] At least two reverse charging circuits are provided to activate the reverse charging circuit corresponding to at least one battery module when the voltage of each battery is less than the back electromotive force voltage, so that the back electromotive force voltage charges the battery module.

[0085] In the above technical solution, multiple battery voltages are combined using a combined output circuit to supply power to the load. When back electromotive force (EMF) is generated due to drone deceleration, a comparison circuit detects the voltages of multiple batteries. If the back EMF voltage is greater than the voltage of each battery, at least one reverse charging circuit is activated to charge the battery. This embodiment prevents mutual charging between batteries when multiple batteries are supplying power to the drone, absorbs the back EMF energy generated during motor deceleration through the batteries, and supports hot-swapping of batteries in standby mode to ensure uninterrupted power supply to the drone. This reduces the time required for drone power-on / off and initialization due to battery replacement, thereby improving the drone's operational efficiency.

[0086] It should be clarified that each battery module is equipped with a combining output circuit, a comparator circuit, and a reverse charging circuit. There can be multiple battery modules, and correspondingly multiple combining output circuits, comparator circuits, and reverse charging circuits. The following embodiment uses a back EMF energy recovery circuit comprising two battery modules as an example for detailed explanation.

[0087] Please refer to Figure 2, which is a structural diagram of a back EMF energy recovery circuit including two battery modules provided in an embodiment of this application. The back EMF energy recovery circuit includes: a first battery module, a second battery module, a first combined output circuit, a second combined output circuit, a first comparison circuit, a second comparison circuit, a first reverse charging circuit, and a second reverse charging circuit.

[0088] In some optional implementations, a control signal logic circuit is also included; the output terminal of the first comparison circuit is connected to the first terminal of the control signal logic circuit, the output terminal of the second comparison circuit is connected to the second terminal of the control signal logic circuit, the third terminal of the control signal logic circuit is connected to the second terminal of the first reverse charging circuit, and the third terminal of the control signal logic circuit is also connected to the second terminal of the second reverse charging circuit.

[0089] In the above technical solution, the control signal logic circuit outputs a corresponding control signal based on the comparison result of the first comparison circuit and the second comparison circuit, thereby controlling the opening or closing of the first reverse charging circuit and the second reverse charging circuit.

[0090] Please refer to Figures 5 and 6. Figure 5 is a first comparison circuit structure diagram provided in an embodiment of this application, and Figure 6 is a second comparison circuit structure diagram provided in an embodiment of this application.

[0091] In some optional implementations, the first comparison circuit includes a first comparator U1 and a third comparator U3; the second comparison circuit includes a second comparator U2 and a fourth comparator U4; the output terminal Vbat1 of the first battery module is connected to the VIN- terminal of the first comparator U1, and the VIN+ terminal of the first comparator U1 is connected to the output voltage terminal VCC_POWER; the output terminal Vbat1 of the first battery module is connected to the VIN- terminal of the third comparator U3, and the VIN+ terminal of the third comparator U3 is connected to the third terminal of the first combined output circuit; the output terminal Vbat2 of the second battery module is connected to the VIN- terminal of the second comparator U2, and the VIN+ terminal of the second comparator U2 is connected to the output voltage terminal VCC_POWER; the output terminal Vbat2 of the second battery module is connected to the VIN- terminal of the fourth comparator U4, and the VIN+ terminal of the fourth comparator U4 is connected to the third terminal of the second combined output circuit.

[0092] In the above technical solution, the first comparison circuit compares the voltage Vbat1 of the first battery module with the output voltage Vout of the output voltage terminal VCC_POWER, and compares the voltage Vbat1 of the first battery module with the voltage Vgate1 of the third terminal of the first combined output circuit. When Vout > Vbat1, the output terminal OUT_O_1 of the first comparator U1 outputs a high-level signal; when Vout < Vbat1, the output terminal OUT_O_1 of the first comparator U1 outputs a low-level signal; when Vgate1 > Vbat1, the third comparator U3 outputs a high-level signal; when Vgate1 < Vbat1, the third comparator U3 outputs a low-level signal.

[0093] In the second comparator circuit, the voltage Vbat2 of the second battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat2 of the second battery module is compared with the voltage Vgate2 of the third terminal of the second combined output circuit. When Vout > Vbat2, the output terminal OUT_O_2 of the second comparator U2 outputs a high-level signal; when Vout < Vbat2, the output terminal OUT_O_2 of the second comparator U2 outputs a low-level signal; when Vgate2 > Vbat2, the fourth comparator U4 outputs a high-level signal; when Vgate2 < Vbat2, the fourth comparator U4 outputs a low-level signal.

[0094] Among them, the first comparator U1, the second comparator U2, the third comparator U3 and the fourth comparator U4 can be rail-to-rail low-delay high-speed comparators SGM8743, which can quickly respond to voltage changes in this circuit application, thereby quickly and effectively turning on the MOSFET in the reverse charging circuit.

[0095] Please refer to Figure 7, which is a control signal logic circuit structure diagram provided in an embodiment of this application.

[0096] In some optional implementations, the control signal logic circuit includes an AND gate module U7 and an OR gate module U8; the output of the first comparator U1 is connected to the first terminal (pin A) of the AND gate module U7, the output of the second comparator U2 is connected to the second terminal (pin B) of the AND gate module U7; the output of the third comparator U3 is connected to the first terminal (pin A) of the OR gate module U8, and the output of the fourth comparator U4 is connected to the second terminal (pin B) of the OR gate module U8.

[0097] In the above technical solution, when Vout > Vbat1 and Vout > Vbat2, the AND gate module U7 outputs a high level; when Vout < Vbat1 and / or Vout > Vbat2, the AND gate module U7 outputs a low level; when Vgate1 > Vbat1 and / or Vgate2 > Vbat2, the OR gate module U8 outputs a high level; when Vgate1 < Vbat1 and Vgate2 < Vbat2, the OR gate module U8 outputs a low level. Please refer to Figure 3, which is a structural diagram of the first combiner output circuit provided in the embodiment of this application.

[0098] In some alternative implementations, the first combined output circuit includes a first MOSFET Q1, a third MOSFET Q3, and a first ORing controller U5;

[0099] The GATE terminal Vgate1 of the first ORing controller U5 is connected to the gate of the first MOSFET Q1 and the gate of the third MOSFET Q3. The source of the first MOSFET Q1 and the source of the third MOSFET Q3 are connected to the output terminal Vbat1 of the first battery module. The drain of the first MOSFET Q1 and the drain of the third MOSFET Q3 are connected to the output voltage terminal VCC_POWER.

[0100] In the above technical solution, the first ORing controller U5 is connected to two external MOSFETs in parallel, which improves the current carrying capacity of the circuit. The first ORing controller U5 provides charge pump gate drive for the external N-channel MOSFETs (first MOSFET Q1 and third MOSFET Q3) to turn off the first MOSFET Q1 and the third MOSFET Q3 when the current flows in the reverse direction.

[0101] Among them, the ORing (multiple-choice) controller can intelligently select the conduction path among multiple input sources while avoiding the generation of reverse current. This feature makes the ORing circuit have broad application prospects in power management and signal transmission.

[0102] Please refer to Figure 4, which is a structural diagram of the second combined output circuit provided in the embodiment of this application.

[0103] In some alternative implementations, the second combiner output circuit includes a second MOSFET Q2, a fourth MOSFET Q4, and a second ORing controller U6;

[0104] The GATE terminal Vgate2 of the second ORing controller U6 is connected to the gate of the second MOSFET Q2 and the gate of the fourth MOSFET Q4. The source of the second MOSFET Q2 and the source of the fourth MOSFET Q4 are connected to the output terminal Vbat2 of the second battery module. The drain of the second MOSFET Q2 and the drain of the fourth MOSFET Q4 are connected to the output voltage terminal VCC_POWER.

[0105] In the above technical solution, the second ORing controller U6 is connected to two external MOSFETs in parallel, which improves the current carrying capacity of the circuit. The second ORing controller U6 provides charge pump gate drive for the external N-channel MOSFETs (second MOSFET Q2 and fourth MOSFET Q4) to turn off the second MOSFET Q2 and the fourth MOSFET Q4 when the current flows in the reverse direction.

[0106] The first ORing controller U5 and the second ORing controller U6 can be high-side ORing FET controllers LM5050MK. When the LM5050MK is connected in series with the power supply, it serves as an ideal diode rectifier. This ORing controller allows MOSFETs to replace diode rectifiers in the power distribution network, thereby reducing power loss and voltage drop. This device can be connected to a 5V to 75V power supply and can withstand transient voltages up to 100V. The back EMF energy recovery circuit in this embodiment supports hot-swapping of the battery, meaning the first and second battery modules are completely separate. Removing one battery allows the other battery to continue operating normally. This allows the fully charged batteries to be replaced sequentially at the end of a drone flight, enabling uninterrupted drone operation and improving operational efficiency.

[0107] It should be clarified that the first and second combined output logic circuits in this embodiment are two MOS transistors connected in parallel to the ORing controller. In some embodiments, the ORing controller may also be connected to a single MOS transistor or a transistor.

[0108] Please refer to Figure 8, which is a structural diagram of a first reverse charging circuit provided in an embodiment of this application.

[0109] In some alternative implementations, the first reverse charging circuit includes: a fifth MOSFET Q5, a sixth MOSFET Q6, an eleventh MOSFET Q11, a twelfth MOSFET Q12, a fifteenth MOSFET Q15, and a sixteenth MOSFET Q16;

[0110] The output terminal Vbat1 of the first battery module is connected to the drain of the fifth MOSFET Q5, the source of the fifth MOSFET Q5 is connected to the source of the sixth MOSFET Q6, and the drain of the sixth MOSFET Q6 is connected to the output voltage terminal VCC_POWER.

[0111] The gate of the fifth MOSFET Q5 is connected to the drain of the eleventh MOSFET Q11, the source of the eleventh MOSFET Q11 is grounded, the gate of the eleventh MOSFET Q11 is connected to the drain of the fifteenth MOSFET Q15, the source of the fifteenth MOSFET Q15 is grounded, the gate of the fifteenth MOSFET Q15 is connected to the output terminal OUT2 of the OR gate module U8, and the gate of the eleventh MOSFET Q11 is also connected to the output terminal OUT1 of the AND gate module U7.

[0112] The gate (G) of the sixth MOSFET Q6 is connected to the drain (D) of the twelfth MOSFET Q12, the source (S) of the twelfth MOSFET Q12 is grounded, the gate (G) of the twelfth MOSFET Q12 is connected to the drain (D) of the sixteenth MOSFET Q16, the source (S) of the sixteenth MOSFET Q16 is grounded, the gate (G) of the sixteenth MOSFET Q16 is connected to the output terminal OUT2 of the OR gate module U8, and the gate (G) of the twelfth MOSFET Q12 is also connected to the output terminal OUT1 of the AND gate module U7.

[0113] In the above technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND gate module U7 outputs a low level, turning off the eleventh MOSFET Q11 and the twelfth MOSFET Q12, thereby turning off the fifth MOSFET Q5 and the sixth MOSFET Q6, and shutting down the first reverse charging circuit.

[0114] When Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first and second battery modules is powered normally. When the OR gate module U8 outputs a high level, the fifteenth MOSFET Q15 and the sixteenth MOSFET Q16 are turned on, and the eleventh MOSFET Q11 and the twelfth MOSFET Q12 are turned off. As a result, the fifth MOSFET Q5 and the sixth MOSFET Q6 are turned off, and the first reverse charging circuit is turned off.

[0115] When Vgate1 < Vbat1 and Vgate2 < Vbat2, neither the first nor the second battery module is powered. The OR gate module U8 outputs a low level, turning off the fifteenth MOSFET Q15 and the sixteenth MOSFET Q16. At this time, if Vout > Vbat1 and Vout > Vbat2, the AND gate module U7 outputs a high level, turning on the eleventh MOSFET Q11 and the twelfth MOSFET Q12. The output voltage terminal VCC_POWER charges the first battery module through the first reverse charging circuit.

[0116] Please refer to Figure 9, which is a structural diagram of a second reverse charging circuit provided in an embodiment of this application.

[0117] In some alternative implementations, the second reverse charging circuit includes: a seventh MOSFET Q7, an eighth MOSFET Q8, a ninth MOSFET Q9, a tenth MOSFET Q10, a thirteenth MOSFET Q13, and a fourteenth MOSFET Q14;

[0118] The output terminal Vbat2 of the second battery module is connected to the drain of the seventh MOSFET Q7, the source of the seventh MOSFET Q7 is connected to the source of the eighth MOSFET Q8, and the drain of the eighth MOSFET Q8 is connected to the output voltage terminal VCC_POWER.

[0119] The gate of the seventh MOSFET Q7 is connected to the drain of the ninth MOSFET Q9, the source of the ninth MOSFET Q9 is grounded, the gate of the ninth MOSFET Q9 is connected to the drain of the thirteenth MOSFET Q13, the source of the thirteenth MOSFET Q13 is grounded, the gate of the thirteenth MOSFET Q13 is connected to the output terminal OUT2 of the OR gate module U8, and the gate of the ninth MOSFET Q9 is also connected to the output terminal OUT1 of the AND gate module U7.

[0120] The gate (G) of the eighth MOSFET Q8 is connected to the drain (D) of the tenth MOSFET Q10, the source (S) of the tenth MOSFET Q10 is grounded, the gate (G) of the tenth MOSFET Q10 is connected to the drain (D) of the fourteenth MOSFET Q14, the source (S) of the fourteenth MOSFET Q14 is grounded, the gate (G) of the fourteenth MOSFET Q14 is connected to the output terminal OUT2 of the OR gate module U8, and the gate (G) of the tenth MOSFET Q10 is also connected to the output terminal OUT1 of the AND gate module U7.

[0121] In the above technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND gate module U7 outputs a low level, turning off the ninth MOSFET Q9 and the tenth MOSFET Q10, thereby turning off the seventh MOSFET Q7 and the eighth MOSFET Q8, and shutting down the second reverse charging circuit.

[0122] When Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first and second battery modules is powered normally. When the OR gate module U8 outputs a high level, the thirteenth MOSFET Q13 and the fourteenth MOSFET Q14 are turned on, and the ninth MOSFET Q9 and the tenth MOSFET Q10 are turned off. As a result, the seventh MOSFET Q7 and the eighth MOSFET Q8 are turned off, and the second reverse charging circuit is turned off.

[0123] When Vgate1 < Vbat1 and Vgate2 < Vbat2, neither the first nor the second battery module is powered. The OR gate module U8 outputs a low level, turning off the thirteenth MOSFET Q13 and the fourteenth MOSFET Q14. At this time, if Vout > Vbat1 and Vout > Vbat2, the AND gate module U7 outputs a high level, turning on the ninth MOSFET Q9 and the tenth MOSFET Q10. The output voltage terminal VCC_POWER charges the second battery module through the second reverse charging circuit.

[0124] Among them, the fifth MOSFET Q5 and the sixth MOSFET Q6 are P-channel MOSFETs, while the ninth MOSFET Q9, the tenth MOSFET Q10, the eleventh MOSFET Q11, the twelfth MOSFET Q12, the thirteenth MOSFET Q13, the fourteenth MOSFET Q14, the fifteenth MOSFET Q15 and the sixteenth MOSFET Q16 are N-channel MOSFETs.

[0125] It should be noted that in this embodiment, both the first and second reverse charging circuits use symmetrical P-channel MOSFETs and two N-channel MOSFETs. In some other embodiments, MOSFETs and two N-channel MOSFETs can also be used, or transistors can be used.

[0126] In this embodiment, if Vout > Vbat1 and Vout > Vbat2, the first reverse charging circuit and the second reverse charging circuit are turned on to charge both the first battery module and the second battery module.

[0127] Please refer to Figures 10, 11, and 12. Figure 10 is a control signal logic circuit structure diagram provided in another embodiment of this application; Figure 11 is a first reverse charging circuit structure diagram provided in another embodiment of this application; and Figure 12 is a second reverse charging circuit structure diagram provided in another embodiment of this application.

[0128] The difference between this embodiment and the above embodiments is that:

[0129] The control signal logic circuit of this embodiment also includes: a ninth comparator U9 and a tenth comparator U10;

[0130] Among them, the VIN+ terminal of the ninth comparator U9 is connected to the output terminal Vbat2 of the second battery module, and the VIN- terminal of the ninth comparator U9 is connected to the output terminal of the first comparator U1; the VIN+ terminal of the tenth comparator U10 is connected to the output terminal Vbat1 of the first battery module, and the VIN- terminal of the tenth comparator U10 is connected to the output terminal Vbat2 of the second battery module.

[0131] The first reverse charging circuit in this embodiment includes: a fifth MOSFET Q5, a sixth MOSFET Q6, an eleventh MOSFET Q11, a twelfth MOSFET Q12, a fifteenth MOSFET Q15, and a sixteenth MOSFET Q16;

[0132] The output terminal Vbat1 of the first battery module is connected to the drain (D) of the fifth MOSFET Q5. The source (S) of the fifth MOSFET Q5 is connected to the source (S) of the sixth MOSFET Q6. The drain (D) of the sixth MOSFET Q6 is connected to the output voltage terminal VCC_POWER. The gate (G) of the fifth MOSFET Q5 is connected to the drain (D) of the eleventh MOSFET Q11. The source (S) of the eleventh MOSFET Q11 is grounded. The gate (G) of the eleventh MOSFET Q11 is connected to the drain (D) of the fifteenth MOSFET Q15. The source (S) of the fifteenth MOSFET Q15 is grounded. The output terminal OUT2 of the OR gate module is connected to the gate (G) of the fifteenth MOSFET Q15 through diode D8. The output terminal OUT_BB2 of the tenth comparator U10 is connected to the gate (G) of the fifteenth MOSFET Q15 through diode D8. The output terminal OUT1 of the AND gate module is connected to the gate (G) of the eleventh MOSFET Q11 through diode D4. The output terminal OUT_BB1 of the ninth comparator U9 is connected to the gate (G) of the eleventh MOSFET Q11 via diode D4; the gate (G) of the sixth MOSFET Q6 is connected to the drain (D) of the twelfth MOSFET Q12, the source (S) of the twelfth MOSFET Q12 is grounded, the gate (G) of the twelfth MOSFET Q12 is connected to the drain (D) of the sixteenth MOSFET Q16, and the source (S) of the sixteenth MOSFET Q16 is grounded; the output terminal OUT2 of the OR gate module is connected to the gate (G) of the sixteenth MOSFET Q16 via diode D9, and the output terminal OUT_BB2 of the tenth comparator U10 is connected to the gate (G) of the sixteenth MOSFET via diode D9; the output terminal OUT1 of the AND gate module is connected to the gate (G) of the twelfth MOSFET via diode D5, and the output terminal OUT_BB1 of the ninth comparator U9 is connected to the gate (G) of the twelfth MOSFET Q12 via diode D5.

[0133] The second reverse charging circuit in this embodiment includes: a seventh MOSFET Q7, an eighth MOSFET Q8, a ninth MOSFET Q9, a tenth MOSFET Q10, a thirteenth MOSFET Q13, and a fourteenth MOSFET Q14;

[0134] The output terminal Vbat2 of the second battery module is connected to the drain (D) of the seventh MOSFET Q7. The source (S) of the seventh MOSFET Q7 is connected to the source (S) of the eighth MOSFET Q8. The drain (D) of the eighth MOSFET Q8 is connected to the output voltage terminal VCC_POWER. The gate (G) of the seventh MOSFET Q7 is connected to the drain (D) of the ninth MOSFET Q9. The source (S) of the ninth MOSFET Q9 is grounded. The gate (G) of the ninth MOSFET Q9 is connected to the drain (D) of the thirteenth MOSFET Q13. The source (S) of the thirteenth MOSFET Q13 is grounded. The output terminal OUT2 of the OR gate module is connected to the gate (G) of the thirteenth MOSFET through diode D10. The output terminal OUT_BB1 of the ninth comparator U9 is connected to the gate (G) of the thirteenth MOSFET Q13 through diode D10. The output terminal OUT1 of the AND gate module is connected to the gate (G) of the ninth MOSFET Q9 through diode D6. The tenth comparator... The output terminal OUT_BB2 of comparator U10 is connected to the gate (G) of the ninth MOSFET Q9 via diode D6; the gate (G) of the eighth MOSFET Q8 is connected to the drain (D) of the tenth MOSFET Q10, the source (S) of the tenth MOSFET Q10 is grounded, the gate (G) of the tenth MOSFET Q10 is connected to the drain (D) of the fourteenth MOSFET Q14, and the source (S) of the fourteenth MOSFET Q14 is grounded; the output terminal OUT2 of the OR gate module is connected to the gate (G) of the fourteenth MOSFET Q14 via diode D11, and the output terminal OUT_BB1 of the ninth comparator U9 is connected to the gate (G) of the fourteenth MOSFET Q14 via diode D11; the output terminal OUT1 of the AND gate module is connected to the gate (G) of the tenth MOSFET Q10 via diode D7, and the output terminal OUT_BB2 of the tenth comparator U10 is connected to the gate (G) of the tenth MOSFET Q10 via diode D7.

[0135] In this embodiment, the ninth comparator U9 and the tenth comparator U10 are configured to turn the first reverse charging circuit and the second reverse charging circuit on or off: if Vout > Vbat1, Vout > Vbat2, and Vbat2 > Vbat1, then the first battery module is charged; if Vout > Vbat1, Vout > Vbat2, and Vbat1 > Vbat2, then the second battery module is charged. This embodiment ensures that when absorbing reverse electromotive force, the lower voltage battery is charged first.

[0136] The present application provides an unmanned aerial vehicle (UAV) comprising: at least two battery modules, a flight control system, and a back EMF energy recovery circuit for the UAV according to any one of the above.

[0137] This application provides a method for recovering back electromotive force energy from a drone, comprising:

[0138] By using a combiner output circuit, multiple battery voltages are combined and the first battery voltage is output to power the load; wherein, the first battery voltage is the highest voltage among the multiple battery voltages;

[0139] When the drone decelerates, it generates a back electromotive force (EMF) voltage. A comparison circuit is used to detect the voltage of each battery. If the voltage of each battery is less than the back EMF voltage, the reverse charging circuit corresponding to at least one battery module is activated, and the back EMF voltage charges the battery module.

[0140] In some optional implementations, activating the reverse charging circuit corresponding to at least one battery module includes:

[0141] Open the reverse charging circuit corresponding to all battery modules;

[0142] Alternatively, turn on the reverse charging circuit corresponding to the battery module with the lowest battery voltage.

[0143] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0144] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0145] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0146] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0147] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A back electromotive force (back EMF) electric energy recovery circuit for a drone, the circuit comprising: include: At least two combined output circuits, at least two comparator circuits, and at least two reverse charging circuits; The first terminal of the combining output circuit is connected to the output terminal of a battery module. The first terminal of the combining output circuit is also connected to the first terminal of the comparator circuit. The second terminal of the combining output circuit is connected to the third terminal of the comparator circuit. The third terminal of the combining output circuit is connected to the second terminal of the comparator circuit. The fourth terminal of the comparator circuit is connected to the second terminal of the reverse charging circuit. The second terminal of the combining output circuit is also connected to the third terminal of the reverse charging circuit. The first terminal of the reverse charging circuit is connected to the input terminal of the battery module. The second terminal of the combining output circuit is also connected to the flight control system. The at least two combined output circuits are used to combine at least two battery voltages and output a first battery voltage to power the load; wherein, the first battery voltage is the highest voltage among the at least two battery voltages; The at least two comparison circuits are used to detect whether the voltage of each battery is less than the back electromotive force voltage when the flight control system generates a back electromotive force voltage. The at least two reverse charging circuits are used to open at least one of the reverse charging circuits corresponding to the battery module when the voltage of each battery is less than the back electromotive force voltage, so that the back electromotive force voltage charges the battery module.

2. The circuit of claim 1, wherein, It also includes control signal logic circuits; The output of the first comparator circuit is connected to the first terminal of the control signal logic circuit, the output of the second comparator circuit is connected to the second terminal of the control signal logic circuit, the third terminal of the control signal logic circuit is connected to the second terminal of the first reverse charging circuit, and the third terminal of the control signal logic circuit is also connected to the second terminal of the second reverse charging circuit.

3. The circuit of claim 2, wherein, The first comparison circuit includes a first comparator and a third comparator; the second comparison circuit includes a second comparator and a fourth comparator. The output terminal of the first battery module is connected to the VIN- terminal of the first comparator, and the VIN+ terminal of the first comparator is connected to the output voltage terminal. The output terminal of the first battery module is connected to the VIN- terminal of the third comparator, and the VIN+ terminal of the third comparator is connected to the third terminal of the first combined output circuit. The output terminal of the second battery module is connected to the VIN- terminal of the second comparator, and the VIN+ terminal of the second comparator is connected to the output voltage terminal. The output terminal of the second battery module is connected to the VIN- terminal of the fourth comparator, and the VIN+ terminal of the fourth comparator is connected to the third terminal of the second combined output circuit.

4. The circuit of claim 3, wherein, The control signal logic circuit includes an AND gate module and an OR gate module; The output of the first comparator is connected to the first terminal of the AND gate module, and the output of the second comparator is connected to the second terminal of the AND gate module; The output of the third comparator is connected to the first terminal of the OR gate module, and the output of the fourth comparator is connected to the second terminal of the OR gate module.

5. The circuit of claim 4, wherein, The first output circuit includes a first MOSFET, a third MOSFET, and a first ORing controller; The GATE terminal of the first ORing controller is connected to the gate (G) of the first MOSFET and the gate (G) of the third MOSFET. The source (S) terminals of the first MOSFET and the third MOSFET are connected to the output terminal of the first battery module. The drain (D) terminals of the first MOSFET and the third MOSFET are connected to the output voltage terminal.

6. The circuit of claim 4, wherein, The second output circuit includes a second MOSFET, a fourth MOSFET, and a second ORing controller; The GATE terminal of the second ORing controller is connected to the gate (G) of the second MOSFET and the gate (G) of the fourth MOSFET. The source (S) terminals of the second MOSFET and the fourth MOSFET are connected to the output terminal of the second battery module. The drain (D) terminals of the second MOSFET and the fourth MOSFET are connected to the output voltage terminal.

7. The circuit as described in claim 4, characterized in that, The first reverse charging circuit includes: a fifth MOSFET, a sixth MOSFET, an eleventh MOSFET, a twelfth MOSFET, a fifteenth MOSFET, and a sixteenth MOSFET; The output terminal of the first battery module is connected to the drain (D) of the fifth MOSFET, the source (S) of the fifth MOSFET is connected to the source (S) of the sixth MOSFET, and the drain (D) of the sixth MOSFET is connected to the output voltage terminal. The gate (G) of the fifth MOSFET is connected to the drain (D) of the eleventh MOSFET, the source (S) of the eleventh MOSFET is grounded, the gate (G) of the eleventh MOSFET is connected to the drain (D) of the fifteenth MOSFET, the source (S) of the fifteenth MOSFET is grounded, the gate (G) of the fifteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the eleventh MOSFET is also connected to the output of the AND gate module. The gate (G) of the sixth MOSFET is connected to the drain (D) of the twelfth MOSFET, the source (S) of the twelfth MOSFET is grounded, the gate (G) of the twelfth MOSFET is connected to the drain (D) of the sixteenth MOSFET, the source (S) of the sixteenth MOSFET is grounded, the gate (G) of the sixteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the twelfth MOSFET is also connected to the output of the AND gate module.

8. The circuit as described in claim 4, characterized in that, The second reverse charging circuit includes: a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET; The output terminal of the second battery module is connected to the drain (D) of the seventh MOSFET, the source (S) of the seventh MOSFET is connected to the source (S) of the eighth MOSFET, and the drain (D) of the eighth MOSFET is connected to the output voltage terminal. The gate (G) of the seventh MOS transistor is connected to the drain (D) of the ninth MOS transistor, the source (S) of the ninth MOS transistor is grounded, the gate (G) of the ninth MOS transistor is connected to the drain (D) of the thirteenth MOS transistor, the source (S) of the thirteenth MOS transistor is grounded, the gate (G) of the thirteenth MOS transistor is connected to the output of the OR gate module, and the gate (G) of the ninth MOS transistor is also connected to the output of the AND gate module. The gate (G) of the eighth MOS transistor is connected to the drain (D) of the tenth MOS transistor, the source (S) of the tenth MOS transistor is grounded, the gate (G) of the tenth MOS transistor is connected to the drain (D) of the fourteenth MOS transistor, the source (S) of the fourteenth MOS transistor is grounded, the gate (G) of the fourteenth MOS transistor is connected to the output of the OR gate module, and the gate (G) of the tenth MOS transistor is also connected to the output of the AND gate module.

9. The circuit as described in claim 4, characterized in that, The control signal logic circuit further includes: a ninth comparator and a tenth comparator; The VIN+ terminal of the ninth comparator is connected to the output terminal of the second battery module, and the VIN- terminal of the ninth comparator is connected to the output terminal of the first comparator; the VIN+ terminal of the tenth comparator is connected to the output terminal of the first battery module, and the VIN- terminal of the tenth comparator is connected to the output terminal of the second battery module.

10. The circuit as described in claim 9, characterized in that, The first reverse charging circuit includes: a fifth MOSFET, a sixth MOSFET, an eleventh MOSFET, a twelfth MOSFET, a fifteenth MOSFET, and a sixteenth MOSFET; The output terminal of the first battery module is connected to the drain (D) of the fifth MOSFET, the source (S) of the fifth MOSFET is connected to the source (S) of the sixth MOSFET, and the drain (D) of the sixth MOSFET is connected to the output voltage terminal. The gate (G) of the fifth MOSFET is connected to the drain (D) of the eleventh MOSFET, the source (S) of the eleventh MOSFET is grounded, the gate (G) of the eleventh MOSFET is connected to the drain (D) of the fifteenth MOSFET, and the source (S) of the fifteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the fifteenth MOSFET via a diode; the output of the tenth comparator is connected to the gate (G) of the fifteenth MOSFET via a diode; the output of the AND gate module is connected to the gate (G) of the eleventh MOSFET via a diode; and the output of the ninth comparator is connected to the gate (G) of the eleventh MOSFET via a diode. The gate (G) of the sixth MOSFET is connected to the drain (D) of the twelfth MOSFET, the source (S) of the twelfth MOSFET is grounded, the gate (G) of the twelfth MOSFET is connected to the drain (D) of the sixteenth MOSFET, and the source (S) of the sixteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the sixteenth MOSFET via a diode, the output of the tenth comparator is connected to the gate (G) of the sixteenth MOSFET via a diode, the output of the AND gate module is connected to the gate (G) of the twelfth MOSFET via a diode, and the output of the ninth comparator is connected to the gate (G) of the twelfth MOSFET via a diode.

11. The circuit of claim 9, wherein, The second reverse charging circuit includes: a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET; The output terminal of the second battery module is connected to the drain (D) of the seventh MOSFET, the source (S) of the seventh MOSFET is connected to the source (S) of the eighth MOSFET, and the drain (D) of the eighth MOSFET is connected to the output voltage terminal. The gate (G) of the seventh MOSFET is connected to the drain (D) of the ninth MOSFET, the source (S) of the ninth MOSFET is grounded, the gate (G) of the ninth MOSFET is connected to the drain (D) of the thirteenth MOSFET, and the source (S) of the thirteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the thirteenth MOSFET via a diode, the output of the ninth comparator is connected to the gate (G) of the thirteenth MOSFET via a diode, the output of the AND gate module is connected to the gate (G) of the ninth MOSFET via a diode, and the output of the tenth comparator is connected to the gate (G) of the ninth MOSFET via a diode. The gate (G) of the eighth MOSFET is connected to the drain (D) of the tenth MOSFET, the source (S) of the tenth MOSFET is grounded, the gate (G) of the tenth MOSFET is connected to the drain (D) of the fourteenth MOSFET, and the source (S) of the fourteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the fourteenth MOSFET via a diode, the output of the ninth comparator is connected to the gate (G) of the fourteenth MOSFET via a diode; the output of the AND gate module is connected to the gate (G) of the tenth MOSFET via a diode, and the output of the tenth comparator is connected to the gate (G) of the tenth MOSFET via a diode.

12. A drone, characterized in that, include: At least two battery modules, a flight control system, and a back EMF energy recovery circuit for a drone as described in any one of claims 1-11.

13. A method for back electromotive force energy recovery of a drone, comprising: include: Using a combiner output circuit, at least two battery voltages are combined to output a first battery voltage to power the load; wherein, the first battery voltage is the highest voltage among the at least two battery voltages; When the drone decelerates, it generates a back electromotive force (EMF) voltage. A comparison circuit is used to detect the voltage of each battery. If the voltage of each battery is less than the back EMF voltage, the reverse charging circuit corresponding to at least one battery module is activated, and the back EMF voltage charges the battery module.

14. The method of claim 13, wherein, The step of opening the reverse charging circuit corresponding to at least one battery module includes: Turn on the reverse charging circuits for all battery modules; Alternatively, activate the reverse charging circuit corresponding to the battery module with the lowest battery voltage.

Images