Selective etching of dielectric materials on carbon-based low dimensional materials

Abstract

The present disclosure relates to a method for use during the fabrication of a device. The method comprises providing a substrate carrying a carbon-based low dimensional material and a dielectric material. The method comprises selectively dry etching the dielectric material while maintaining the underlying carbon-based material unetched. Etching comprises placing the substrate in a vacuum chamber, and introducing a chlorine-based gas in the vacuum chamber. Etching the dielectric material also comprises generating a plasma in the vacuum chamber by applying a radiofrequency power source to the substrate holder, the radiofrequency power source being operated at a power wherein the underlying carbon-based material is unetched.

Description

IDEADED S.L. DECEMBER 23, 2025 P009WO P5579PC00SELECTIVE ETCHING OF DIELECTRIC MATERIALS ON CARBON-BASED LOW DIMENSIONAL MATERIALS

[0001] The present application claims the benefit of European patent application n° EP24383461.1 filed on December 24, 2024. The present disclosure relates to the manufacture of devices comprising carbon-based low dimensional materials. In particular, the present disclosure relates to etching methods used during the manufacture of such devices. Specifically, the present disclosure relates to dry etching methods for the removal of dielectric materials deposited on carbon-based low dimensional materials.BACKGROUND

[0002] Low dimensional materials exhibit physical properties that lie somewhere between those of individual atoms and those of bulk, i.e., macroscopic materials. The low dimensionality results in new optical, electrical, mechanical, or thermal properties. Furthermore, unique electronic properties are observed, which are especially adequate for the design and manufacture of semiconducting devices, e.g., transistors.

[0003] Indeed, carbon-based low dimensional materials exhibit specific properties that make them suitable for a wide range of applications. For instance, carbon-based 1 D materials like carbon nanotubes (CNTs) are used in electronics and optoelectronics for the fabrication of field effect transistors or solar cells. Carbon nanotubes are also employed for the fabrication of electrodes in energy storage solutions involving supercapacitors and batteries. As still another application, carbon nanotubes can be used as sensors, e.g., chemical sensors or pressure sensors.

[0004] Regarding carbon-based 2D materials, graphene is also used in electronics and optoelectronics for the fabrications of e.g., flexible displays, transistors, or photodetectors. Graphene is further used in the energy storage and conversion sector, in which it can be used for the fabrication of supercapacitors, batteries or fuel cells. Moreover, the use of graphene has also been proposed for quantum computing applications, in which graphene can be used to define qubits in quantum computers due to its unique electronic properties.

[0005] During the fabrication of devices comprising low dimensional materials, a substrate, e.g., a silicon wafer, may be typically provided. Different materials may be deposited or grown on such substrate in order to build a functional device. Among those materials, dielectrics, e.g., dielectric oxide layers, may be deposited on another material. Specifically, in some devices, a dielectric oxide layer may be arranged on a carbon-based low dimensional material, e.g., on top of one or more carbon nanotubes or on top of a graphene layer.

[0006] Furthermore, the manufacture of some of these devices often requires etching processes to selectively remove previously deposited materials. In particular, the semiconductor industry employs advanced techniques for material etching, which are indispensable because they provide the precision, scalability, and complexity required to produce high performance and miniaturized devices.

[0007] Etching processes are used either for surface preparation, i.e., to remove unwanted residues or layers to prepare a surface for subsequent processing, or for pattern transfer, i.e., for transferring patterns from a photolithographically defined mask onto an underlying material. Such patterning is needed for defining circuit elements or parts of different devices, such as transistors. Precise etching can also be used to achieve miniaturization. Indeed, etching allows the creation of small and complex features, thus enabling the continuous miniaturization of semiconducting devices. Advanced etching techniques are used to allow the fabrication of novel device architectures like FinFETs, gate-all-around transistors, or MEMS devices.

[0008] Therefore, selective etching of dielectric oxide layers is needed. As an example, the manufacture of certain semiconductor devices, such as field effect transistors, requires the precise removal of a dielectric oxide layer at specific locations on an area of the substrate to create the required intricate patterns and structures. Extremely high precision and selectivity is required for certain applications.

[0009] However, etching of dielectric oxide layers with minimal impact of underlying materials has been found to be particularly challenging when dealing with devices involving the use of low dimensional materials, e.g., carbon nanotubes or graphene. Hence, some damage of the low dimensional material during the selective etching of the dielectric oxide layers is commonly found. As an example, in the field of carbon nanotube transistor fabrication, it is common to encounter difficulties with selectively etching gate dielectrics, such as hafnium oxides, HfC>2, without damaging the carbon nanotubes acting as the transistor channel. Such damage results in defective semiconductor devices or in semiconductor devices with limited performance.

[0010] Conventional etching techniques comprise the use of wet etching with hydrofluoric acid (HF). HF can be used to selectively remove dielectric oxides such as SiC>2 or HfC>2, which are commonly used in the semiconductor industry. However, wet etching with HF exhibits significant drawbacks or limitations. HF is highly toxic and corrosive, which poses significant risk to operators. Accordingly, specialized handling equipment and strict safety protocols are required. Besides, HF is not only hazardous to operators but also to the environment. Consequently, disposal of HF waste is a significant concern.

[0011] Furthermore, wet etching with HF exhibits some performance limitations. Wet etching lacks precision in controlling the etched profile, which can result in undesirable undercutting issues, i.e. , lateral etching of material underneath the mask. As a result, obtaining sharp and well-defined structures is challenging. Moreover, the wet etching process is in itself difficult to control, especially when dealing with very thin layers or complex structures. The etch rate can vary depending on different factors such as temperature, concentration, and the geometry of the etched regions. Still a further challenge is specifically associated with the use of wet etching in devices comprising low dimensional materials. The wet chemical process can inadvertently damage the delicate low dimensional materials, e.g., carbon nanotubes or graphene sheets. Consequently, the resulting device has a lower performance or yield due to a reduced accuracy in feature dimensions or the inability to scale down to smaller nodes for transistors.

[0012] In order to at least partially overcome some of the above-mentioned drawbacks, alternative wet etching processes have been proposed for microfabrication applications. These include the use of buffered oxide etch (BOE), also known as buffered HF or BHF, which uses a buffering agent, e.g., ammonium fluoride, mixed with HF to provide a more controlled etching process for dielectrics like SiO2 or HfO2. However, although BOE is less aggressive than pure HF, similar drawbacks regarding safety or environmental considerations exist. Furthermore, process control when using buffered oxide etch remains somewhat difficult. Consequently, the accuracy of the etching processes is limited, thus leading to poor control over the final structure and, consequently, poor control on the reliability and performance of the manufactured devices.

[0013] As a further alternative for selective and precise etching of materials, dry etching processes have been proposed. Dry etching offers increased control over the etching process when compared with wet etching alternatives. Nevertheless, certain technical and / or practical limitations remain. A first known dry etching technique comprises dry etching with Reactive Ion Etching (RIE) using argon (Ar). RIE with Ar comprises physical etching by Ar-ions. RIE is usedby the semiconductor industry to etch a variety of materials, including dielectrics. RIE combines chemical and physical etching, thus allowing some degree of selectivity and anisotropy in the etching process.

[0014] However, conventional RIE may not be adequate for selective etching of a dielectric material arranged on a low dimensional material, for example a carbon-based low dimensional material such as CNTs. Specifically, conventional RIE such as RIE with Ar ion bombardment results in etching damage and point defects of the low dimensional material. On the one hand, etching damage in low dimensional materials results in localized mechanical breaks in the atomic lattice, leading to physical discontinuities in a layer made of a low dimensional material, i.e. , there is a physical separation between a first portion and a second portion of the layer. Etching damage in low dimensional materials can further result in delamination of the layer made of the low dimensional material. On the other hand, point defects in low dimensional materials results in zero-dimensional point like defects such as sp3-hybridization, vacancy like defect, or hetero-atom doping.

[0015] Although conventional RIE presents a continuous operation which decreases the complexity of the etching process, conventional RIE such as RIE with Ar lacks selectivity. Consequently, both the dielectric and the low dimensional material can be etched simultaneously. This results in the above-mentioned etching damage and point defects of the low dimensional materials, such as a carbon-based low dimensional material, arranged underneath the etched dielectric. Particularly, Ar ions can physically sputter or degrade the carbon-based low dimensional materials, thus compromising their mechanical and electrical properties and, consequently, the performance of the resulting devices.

[0016] In summary, although several techniques are available for etching dielectric materials, they all exhibit significant limitations or drawbacks when it comes to their application in the fabrication of devices comprising low dimensional materials. In particular, those limitations include, among others, the following: safety and environmental concerns, limited technical performance due to poor selectivity, difficult control, or damage to low dimensional materials, and scalability challenges due to complexity and cost aspects.

[0017] The present disclosure seeks to provide improved methods for etching dielectric materials during the manufacture of devices comprising carbon-based low dimensional materials. Example of the disclosed methods aim to reduce at least some of the aforementioned limitations or drawbacks by providing scalable, reliable, and efficient methods with improved control over the etching of the dielectric materials while preserving the integrity and properties of the carbon-based low dimensional materials also present in the device.SUMMARY

[0018] In an aspect of the disclosure, a method for use in the manufacture of a device is provided. The method comprises providing a substrate, which has a substrate area, carrying a carbon-based low dimensional material and a dielectric material on the carbon-based low dimensional material. The method also comprises selectively dry etching the dielectric material at a region.

[0019] According to the method, selectively etching the dielectric material comprises placing the substrate in a substrate holder in a vacuum chamber, and introducing a chlorinebased gas in the vacuum chamber. Furthermore, selectively etching the dielectric material also comprises generating a plasma in the vacuum chamber by applying a radiofrequency power source to the substrate holder. The radiofrequency power source is operated at a selected power such that the underlying carbon-based low dimensional material is unetched.

[0020] According to this aspect of the disclosure, an improved etching method is obtained. Selectively dry etching of the dielectric material at a region involves etching the dielectric material while maintaining the underlying carbon-based material substantially unetched. A low power Reactive Ion Etching (RIE) process is provided which allows a precise and selective removal of dielectric materials deposited on top of carbon-based low dimensional materials, such as carbon nanotubes (CNTs) or graphene, while a continuous mode of operation may be maintained which is more efficient and cost-effective. RIE is typically perceived as an unconventional or impractical choice for a process involving delicate and highly vulnerable materials like carbon-based low dimensional materials due to, e.g., etching damage that might be caused by ion bombardment. The carbon-based low dimensional materials have weak bonding which makes the carbon-based low dimensional materials more readily etched if not supplied in bulk. However, the inventors have found that a method according to the present disclosure can provide an improved method for the selective etching of the dielectric material deposited on the highly delicate carbon-based low dimensional materials.

[0021] By using a chlorine-based gas and an adjusted power for plasma generation, etching damage of the carbon-based low dimensional materials is avoided. In particular, operation of the radiofrequency power source at relatively low power values permits a controlled etch of the dielectric material. Such control prevents undesired effects such as etching damage, thus minimizing the risk of damaging the underlying carbon-based low dimensional materials. The ability to effectively remove the dielectric oxide layer without affecting the structural integrityand the physical properties of the carbon-based low dimensional material is critical to ensure proper performance of the manufactured devices, e.g., CNT-based field-effect transistors.

[0022] The use of the chlorine-based gas provides chemical selectivity, so that only the dielectric material is chemically affected. In particular, chlorine-based gases are highly reactive with metal oxides creating volatile byproducts that are easy to remove. Furthermore, by combining the use of chlorine-based gases with the above-mentioned low power values, a highly controlled etching process is achieved. This highly controlled etching is advantageous to enable precise etching of the dielectric material. This is particularly the case when dealing with thin films and sensitive materials like carbon-based low dimensional materials. Such fine control results in consistent and high-quality results in device fabrication, for which even small variations in etch rates are known to negatively impact the device performance.

[0023] Moreover, the disclosed method is not limited to a specific dielectric material. Hence, by adjusting the process parameters, e.g., gas flow rates, pressure, or power settings, the process can be tailored to different dielectric oxides such as hafnium oxide HfC>2, or aluminum oxide AI2O3, or any combination thereof. Notwithstanding the flexibility provided by the adjustment of process parameters, the use of a chlorine-based gas mixture and the operation at very low powers provide the desired control over the etch rate. Consequently, even if different dielectric materials are employed in the fabrication of the device, the integrity of the carbon-based low dimensional materials can be preserved.

[0024] In some examples, the radiofrequency power source may be operated at a power such that a power density of less than 0.19 W / cm2is obtained when dividing the power provided by the radiofrequency power source by the substrate area. Specifically, the power density may be comprised between 0.06 W / cm2and 0.19 W / cm2. This purposeful selection of the power may allow selective removal of the dielectric material deposited on top of the carbon-based low dimensional material while the carbon-based low dimensional material remains substantially un etched.

[0025] In some examples, inductive coupling may further be employed as the energy for the generation and control of the plasma being supplied by electric currents which are produced by electromagnetic induction. In particular, an additional or a second radiofrequency power source may be provided for selectively etching the dielectric material. The second radiofrequency power source may be operated at a power such that a power density of less than 1.23 W / cm2is obtained when dividing the power by the substrate area, specifically the power density may be comprised between 0 W / cm2and 0.31 W / cm2, more specifically between 0.15 W / cm2and 0.31 W / cm2. The additional radiofrequency source and the purposefulselection of the power of the additional radiofrequency source may increase the etch rate of the dielectric material deposited on top of the carbon-based low dimensional material while the carbon-based low dimensional material remains substantially unetched.

[0026] A further beneficial effect of this aspect of the disclosure is particularly relevant when compared with conventionally employed wet etching process, which exhibits an isotropic behavior. According to the present disclosure, by applying the radiofrequency power source to the substrate holder, the method allows dielectric etching that is not only selective, but also anisotropic. Accordingly, sharp and well-defined patterns can be provided, thus avoiding commonly encountered issues such as undercutting. Indeed, the chemical etching gases and the low power settings used in the present disclosure, result in anisotropic etching which occurs predominantly in a vertical direction without significantly affecting lateral walls. This prevents unwanted material removal beneath the mask, thus ensuring that only the desired regions are effectively etched. The absence of such undesired effects, e.g., undercutting, allows obtaining devices with the required performance and reliability. Mitigation of undercutting is particularly relevant for certain devices, such as when defining the channel region in field effect transistors.

[0027] As still another effect of the method according to the present disclosure, the use of non-toxic or less toxic chemicals, i.e., chlorine-based gases instead of HF, increases safety and reduces environmental impact of the process, thus avoiding some of the drawbacks of conventionally used wet etching processes. Furthermore, the method according to the present disclosure can be relatively easily implemented with already existing fabrication equipment, thus facilitating mass production of devices comprising carbon-based low dimensional materials.

[0028] Throughout the present disclosure, it may be understood that low dimensional materials are materials that exhibit at least one spatial dimension that is reduced to the nanoscale, such that electrons become confined. Low dimensional materials can include zerodimensional, one-dimensional or two-dimensional materials. Zero-dimensional, 0D, materials, are materials in which electrons are confined in all three dimensions, e.g., quantum dots. Onedimensional, 1 D, materials are those in which electrons can move freely in only one dimension. As an example, carbon nanowires or carbon nanotubes are carbon-based 1D materials. Furthermore, low dimensional materials can also include two dimensional, 2D, materials, in which electrons can move freely in two dimensions, i.e., in a sheet-like structure or plane. Graphene is an example of a carbon-based 2D material.

[0029] Throughout the present disclosure, the term “etching damage” may be understood as localized mechanical breaks in the atomic lattice of the carbon-based low dimensionalmaterial, leading to a physical discontinuity in a layer made of the carbon-based low dimensional material, i.e., there is a physical separation between a first portion and a second portion of the layer. Consequently, the term “unetched” may define a feature of a material that does not present “etching damage”, i.e., there are substantially no physical discontinuities in a layer made of an “unetched” material.

[0030] Throughout the present disclosure, the term “chlorine-based gas” may refer to a gas that comprises a chlorine element, e.g., boron trichloride, BCI3.

[0031] Throughout the present disclosure, the expression “patterning a selected region on the dielectric layer” is understood as defining a pattern or shape on the dielectric layer. The creation of the pattern on the oxide dielectric layer may involve using photolithography techniques as known to the skilled person. A photoresist coating the oxide dielectric layer may be applied. The photoresist may then be exposed to light through a mask. Subsequently, the photoresist may be developed to reveal the pattern. In other words, certain areas of the oxide dielectric layer, i.e., the selected region, may be left exposed for further treatment whereas the remainder of the oxide dielectric layer may be covered or protected by the photoresist. Subsequent processes in such exposed or selected regions may comprise either etching of the material (in subtractive processes) or filling with material (in additive processes).BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Non-limiting examples of the present disclosure will be described in the following, with reference to the drawings, in which:Figure 1 shows a flowchart illustrating a method according to the disclosure;Figure 2 shows a flowchart illustrating a more detailed view of the last block of the method shown in Figure 1;Figures 3A - 3E schematically illustrate a sequence of steps in a cross-sectional view of an example of a method for selectively etching a dielectric oxide layer;Figure 4 schematically illustrates an example of a plasma processing apparatus for use in a method according to the disclosure;Figures 5A - 5G schematically illustrate a sequence of steps in a cross-sectional view of an example of a method for selectively etching a dielectric oxide material comprising two layers;Figures 6A - 6 J schematically illustrate a sequence of steps for the manufacture of a transistor according to an example; andFigure 7 shows Current-voltage (l-V) measurements of a carbon-based low dimensional material of an example device according to the disclosure.DETAILED DESCRIPTION OF EXAMPLES

[0033] Reference will now be made in detail to one or more examples. Each example is provided by way of explanation only, not as a limitation. In fact, it will be apparent to those skilled in the art that various modifications and variations can be made in the present disclosure. It is intended that the present disclosure covers such modifications and variations as come within the scope of the appended claims and their equivalents. Furthermore, drawings are intended to illustrate the different examples and manufacturing process. For the sake of clarity, dimensions of the different elements are not at scale to facilitate identification of the different components.

[0034] Figures 1 and 2 show respective flowcharts illustrating a method 100 according to an example of the disclosure. In particular, Figure 2 shows a more detailed view of the last block 120 in Figure 1. Furthermore, Figures 3A - 3E schematically illustrate a sequence of steps in a cross-sectional view of the method 100 for selectively etching a dielectric oxide layer. Reference is also made to Figure 4, which schematically illustrates an example of a plasma processing apparatus 90 for use in a method 100 according to the disclosure.

[0035] Block 110 of the method 100 shown in Figure 1 comprises providing a substrate 10, which has a substrate area, carrying a carbon-based low dimensional material 20 and a dielectric material 30 on the carbon-based low dimensional material 20. Such an arrangement is illustrated in Figure 3C. In some examples, the dielectric material 30 may be a dielectric oxide such as hafnium oxide HfC>2, or alumina AI2O3, or any combination thereof. The method 100 comprises selectively dry etching the dielectric material 30 at a region while maintaining the underlying carbon-based low dimensional material 20 substantially unetched in block 120. The resulting arrangement is schematically depicted in Figure 3E. As shown, the dielectric material 30, i.e., the dielectric oxide layer, is removed in a center region (in this specific example) of the substrate 10, thus leaving the carbon-based low dimensional material 20 exposed and substantially intact.

[0036] In some examples, the method 100 may comprise patterning a region on the dielectric material 30 prior to selectively dry etching the dielectric material 30, i.e., the dielectricoxide layer, in block 120. As shown in the example of Figure 3D, patterning the region may comprise using a photolithography process as known by the skilled person, i.e. , a photoresist may be applied to the substrate and a photolithography step may be carried out to define the region to be etched. In particular, as shown in Figure 3D, the photoresist 40 may be used to protect certain areas while exposing the selected region, i.e., the region to be etched away.

[0037] As shown in more detail in the flowchart of Figure 2 and in the schematic of the apparatus 90 of Figure 4, the dry etching process comprises placing the substrate 10, i.e., the substrate 10 carrying the carbon-based low dimensional material 20 and the dielectric material 30, in a substrate holder 96 in a vacuum chamber 97 in block 121. Furthermore, one or more chlorine-based gases are introduced in the vacuum chamber in block 122. A gas inlet 91 and an evacuation line 95 are schematically represented in Figure 4. In some examples, a pressure in the vacuum chamber 97 may be adjusted to a predetermined value prior to generating a plasma 98 in block 123.

[0038] Block 123 comprises generating the plasma 98 in the vacuum chamber 97 with a first radiofrequency power source 92. The plasma 98 is generated at the vicinity of the substrate 10 by applying a power to the substrate holder 96 with the first radiofrequency power source 92. The first radiofrequency power source 92 is operated at a low power such that a power density of less than 0.19 W / cm2is obtained when dividing the power of the first radiofrequency power source 92 by the substrate area.

[0039] In some examples, the method 100 may comprise providing an additional or a second radiofrequency power source 94 for increasing the etch rate of the dielectric material 30. The second radiofrequency power source 94 is operated at a low power such that a power density of less than 1.23 W / cm2is obtained when dividing the power of the second radiofrequency power source 94 by the substrate area, specifically the power density may be comprised between 0 W / cm2and 0.31 W / cm2, more specifically between 0.15 W / cm2and 0.31 W / cm2. Operation of the first and second radiofrequency power sources 92, 94, may be swapped or even carried out in a simultaneous form.

[0040] As shown in Figure 4, the plasma apparatus 90 comprises a reactive ion etcher (RIE) which can comprise inductively coupled plasma (ICP). A combination of chemical and physical etching mechanisms is then provided to selectively remove the dielectric material 30, i.e., the dielectric oxide layer, from the substrate 10 while maintaining the carbon-based low dimensional material 20 unetched.

[0041] The first radiofrequency power source 92 is connected to the substrate holder 96 and its primary role is to generate and sustain a plasma 98 in the vacuum chamber 97 at the vicinity of the substrate 10. Accordingly, the first radiofrequency power source 92 is, at least indirectly, operatively coupled to the substrate 10. A high frequency, e.g., 13,56 MHz, is used to energize a gas mixture into a plasma 98. The reactive species in the plasma 98 chemically react with the surface of the dielectric material 30 to form volatile compounds that can be removed. The gas mixture is selected to favor chemical reactions with the material that needs to be removed, e.g., with the dielectric oxide material used in the dielectric material 30. The first radiofrequency power source 92 is configured to generate the plasma 98 and accelerate ions generated in the plasma 98 towards the substrate 10, i.e., along a substantially vertical direction 99. In this manner, an anisotropic etching of the material deposited on the substrate, i.e., the dielectric material 30, is achieved. Accordingly, anisotropic etching is achieved, which reduces problems associated with isotropic etching such as the above-mentioned undercutting.

[0042] As also shown in Figure 4, a second radiofrequency power source 94 may be additionally employed in the present disclosure. Specifically, the second radiofrequency power source 94 is connected to a coil 93. The second radiofrequency power source 94 is configured to generate additional ions. By providing more ions that are available to react, the etch rate of the dielectric material 30 may be increased.

[0043] Overall, in the example where two separate power sources are provided, independent control of both plasma density and ion energy on the substrate is provided. As a result, a proper control on the etching process is obtained.

[0044] According to the present disclosure, relatively low power values may be used for the power source which results in a carefully controlled etching process. This aspect, combined with the chemical selectivity of the etching gases, allows a precise etching of the dielectric material 30, while maintaining the underlying carbon-based low dimensional material 20 substantially intact or unetched. Consequently, electrical properties of the carbon-based low dimensional material 20 may be preserved as shown in Figure 7.

[0045] Figure 7 shows the Current-Voltage l(V) measurements of a carbon-based low dimensional material 20 of an example device according to the disclosure. The example device comprises a carbon-based low dimensional material 20 arranged between two end electrodes, i.e., a device like the one schematically depicted in Figure 3E. The carbon-based low dimensional material 20 corresponds to a channel of the device.

[0046] In order to manufacture the device, a sequence like the one shown in Figures 3A -3E was conducted. An apparatus like the one schematically shown in Figure 4 was employed for the fabrication of the device, i.e., for the etching of the dielectric material. Two different devices were manufactured by using two different processes for such etching. A first device was manufactured by operating only the first radiofrequency power source 92. The corresponding l(V) curve 501 is depicted in Figure 7. A second device was manufactured by operating both the first 92 and the second 94 radiofrequency power sources. The resulting l(V) curve 502 is also depicted in Figure 7. In both cases, the method 100 was conducted with the first radiofrequency power source 92 comprising powers in an approximate range from 5Wto 15W. This power range corresponds to a power density comprised between 0.06 W / cm2and 0.19 W / cm2when dividing the power by the substrate area.

[0047] As shown in curve 501, when the method 100 is conducted with just the first radiofrequency power source 92, the measured current of the carbon-based low dimensional material 20 ranges from -1.5 x 10'4A to 1.5 x 10'4A when a voltage sweep from -1 V to 1 V is applied between the electrodes of the ends of the carbon-based low dimensional material 20. In this example, the etch rate is 1.3 nanometer per minute.

[0048] Furthermore, as shown in curve 502 of Figure 7, when the method 100 is conducted with the two power sources, i.e., with the first radiofrequency power source 92 and the second radiofrequency power source 94, the measured current of the carbon-based low dimensional material 20 ranges from -2.4x 10'5A to 2.5 x 10'5A when a voltage sweep from -1 V to 1 V is applied. In this example, the second radiofrequency power source 94 is operated with a power of 100W. The etch rate in this example is 4 nanometer per minute.

[0049] In both cases, the l(V) exhibit a clear linear trend, this being indicative of the resistive character of a healthy or unetched carbon-based low dimensional material 20. In other words, no etching damage, which would result in the appearance of discontinuities in the carbonbased low dimensional material 20, is present. The different slopes are indicative of different resistance values due to different dimensions of the channel defined for each of the two devices. The slope of curves 501, 502 represent the reciprocal of resistance (i.e., conductance). Consequently, if the slope increases, the conductance increases, meaning the resistance decreases. On the contrary, if the slope decreases, the conductance decreases, meaning the resistance increases. Hence, an increase in the resistance is observed for curve 502, i.e., when using the two power sources. This is indicative of different etching dynamics. However, the appropriate control of the process prevents etching damage, i.e., separation ordiscontinuities in the carbon-based low dimensional material 20. Accordingly, working devices are obtained in both cases.

[0050] Referring to the first radiofrequency power source 92, such low power values result in power densities of less than 0.19 W / cm2when dividing the power of the first radiofrequency power source 92 by the area of the substrate 10. More specifically, power density values in the range from 0.06 W / cm2to 0.19 W / cm2may be selected in different examples. Specific values may be adjusted depending on the required etch rate and / or on the properties of the dielectric material 30.

[0051] The substrate 10 may comprise different materials in accordance with circumstances. For instance, the substrate 10 may be a silicon substrate, e.g., a silicon wafer. Furthermore, the substrate 10 may comprise a dielectric coating such as a thermally grown oxide. The thermally grown oxide may have a thickness in the range of 250 to 300 nanometers, e.g., 285 nm. In such cases, the carbon-based low dimensional material 20 may be provided on top of such coating.

[0052] Different substrate sizes may be used in different examples of the disclosure. In examples, substrates 10 with a substrate area in a range from 5 cm2to 4000 cm2may be employed. In particular, it is known that typical wafer sizes are constantly increasing in the semiconductor industry. Accordingly, wafers with diameters in a range from 100 millimeters, mm, up to 700 mm may be considered.

[0053] Specifically, wafers with a 100 mm diameter, i.e. , 4-inch wafers, corresponding to an area of approximately 81 cm2may be used in an example. Accordingly, when taking into account the desired power densities, powers in an approximate range from 5W to 15W may be envisaged for the first radiofrequency power source 92 in this example, which corresponds to a power density comprised between 0.06 W / cm2and 0.19 W / cm2when dividing the power by the substrate area.

[0054] In the example where a second radiofrequency source 94 is provided, a low power value is also selected to increase the etch rate of the carbon-based low dimensional material 20 while preventing damage of the same. Hence, powers in an approximate range from 0W to 100W, specifically between 0W and 25W, and more specifically between 12W and 25W may be selected for the second radiofrequency power source 94 which corresponds to a power density of less than 1.23 W / cm2, specifically between 0 W / cm2and 0.31 W / cm2, and more specifically between 0.15 W / cm2and 0.31 W / cm2when dividing the second power by thesubstrate area. Particularly, the power density in a range from 0 W / cm2to 0.31 W / cm2may be selected depending on different aspects such as desired etch rate and dielectric material.

[0055] Similarly to the previous case, the power applied to the second radiofrequency power source 94 may depend on the dimensions of the substrate 10. As an example, when using a 4-inch wafer as a substrate 10, i.e. , a wafer with a diameter of about 100 mm or an area of about 81 cm2, a power in a range from 0 W to 100 W may be applied to the second radiofrequency power source 94.

[0056] In an example of the disclosure, providing the substrate 10 carrying the carbonbased low dimensional material 20 and the dielectric material 30 may comprise providing the substrate 10 and, subsequently, providing the carbon-based low dimensional material 20 on a surface of the substrate 10. Later on, the method 100 may comprise depositing the dielectric material 30 on the carbon-based low dimensional material 20.

[0057] This example is illustrated in the sequence depicted in Figures 3A to 3C. Hence, Figure 3A shows that a substrate 10 is provided whereas Figure 3B shows how a carbonbased low dimensional material 20, e.g., 1D carbon nanotubes or 2D graphene, is arranged on the substrate 10. The subsequent deposition of the dielectric material 30 is depicted in Figure 3C. Regarding the provision of the substrate 10 shown in Figure 3A, a silicon wafer may be used in an example. Furthermore, a substrate preparation may be carried out before the deposition of the carbon-based low dimensional material 20. As an example, such preparation may comprise a coating of the substrate 10 with a silicon oxide; and a cleaning with a standard cleaning process, e.g., RCA clean, to remove organic and inorganic contaminants.

[0058] As already indicated, a variety of materials may be provided as carbon-based low dimensional material 20. Those may include 1D materials, such as carbon nanotubes, carbon nanowires, carbon-based conducting polymers, or carbon nano threads. Hence, in an example of the disclosure, the carbon-based low dimensional material 20 may comprise a onedimensional carbon-based material. The one-dimensional carbon-based material may comprise one or more carbon nanotubes. Specifically, different types of carbon nanotubes, CNTs, such a single-walled carbon nanotubes, SWCNTs, or multi-walled carbon nanotubes, MWCNTs, may be considered depending on the intended application. Furthermore, either a single row of CNTs, multiple rows, or a substantially random arrangement of CNTs may be envisaged in different examples.

[0059] The provision of the carbon-based low dimensional material 20 on the substrate 10 may be achieved in different forms. Hence, in examples comprising carbon nanotubes, thesemay be first obtained by e.g., chemical vapor deposition (CVD) or Arc discharge. Subsequently, the obtained carbon nanotubes may be pre-purified. Then, a solution comprising the prepurified carbon nanotubes may be deposited on the substrate 10, e.g., by spin coating, and the solvent may be removed after the deposition. With this approach, moderate temperatures may be needed for the provision of the carbon-based low dimensional material 20 on the substrate 10. Accordingly, a wide range of materials may be used for the substrate 10. Furthermore, the use of a solution of prefabricated carbon nanotubes, or other 1D carbonbased materials, may facilitate use of materials with predetermined characteristics. In particular, either metallic or semiconducting carbon nanotubes, or either single wall or multiple wall carbon nanotubes, may be chosen for the fabrication of the device depending on the intended application.

[0060] Alternatively, carbon-based low dimensional materials such as carbon nanotubes may be grown directly on the substrate 10. More specifically, the method may comprise growing carbon nanotubes by means of Chemical Vapor Deposition (CVD). In order to grow carbon nanotubes on the substrate 10 by means of CVD, a first step comprising deposition of catalyst particles may be carried out. The specific locations of the catalyst particles may be defined by patterning with lithography, followed by deposition of a solution containing the catalyst particles. The solvent may subsequently be dried, and the excess catalyst may be removed by the lift-off procedure. After formation of the catalyst particles on the surface of substrate 10, the substrate 10 may be placed in a CVD reactor. The CVD process may use hydrogen (H2), argon (Ar) and methane (CH4), and the carbon nanotube growth process may be carried out at high temperatures in the range of 900°C. Based on the parameters of the process, carbon nanotubes of different characteristics, e.g., length, may be obtained.

[0061] In other examples of the disclosure, the carbon-based low dimensional material 20 may comprise a two-dimensional carbon-based material. In particular, the two-dimensional carbon-based material may comprise graphene. In other examples, a two-dimensional material comprising graphene oxide or graphane may be provided.

[0062] In some examples, said two-dimensional (2D) materials may be grown via, e.g., chemical vapor deposition (CVD) or atomic layer deposition (ALD). They may be subsequently transferred to the substrate 10 by means of e.g., spin coating deposition or chemical deposition by dip coating. In some examples, the 2D material may be a 2D carbon-based material, or a 2D transitional metal dichalcogenide (TMD) material such as a MX2material wherein the M is a transition-metal and the X is a chalcogen. Particularly, the MX2material may be selected from at least one of the following: MoS2, WeS2or WS2.

[0063] After deposition of the carbon-based low dimensional material 20, an inspection may be carried out to ensure uniformity and / or proper alignment and distribution of the material. This may be particularly relevant when using 1D materials, such as carbon nanotubes, as device fabrication may require precise aligning and positioning of the 1D materials.

[0064] Regarding the dielectric material 30, a thin layer of different materials may be used in different examples of the disclosure. The method 100 according to the present disclosure is compatible and can be adjusted to the use of multiple dielectric materials. Accordingly, the selective etching of the dielectric in block 120 of the method 100 may be carried out in an efficient manner with different dielectric materials by tailoring different settings. Thus, some of the etching parameters, e.g., gas mixture, pressure, temperature or power(s) used for the first radiofrequency power source 92 and / or the second radiofrequency power source 94, may be tuned. In any case, low power densities are maintained to ensure a slow and controllable etching. The versatility of the method 100 shown in Figures 1 and 2 makes the process applicable to a wide range of semiconductor devices. This allows saving in terms of both time and resources as the same equipment can be used for different dielectric materials.

[0065] The thickness of the dielectric material 30 may be adjusted based on the needs of the device. In an example of the disclosure, depositing a dielectric material (Figure 3C) may comprise depositing a high-k dielectric, i.e., a dielectric with a high dielectric constant. Furthermore, the high-k dielectric may comprise hafnium oxide, HfC>2. In other examples, other high-k dielectrics, such as Zirconium oxide, ZrC>2, Aluminium Oxide, AI2O3, Tantalum Pentoxide Ta2Os, or Lanthanum Oxide, La2Os may be employed. High-k dielectrics may be employed to enhance the performance of electronic devices, particularly in semiconductor applications. In particular, high-k dielectrics may be used as gate dielectrics in transistors to mitigate leakage currents observed with conventional oxides, e.g., silicon dioxide.

[0066] Different techniques, such as Atomic Layer Deposition, ALD, may be used for the deposition of the dielectric material 30 on the carbon-based low dimensional material 20. Alternative deposition techniques, such as chemical vapor deposition, CVD, physical vapor deposition, PVD, or spin coating, may be used in other examples.

[0067] In other examples of the disclosure, other dielectric oxides, i.e., non-high-k dielectrics, may be selected. In particular, conventionally used dielectric oxides, such as SiC>2 may be deposited for the fabrication of certain semiconducting devices.

[0068] After deposition of the dielectric material 30, an inspection may be carried out to ensure that the dielectric material 30 covers the complete area of the substrate 10 and that thethickness of the dielectric material 30 is substantially uniform. Such inspection may be required for the fabrication of certain semiconducting devices.

[0069] In still another example of the disclosure, the dielectric material 30 may comprise two layers 30a, 30b or sub-layers. In this example of the disclosure, the dielectric material 30 comprises a first layer 30a of a first dielectric oxide arranged on the carbon-based low dimensional material 20, and a second layer 30b, of a second dielectric oxide, arranged on the first layer 30a. In an example, the first layer 30a and the second layer 30b may be deposited in subsequent manufacturing steps. To this end, different techniques, such as Atomic Layer Deposition, ALD, or Chemical Vapor Deposition, CVD, may be used for each of the layers.

[0070] In a variant of this example, a combination of HfC>2 and SiC>2 may be employed. Such a combination may be advantageously used for the design of certain devices, such as transistors.

[0071] Figures 5A - 5G schematically illustrate a sequence of steps in a method with a dielectric material 30 made up of two dielectric oxide layers 30a, 30b of different dielectric oxide materials. In this example, a first dielectric oxide layer 30a may be deposited on the carbonbased low dimensional material (Figure 5C). Subsequently, a second oxide layer 30b may be deposited on the first layer 30a as schematically represented in Figure 5B. A pattering step with, e.g., photolithography, may be carried out to define a section wherein removal of the dielectric material 30 is desired (Figure 5E). Then, as shown in Figures 5F and 5G, subsequent steps may be carried out to etch the two dielectric oxide layers 30a, 30b in two consecutive steps. In each step, appropriate parameters may be selected for the etching process. Accordingly, complexity of the fabrication of the device may be reduced while increasing the precision and alignment of the different layers in the semiconductor device.

[0072] In an example of the method 100 illustrated in Figures 5A - 5G, etching the dielectric material 30 at the selected location may comprise etching the second layer 30b comprising the second dielectric oxide with a first set of etching parameters. The etching parameters may include at least one of the following: the pressure in the vacuum chamber 97, the first power of the first radiofrequency power source 92, a flow rate of the chlorine-based gases, or a composition of the chlorine-based gases. Furthermore, the method may proceed by subsequentially etching the first layer 30a comprising the first dielectric oxide layer with a second set of etching parameters, the second set of etching parameters being different from the first set of etching parameters. In examples comprising the use of a second radiofrequency power source 94, the power of such second radiofrequency power source 94 may also be added as one of the etching parameters. Accordingly, different power values for the secondradiofrequency power source 94 may be considered for the sets of etching parameters used for the different layers.

[0073] Accordingly, the first and second set of etching parameters may be adjusted to the needs of the corresponding materials. A more critical process may arise with the etching of the first layer 30a, i.e., the layer that is in direct contact with the carbon-based low dimensional material 20. Conversely, the etching of the second layer 30b may constitute a less critical process as the underlying material is also a dielectric oxide that needs to be removed. Accordingly, a more aggressive treatment may be implemented for the etching of the second layer 30b.

[0074] As shown in block 122 of Figure 2, a mixture containing chlorine-based gases is introduced in the vacuum chamber 97. To this end, a gas inlet 91 is schematically depicted in Figure 4. Different chlorine-based gases, i.e., gases containing chlorine atoms, may be employed. In particular, such gases may comprise chlorine gas Ch or chloride gases. Chloride gases are chemical compounds that contain chlorine atoms bonded to other elements.

[0075] The use of chorine-based gases allows a highly selective chemical etching in the apparatus 90. Hence, radicals and ions containing chlorine atoms are generated in the plasma 98 after ionization of the gas mixture resulting from application of the radiofrequency power with the first radiofrequency power source 92. These reactive species chemically react with the surface of the dielectric material 30 to form volatile compounds that can be removed. Specifically, a selective chemical reaction occurs between the chlorine-containing radicals and the oxide material of the dielectrics. Conversely, a lower reactivity exists with the carbon-based low dimensional materials 20. Consequently, after controlled removal of the dielectric material 30, further etching of the carbon-based low dimensional material 20 is mitigated so that it remains substantially untouched.

[0076] In a variant of this example, introducing one or more chlorine-based gases in the chamber comprises introducing a gas mixture in the vacuum chamber comprising only chlorine-based gases. In other variants, the gas mixture may additionally comprise other elements, such as Argon, Ar. The use of Ar may facilitate increasing the etch rate due to ion bombardment. Nevertheless, this may be at the expense of more sputtering, less selectivity and, potentially, increased damage on the carbon-based low dimensional materials 20. Accordingly, in examples comprising Ar use, a trade-off between increased etch rate and limited damage on the carbon-based material may be required.

[0077] Conversely, by avoiding the use of any non-chlorine gases and, more particularly, by avoiding the use of Ar, a gentler and more controlled etching of the dielectric material 30 may be achieved. Specifically, a gas mixture comprising only boron trichloride, BCh, and / or chlorine gas, Ch may be selected. In such a case, physical damage to the carbon-based low dimensional material 20 is significantly prevented as the ion bombardment is drastically reduced. Furthermore, such ion bombardment is also mitigated by using a low power value for the second radiofrequency power source 94, i.e., for the power source creating the voltage bias at the substrate 10. Hence, by using a mixture of BCh and / or Ch, a chemical etching process is mainly present due to the selective reaction of those gases with dielectric oxide materials, such as HfC . In other words, the chemical etching action of BCh and / or Ch specifically target the dielectric material 30. Moreover, by limiting the ion bombardment, i.e., physical sputtering, the treated surface may remain smoother, thus enhancing the performance of the resulting semiconductor device.

[0078] Apart from the composition of the gas mixture, the flow rates can also significantly impact the nature of the process and, more particularly, the etch rate and the selectivity. In an example of the disclosure comprising a mixture of Ch and BCh, a flow rate between 5 to 15 seem (standard cubic centimeters per minute) for the BCh, and 10 to 30 seem for the Ch may be selected. However, it is understood that these flow rates may be tuned alongside other parameters like pressure or power to control the etching process.

[0079] As already mentioned in the description referring to Figure 2, a pressure inside the vacuum chamber 97 may be adjusted to a predetermined value. Such adjustment can be implemented by controlling a vacuum pump system and / or by controlling the cross-section of the evacuation line 95, e.g., by using a controllable exhaust valve. The pressure in the vacuum chamber 97 influences the dynamics, e.g., etch rate, and characteristics of the etching process, e.g., selectivity or anisotropy. Specifically, the pressure can affect a balance between chemical and physical etching mechanisms.

[0080] In an example of the disclosure, a low pressure may be selected. In particular, improved anisotropy may be achieved by operating at low pressures whereas energy of the ion bombardment may be kept relatively low by using a low bias voltage, i.e., a low power in the second radiofrequency power source 94.

[0081] In examples of the present disclosure, adjusting the pressure in the vacuum chamber 97 to a predetermined value may comprise adjusting the pressure to a value of less than 10 mTorr. Specifically, the pressure in the vacuum chamber 97 may be adjusted in arange from 1 mTorr to 10 mTorr. In this manner, the above-mentioned beneficial effects may be achieved.

[0082] Furthermore, other process parameters may also have an influence. In particular, the temperature of the substrate 10 may also play a significant role in the dynamics and characteristics of the etching process. Specifically, slow chemical reactions and reduced etch rate may be obtained when using low temperatures in chemistry-dominated processes. Furthermore, low temperatures may improve selectivity in cases where such slower reactions reduce the etching of a sensitive masking material, such as photoresist. Moreover, low temperatures may facilitate the deposition of polymer on sidewalls, thus aiding anisotropic etching by protecting the sidewalls and preventing lateral etching, i.e., undercutting. The use of low temperatures during the process may also help reduce thermal stress on the processed sample.

[0083] Accordingly, in order to further enhance the controllability of the process by ensuring a slow etch rate, an example of the method 100 may comprise controlling a temperature of the substrate 10 during the etching and maintaining the temperature of the substrate 10 between room temperature and 50°C, i.e., maintaining the temperature at a relatively low value. To this end, a cooling system may be provided to keep substrate 10 temperature within such limits even after generation of the plasma 98 and initiation of the etching process. In other examples, temperatures below room temperature may be employed. In particular, increased selectivity and anisotropy may be achieved by slowing chemical reactions and reducing lateral etching. This may be particularly beneficial in high-precision etching applications, for which cryogenic cooling may be used.

[0084] As understood by the skilled person, the above-mentioned examples may be combined in still other variants of the present disclosure. In particular, in an example of the disclosure, a method 100 comprising low power, low pressure and controlled flow gas rates may be implemented. Specifically, the method may comprise the following parameters: a power density between 0.06 and 0.19 W / cm2(e.g., about 5 and 15 W if using an 4-inch wafer as the substrate 10) for the first radiofrequency power source 92 generating the plasma 98, a power density between 0.15 W / cm2and 0.31 W / cm2(e.g., 12 and 25 W if using an 4-inch wafer as the substrate 10) for the second radiofrequency power source 94, a pressure of less than 10 mTorr in the vacuum chamber 97, and a mixture of gases comprising only BCI3 and C with flow rates between 5 to 15 seem for the BCI3 and between 10 to 30 seem for the Ch. Furthermore, moderate low temperatures, e.g., between room temperature and 50°C may be employed.

[0085] In order to optimize the process, an example of the disclosure may comprise monitoring an etch rate of the dielectric material 30 and adjusting one or more etching parameters during the dry etching so as to keep the etch rate at a predetermined value. Specifically, the etch rate may be kept at a value in a range from 1 nanometer per minute to 5 nanometer per minute and, more specifically, at a value between 1.3 nanometer per minute and 4 nanometer per minute. As already described, a slow etch rate may be preferred to improve the selectivity and to reduce the aggressiveness of the etching process. In this manner, the risk of damaging the carbon-based low dimensional material 20 underlying the etched dielectric material 30 may be mitigated.

[0086] In order to monitor the etch rate, different techniques may be employed. In particular, laser interferometry, optical emission spectroscopy, or mass spectrometry may be used for in-situ monitoring of the etch rate. In other examples, ex-situ monitoring techniques, e.g., profilometry, may be used. In-situ monitoring techniques may be preferred due to the ability to monitor in real time without stopping the process.

[0087] In a variant of these methods comprising monitoring of the etch rate, adjusting one or more etching parameters may comprise adjusting at least one of the following: the pressure in the vacuum chamber 97, the first power of the first radiofrequency power source 92, the second power of the second radiofrequency power source 94, a flow rate of the chlorine-based gases, a composition of the chlorine-based gases, or a temperature of the substrate 10. In particular, and as already mentioned, the use of in-situ monitoring techniques may allow the adjustment of one or more of the mentioned parameters in an online and, in some case, automatic manner.

[0088] Furthermore, in still other examples of the disclosure, monitoring may not be limited to the etch rate but it may also comprise monitoring the potential affectation of the carbonbased low dimensional material 20. To this end, characterization techniques such as Raman spectroscopy, Atomic Force Microscopy (AFM), conductive AFM, Transmission Electron Microscopy (TEM), or electric measurements, may be carried out. In these examples of the method, proper adjustments may be conducted to increase the selectivity and / or reduce the sputtering or ion bombardment. In a variant, such adjustments may be conducted in real-time.

[0089] After removal of the dielectric material 30 at the selected locations, the substrate 10 may be removed from the vacuum chamber 97. The method 100 may comprise additional steps to improve the surface quality after the etching process. Hence, in an example, the method may comprise a post-etching surface treatment after etching the dielectric material 30. The post-etching surface treatment may comprise a passivation and / or an annealing process.Such process may be conducted to smoothen any surface irregularities created during etching. This way, a higher-quality surface may be achieved, which may be particularly relevant for the manufacture of certain devices, such as CNT-based transistors. This step may enhance the overall reliability and performance of such devices. Specifically, an improved surface finish may result in improved contact resistance in the final device.

[0090] In a further example, another post-etching step may be carried out. In particular, an inspection step may be implemented to ensure proper etching and alignment of the etched regions.

[0091] Figures 6A - 6J provide a simplified view of a sequence of steps for the manufacture of a device. In particular, in this example, a field effect transistor comprising carbon nanotubes, i.e., a CNT-transistor, is presented. The fabrication of the transistor employs a method for the selective etching of a dielectric material 301 in the step shown in Figure 6G. Hence, according to this example, a substrate 10 is first provided (Figure 6A). A carbon-based low dimensional material is deposited on the substrate 10 as shown in Figure 6B. In this example, this may comprise the deposition of carbon nanotubes, CNTs 201. The carbon nanotubes may be configured to function as the channel of the transistor. Subsequently, a dielectric material 301 may be deposited over the previously deposited carbon nanotubes as schematically presented in Figure 6C. As an example, a high-k dielectric, such as HfC>2 , may be arranged over the CNTs using, e.g., Atomic Layer Deposition, ALD. The thin layer of high-k dielectric may be configured to function as the oxide gate dielectric.

[0092] A photolithography step may be conducted to define a photoresist mask 401 and protect the channel region for the CNT-transistor (Figure 6D). To this end, the carbon nanotubes 201 may be identified and the photolithography steps may be properly aligned. Subsequently, a fundamentally standard Reactive Ion Etching (RIE) process may be conducted to remove both the HfC>2 layer 301 and the carbon nanotubes 201. A further photolithography step may be conducted to pattern the source and drain regions of the transistor. Accordingly, a photoresist 402 may be provided to protect the transistor channel. As seen in Figure 6F, the ends of the CNT 201, with the corresponding HfC>2 layer 301, may be left exposed.

[0093] Figure 6G corresponds to a manufacturing step incorporating a method according to the present disclosure. An etching of the HfO2 layer 301 may be performed without damaging the underlying CNTs 201. The etching involves the use of a mixture of chlorine-based gases and the use of relatively low power densities for both the first radiofrequency power source generating the plasma and the second radiofrequency power source generating the voltagebias of the substrate 10. After the etching step shown in Figure 6G, the ends of the CNT 201 may be exposed for subsequent contact. Furthermore, as previously discussed, a post-etching process comprising, e.g., an annealing and / or passivation, may be carried out to improve the contact resistance. As also described, the etching of the HfCh layer 301 may be monitored to control the etch rate, e.g., to keep it at approximately between 1.3 nanometer per minute and 4 nanometer per minute, and to ensure that only the HfCh layer 301 is removed.

[0094] After etching the HfC>2 layer, the source and drain metals 50 may be deposited onto the source and drain regions as schematically depicted in Figure 6H. In particular, in an example of the disclosure, electron beam evaporation or sputtering may be used to deposit the metal contacts, e.g., Palladium for p-type transistors and Scandium for n-type transistors. Other work function metals may be employed in alternative examples.

[0095] A further photolithography step may be carried out (Figure 6I) to define the gate region. To this end, a photoresist 403 may also be used. Finally, the gate conductor 60 may be deposited, e.g., by physical vapor deposition, in the gate region on top of the HfCh layer 301. In this manner, a planar field effect CNT-transistor may result as shown in the last image of the sequence (Figure 6J).

[0096] This written description uses examples to disclose the teaching, including the preferred embodiments, and also to enable any person skilled in the art to practice the teaching, including making and using any devices or systems and performing any incorporated methods. The patentable scope is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal languages of the claims. Aspects from the various embodiments described, as well as other known equivalents for each such aspects, can be mixed and matched by one of ordinary skill in the art to construct additional embodiments and techniques in accordance with principles of this application. If reference signs related to drawings are placed in parentheses in a claim, they are solely for attempting to increase the intelligibility of the claim and shall not be construed as limiting the scope of the claim.

Claims

24CLAIMS1. A method comprising:providing a substrate carrying a carbon-based low dimensional material and a dielectric material on the carbon-based low dimensional material, the substrate having a substrate area;selectively dry etching the dielectric material at a region while maintaining the underlying carbon-based material substantially unetched; wherein selectively etching the dielectric material comprises:placing the substrate in a substrate holder in a vacuum chamber;introducing a chlorine-based gas in the vacuum chamber;generating a plasma comprising radicals and ions containing chlorine atoms in the vacuum chamber by applying a radiofrequency power source to the substrate holder, the radical and ions reacting with a surface of the dielectric material;the radiofrequency power source being operated at a power such that a power density of less than 0.19 W / cm2is obtained when dividing the power by the substrate area.

2. The method of claim 1 , wherein the power density is comprised between 0.06 W / cm2and 0.19 W / cm2.

3. The method of claim 1 or 2, wherein selectively etching the dielectric material comprises providing a second radiofrequency power source being operated at a power such that a power density of less than 1.23 W / cm2is obtained when dividing the power by the substrate area, specifically the power density is comprised between 0 W / cm2and 0.31 W / cm2, more specifically between 0.15 W / cm2and 0.31 W / cm2.

4. The method of claim 3, wherein the second radiofrequency power source is connected to an inductive coil arranged around the vacuum chamber, the second frequency power source being configured for exciting the chlorine-based gas via coupling through the inductive coil.

5. The method of any of claims 1 to 4, wherein providing the substrate carrying the carbonbased low dimensional material and the dielectric material, comprises:providing the substrate;providing a carbon-based low dimensional material on a surface of the substrate; and depositing a dielectric material on the carbon-based low dimensional material.

6. The method of any previous claim, wherein the carbon-based low dimensional material comprises a one-dimensional carbon-based material, and wherein the one-dimensional carbon-based material comprises one or more carbon nanotubes.

7. The method of any of claims 1 to 6, wherein the carbon-based low dimensional material comprises a two-dimensional carbon-based material, and wherein the two-dimensional carbon-based material comprises graphene.

8. The method of any previous claim, wherein the dielectric material comprises a high-k dielectric, and wherein the high-k dielectric comprises hafnium oxide HfC>2, or alumina AI2O3, or any combination thereof.

9. The method of any previous claim, wherein the dielectric material comprises a first layer comprising a first dielectric oxide arranged on the carbon-based low dimensional material, and a second layer comprising a second dielectric oxide arranged on the first layer.

10. The method of claim 9, wherein etching the dielectric material at the region comprises:etching the second layer comprising the second dielectric oxide with a first set of etching parameters, the etching parameters including at least one of the following: the pressure in the vacuum chamber, the power of the radiofrequency power source, a flow rate of the chlorinebased gas, or a composition of the chlorine-based gas; andetching the first layer comprising the first dielectric oxide layer with a second set of etching parameters, the second set of etching parameters being different from the first set of etching parameters.

11. The method of any previous claim, wherein introducing the chlorine-based gas in the chamber comprises introducing a gas mixture in the vacuum chamber comprising only chlorine-based gases.

12. The method of claim 10, wherein the gas mixture comprises boron trichloride, BCI3, and / or chlorine gas, Ch.

13. The method of any previous claim, wherein a temperature of the substrate is controlled during the etching, and wherein the temperature of the substrate is maintained between room temperature and 50°C.

14. The method of any previous claim, comprising monitoring an etch rate of the dielectric material and adjusting one or more etching parameters during the dry etching so as to keep the etch rate at a predetermined value, specifically at a value in a range from 1 nanometer per minute to 5 nanometer per minute, more specifically at a value between 1.3 nanometer per minute and 4 nanometer per minute.

15. The method of claim 15, wherein adjusting one or more etching parameters comprises adjusting at least one of the following: the pressure in the vacuum chamber, the power of the radiofrequency power source, the power of the second radiofrequency power source, a flow rate of the chlorine-based gas, a composition of the chlorine-based gas, and a temperature of the substrate.

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