Sensor module and electronic device
The sensor module uses a filter with a high cutoff frequency and a condition determination circuit to attenuate noise from digital signals, enhancing detection accuracy by preserving the sensor signal integrity.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- MURATA MFG CO LTD
- Filing Date
- 2025-11-19
- Publication Date
- 2026-07-02
AI Technical Summary
Existing sensor modules struggle to effectively attenuate noise from digital signals without significantly attenuating the signal output from the sensor, particularly when the output impedance of the sensor is high, leading to false detections due to noise frequencies being close to the signal frequencies.
A sensor module comprising a filter with a cutoff frequency higher than the fundamental frequency of the sensor signal and a condition determination circuit that outputs a digital signal with a pulse repetition frequency equal to or higher than the cutoff frequency, effectively attenuating noise from digital signals while preserving the sensor signal.
The solution allows for effective noise attenuation from digital signals without significantly affecting the sensor signal, improving detection accuracy by reducing noise interference.
Smart Images

Figure JP2025040392_02072026_PF_FP_ABST
Abstract
Description
Sensor Module and Electronic Device
[0006]
[0001] The present invention relates to a sensor module.
[0002] As a conventional invention related to a sensor module, for example, a touch detection device described in Patent Document 1 is known. The touch detection device described in Patent Document 1 includes a touch panel, a piezoelectric sensor, and a control circuit board. The control circuit board includes a signal processing circuit and a controller. The signal processing circuit processes a detection signal output from the piezoelectric sensor.
[0003] When the detection signal output from the piezoelectric sensor is Ref1 or more, the signal output from the signal processing circuit is P1. When the detection signal output from the piezoelectric sensor is Ref2 or less, the signal output from the signal processing circuit is P2. Both P1 and P2 are high as signal levels. When the detection signal output from the piezoelectric sensor is greater than Ref2 and less than Ref1, the signal level of the signal output from the signal processing circuit is low. The signal output from the signal processing circuit is a digital signal (see FIG. 5 of Patent Document 1).
[0004] Japanese Patent No. 7501963
[0005] When the output impedance of a sensor is very high, like a piezoelectric sensor, a part of the signal output from the signal processing circuit may be transmitted to the output of the sensor through space and become noise. In the signal processing method described in Patent Document 1, the frequency of the digital signal output from the signal processing circuit is close to the frequency of the detection signal output from the sensor. For example, in the example described in FIG. 5 of Patent Document 1, the frequency of the digital signal is only twice the frequency of the detection signal. In the signal processing method described in Patent Document 1, since the frequency of the digital signal is close to the frequency of the detection signal, the frequency of the noise is also close to the frequency of the detection signal, making it difficult to effectively attenuate the noise derived from the digital signal with a filter or the like. Such noise can cause false detection.
[0006] Therefore, the object of the present invention is to provide a sensor module and electronic device that can effectively attenuate noise originating from digital signals without substantially attenuating the signal output from the sensor.
[0007] A sensor module according to one embodiment of the present invention comprises: a sensor that outputs a first signal; a filter connected downstream of the sensor that attenuates frequency components of the first signal that are at a cutoff frequency higher than the fundamental frequency of the first signal; and a condition determination circuit connected downstream of the filter that receives a second signal, which is the first signal after the frequency components have been attenuated by the filter, wherein the condition determination circuit determines whether the second signal satisfies a predetermined condition and outputs a digital signal based on the determination result, the digital signal includes a pulse that periodically alternates between high and low during the period when the second signal satisfies the predetermined condition, and is fixed to low during the period when the second signal does not satisfy the predetermined condition, and the repetition frequency of the pulse is at or above the cutoff frequency.
[0008] In a sensor module according to one embodiment of the present invention, since the pulse repetition frequency is equal to or higher than the filter's cutoff frequency, the frequency of the noise originating from the digital signal is also equal to or higher than the filter's cutoff frequency. Because the filter's cutoff frequency is higher than the fundamental frequency of the first signal, the filter can effectively attenuate the noise originating from the digital signal mixed into the first signal without significantly attenuating the first signal.
[0009] A sensor module according to one embodiment of the present invention comprises: a sensor that outputs a first signal; a filter connected downstream of the sensor that attenuates frequency components of the first signal that are at a cutoff frequency higher than the fundamental frequency of the first signal; and a condition determination circuit connected downstream of the filter that receives a second signal, which is the first signal after the frequency components have been attenuated by the filter, wherein the condition determination circuit determines whether the second signal satisfies a predetermined condition and outputs a digital signal based on the determination result, the digital signal includes a pulse that periodically alternates between high and low during the period when the second signal satisfies the predetermined condition, and is fixed to high during the period when the second signal does not satisfy the predetermined condition, and the repetition frequency of the pulse is at or above the cutoff frequency.
[0010] In a sensor module according to one embodiment of the present invention, since the pulse repetition frequency is equal to or higher than the filter's cutoff frequency, the frequency of the noise originating from the digital signal is also equal to or higher than the filter's cutoff frequency. Because the filter's cutoff frequency is higher than the fundamental frequency of the first signal, the filter can effectively attenuate the noise originating from the digital signal mixed into the first signal without significantly attenuating the first signal.
[0011] According to the present invention, noise originating from digital signals can be effectively attenuated without significantly attenuating the signal output from the sensor.
[0012] Figure 1 is a block diagram of the electronic device 100. Figure 2 shows the generation of polarization charge in sensor 2. Figure 3 is an example of the digital signal SD of sensor module 1. Figure 4 is a comparison of the digital signal SD of a conventional example and the digital signal SD of sensor module 1. Figure 5 is an example of the second signal S2 of a conventional example. Figure 6 is an example of the second signal S2 of sensor module 1. Figure 7 is an example of the digital signal SD of sensor module 1a. Figure 8 is the first signal S1 used in the experiment. Figure 9 is an example of the second signal S2 of a conventional example in the experiment. Figure 10 is an example of the second signal S2 of sensor module 1 in the experiment. Figure 11 is an example of the second signal S2 of sensor module 1a when the duty cycle of pulse PU in the experiment is 25%. Figure 12 is an example of the second signal S2 of sensor module 1a when the duty cycle of pulse PU in the experiment is 12.5%. Figure 13 is an example of the digital signal SD of sensor module 1b. Figure 14 is an example of the digital signal SD of sensor module 1c. Figure 15 is a block diagram of electronic device 100d. Figure 16 is an example of the charge-voltage conversion circuit 5a. Figure 17 is an example of the digital signal SD of sensor module 1d. Figure 18 is an example of the digital signal SD of sensor module 1d. Figure 19 is an example of the digital signal SD of sensor module 1d. Figure 20 is an example of the digital signal SD of sensor module 1e. Figure 21 is an example of the digital signal SD of sensor module 1e. Figure 22 is an example of the digital signal SD of sensor module 1e.
[0013] [First Embodiment] Below, a sensor module 1 and an electronic device 100 equipped with the sensor module 1 according to the first embodiment of the present invention will be described with reference to the drawings. Note that in each figure, wiring and the like have been omitted for the sake of clarity.
[0014] Figure 1 is a block diagram of the electronic device 100. The electronic device 100 is used, for example, in wearable devices such as smartwatches, smartphones, or information processing devices such as tablet computers. However, the electronic device 100 is not limited to these exemplified information processing devices; it can be anything operated by a person. For example, the electronic device 100 may be used in a remote control for operating a television receiver. As shown in Figure 1, the electronic device 100 comprises a sensor module 1 and a processing circuit 101.
[0015] For example, the sensor module 1 detects pressure and outputs a digital signal SD to the processing circuit 101 based on the detected pressure. The sensor module 1 includes a sensor 2, a filter 3, and a condition determination circuit 4. In this embodiment, the sensor 2 is a piezoelectric element. Therefore, the output impedance of the sensor 2 is very high.
[0016] Figure 2 shows how polarization charge is generated in sensor 2. As shown in Figure 2, sensor 2 includes a piezoelectric element 21, a signal electrode 22, and a reference electrode 23.
[0017] The piezoelectric element 21 is made of, for example, a ceramic or polymer-based piezoelectric material. Polymer-based piezoelectric materials include, for example, polyvinylidene fluoride (PVDF) or uniaxially stretched polylactic acid. The piezoelectric constant of uniaxially stretched polylactic acid is among the largest in polymers. Therefore, by using uniaxially stretched polylactic acid as the material for the piezoelectric element 21, the piezoelectric element 21 can detect minute vibrations and static strain with high sensitivity. Furthermore, the piezoelectric constant of polylactic acid does not fluctuate over time, making it extremely stable.
[0018] The piezoelectric element 21 has opposing first main surface MS1 and second main surface MS2. The piezoelectric element 21 becomes polarized by deformation, generating polarization charges on the first main surface MS1 and the second main surface MS2. The amount of polarization charge generated on the first main surface MS1 and the second main surface MS2 depends on the amount of deformation of the piezoelectric element 21.
[0019] The signal electrode 22 is conductive. The material of the signal electrode 22 is, for example, copper. The signal electrode 22 is provided on the first main surface MS1 of the piezoelectric body 21. The signal electrode 22 covers the entire first main surface MS1. The signal electrode 22 functions as a signal electrode for outputting the polarization charge generated by the piezoelectric body 21 as a first signal S1. The first signal S1 changes due to the deformation of the piezoelectric body 21. Note that the signal electrode 22 does not necessarily have to cover the entire first main surface MS1.
[0020] The reference electrode 23 is conductive. The material of the reference electrode 23 is, for example, copper. The reference electrode 23 is provided on the second main surface MS2 of the piezoelectric body 21. The reference electrode 23 covers the entire second main surface MS2. By being connected to the ground potential, the reference electrode 23 functions as a reference electrode and a shielding conductor. Note that the reference electrode 23 does not necessarily have to cover the entire second main surface MS2.
[0021] With the above configuration, the sensor 2 outputs a first signal S1. The first signal S1 is based on the polarization charge generated within the sensor 2. When the sensor 2 detects a human pressing operation, the frequency of the input signal due to the pressing is approximately 0.1 to 10 Hz. Therefore, when the sensor 2 detects a human pressing operation, the frequency of the first signal S1 is also approximately 0.1 to 10 Hz. Note that the applications of the sensor and sensor module according to the present invention are not limited to pressing detection. Furthermore, the sensor according to the present invention is not limited to a piezoelectric element, but may be a sensor having capacitance, etc. When the sensor according to the present invention is a sensor having capacitance, the output impedance of the sensor becomes very high.
[0022] As shown in Figure 1, filter 3 is connected downstream of sensor 2. In this embodiment, filter 3 is a low-pass filter. Filter 3 has a cutoff frequency. The cutoff frequency of filter 3 is higher than the fundamental frequency of the first signal S1. The fundamental frequency of the first signal S1 is the frequency of the lowest frequency component included in the first signal S1. In the case of the sensor module 1 that detects pressure, the cutoff frequency of filter 3 is, for example, 15 Hz. The first signal S1 is input to filter 3. Filter 3 attenuates the frequency components of the first signal S1 that are above the cutoff frequency and outputs them to the condition determination circuit 4 as the second signal S2.
[0023] Furthermore, the filter according to the present invention is not limited to a low-pass filter, but may also be a band-pass filter or the like. Also, the filter according to the present invention may be an analog filter or a digital filter. Moreover, the cutoff frequency of filter 3 is not limited to 15 Hz. For example, in the case of a sensor module 1 that detects pressure, the cutoff frequency of filter 3 may be 20 Hz or less.
[0024] The condition determination circuit 4 is connected after the filter 3. The second signal S2 is input to the condition determination circuit 4. As described above, the second signal S2 is the first signal S1 after the filter 3 has attenuated the frequency components above the cutoff frequency.
[0025] The condition determination circuit 4 is, for example, an MPU (Micro Processing Unit). The condition determination circuit 4 determines whether the second signal S2 satisfies predetermined conditions and outputs a digital signal SD based on the determination result. The predetermined conditions are, for example, that the second signal S2 is above a predetermined threshold for a predetermined period of time or longer. Alternatively, the predetermined conditions may be, for example, that the absolute value of the second signal S2 is above a predetermined threshold for a predetermined period of time or longer, that the second signal S2 is above a predetermined threshold, or that the second signal S2 is below a predetermined threshold.
[0026] Figure 3 shows an example of the digital signal SD of the sensor module 1. The horizontal axis in Figure 3 represents time t. The vertical axis in Figure 3 represents the signal level. As shown in Figure 3, during period T1 when the second signal S2 satisfies predetermined conditions, the digital signal SD includes pulse PU. In this embodiment, during period T2 when the second signal S2 does not satisfy predetermined conditions, the digital signal SD is fixed to Low.
[0027] The pulse PU periodically alternates between High and Low. In this embodiment, the duty cycle of the pulse PU is 50%. That is, the length of the High period of the pulse PU, THi, is the same as the length of the Low period of the pulse PU, TLo. Also, the repetition frequency of the pulse PU is equal to or greater than the cutoff frequency of the filter 3. In the case of the sensor module 1 that detects pressure, the repetition frequency of the pulse PU is, for example, 100 Hz. However, the repetition frequency of the pulse PU is not limited to 100 Hz. If the cutoff frequency of the filter 3 is 15 Hz, the repetition frequency of the pulse PU should be 15 Hz or higher. The condition determination circuit 4 outputs the digital signal SD to the processing circuit 101.
[0028] The processing circuit 101 is connected downstream of the condition determination circuit 4. The processing circuit 101 receives a digital signal SD as input. There is a single wire between the condition determination circuit 4 and the processing circuit 101.
[0029] The processing circuit 101 is, for example, an MPU. Note that the processing circuit 101 may be a different MPU from the condition determination circuit 4, or it may be the same MPU. The processing circuit 101 determines the processing content based on the digital signal SD.
[0030] The processing circuit 101 performs an interrupt when the digital signal SD rises from low to high. As described above, during period T1 when the second signal S2 satisfies predetermined conditions, the digital signal SD includes a pulse PU. During period T2 when the second signal S2 does not satisfy predetermined conditions, the digital signal SD is fixed at low. Therefore, if no interrupt occurs, the second signal S2 does not satisfy predetermined conditions. In this case, the processing circuit 101 determines that the sensor 2 is not being pressed and, for example, does nothing. If an interrupt occurs approximately every 10 msec, the second signal S2 satisfies predetermined conditions. In this case, the processing circuit 101 determines that the sensor 2 is being pressed and controls the circuit in the information processing device using the electronic device 100 to perform processing such as opening the application program displayed on the sensor 2.
[0031] If the electronic device 100 is used as a remote control for operating a television receiver, the processing circuit 101 may, when it determines that the sensor 2 is being pressed, control the circuit within the remote control and perform processing such as sending an instruction to the television receiver to increase the volume of the television receiver.
[0032] Figure 4 shows a comparison between the digital signal SD of a conventional example and the digital signal SD of sensor module 1. In Figure 4, the horizontal axis represents time t. In Figure 4, the vertical axis represents the signal level. The digital signal SD of the conventional example corresponds to the output signal of the signal processing circuit 210 described in Patent Document 1 (Japanese Patent No. 7501963). As shown in Figure 4, the digital signal SD of the conventional example is fixed to high during the period T1 in which the second signal S2 satisfies predetermined conditions.
[0033] Figure 5 shows an example of the second signal S2 in a conventional example. The horizontal axis in Figure 5 represents time t. The vertical axis in Figure 5 represents the output. When the output impedance of sensor 2 is very high, as in sensor 2, a portion of the digital signal SD output by the condition determination circuit 4 may be transmitted to the output of sensor 2 through space, becoming noise. In the conventional example, the frequency of the digital signal SD is close to the value of the first signal S1 output from sensor 2. Because the frequency of the digital signal SD is close to the frequency of the first signal S1, the frequency of the noise originating from the digital signal SD is also close to the frequency of the first signal S1. Therefore, the frequency of the noise originating from the digital signal SD is lower than the cutoff frequency of filter 3, and filter 3 cannot effectively attenuate the noise originating from the digital signal SD that has been mixed into the first signal S1. As a result, the second signal S2 output by filter 3 also contains a lot of noise, as shown in Figure 5. The condition determination circuit 4 determines whether a predetermined condition is met based on the second signal S2. Therefore, if the second signal S2 contains a lot of noise, it will cause a false determination.
[0034] Figure 6 shows an example of the second signal S2 of sensor module 1. The horizontal axis in Figure 6 represents time t. The vertical axis in Figure 6 represents the output. Pressing of sensor 2 began at time TI1 and stopped at time TI2. The noise contained in the second signal S2 of sensor module 1 is mainly not noise originating from the digital signal SD, but rather external noise, thermal noise, flicker noise, and other noises with frequencies lower than the cutoff frequency of filter 3.
[0035] The sensor module 1 can effectively attenuate noise originating from the digital signal SD without significantly attenuating the first signal S1 output from the sensor 2. More specifically, during period T1 in which the second signal S2 satisfies predetermined conditions, the digital signal SD includes a pulse PU that periodically repeats high and low. The repetition frequency of the pulse PU is higher than or equal to the cutoff frequency of the filter 3. Therefore, the frequency of the noise originating from the digital signal SD is also higher than or equal to the cutoff frequency of the filter 3. Because the cutoff frequency of the filter 3 is higher than the fundamental frequency of the first signal S1, the filter 3 can effectively attenuate noise originating from the digital signal SD mixed into the first signal S1 without significantly attenuating the first signal S1. As a result, as shown in Figure 6, the noise contained in the second signal S2 is significantly smaller than the noise contained in the second signal S2 in the conventional example. Therefore, the condition determination circuit 4 can determine with high accuracy whether or not the second signal S2 satisfies predetermined conditions.
[0036] When sensor module 1 is used for pressure detection, the frequency of the input signal due to pressure is approximately 0.1 to 10 Hz. In sensor module 1, sensor 2 has capacitance. In this case, the input impedance of sensor 2 at frequencies of approximately 0.1 to 10 Hz becomes very high. Therefore, noise originating from the digital signal SD is easily mixed into the first signal S1. The cutoff frequency of filter 3 is 20 Hz or less. This allows the cutoff frequency of filter 3 to be set higher than the frequency of the input signal due to pressure. Therefore, even when noise originating from the digital signal SD is easily mixed into the first signal S1, the noise originating from the digital signal SD mixed into the first signal S1 can be effectively attenuated without significantly attenuating the first signal S1. As a result, even when noise originating from the digital signal SD is easily mixed into the first signal S1, as in the case when sensor module 1 is used for pressure detection, the condition determination circuit 4 can determine with high accuracy whether or not the second signal S2 satisfies predetermined conditions.
[0037] [First Modification] Below, a sensor module 1a and an electronic device 100a equipped with the sensor module 1a according to the first modification of the present invention will be described with reference to the drawings. Figure 7 is an example of the digital signal SD of the sensor module 1a. The horizontal axis in Figure 7 is time t. The vertical axis in Figure 7 is the signal level. Figure 8 is the first signal S1 used in the experiment. Figure 9 is an example of the second signal S2 of a conventional example in the experiment. Figure 10 is an example of the second signal S2 of the sensor module 1 in the experiment. Figure 11 is an example of the second signal S2 of the sensor module 1a when the duty cycle of the pulse PU in the experiment is 25%. Figure 12 is an example of the second signal S2 of the sensor module 1a when the duty cycle of the pulse PU in the experiment is 12.5%. The horizontal axis in Figures 8 to 12 is time t, respectively. The vertical axis in Figures 8 to 12 is the output, respectively. Regarding the sensor module 1a and the electronic device 100a, only the parts that differ from the sensor module 1 and the electronic device 100 will be explained, and the rest will be omitted.
[0038] Sensor module 1a differs from sensor module 1 in that the duty cycle of the pulse PU is not 50%, as shown in Figure 7. In this modified example, the duty cycle of the pulse PU is 25%. That is, the length of the high period THi of the pulse PU is shorter than the length of the low period TLo of the pulse PU. Note that the duty cycle of the pulse PU is not limited to 25%; it is sufficient that the length of the high period THi of the pulse PU is shorter than the length of the low period TLo of the pulse PU.
[0039] The inventors of this application conducted an experiment to clarify the effect of the sensor module 1a. First, as shown in Figure 8, the sensor 2 was output with a first signal S1 without being pressed. At this time, the digital signal SD is fixed to low. Therefore, no noise originating from the digital signal SD is generated. The noise mixed into the first signal S1 is not limited to noise originating from the digital signal SD, but also includes external noise, thermal noise, and flicker noise, so the first signal S1 is not constant, but is approximately constant. External noise, thermal noise, and flicker noise contain frequency components lower than the cutoff frequency of the filter 3. Therefore, the second signal S2 also contains external noise, thermal noise, and flicker noise. Hereinafter, this approximately constant first signal S1 will be referred to as the original first signal S1O.
[0040] Next, the average value of the original first signal S1O was used as a threshold, and a predetermined condition was set that the second signal S2 is greater than or equal to the threshold. In the conventional example, the digital signal SD is high when the second signal S2 is greater than or equal to the average value of the original first signal S1O, and low when the second signal S2 is less than the average value of the original first signal S1O. Since the second signal S2 also contains noise such as external noise, thermal noise, and flicker noise, the second signal S2 frequently becomes greater than or equal to the average value of the original first signal S1O, or less than the average value of the original first signal S1O. Along with these changes in the second signal S2, the digital signal SD in the conventional example also frequently becomes high and low. As a result, noise originating from the digital signal SD is generated and mixed into the first signal S1. The frequency of the digital signal SD in the conventional example is close to the frequency of the first signal S1. Therefore, the frequency of the noise originating from the digital signal SD is lower than the cutoff frequency of filter 3, and filter 3 cannot effectively attenuate the noise originating from the digital signal SD that has been mixed into the first signal S1. As a result, as shown in Figure 9, the second signal S2 in the conventional example is greatly affected by the noise originating from the digital signal SD. In this experiment, due to the influence of the noise originating from the digital signal SD, the noise contained in the second signal S2 in the conventional example is greater than the noise contained in the original first signal S1O.
[0041] Next, in the sensor module 1, the second signal S2 was measured in the same manner as in the conventional example. The digital signal SD of the sensor module 1 contains a pulse PU when the second signal S2 is equal to or greater than the average value of the original first signal S1O, and becomes low when the second signal S2 is less than the average value of the original first signal S1O. As a result, noise originating from the digital signal SD is generated and mixed into the first signal S1, but because the repetition frequency of the pulse PU is equal to or greater than the cutoff frequency of the filter 3, the frequency of the noise originating from the digital signal SD is also equal to or greater than the cutoff frequency of the filter 3. Because the cutoff frequency of the filter 3 is higher than the fundamental frequency of the first signal S1, the filter 3 can effectively attenuate the noise originating from the digital signal SD mixed into the first signal S1. As shown in Figure 10, the noise contained in the second signal S2 of the sensor module 1 is significantly smaller than the noise contained in the second signal S2 of the conventional example. As mentioned above, the duty cycle of the pulse PU in the sensor module 1 is 50%.
[0042] Next, the second signal S2 was measured in sensor module 1a. First, the duty cycle of the pulse PU was set to 25%, and then the duty cycle of the pulse PU was set to 12.5%.
[0043] As shown in Figure 11, the noise contained in the second signal S2 of sensor module 1a when the duty cycle of the pulse PU is set to 25% is smaller than the noise contained in the second signal S2 of sensor module 1. As shown in Figure 12, the noise contained in the second signal S2 of sensor module 1a when the duty cycle of the pulse PU is set to 12.5% is smaller than the noise contained in the second signal S2 of sensor module 1a when the duty cycle of the pulse PU is set to 25%. Thus, the lower the duty cycle of the pulse PU (making the length of the high period of the pulse PU THi shorter than the length of the low period of the pulse PU TLo), the more effectively the noise originating from the digital signal SD mixed into the first signal S1 can be attenuated.
[0044] The sensor module 1a also has the same effect as the sensor module 1. Also, in the sensor module 1a, the length THi of the high period of the pulse PU is shorter than the length TLo of the low period of the pulse PU. As a result, the noise derived from the digital signal SD transmitted to the output of the sensor 2 is reduced. Therefore, the noise derived from the digital signal SD can be more effectively attenuated without substantially attenuating the first signal S1 output from the sensor 2.
[0045] [Second modification example] Hereinafter, a sensor module 1b according to a second modification example of the present invention and an electronic device 100b including the sensor module 1b will be described with reference to the drawings. FIG. 13 is an example of the digital signal SD of the sensor module 1b. The horizontal axis in FIG. 13 is the time t. The vertical axis in FIG. 13 is the signal level. Note that only the parts different from the sensor module 1 and the electronic device 100 will be described for the sensor module 1b and the electronic device 100b, respectively, and the description thereof will be omitted later.
[0046] As shown in FIG. 13, the sensor module 1b is different from the sensor module 1 in that the digital signal SD is fixed to high during the period T2 in which the second signal S2 does not satisfy the predetermined condition.
[0047] The sensor module 1b also has the same effect as the sensor module 1.
[0048] [Third modification example] Hereinafter, a sensor module 1c according to a third modification example of the present invention and an electronic device 100c including the sensor module 1c will be described with reference to the drawings. FIG. 14 is an example of the digital signal SD of the sensor module 1c. The horizontal axis in FIG. 14 is the time t. The vertical axis in FIG. 14 is the signal level. Note that only the parts different from the sensor module 1b and the electronic device 100b will be described for the sensor module 1c and the electronic device 100c, respectively, and the description thereof will be omitted later.
[0049] Sensor module 1c differs from sensor module 1 in that the duty cycle of the pulse PU is not 50%, as shown in Figure 14. In this modified example, the length of the low period of the pulse PU, TLo, is shorter than the length of the low period of the pulse PU, THi.
[0050] The sensor module 1c also produces the same effect as the sensor module 1a.
[0051] [Second Embodiment] Below, a sensor module 1d and an electronic device 100d equipped with the sensor module 1d according to a second embodiment of the present invention will be described with reference to the drawings. Figure 15 is a block diagram of the electronic device 100d. Figure 16 is an example of a charge-voltage conversion circuit 5a. Figures 17 to 19 are examples of the digital signal SD of the sensor module 1d. The horizontal axis in Figures 17 to 19 represents time t. The vertical axis in Figures 17 to 19 represents the signal level.
[0052] As shown in Figure 15, the sensor module 1d includes sensors 2a and 2b, charge-voltage conversion circuits 5a and 5b, amplification circuits 6a and 6b, switches 71 and 72, A / D converter 8, filters 3a and 3b, and condition determination circuit 4.
[0053] Since sensors 2a and 2b have the same structure as sensor 2, a detailed explanation is omitted. Sensor 2a outputs the first signal S1a. Sensor 2b outputs the first signal S1b.
[0054] As shown in Figure 16, the charge-to-voltage conversion circuit 5a includes a resistor R, a capacitor C, and an operational amplifier OP. The parallel circuit of the resistor R and the capacitor C is provided between the non-inverting input terminal of the operational amplifier OP and the reference voltage line. The first signal S1a is input to the non-inverting input terminal of the operational amplifier OP. The reference voltage VRef is supplied to the reference voltage line. A positive voltage Vpo is supplied to the positive power supply terminal of the operational amplifier OP. The negative power supply terminal of the operational amplifier OP is connected to ground. The inverting input terminal of the operational amplifier OP is connected to the output terminal of the operational amplifier OP. The charge-to-voltage conversion circuit 5a takes the first signal S1a as its input signal and the voltage Vouta at the output terminal of the operational amplifier OP as its output signal.
[0055] The charge-voltage conversion circuit 5a shown in Figure 16 reduces the impedance of the sensor 2a, which has a very high output impedance, to the resistance value of resistor R. On the other hand, the voltage Vouta, which is the output signal of the charge-voltage conversion circuit 5a, is proportional to the resistance value of resistor R. Therefore, there is a trade-off relationship between the output impedance of the circuit consisting of sensor 2a and charge-voltage conversion circuit 5a and the voltage Vouta. The resistance value of resistor R is, for example, 10 MΩ.
[0056] As shown in Figure 15, the voltage Vouta is input to the amplification circuit 6a. The amplification circuit 6a amplifies the voltage Vouta and outputs the amplified signal ASa.
[0057] Since the charge-voltage conversion circuit 5b has the same structure as the charge-voltage conversion circuit 5a, a detailed explanation is omitted. The charge-voltage conversion circuit 5b is connected downstream of the sensor 2b. The input signal to the charge-voltage conversion circuit 5b is the first signal S1b, and the output signal to the charge-voltage conversion circuit 5b is the voltage Voutb. The voltage Voutb is input to the amplification circuit 6b. The amplification circuit 6b amplifies the voltage Voutb and outputs the amplified signal ASb.
[0058] Switch 71 is an SPDT (Single Pole Double Throw). Switch 71 is connected after the amplification circuits 6a and 6b. Switch 71 includes input contacts Ia and Ib and an output contact. The amplification signal ASa is input to input contact Ia. The amplification signal ASb is input to input contact Ib. Switch 71 outputs either the amplification signal ASa or the amplification signal ASb from its output contact.
[0059] The A / D converter 8 converts an analog signal into a digital signal. The A / D converter 8 is connected downstream of the switch 71. The A / D converter 8 receives either an amplified signal ASa or an amplified signal ASb as input. The A / D converter 8 converts the input amplified signal ASa or amplified signal ASb into a digital signal and outputs it.
[0060] Switch 72, like switch 71, is an SPDT. Switch 72 is connected downstream of the A / D converter 8. Switch 72 includes input contacts and output contacts Oa and Ob. The amplified signal ASa or amplified signal ASb, which has been converted from the input contacts to a digital signal, is input to switch 72.
[0061] The A / D converter 8 performs sampling at regular intervals. For example, the A / D converter 8 performs sampling every 1 msec. Switches 71 and 72 are switched alternately with each sampling by the A / D converter 8. When the output contact of switch 71 is connected to input contact Ia, the input contact of switch 72 is connected to output contact Oa. When the output contact of switch 71 is connected to input contact Ib, the input contact of switch 72 is connected to output contact Ob. Therefore, the amplified signal ASa, converted to a digital signal, is supplied to output contact Oa every 2 msec. Also, the amplified signal ASb, converted to a digital signal, is supplied to output contact Ob every 2 msec. That is, switch 72 outputs the amplified signal ASa, converted to a digital signal, from output contact Oa. Switch 72 outputs the amplified signal ASb, converted to a digital signal, from output contact Ob.
[0062] Filters 3a and 3b have the same function as filter 3, so a detailed explanation is omitted. However, filters 3a and 3b are digital filters. Filters 3a and 3b are connected after switch 72. The input signal to filter 3a is the amplified signal ASa converted to a digital signal, and the output signal of filter 3a is the second signal S2a. The input signal to filter 3b is the amplified signal ASb converted to a digital signal, and the output signal of filter 3b is the second signal S2b.
[0063] The condition determination circuit 4 is connected downstream of filters 3a and 3b. The second signals S2a and S2b are input to the condition determination circuit 4. The condition determination circuit 4 determines whether the second signals S2a and S2b satisfy predetermined conditions and outputs a digital signal SD based on the determination result. In this embodiment, the predetermined conditions include a first condition and a second condition. The first condition is, for example, that the second signal S2a is above a predetermined threshold for a predetermined period of time or longer. The second condition is, for example, that the second signal S2b is above a predetermined threshold for a predetermined period of time or longer.
[0064] As shown in Figure 17, during period T11 when the second signal S2a satisfies the first condition, the digital signal SD includes the first pulse PU1. More specifically, in this embodiment, period T11 is the period when the second signal S2a satisfies the first condition and the second signal S2b does not satisfy the second condition. The first pulse PU1 periodically alternates between high and low. In this embodiment, the duty cycle of the first pulse PU1 is 50%. That is, the length of the high period THi1 of the first pulse PU1 is the same as the length of the low period TLo1 of the first pulse PU1. Also, the repetition frequency of the first pulse PU1 is greater than or equal to the cutoff frequency of the filter 3a. The repetition frequency of the first pulse PU1 is, for example, 100 Hz. Furthermore, during period T2 when the second signal S2a does not satisfy the first condition and the second signal S2b also does not satisfy the second condition, the digital signal SD is fixed to low.
[0065] As shown in Figure 18, during the period T12 in which the second signal S2b satisfies the second condition, the digital signal SD includes the second pulse PU2. More specifically, in this embodiment, the period T12 is the period in which the second signal S2a does not satisfy the first condition and the second signal S2b satisfies the second condition. The second pulse PU2 periodically alternates between high and low. In this embodiment, the duty cycle of the second pulse PU2 is 50%. That is, the length of the high period THi2 of the second pulse PU2 is the same as the length of the low period TLo2 of the second pulse PU2. Also, the repetition frequency of the second pulse PU2 is greater than or equal to the cutoff frequency of the filter 3b. The repetition frequency of the second pulse PU2 is, for example, 200 Hz.
[0066] As shown in Figure 19, during the period T13 in which the second signal S2a satisfies the first condition and the second signal S2b satisfies the second condition, the digital signal SD includes the third pulse PU3. The third pulse PU3 periodically alternates between high and low. In this embodiment, the duty cycle of the third pulse PU3 is 50%. That is, the length of the high period THi3 of the third pulse PU3 is the same as the length of the low period TLo3 of the third pulse PU3. Also, the repetition frequency of the third pulse PU3 is greater than or equal to the cutoff frequencies of filters 3a and 3b. The repetition frequency of the third pulse PU3 is, for example, 400 Hz.
[0067] The repetition frequencies of the first pulse PU1, the second pulse PU2, and the third pulse PU3 are not limited to the values described above, but may be different from each other. That is, the repetition frequency of the first pulse PU1 may be different from the repetition frequency of the second pulse PU2. Also, the repetition frequency of the third pulse PU3 may be different from both the repetition frequency of the first pulse PU1 and the repetition frequency of the second pulse PU2.
[0068] The processing circuit 101 is connected downstream of the condition determination circuit 4. A digital signal SD is input to the processing circuit 101. In this embodiment as well, there is only one wire between the condition determination circuit 4 and the processing circuit 101. The processing circuit 101 determines the processing content based on the digital signal SD.
[0069] In this embodiment as well, the processing circuit 101 performs an interrupt when the digital signal SD rises from low to high. If no interrupt occurs, the second signal S2a does not satisfy the first condition, and the second signal S2b also does not satisfy the second condition. In this case, the processing circuit 101 determines that neither sensor 2a nor 2b is being pressed, and for example, does not perform any processing.
[0070] If an interrupt occurs approximately every 10 msec, the second signal S2a satisfies the first condition, and the second signal S2b does not satisfy the second condition. In this case, the processing circuit 101 determines that the sensor 2a is being pressed and controls the circuit in the information processing device using the electronic device 100d to perform processing such as opening the application program displayed on the sensor 2a.
[0071] If an interrupt occurs approximately every 5 msec, the second signal S2a does not satisfy the first condition, and the second signal S2b satisfies the second condition. In this case, the processing circuit 101 determines that the sensor 2b is being pressed and controls the circuit in the information processing device using the electronic device 100d to perform processing such as opening the application program displayed on the sensor 2b.
[0072] If an interrupt occurs approximately every 2.5 msec, then the second signal S2a satisfies the first condition, and the second signal S2b also satisfies the second condition. In this case, the processing circuit 101 determines that both sensors 2a and 2b are being pressed, and controls the circuit in the information processing device using the electronic device 100d to perform processing such as pinching in or pinching out the display on sensors 2a and 2b.
[0073] The sensor module 1d achieves the same effect as the sensor module 1. Furthermore, in the sensor module 1d, the repetition frequency of the first pulse PU1 is different from the repetition frequency of the second pulse PU2. Therefore, the processing circuit 101 can determine whether or not one of the two conditions is met based on a single digital signal SD. In other words, the condition determination circuit 4 can notify the processing circuit 101 whether or not one of the two conditions is met based on a single digital signal SD. Therefore, only one wire is needed between the condition determination circuit 4 and the processing circuit 101. As a result, the sensor module 1d can contribute to cost reduction through reduced wiring, increased flexibility in wiring layout, and miniaturization of the electronic device 100d.
[0074] Furthermore, in the sensor module 1d, the repetition frequency of the third pulse PU3 is different from both the repetition frequency of the first pulse PU1 and the repetition frequency of the second pulse PU2. Therefore, the processing circuit 101 can determine, based on a single digital signal SD, whether one of the two conditions is met, or whether both of the two conditions are met. In other words, the condition determination circuit 4 can notify the processing circuit 101, based on a single digital signal SD, whether one of the two conditions is met, or whether both of the two conditions are met. Therefore, only one wire is needed between the condition determination circuit 4 and the processing circuit 101. As a result, the sensor module 1d can contribute to cost reduction through reduced wiring, improved flexibility in wiring layout, and miniaturization of the electronic device 100d.
[0075] The specified conditions may include three or more conditions. In this case, the digital signal SD includes pulses that periodically alternate between high and low during the period in which the second signal S2 satisfies each of the conditions, and the repetition frequencies of each pulse are greater than or equal to the filter's cutoff frequency and are different from each other.
[0076] As mentioned above, there is a trade-off relationship between the output impedance of the circuit consisting of sensor 2a and charge-voltage conversion circuit 5a and the voltage Vouta, which is the output signal of the charge-voltage conversion circuit 5a. Therefore, lowering the resistance value of resistor R in the charge-voltage conversion circuit 5a lowers the output impedance of the circuit consisting of sensor 2a and charge-voltage conversion circuit 5a. This makes it less likely for noise originating from the digital signal SD to be mixed into the voltage Vouta, but the voltage Vouta itself also becomes lower. Furthermore, because the voltage Vouta itself becomes lower, it becomes more susceptible to noise other than noise originating from the digital signal SD (external noise, thermal noise, flicker noise, etc.).
[0077] Furthermore, by increasing the distance between the condition determination circuit 4 and the charge-voltage conversion circuits 5a and 5b, noise originating from the digital signal SD can be suppressed. However, this would lead to an increase in the size of the sensor module 1d and the electronic device 100d. Also, if the operational amplifier OP for the charge-voltage conversion circuit 5a, the operational amplifier OP for the charge-voltage conversion circuit 5b, the amplification circuits 6a and 6b, the switches 71 and 72, the A / D converter 8, the filters 3a and 3b, and the condition determination circuit 4 are implemented in a single IC (Integrated Circuit), the distance between the condition determination circuit 4 and the charge-voltage conversion circuits 5a and 5b cannot be increased. Thus, in the conventional example, it is difficult to suppress noise originating from the digital signal SD mixed into the first signal S1.
[0078] Furthermore, during the period T2 when the second signal S2a does not satisfy the first condition and the second signal S2b does not satisfy the second condition, the digital signal SD may be fixed to high.
[0079] [Fourth Modification] Below, a sensor module 1e and an electronic device 100e equipped with the sensor module 1e according to the fourth modification of the present invention will be described with reference to the drawings. Figures 20 to 22 are examples of the digital signal SD of the sensor module 1e. The horizontal axis in Figures 20 to 22 represents time t. The vertical axis in Figures 20 to 22 represents the signal level. Note that only the parts of the sensor module 1e and the electronic device 100e that differ from the sensor module 1d and the electronic device 100d will be described, and the rest will be omitted.
[0080] In the sensor module 1e, the repetition frequencies of the first pulse PU1, the second pulse PU2, and the third pulse PU3 are the same value, for example, 100 Hz.
[0081] As shown in Figure 20, the duty cycle of the first pulse PU1 is 50%. As shown in Figure 21, the duty cycle of the second pulse PU2 is 25%. As shown in Figure 22, the duty cycle of the third pulse PU3 is 12.5%. That is, the length of the high period TH1 of the first pulse PU1 is longer than the length of the high period TH2 of the second pulse PU2. The length of the high period TH2 of the second pulse PU2 is longer than the length of the high period TH3 of the third pulse PU3.
[0082] In this modified example, the processing circuit 101 performs interrupt processing at the timing when the digital signal SD rises from low to high, and at the timing when the digital signal SD falls from high to low. If no interrupt processing occurs, the second signal S2a does not satisfy the first condition, and the second signal S2b also does not satisfy the second condition. In this case, the processing circuit 101 determines that neither sensor 2a nor 2b is being pressed, and for example, does nothing.
[0083] If an interrupt occurs approximately every 5 msec, the second signal S2a satisfies the first condition, and the second signal S2b does not satisfy the second condition. In this case, the processing circuit 101 determines that the sensor 2a is being pressed and controls the circuit in the information processing device using the electronic device 100e to perform processing such as opening the application program displayed on the sensor 2a.
[0084] If interrupt processing occurs alternately at intervals of approximately 2.5 msec and approximately 7.5 msec, it means that the second signal S2a does not satisfy the first condition, and the second signal S2b satisfies the second condition. In this case, the processing circuit 101 determines that the sensor 2b is being pressed and controls the circuit in the information processing device using the electronic device 100e to perform processing such as opening the application program displayed on the sensor 2b.
[0085] If interrupt processing occurs alternately at intervals of approximately 1.25 msec and approximately 8.75 msec, the second signal S2a satisfies the first condition, and the second signal S2b also satisfies the second condition. In this case, the processing circuit 101 determines that both sensors 2a and 2b are being pressed, and controls the circuit in the information processing device using the electronic device 100e to perform processing such as pinching in or pinching out the display on sensors 2a and 2b.
[0086] For the sake of simplicity, the repetition frequencies of the first pulse PU1, the second pulse PU2, and the third pulse PU3 are assumed to be the same. However, the repetition frequencies of the first pulse PU1, the second pulse PU2, and the third pulse PU3 may be different. In this case, the length of the high period TH1 of the first pulse PU1 should be different from the length of the high period TH2 of the second pulse PU2. Similarly, the length of the high period TH3 of the third pulse PU3 should be different from both the length of the high period TH1 of the first pulse PU1 and the length of the high period TH2 of the second pulse PU2.
[0087] The sensor module 1e also produces the same effect as the sensor module 1d.
[0088] Furthermore, if the digital signal SD is fixed to high during a period T2 in which the second signal S2a does not satisfy the first condition and the second signal S2b does not satisfy the second condition, then it is sufficient that the length of the low period of the first pulse PU1, TL01, is different from the length of the low period of the second pulse PU2, TL02. Also, the length of the low period of the third pulse PU3, TL03, is different from both the length of the low period of the first pulse PU1, TL01, and the length of the low period of the second pulse PU2, TL02.
[0089] [Other Embodiments] The electronic device according to the present invention is not limited to the sensor modules 1, 1a to 1e, but can be modified within the scope of its gist. Furthermore, the structures of the electronic devices 100, 100a to 100e may be combined in any way.
[0090] 1, 1a-1e: Sensor module 2, 2a, 2b: Sensor 3, 3a, 3b: Filter 4: Condition judgment circuit 5a, 5b: Charge-voltage conversion circuit 6a, 6b: Amplifier circuit 8: A / D converter 21: Piezoelectric element 22: Signal electrode 23: Reference electrode 71, 72: Switch 100, 100a-100e: Electronic equipment 101: Processing circuit ASa, ASb: Amplified signal C: Capacitor Ia, Ib: Input contact MS1: First main surface MS2: Second main surface OP: Operational amplifier Oa, Ob: Output contact PU: Pulse PU1: First pulse PU2: Second pulse PU3: Third pulse R: Resistor S1, S1O, S1a, S1b: First signal S2, S2a, S2b: Second signal SD: Digital signal T1, T11, T12, T13, T2: Period VRef: Reference voltage Vpo, Vouta, Voutb: Voltage
Claims
1. A sensor module comprising: a sensor that outputs a first signal; a filter connected downstream of the sensor that attenuates frequency components of the first signal that are higher than or equal to a cutoff frequency higher than the fundamental frequency of the first signal; and a condition determination circuit connected downstream of the filter that receives a second signal, which is the first signal after the frequency components have been attenuated by the filter, wherein the condition determination circuit determines whether or not the second signal satisfies a predetermined condition and outputs a digital signal based on the determination result, the digital signal includes a pulse that periodically repeats high and low during the period when the second signal satisfies the predetermined condition, and is fixed to low during the period when the second signal does not satisfy the predetermined condition, and the repetition frequency of the pulse is higher than or equal to the cutoff frequency.
2. The sensor module according to claim 1, wherein the length of the high period of the pulse is shorter than the length of the low period of the pulse.
3. A sensor module comprising: a sensor that outputs a first signal; a filter connected downstream of the sensor that attenuates frequency components of the first signal that are higher than or equal to a cutoff frequency higher than the fundamental frequency of the first signal; and a condition determination circuit connected downstream of the filter that receives a second signal, which is the first signal after the frequency components have been attenuated by the filter, wherein the condition determination circuit determines whether or not the second signal satisfies a predetermined condition and outputs a digital signal based on the determination result, the digital signal includes a pulse that periodically alternates between high and low during the period when the second signal satisfies the predetermined condition, and is fixed to high during the period when the second signal does not satisfy the predetermined condition, and the repetition frequency of the pulse is higher than or equal to the cutoff frequency.
4. The sensor module according to claim 3, wherein the length of the low period of the pulse is shorter than the length of the high period of the pulse.
5. The sensor module according to any one of claims 1 to 4, wherein the predetermined conditions include a first condition and a second condition, the digital signal includes a first pulse that periodically alternates between high and low during the period when the second signal satisfies the first condition, the digital signal includes a second pulse that periodically alternates between high and low during the period when the second signal satisfies the second condition, the repetition frequency of the first pulse and the repetition frequency of the second pulse are each greater than or equal to the cutoff frequency, and the repetition frequency of the first pulse is different from the repetition frequency of the second pulse.
6. The sensor module according to claim 5, wherein the digital signal includes a third pulse that periodically alternates between high and low during the period in which the second signal satisfies both the first and second conditions, the repetition frequency of the third pulse being greater than or equal to the cutoff frequency and different from both the repetition frequency of the first pulse and the repetition frequency of the second pulse.
7. The sensor module according to claim 1 or claim 2, wherein the predetermined conditions include a first condition and a second condition, the digital signal includes a first pulse that periodically alternates between high and low during the period when the second signal satisfies the first condition, the digital signal includes a second pulse that periodically alternates between high and low during the period when the second signal satisfies the second condition, the repetition frequency of the first pulse and the repetition frequency of the second pulse are each greater than or equal to the cutoff frequency, and the length of the high period of the first pulse is different from the length of the high period of the second pulse.
8. The sensor module according to claim 7, wherein the digital signal includes a third pulse that periodically alternates between high and low during the period in which the second signal satisfies both the first and second conditions, the repetition frequency of the third pulse being greater than or equal to the cutoff frequency, and the length of the high period of the third pulse being different from the length of the high period of the first pulse and the length of the high period of the second pulse.
9. The sensor module according to claim 3 or 4, wherein the predetermined conditions include a first condition and a second condition, the digital signal includes a first pulse that periodically alternates between high and low during the period when the second signal satisfies the first condition, the digital signal includes a second pulse that periodically alternates between high and low during the period when the second signal satisfies the second condition, the repetition frequency of the first pulse and the repetition frequency of the second pulse are each equal to or greater than the cutoff frequency, and the length of the low period of the first pulse is different from the length of the low period of the second pulse.
10. The sensor module according to claim 9, wherein the digital signal includes a third pulse that periodically alternates between high and low during the period in which the second signal satisfies both the first and second conditions, the repetition frequency of the third pulse being greater than or equal to the cutoff frequency, and the length of the low period of the third pulse being different from the length of the low period of the first pulse and the length of the low period of the second pulse.
11. The sensor module according to any one of claims 1 to 10, wherein the sensor has capacitance and the cutoff frequency is 20 Hz or less.
12. An electronic device comprising: a sensor module according to any one of claims 1 to 11; and a processing circuit connected downstream of the condition determination circuit and to which the digital signal is input, wherein the processing circuit determines the processing content based on the digital signal.