Electronic device, method, and non-transitory computer-readable storage medium for restoring state of firmware program

Abstract

This electronic device may comprise: a main circuit board; an integrated circuit mounted on the main circuit board; at least one first processor; a second processor; a first non-volatile memory; a second non-volatile memory; and a control circuit. The at least one first processor may be configured to: execute a first firmware program on the basis of the start of booting-up of the electronic device; identify, by using the first firmware program, the state of a second firmware program executed by the second processor; and on the basis of the state of the second firmware program being identified as an abnormal state, transmit a command to the control circuit. The control circuit may be configured to: on the basis of the command, acquire, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program was identified as a normal state; and replace at least a part of the second firmware program stored in the first non-volatile memory with the backup version.

Description

Electronic device, method, and non-transient computer-readable storage medium for restoring the state of a firmware program

[0001] The present disclosure relates to an electronic device, a method, and a non-transient computer-readable storage medium for restoring the state of a firmware program.

[0002] The electronic device may store in memory a first firmware program file for performing the boot-up of the electronic device and a second firmware program file related to the security functions of the electronic device. The second firmware program may be used to assist the first firmware program. The second firmware program may be used to manage a processor used to execute the first firmware. The electronic device may execute an operating system based on the execution of the first firmware program and the second firmware program.

[0003] The above information may be provided as background information for the purpose of aiding understanding of the present disclosure. No determination or claim is made as to whether any of the above contents can be applied as prior art related to the present disclosure.

[0004] The aspects of the present disclosure are to solve at least the problems and / or disadvantages mentioned above and to provide at least the advantages described below. Accordingly, the aspects of the present disclosure provide an electronic device, a method, and a non-transient computer-readable storage medium for restoring the state of a firmware program.

[0005] Additional aspects will be presented in part in the following description, and in part may become apparent from the description or be learned by practicing the presented embodiments.

[0006] An electronic device is described. The electronic device may include a main circuit board. The electronic device may include an integrated circuit disposed on the main circuit board. The integrated circuit may include at least one first processor and a second processor. The electronic device may include a first non-volatile memory mounted on the main circuit board and comprising one or more storage media. The one or more storage media may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The electronic device may include a second non-volatile memory mounted on the main circuit board and comprising one or more storage media. The electronic device may include a control circuit mounted on the main circuit board and electrically connected to the at least one first processor, the first non-volatile memory, and the second non-volatile memory. The at least one first processor may be configured to execute the first firmware program based on the start of the boot-up of the electronic device. The at least one first processor may be configured to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program. The at least one first processor may be configured to transmit a command to the control circuit based on the state of the second firmware program identified as abnormal.The control circuit may be configured to obtain, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as a normal state based on the command received from the at least one first processor. The control circuit may be configured to replace at least a portion of the second firmware program stored in the first non-volatile memory with the backup version.

[0007] An electronic device is described. The electronic device may include a main circuit board. The electronic device may include an integrated circuit disposed on the main circuit board. The integrated circuit may include at least one first processor and a second processor. The electronic device may include a first non-volatile memory mounted on the main circuit board and comprising one or more storage media. The one or more storage media may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The electronic device may include a second non-volatile memory mounted on the main circuit board and comprising one or more storage media. The electronic device may include a control circuit mounted on the main circuit board and electrically connected to the at least one first processor, the first non-volatile memory, and the second non-volatile memory. The at least one first processor may be configured to execute the first firmware program based on the start of the boot-up of the electronic device. The at least one first processor may be configured to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program. The at least one first processor may be configured to transmit a command to the control circuit based on the state of the second firmware program identified as a normal state.The control circuit may be configured to obtain, from the first non-volatile memory, a backup version of the second firmware program identified as being in the normal state based on the command received from the at least one first processor. The control circuit may be configured to store, in the second non-volatile memory, the backup version to be used to restore the state of the second firmware program identified as being in the abnormal state to the normal state.

[0008] An electronic device is described. The electronic device may include a main circuit board. The electronic device may include an integrated circuit disposed on the main circuit board. The integrated circuit may include at least one first processor and a second processor. The electronic device may include a first non-volatile memory mounted on the main circuit board and comprising one or more storage media. The one or more storage media may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The electronic device may include a second non-volatile memory mounted on the main circuit board and comprising one or more storage media. The electronic device may include a control circuit mounted on the main circuit board and electrically connected to the at least one first processor, the first non-volatile memory, and the second non-volatile memory. The first firmware program may include instructions that cause the electronic device to execute the first firmware program based on the start of the boot-up of the electronic device. The first firmware program may include instructions that cause the electronic device to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program. The first firmware program may include instructions that cause the electronic device to transmit a command to the control circuit based on the state of the second firmware program identified as abnormal.The control circuit may be configured to obtain, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as a normal state based on the command received from the at least one first processor. The control circuit may be configured to replace at least a portion of the second firmware program stored in the first non-volatile memory with the backup version.

[0009] A method is provided. The method may be executed in an electronic device comprising a main circuit board, an integrated circuit mounted on the main circuit board, a first non-volatile memory mounted on the main circuit board and comprising one or more storage media, a second non-volatile memory mounted on the main circuit board and comprising one or more storage media, and a control circuit mounted on the main board and electrically connected to at least one first processor, the first non-volatile memory, and the second non-volatile memory. The integrated circuit may include at least one first processor and a second processor. The one or more storage media included in the first non-volatile memory may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of a security function according to a command of the at least one first processor. The method may include an operation of executing the first firmware program based on the start of the boot-up of the electronic device. The above method may include an operation of identifying the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program. The above method may include an operation of transmitting a command to the control circuit based on the state of the second firmware program identified as abnormal. The control circuit may be configured to obtain a backup version of the second firmware program that was backed up from the second non-volatile memory when the state of the second firmware program is identified as normal based on the command received from the at least one first processor.The control circuit above may be configured to replace at least a portion of the second firmware program stored in the first non-volatile memory with the backup version.

[0010] A non-transient computer-readable storage medium is provided. The non-transient computer-readable storage medium may store one or more programs. The one or more programs may be executed by an electronic device having a main circuit board, an integrated circuit mounted on the main circuit board, a first non-volatile memory mounted on the main circuit board and comprising one or more storage media, a second non-volatile memory mounted on the main circuit board and comprising one or more storage media, and a control circuit mounted on the main board and electrically connected to at least one first processor, the first non-volatile memory, and the second non-volatile memory. The integrated circuit may include at least one first processor and a second processor. The one or more storage media contained in the first non-volatile memory may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of a security function according to a command of the at least one first processor. The above one or more programs may include instructions that cause the electronic device to execute the first firmware program based on the start of the boot-up of the electronic device when executed by the electronic device. The above one or more programs may include instructions that cause the electronic device to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program when executed by the electronic device.The above one or more programs may include instructions that cause the electronic device to transmit a command to the control circuit based on the state of the second firmware program identified as abnormal when executed by the electronic device. The control circuit may be configured to obtain, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as normal based on the command received from the at least one first processor. The control circuit may be configured to replace at least a portion of the second firmware program stored in the first non-volatile memory with the backup version.

[0011] Other aspects, benefits, and important features of this disclosure will become apparent to those skilled in the art from the following detailed description disclosing various embodiments of this disclosure together with the accompanying drawings.

[0012] The above and other aspects, features, and advantages of specific embodiments of this disclosure will become more apparent through the following description together with the accompanying drawings.

[0013] FIG. 1 illustrates an electronic device including a memory for storing firmware program files according to an embodiment of the present disclosure.

[0014] FIG. 2 is a simplified block diagram of an electronic device according to an embodiment of the present disclosure.

[0015] FIG. 3 illustrates at least one first processor, a control circuit, a first memory, and operations executed within a second memory to store data regarding a backup version in a second memory according to an embodiment of the present disclosure.

[0016] FIG. 4 illustrates the operation of an electronic device that stores first data in a second memory according to an embodiment of the present disclosure.

[0017] FIG. 5 illustrates at least one first processor, a control circuit, and operations executed in a second memory to store first data in a second memory according to an embodiment of the present disclosure.

[0018] FIG. 6 illustrates operations executed within at least one first processor, a control circuit, a first memory, and a second memory to restore the state of a second firmware program according to an embodiment of the present disclosure.

[0019] FIG. 7 illustrates the operation of an electronic device that replaces fourth data with third data according to an embodiment of the present disclosure.

[0020] FIG. 8 illustrates operations executed in at least one first processor, control circuit, and second memory to replace fourth data with third data according to an embodiment of the present disclosure.

[0021] FIG. 9 is a block diagram of an electronic device in a network environment according to various embodiments.

[0022] It should be noted that the same reference numbers are used throughout the drawing to depict identical or similar elements, features, and structures.

[0023] The following description is provided to facilitate a comprehensive understanding of the various embodiments of the present disclosure as defined by the claims and their equivalents, with reference to the accompanying drawings. While this description includes various specific details to aid understanding, they are to be considered merely illustrative. Accordingly, those skilled in the art will recognize that various changes and modifications to the various embodiments of this specification are possible without departing from the scope and spirit of the present disclosure. Additionally, descriptions of well-known functions and configurations may be omitted for clarity and brevity.

[0024] The terms and words used in the following description and claims are not limited to their bibliographic meanings and are used merely to enable the inventor to clearly and consistently understand the contents of the present disclosure. Accordingly, it will be apparent to those skilled in the art that the following description of various embodiments of the present disclosure is provided only for illustrative purposes and is not intended to limit the present disclosure as defined by the appended claims and their equivalents.

[0025] Singular words should be understood to include the plural form unless the context clearly indicates otherwise. Thus, for example, a reference to "compositional surface" includes a reference to one or more of these surfaces.

[0026] It must be clear that the blocks and combinations of each flowchart can be executed by one or more computer programs containing instructions. The entire set of one or more computer programs may be stored in a single memory device, or the one or more computer programs may be divided into several parts and stored in several memory devices.

[0027] The functions or operations described herein may be processed by a single processor or a combination of processors. A single processor or a combination of processors is a circuit that performs processing and includes circuits such as an application processor (AP, e.g., a central processing unit (CPU)), a communication processor (CP, e.g., a modem), a graphics processing unit (GPU), a neural processing unit (NPU) (e.g., an artificial intelligence (AI) chip), a wireless fidelity (Wi-Fi) chip, a Bluetooth chip, a global positioning system (GPS) chip, a near field communication (NFC) chip, a connectivity chip, a sensor controller, a touch controller, a fingerprint sensor controller, a display driver integrated circuit (IC), an audio codec chip, a universal serial bus (USB) controller, a camera controller, an image processing IC, a microprocessor unit (MPU), a system on chip (SoC), and the like.

[0028] FIG. 1 illustrates an electronic device including a memory for storing firmware program files according to an embodiment of the present disclosure.

[0029] Referring to FIG. 1, the electronic device (100) may include an integrated circuit (105) and a memory (130). The integrated circuit (105) may include a first processor (110) and a second processor (120). For example, the memory (130) may store or include a first firmware program file (132) and a second firmware program file (134). The first firmware program file (132) may be described as a file for executing a first firmware program to perform a boot-up of the electronic device (100). The second firmware program file (134) may be described as a file for executing a second firmware program to provide at least some of the security functions of the electronic device (100). For example, the first firmware program file (132) may be referred to as the first firmware program. For example, the second firmware program file (134) may be referred to as the second firmware program.

[0030] Referring to FIG. 1, the state in which the first firmware program file (132) and the second firmware program file (134) are stored in memory (130) is illustrated, but the embodiments of the present disclosure are not limited thereto. For example, the first firmware program file (132) and the second firmware program file (134) may each be stored in different memories.

[0031] The electronic device (100) may be used to execute at least one of a firmware program and a software application. The first firmware program may be executed through the first processor (110). The second firmware program may be executed through the second processor (120). The first processor (110) may be electrically connected to the second processor (120). For example, when the first processor (110) performs a boot-up of the electronic device (100), it may use the second processor (120) to identify the state of the second firmware program. For example, the first processor (110) may restore the state of the second firmware program to a normal state based on a determination that the state of the second firmware program is abnormal. For example, the first processor (110) may modify the second firmware program file (134) stored in memory (130) using data regarding a backup version of the second firmware program file (134) that was previously stored. For example, the data for the backup version may be described as data regarding the initial state of the second firmware program file (134). For example, the data regarding the initial state of the second firmware program file (134) may be stored in a first memory (e.g., the first memory (230) of FIG. 2) or in a third memory different from the first memory. For example, when the first processor (110) executes the first firmware program, it may change or restore the state of the second firmware program file (134) to the state released by the supplier based on the state of the second firmware program identified as abnormal. For example, restoring the state of the second firmware program file (134) to the state released by the supplier may be referred to as a code and / or data resiliency function.

[0032] Code and / or data resilience functions may be provided for at least one of the boot partition area and the ME (management engine) data partition. For example, the part of the second firmware program to which code and / or data resilience functions are provided may be modified by the provider of the second firmware program. For example, it may be required to restore the state of the second firmware program not only to the first part of the second firmware program to which code and / or data resilience functions are provided, but also to the second part of the second firmware program to which code and / or data resilience functions are not provided.

[0033] When the first processor (110) restores the state of the second firmware program, the power state of the first processor may be required to remain in a power-on state. For example, the power-on state may be described as a state in which voltage is applied to the first processor (110). Since power is consumed to change or replace the second firmware program file (134) stored in the memory (130) of the first processor (110), it may be required that voltage be applied to the first processor (110). For example, if voltage is not applied to the first processor (110), the state of the second firmware program identified as abnormal may not be restored.

[0034] When the first processor (110) restores the state of the second firmware program, it may restore the state of the second firmware program to its initial state. For example, the initial state may be described as the state provided by the manufacturer (or supplier) of the second firmware program file (134). For example, at least a portion of the second firmware program file (134) may be updated over time using a file distributed through said manufacturer. For example, when the first processor (110) restores the state of the second firmware program identified as abnormal to its initial state, at least a portion of the updated second firmware program file (134) may be removed. For example, as the state of the second firmware program is restored to its initial state, the electronic device (100) may be required to update the state of the second firmware program in its initial state using data for the latest version in order to execute the second firmware program.

[0035] The electronic device (100) may use a control circuit (e.g., the control circuit (240) of FIG. 2) to restore the state of the second firmware program when the first processor (110) is in a power-off state. For example, the control circuit included in the electronic device (100) may be configured to replace at least a portion of the second firmware program file (134) using pre-stored backup data when the power state of the first processor (110) (or integrated circuit (105)) is identified as a power-off state. For example, since the control circuit restores the state of the second firmware program from an abnormal state to a normal state using pre-stored backup data, it may restore the state of the second firmware program linked to the latest version of the second firmware program file (134) without re-updating at least a portion of the updated second firmware program file (134).

[0036] For example, the electronic device (100) may include hardware components used to perform or execute the above operations. The hardware components are described and illustrated with reference to FIG. 2.

[0037] FIG. 2 is a simplified block diagram of an electronic device according to an embodiment of the present disclosure.

[0038] Referring to FIG. 2, the electronic device (100) may include a main circuit board (200). An integrated circuit (205), a first memory (230), a control circuit (240), and a second memory (250) may be placed on the main circuit board (200). The integrated circuit (205) may include at least one first processor (210) and a second processor (220).

[0039] The main circuit board (200) may be a printed circuit board (PCB), a ceramic wiring structure, a glass wiring structure, etc. However, embodiments of the present invention are not limited thereto. The main circuit board (200) may be referred to as a main board. The main circuit board (200) may include conductive pins (or conductive lines) used to connect to at least one of an integrated circuit (205), a first memory (230), a control circuit (240), and a second memory (250).

[0040] The integrated circuit (205) may be placed on the main circuit board (200). The integrated circuit (205) may include at least one first processor (210) and a second processor (220). The integrated circuit (205) may be used to execute software applications or perform operations. The integrated circuit (205) may be referred to as a chipset.

[0041] At least one first processor (210) may include a hardware component for processing data using instructions stored in the first memory (230). The hardware component for processing data may include a central processing unit (e.g., including a processing circuit). The hardware component for processing data may include a graphic processing unit (e.g., including a processing circuit).

[0042] At least one first processor (210) may include one or more cores. For example, at least one first processor (210) may have the structure of a multi-core processor such as a dual core, a quad core, or a hexa core.

[0043] The second processor (220) may include a hardware component for processing data using instructions stored in the first memory (230). The hardware component for processing data may include a CPU (central processing unit) (e.g., including a processing circuit). The hardware component for processing data may include a GPU (graphic processing unit) (e.g., including a processing circuit).

[0044] The second processor (220) may include one or more cores. For example, the second processor (220) may have the structure of a multi-core processor such as a dual core, a quad core, or a hexa core.

[0045] The first memory (230) may include a hardware component for storing data and / or instructions that are input to at least one first processor (210) and / or output from at least one first processor (210). The first memory (230) may include, for example, volatile memory such as RAM (random-access memory) and / or non-volatile memory such as ROM (read-only memory). Volatile memory may include, for example, at least one of DRAM (dynamic RAM), SRAM (static RAM), cache RAM, and PSRAM (pseudo SRAM). Non-volatile memory may include, for example, at least one of PROM (programmable ROM), EPROM (erasable PROM), EEPROM (electrically erasable PROM), flash memory, hard disk, compact disk, and EMMC (embedded multimedia card). However, embodiments of the present invention are not limited thereto. For example, non-volatile memory may include SPIROM (serial peripheral interface read-only memory).

[0046] The second memory (250) may include a hardware component for storing data and / or instructions that are input to at least one first processor (210) and / or output from at least one first processor (210). The second memory (250) may include, for example, volatile memory such as random-access memory (RAM) and / or non-volatile memory such as read-only memory (ROM). Volatile memory may include, for example, at least one of dynamic RAM (DRAM), static RAM (SRAM), cache RAM, and pseudo SRAM (PSRAM). Non-volatile memory may include, for example, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), flash memory, hard disk, compact disk, and embedded multimedia card (EMMC). However, embodiments of the present invention are not limited thereto. For example, non-volatile memory may include SPIROM (serial peripheral interface read-only memory).

[0047] The control circuit (240) may be used to store data stored in the first memory (230) in the second memory (250). The control circuit (240) may be used to replace the data stored in the first memory (230) with the data stored in the second memory (250). The control circuit (240) may include a processor. The control circuit (240) may be referred to as an embedded controller. For example, the control circuit (240) may be used to perform at least one of managing the power status of the electronic device (100) (or integrated circuit (205)), monitoring the system, supporting the BIOS, providing security functions (e.g., Trusted Platform Module (TPM)), and updating the firmware program of the electronic device (100). For example, the description of the control circuit (240) may be referred to as the description of the second processor (220).

[0048] The second processor (220) may be configured to provide at least a portion of the security functions of the integrated circuit (205) according to the commands of at least one first processor (210). The second processor (220) may be used to execute a second firmware program. The second processor (220) may be referred to as a coprocessor, an engine for providing security functions, or a module for providing security functions.

[0049] The electronic device (100) may include a main circuit board (200). The integrated circuit (205) may be placed on the main circuit board (200) and may include at least one first processor (210) configured to perform a boot-up of the electronic device (100) and a second processor (220) configured to provide at least some of the security functions of the integrated circuit (205) according to the commands of at least one first processor (210).

[0050] FIG. 3 illustrates at least one first processor, a control circuit, a first memory, and operations executed within a second memory to store data regarding a backup version in a second memory according to an embodiment of the present disclosure.

[0051] Referring to FIG. 3, in operation 310, at least one first processor (210) may be configured to execute a first firmware program. For example, at least one first processor (210) may be configured to execute the first firmware program using a first firmware program file (132) stored in a first memory (230). For example, the first firmware program may include a basic input / output system (BIOS). For example, the first firmware program may include a unified extensible firmware interface (UEFI) BIOS. For example, at least one first processor (210) may be configured to execute the first firmware program based on the start of the boot-up of the electronic device (100).

[0052] In operation 320, at least one first processor (210) may be configured to identify the state of a second firmware program using the first firmware program. The second firmware program (e.g., CSME (converged security and management engine)) may be described as a firmware program used to provide at least some of the security functions. For example, the second firmware program may be executed together with the first firmware program based on the start of the boot-up of the electronic device (100).

[0053] At least one first processor (210) may be configured to identify the state of a second firmware program using a first firmware program. An integrated circuit (205) may include a register used to identify the state of the second firmware program. For example, at least one first processor (210) may be configured to identify the state of the second firmware program by accessing a register used to identify the state of the second firmware program. For example, at least one first processor (210) may be configured to identify a flag indicating the state of the second firmware program based on accessing said register. For example, at least one first processor (210) may be configured to identify or determine the state of the second firmware program as abnormal based on a flag indicating the state of the second firmware program identified as an error flag. For example, at least one first processor (210) may be configured to identify or determine the state of the second firmware program as normal based on a flag indicating the state of the second firmware program identified as a normal flag (or a flag indicating a predetermined value). For example, at least one first processor (210) may be configured to identify the state of the second firmware program as normal based on a flag identified by a predetermined flag. For example, the predetermined flag may be described as a flag indicating that the function provided through the second firmware program is provided normally. For example, the predetermined flag may be referred to as a normal flag.

[0054] At least one first processor (210) may be configured to identify or determine the state of the second firmware program based on identifying an activation value for a function provided through the second firmware program. For example, at least one first processor (210) may be configured to determine or identify the state of the second firmware program as abnormal based on a determination that the activation value for a function provided through the second firmware program is an error value (or unknown value). For example, at least one first processor (210) may be configured to determine or identify the state of the second firmware program as normal based on a determination that the activation value for a function provided through the second firmware program is a predetermined value (or normal value).

[0055] At least one first processor (210) may be configured to identify or determine the state of the second firmware program based on verifying or identifying the operating mode of the second firmware program. For example, at least one first processor (210) may be configured to determine or identify the state of the second firmware program as abnormal based on a determination that the operating mode of the second firmware program is an emergency mode or a recovery mode. For example, at least one first processor (210) may be configured to determine or identify the state of the second firmware program as abnormal based on a determination that the second firmware program is in a disabled state when verifying the operating mode of the second firmware program.

[0056] At least one first processor (210) may be configured to determine or identify the state of the second firmware program as abnormal when a function provided through the second firmware program (e.g., a trusted platform module (TPM) or a camera privacy feature control function) does not operate normally. For example, at least one first processor (210) may be configured to determine or identify the state of the second firmware program as abnormal based on a determination that a function provided through the second firmware does not operate normally when the operating system is running.

[0057] At least one first processor (210) may be configured to identify or determine the state of a second firmware program using the first firmware program. Although operations for identifying the state of the second firmware program have been described above, embodiments of the present invention are not limited thereto. For example, the second processor (220) may be configured to identify whether functions provided through the second firmware program can be provided normally according to a predetermined condition (e.g., when the electronic device (100) performs a boot-up). For example, the second processor (220) may be configured to transmit the result of the identification to at least one first processor (210). For example, at least one first processor (210) may be configured to identify the state of the second firmware program based on receiving the result of the identification.

[0058] According to one embodiment of the present disclosure, the control circuit (240) may be configured to determine that the state of the second firmware program is abnormal. For example, the control circuit (240) may be configured to identify the power state of at least one first processor (210). For example, the control circuit (240) may be configured to identify the state of the second firmware program by identifying the power state of at least one first processor (210) when the electronic device (100) is booted up. For example, an abnormal signal sequence may be detected when the electronic device (100) is booted up based on signals between the first firmware program and the second firmware program. For example, a signal sequence (or power sequence) for performing the boot-up may be performed through the first firmware program and the second firmware program. For example, the control circuit (240) may be configured to determine that the state of the second firmware program is abnormal based on a determination that the signal sequence performed in the second firmware program is not functioning.

[0059] In operation 330, at least one first processor (210) may be configured to transmit a first command to the control circuit (240) based on a determination that the state of the second firmware program is in a normal state. For example, at least one first processor (210) may be configured to transmit a first command (e.g., BACKUP_START) to the control circuit (240) based on the state of the second firmware program identified as being in a normal state. For example, the first command may be described as a command to generate first data to be used to restore the state of the second firmware program to be identified as being in an abnormal state to a normal state by using at least a portion of the second firmware program file (134) associated with the state of the second firmware program identified as being in a normal state.

[0060] According to one embodiment of the present disclosure, an electronic device (100) may include an interface available for transmitting or receiving commands between at least one first processor (210) and a control circuit (240). For example, the interface may include an enhanced serial peripheral interface (eSPI) bus. For example, a data packet associated with a command may be transmitted or received through the interface. For example, the data packet may be transmitted or received by a low pin count (LPC) or inter-integrated circuit (I2C) technique. However, embodiments of the present disclosure are not limited thereto.

[0061] In operation 340, the control circuit (240) may be configured to obtain from the first memory (230) first data used for the execution of the second firmware program, which is stored in the first memory (230). For example, the control circuit (240) may be configured to obtain from the first memory (230) first data (e.g., first data (410) of FIG. 4) which is associated with the state of the second firmware program identified as normal state based on receiving the first command. For example, the first data may be described as at least part of the second firmware program file (134). For example, the control circuit (240) may obtain from the first memory (230) a backup version of the second firmware program identified as normal state (e.g., first data (410) of FIG. 4) based on a first command received from at least one first processor (210).

[0062] According to one embodiment of the present disclosure, a control circuit (240) may be configured to obtain the first data from a first memory (230) based on identifying the power state of the integrated circuit (205). For example, the control circuit (240) may be configured to obtain the first data (e.g., the first data (410) of FIG. 4) from the first memory (230) by accessing the first memory (230) based on the determination that the power state of the integrated circuit (205) is a power-off state. For example, the power-off state may include a G3 state. For example, the G3 state may be described as a G3 (mechanical shutdown) state according to the ACPI (advanced configuration and power interface) standard. At least one first processor (210) may be configured to change the power state of the integrated circuit (205) to a power-off state based on transmitting a command (e.g., a first command, a second command, or a third command). A control circuit (240) may be configured to identify the power state of the integrated circuit (205) based on a command received from at least one first processor (210). The control circuit (240) may be configured to access the first memory (230) to replace the fourth data (e.g., the fourth data (740) of FIG. 7) with the third data (e.g., the third data (710) of FIG. 7) based on the power state of the integrated circuit (205) identified as a power-off state.

[0063] According to one embodiment of the present disclosure, a control circuit (240) may be configured to identify the power state of an integrated circuit (205). For example, at least one first processor (210) may be configured to change the power state of the integrated circuit (205) to a power-off state based on receiving a user input to change the power state of the integrated circuit (205) to a power-off state. The control circuit (240) may be configured to perform an operation 340 based on the power-off state changed according to the user input. However, embodiments of the present disclosure are not limited thereto. For example, at least one first processor (210) may be configured to change the power state of the integrated circuit (205) to a power-off state without receiving the user input. For example, since the control circuit (240) accesses the first memory (230) based on the determination that the power state of the integrated circuit (205) is a power-off state, the integrated circuit (205) and the control circuit (240) may be configured to avoid simultaneous access to the first memory (230). The first memory (230) may have a write-protection function applied to the integrated circuit (205). For example, an area within the first memory (230) where the second firmware program file (134) is stored may be described as an area where a write-protection function is provided.

[0064] In operation 350, the control circuit (240) may be configured to store the first data (e.g., the first data (410) of FIG. 4) in the second memory (250). For example, the control circuit (240) may be configured to store the first data in the second memory (250) to restore the state of the second firmware program, which is identified as abnormal based on the acquisition of the first data, to a normal state. For example, the control circuit (240) may be configured to store a backup version (e.g., the first data (410) of FIG. 4) to be used to restore the state of the second firmware program, which is identified as abnormal, to a normal state, in the second memory (250). For example, the storage of the first data is described and illustrated in more detail with reference to FIG. 4.

[0065] FIG. 4 illustrates the operation of an electronic device that stores first data in a second memory according to an embodiment of the present disclosure.

[0066] Referring to FIG. 4, the control circuit (240) may be configured to obtain at least a portion of the second firmware program file (134) stored in the first memory (230) from the first memory (230) based on receiving a first command. For example, the control circuit (240) may be configured to obtain the first data (410) from the first memory (230) as it accesses the first memory (230) based on a determination that the power state of the integrated circuit (205) is a power-off state. The control circuit (240) may be configured to store the first data (410) in the second memory (250) based on obtaining the first data (410). For example, the first data (410) may be described as data for a backup version of the second firmware program file (134) identified as normal state. For example, the first data (410) may be referred to as a first backup version. For example, the first data (410) may be used to restore the state of a second firmware program, which is identified as abnormal, to a normal state.

[0067] According to one embodiment of the present disclosure, the first firmware program file (132) and the second firmware program file (134) may each be stored in the first memory (230). However, the embodiments of the present disclosure are not limited thereto. For example, the first firmware program file (132) may be stored in the first memory (230), and the second firmware program file (134) may be stored in the third memory (not shown).

[0068] According to one embodiment of the present disclosure, the second memory (250) may include or store instructions that cause the operation of the control circuit (240). However, the embodiments of the present disclosure are not limited thereto. For example, instructions that cause the operation of the control circuit (240) may be stored in a fourth memory (not shown).

[0069] According to one embodiment of the present disclosure, when the control circuit (240) stores the first data (410) in the second memory (250), it may store the first hash data (430) corresponding to the first data (410) together with the first data (410). For example, the control circuit (240) may obtain the first hash data (430) representing the first hash value corresponding to the first data (410) by using the first data (410) obtained from the first memory (230). For example, when the control circuit (240) stores the first data (410) in the second memory (250), it may store the first hash data (430) and the first data (410) in the second memory (250). For example, the first hash data (430) representing the first hash value may be used to verify the first data (410). For example, the first hash data (430) can be used to identify whether the first data (410) stored in the second memory (250) is corrupted.

[0070] According to one embodiment of the present disclosure, the integrated circuit (205) may be configured to refrain from accessing the second memory (250). For example, the integrated circuit (205) may be prevented from accessing the second memory (250). For example, since the integrated circuit (205) is prevented from accessing the second memory (250), data for a backup version within the second memory (250) (e.g., the third data (710) of FIG. 7) may be protected.

[0071] According to one embodiment of the present disclosure, at least one first processor (210) may transmit first version information (420) together with a first command to a control circuit (240). For example, the first version information (420) may be described as information indicating the version of a second firmware program file (134) stored in a first memory (230). For example, the version of the second firmware program may be changed based on an update. For example, the control circuit (240) may store the received first version information (420) together with first data (410) in a second memory (250). For example, the first version information (420) may be used to determine whether to store the first data (410) included in the second firmware program file (134) stored in the first memory (230) in the second memory (250) for restoration. For example, an operation to determine whether to store the first data (410) in the second memory (250) based on version information is described and illustrated with reference to FIG. 5.

[0072] FIG. 5 illustrates at least one first processor, a control circuit, and operations executed in a second memory to store first data in a second memory according to an embodiment of the present disclosure.

[0073] Referring to FIG. 5, in operation 510, at least one first processor (210) may be configured to identify the state of a second firmware program. For example, at least one first processor (210) may be configured to identify the state of a second firmware program using a first firmware program executed within at least one first processor (210). For example, operation 510 may correspond to operation 320 of FIG. 3.

[0074] In operation 520, at least one first processor (210) may be configured to transmit a second command (e.g., GET_BACKUP_STATUS) to the control circuit (240) based on the state of the second firmware program identified as normal state. For example, the second command may be described as a command for identifying the state of data stored in the second memory (250). For example, at least one first processor (210) may be configured to transmit the second command to the control circuit (240) before transmitting the first command. For example, at least one first processor (210) may determine whether to transmit the first command based on the response to the second command.

[0075] In operation 530, the control circuit (240) may be configured to obtain second data from the second memory (250) based on receiving the second command. For example, the second data may be described as at least part of the second firmware program file (134) stored in the second memory (250).

[0076] According to one embodiment of the present disclosure, a control circuit (240) may be configured to transmit a response indicating a determination to at least one first processor (210) based on a determination that there is no data indicating at least a portion of the second firmware program file (134) in the second memory (250). For example, at least one first processor (210) may be configured to transmit a first command to the control circuit (240) based on receiving the response. For example, the control circuit (240) may be configured to determine whether second data for restoring the state of the second firmware is stored in the second memory (250) upon accessing the second memory (250) based on receiving the second command. For example, the control circuit (240) may be configured to transmit a response indicating a determination to at least one first processor (210) based on a determination that the second data is not stored in the second memory (250). For example, at least one first processor (210) may be configured to transmit a first command to a control circuit (240) based on receiving the response.

[0077] In operation 540, the control circuit (240) may be configured to determine whether the second version of the second data is prior to the first version. The control circuit (240) may be configured to execute operation 550 based on the determination that the second version of the second data is prior to the first version, and to execute operation 560 based on the determination that the second version is not prior to the first version. For example, the control circuit (240) may be configured to receive, together with the second command, first version information (420) indicating the first version of the first firmware program file (132) stored in the first memory (230) from at least one first processor (210). For example, the control circuit (240) may be configured to obtain the second data and the second version information from the second memory (250) based on receiving the second command and the first version information (420). For example, the second version information may be described as information indicating the version of the second data. For example, the second version information may be described as version information for the second data that was stored together with the second data when the second data was stored in the second memory (250).

[0078] In operation 550, the control circuit (240) may be configured to transmit a first response indicating a decision to at least one first processor (210), based on the decision that a second version of the second data is earlier than a first version of the second firmware program file (134) stored in the first memory (230).

[0079] According to one embodiment of the present disclosure, a control circuit (240) may be configured to transmit a first response indicating the determination and the version of the second data to at least one first processor (210). For example, the control circuit (240) may be configured to transmit a first response indicating the determination and the version of the second data stored in the second memory (250) to at least one first processor (210), based on a determination that the second version of the second data is earlier than the first version of the second firmware program file (134) stored in the first memory (230).

[0080] In operation 560, the control circuit (240) may be configured to transmit a second response indicating a determination to at least one first processor (210), based on a determination that the second version of the second data is not earlier than the first version of the second firmware program file (134) stored in the first memory (230). For example, the at least one first processor (210) may be configured to refrain from, bypass, or block the transmission of the first command to the control circuit (240) based on receiving the second response. For example, if the second version of the second data is the same as or earlier than the first version of the second firmware program file (134) stored in the first memory (230), the at least one first processor (210) may be configured to refrain from storing new data for the backup version in the second memory (250).

[0081] According to one embodiment of the present disclosure, a control circuit (240) may be configured to verify the validity of the second data using a hash value based on a determination that the second version of the second data is not earlier than the first version. For example, if the second version is not earlier than the first version, the second version may be identical to the first version, or the second version may be earlier than the first version. For example, the control circuit (240) may be configured to obtain second hash data representing a second hash value together with the second data from the second memory (250). For example, the control circuit (240) may be configured to obtain third hash data representing a third hash value corresponding to the second data using the second data based on obtaining the second data from the second memory (250). For example, the control circuit (240) may be configured to determine that the second data is valid based on a determination that the second hash value is identical to the third hash value. For example, the control circuit (240) may be configured to transmit a second response to at least one first processor (210) based on a determination that the second data is valid. For example, the control circuit (240) may be configured to determine that the second data is invalid based on a determination that the second hash value is different from the third hash value. For example, the control circuit (240) may be configured to transmit a first response to at least one first processor (210) based on a determination that the second data is invalid.

[0082] According to one embodiment of the present disclosure, a control circuit (240) may be configured to identify or determine whether a second hash value is identical to a third hash value based on a determination that a second version of the second data is prior to a first version. For example, the control circuit (240) may be configured to transmit a response indicating said determination to at least one first processor (210) based on a determination that the second version is prior to the first version and that the second hash value is identical to the third hash value. For example, at least one first processor (210) may be configured to transmit a first command to the control circuit (240) based on receiving said response.

[0083] In operation 570, at least one first processor (210) may be configured to transmit a first command to the control circuit (240) based on receiving the first response. For example, at least one first processor (210) may be configured to determine, based on receiving the first response, to store first data for a second firmware program file (134) stored in the first memory (230) in the second memory (250). Although operations for executing operation 570 based on operations 520 to 550 have been described above, embodiments of the present disclosure are not limited thereto. For example, at least one of operations 520 to 560 may be omitted.

[0084] At least one first processor (210) can identify the state of a second firmware program based on the start of the boot-up of the electronic device (100) using the first firmware program. Based on the state of the second firmware program identified as abnormal, the at least one first processor (210) may be configured to restore the state of the second firmware program to a normal state using third data (e.g., third data (710) of FIG. 7) for a backup version of the state of the second firmware program identified as normal. For example, the restoration is described and illustrated with reference to FIG. 6.

[0085] FIG. 6 illustrates operations executed within at least one first processor, a control circuit, a first memory, and a second memory to restore the state of a second firmware program according to an embodiment of the present disclosure.

[0086] Referring to FIG. 6, in operation 610, at least one first processor (210) may be configured to execute a first firmware program based on the start of boot-up of the electronic device (100). For example, operation 610 may correspond to operation 310 of FIG. 3.

[0087] In operation 620, at least one first processor (210) may be configured to identify the state of a second firmware program using a first firmware program. For example, operation 620 may correspond to operation 320 of FIG. 3.

[0088] In operation 630, at least one first processor (210) may be configured to transmit a third command (e.g., RECOVERY_START) to the control circuit (240) based on the state of the second firmware program identified as abnormal. For example, the third command may be described as a command that causes at least a portion of the second firmware program file (134) stored in the first memory (230) to be replaced using the third data stored in the second memory (250).

[0089] In operation 640, the control circuit (240) may be configured to obtain, based on receiving a third command, a third data (e.g., third data (710) of FIG. 7) for a backup version of a second firmware program that was identified (or determined) to be in a normal state from the second memory (250). For example, the control circuit (240) may be configured to determine or identify whether the third data is available to restore the state of the second firmware program using a hash value. For example, the control circuit (240) may be configured to obtain, based on a third command received from at least one first processor (210), a backup version of the second firmware program that was backed up when the state of the second firmware program was identified to be in a normal state from the second memory (250). For example, the operation of determining whether the third data is available to restore the state of the second firmware program will be described later with reference to FIG. 8.

[0090] According to one embodiment of the present disclosure, at least one first processor (210) may be configured to change the power state of the integrated circuit (205) to a power-off state based on the state of the second firmware program identified as an abnormal state. For example, a control circuit (240) may be configured to access the first memory (230) based on the state of the integrated circuit (205) identified as a power-off state. However, embodiments of the present disclosure are not limited thereto. For example, at least one first processor (210) may be configured to change the power state of the integrated circuit (205) to a power-off state based on receiving user input to change the power state of the integrated circuit (205) to a power-off state. For example, a control circuit (240) may be configured to access the first memory (230) based on the power-off state changed according to the user input.

[0091] In operation 650, the control circuit (240) may be configured to replace or overwrite the fourth data stored in the first memory (230) with the third data (e.g., the third data (710) of FIG. 7). For example, the fourth data may be described as at least part of the second firmware program file (134) stored in the first memory (230). For example, the fourth data may be described as data for the second firmware program identified as being in an abnormal state. The control circuit (240) may be configured to replace the fourth data stored in the first memory (230) with the third data (e.g., the third data (710) of FIG. 7) in order to restore the state of the second firmware program identified as being in an abnormal state to a normal state based on access to the first memory (230). For example, the control circuit (240) may be configured to replace at least a portion of the second firmware program stored in the first memory (230) (e.g., the fourth data (740) of FIG. 7) with a backup version (e.g., the third data (710) of FIG. 7).

[0092] Since the control circuit (240) can restore the state of the second firmware program from an abnormal state to a normal state, the provider (or manufacturer) of the second firmware program can expect it to be restored from an abnormal state to a normal state without any additional measures.

[0093] According to one embodiment of the present disclosure, at least one first processor (210) may be configured to execute the first firmware program based on the start of the boot-up of the electronic device (100) after at least a part of the second firmware program (e.g., the fourth data (740) of FIG. 7) is replaced with a backup version (e.g., the third data (710) of FIG. 7). For example, the second processor (220) may be configured to execute the second firmware program based on the start of the boot-up of the electronic device (100). For example, the state of the second firmware program executed through the second processor (220) after at least a part of the second firmware program (e.g., the fourth data (740) of FIG. 7) is replaced with a backup version (e.g., the third data (710) of FIG. 7) may be identified as a normal state. At least one first processor (210) may be configured to identify the state of the second firmware program as a normal state based on restoration based on the backup version using the first firmware program. For example, at least one first processor (210) may be configured to perform a boot-up of the electronic device (100) based on transmitting a third command. For example, a control circuit (240) may be configured to transmit a signal indicating said substitution to at least one first processor (210) based on replacing at least a part of the second firmware program (e.g., the fourth data (740) of FIG. 7) with a backup version (e.g., the third data (710) of FIG. 7).

[0094] According to one embodiment of the present disclosure, at least one first processor (210) may be configured to transmit offset information to a control circuit (240) along with a third command. For example, the control circuit (240) may be configured to receive offset information along with the third command. For example, the offset information may be described as information indicating data requiring replacement in the second firmware program file (134). For example, the offset information may be described as information indicating the location where data requiring replacement is stored in the first memory (230) where the second firmware program file (134) is stored. For example, the control circuit (240) may be configured to use the offset information to identify or determine the portion of the second firmware program file (134) requiring replacement. For example, the control circuit (240) may be configured to replace a portion of the fourth data stored in the first memory (230) corresponding to a portion of the second firmware program with a portion of the third data (e.g., the third data (710) of FIG. 7) stored in the second memory (250) corresponding to a portion of the second firmware program.

[0095] At least one first processor (210) may be configured to transmit command and offset information to a control circuit (240) based on the state of a second firmware program identified as abnormal. The control circuit (240) may be configured to identify a portion of the second firmware program to be restored using the offset information. The control circuit (240) may be configured to replace a second portion of fourth data (740) corresponding to said portion of the second firmware program with a first portion of third data (710) corresponding to said portion of the second firmware program based on access to the first memory (230).

[0096] According to one embodiment of the present disclosure, a control circuit (240) may be configured to refer to address and size information of a second firmware program file (134) stored in a first memory (230) in order to obtain offset information for restoration. For example, the control circuit (240) may be configured to determine an area in the first memory (230), defined by the offset information, as a target for backup and / or restoration.

[0097] The control circuit (240) may be configured to replace at least a portion of the second firmware program file (134) stored in the first memory (230) with the third data (710) stored in the second memory (250). For example, the replacement is described and illustrated with reference to FIG. 7.

[0098] FIG. 7 illustrates the operation of an electronic device that replaces fourth data with third data according to an embodiment of the present disclosure.

[0099] Referring to FIG. 7, the control circuit (240) may be configured to obtain third data (710) from the second memory (250) based on receiving a third command. The control circuit (240) may be configured to replace the fourth data (740) stored in the first memory (230) with the third data (710). The third data (710) may be described as data for a backup version of the second firmware program that was backed up when the state of the second firmware program was identified as normal. For example, the third data (710) may be referred to as a second backup version of the second firmware program. The fourth data (740) may be referred to as at least part of the second firmware program file (134) or at least part of the second firmware program.

[0100] According to one embodiment of the present disclosure, a control circuit (240) may be configured to identify the power state of an integrated circuit (205). The control circuit (240) may be configured to access a first memory (230) based on a determination that the power state of the integrated circuit (205) is a power-off state. For example, the control circuit (240) may be configured to access the first memory (230) to restore the state of a second firmware program from an abnormal state to a normal state based on the power state of the integrated circuit (205) identified as a power-off state.

[0101] According to one embodiment of the present disclosure, a control circuit (240) may be configured to verify the validity of third data (710) stored in a second memory (250) using a hash value. For example, a fourth hash data (720) may be obtained from the third data (710) when the third data (710) is stored in the second memory (250). For example, before the third data (710) is stored in the second memory (250), the control circuit (240) may be configured to obtain a fourth hash data (720) corresponding to the third data (710). For example, the control circuit (240) may be configured to verify the validity of the third data (710) using the fourth hash data (720) that was stored together with the third data (710). For example, the control circuit (240) may be configured to obtain, from the second memory (250), a fourth hash data (720) representing a fourth hash value together with the third data (710) when obtaining the third data (710) from the second memory (250). For example, the control circuit (240) may be configured to obtain, based on obtaining the third data (710), a fifth hash data (730) representing a fifth hash value corresponding to the third data (710) using the third data (710). For example, the control circuit (240) may be configured to identify or determine whether the fourth hash value is the same as the fifth hash value in order to verify the validity of the third data (710). For example, the control circuit (240) may be configured to determine that the third data (710) stored in the second memory (250) is valid based on the determination that the fourth hash value is the same as the fifth hash value. For example, the control circuit (240) may be configured to determine that the third data (710) stored in the second memory (250) is available to restore the state of the second firmware based on the determination that the fourth hash value is the same as the fifth hash value.For example, the control circuit (240) may be configured to access the first memory (230) to replace the fourth data (740) with the third data (710) based on the determination that the fourth hash value is the same as the fifth hash value.

[0102] The control circuit (240) may be configured to determine or identify whether data available to restore the state of the second firmware program is stored in the second memory (250). For example, the determination is described and illustrated with reference to FIG. 8.

[0103] FIG. 8 illustrates operations executed in at least one first processor, control circuit, and second memory to replace fourth data with third data according to an embodiment of the present disclosure.

[0104] Referring to FIG. 8, in operation 810, at least one first processor (210) may be configured to identify the state of a second firmware program based on the start of booting of the electronic device (100). For example, operation 810 may correspond to operation 320 of FIG. 3.

[0105] In operation 820, at least one first processor (210) may be configured to transmit a second command to a control circuit (240) based on the state of a second firmware program identified as abnormal.

[0106] In operation 830, the control circuit (240) may be configured to obtain third data (710) from the second memory (250) based on receiving the second command. For example, the third data (710) may be described as data for a backup version of the second firmware program that was identified (or determined) to be in a normal state, which is stored in the second memory (250).

[0107] In operation 840, the control circuit (240) may be configured to determine or identify whether data available to restore the state of the second firmware program to a normal state is stored in the second memory (250). For example, the control circuit (240) may be configured to execute operation 850 based on the determination that data available to restore the state of the second firmware program to a normal state is stored in the second memory (250), and to execute operation 860 based on the determination that data available to restore the state of the second firmware program to a normal state is not stored in the second memory (250). For example, the control circuit (240) may be configured to use a hash value to determine whether data available to restore the state of the second firmware program to a normal state is stored in the second memory (250). For example, the control circuit (240) may be configured to use a hash value to verify the validity of the third data (710) stored in the second memory (250).

[0108] The control circuit (240) may be configured to obtain, from the second memory (250), fourth hash data (720) representing a fourth hash value together with third data (710) based on receiving the second command. For example, the control circuit (240) may be configured to obtain, based on obtaining the third data (710), fifth hash data (730) corresponding to the third data (710) and representing a fifth hash value. The control circuit (240) may be configured to determine that data available to restore the state of the second firmware program to a normal state is stored in the second memory (250) based on the determination that the fourth hash value is identical to the fifth hash value. For example, the control circuit (240) may be configured to determine that data available to restore the state of the second firmware program to a normal state is not stored in the second memory (250) based on the determination that the fourth hash value is different from the fifth hash value.

[0109] In operation 850, the control circuit (240) may be configured to transmit a third response indicating a determination to at least one first processor (210), based on a determination that data available to restore the state of the second firmware program to a normal state is stored in the second memory (250).

[0110] According to one embodiment of the present disclosure, a control circuit (240) may be configured to transmit a third response indicating a version of the determination and the third data (710) to at least one first processor (210), based on a determination that data available to restore the state of the second firmware program to a normal state is stored in the second memory (250).

[0111] In operation 870, at least one first processor (210) may be configured to transmit a first command to a control circuit (240) based on receiving a third response. For example, the control circuit (240) may be configured to replace the fourth data (740) stored in the first memory (230) with the third data (710) stored in the second memory (250) based on receiving the first command in order to restore the state of the second firmware program to a normal state.

[0112] In operation 860, the control circuit (240) may be configured to transmit a fourth response indicating a determination to at least one first processor (210), based on the determination that data available to restore the state of the second firmware program to a normal state is not stored in the second memory (250). The at least one first processor (210) may be configured to refrain from, bypass, or block the transmission of the first command to the control circuit (240) based on receiving the fourth response.

[0113] Although an operation in which operation 870 is executed based on operations 820 to 850 has been described above, embodiments of the present disclosure are not limited thereto. For example, at least one of operations 820 to 860 may be omitted.

[0114] FIG. 9 is a block diagram of an electronic device in a network environment according to various embodiments.

[0115] Referring to FIG. 9, in a network environment (900), an electronic device (901) may communicate with an electronic device (902) through a first network (998) (e.g., a short-range wireless communication network) or with at least one of an electronic device (904) or a server (908) through a second network (999) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (901) may communicate with the electronic device (904) through a server (908). According to one embodiment, the electronic device (901) may include a processor (920), memory (930), input module (950), sound output module (955), display module (960), audio module (970), sensor module (976), interface (977), connection terminal (978), haptic module (979), camera module (980), power management module (988), battery (989), communication module (990), subscriber identification module (996), or antenna module (997). In some embodiments, at least one of these components (e.g., connection terminal (978)) may be omitted from the electronic device (901), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (976), camera module (980), or antenna module (997)) may be integrated into a single component (e.g., display module (960)).

[0116] The processor (920) can control at least one other component (e.g., a hardware or software component) of the electronic device (901) connected to the processor (920) by executing software (e.g., a program (940)), for example, and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (920) can store commands or data received from other components (e.g., a sensor module (976) or a communication module (990)) in volatile memory (932), process the commands or data stored in volatile memory (932), and store the resulting data in non-volatile memory (934). According to one embodiment, the processor (920) may include a main processor (921) (e.g., a central processing unit or an application processor) or an auxiliary processor (923) that can operate independently or together with it (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device (901) includes a main processor (921) and an auxiliary processor (923), the auxiliary processor (923) may be configured to use lower power than the main processor (921) or to be specialized for a designated function. The auxiliary processor (923) may be implemented separately from the main processor (921) or as part thereof.

[0117] The auxiliary processor (923) may control at least some of the functions or states associated with at least one component of the electronic device (901) (e.g., display module (960), sensor module (976), or communication module (990)) on behalf of the main processor (921) while the main processor (921) is in an inactive (e.g., sleep) state, or together with the main processor (921) while the main processor (921) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (923) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (980) or communication module (990)). According to one embodiment, the auxiliary processor (923) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (901) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (908)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0118] The memory (930) can store various data used by at least one component of the electronic device (901) (e.g., processor (920) or sensor module (976)). The data may include, for example, software (e.g., program (940)) and input or output data for related commands. The memory (930) may include volatile memory (932) or non-volatile memory (934).

[0119] The program (940) may be stored as software in memory (930) and may include, for example, an operating system (942), middleware (944), or an application (946).

[0120] The input module (950) can receive commands or data to be used for a component of the electronic device (901) (e.g., processor (920)) from outside the electronic device (901) (e.g., user). The input module (950) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0121] The sound output module (955) can output a sound signal to the outside of the electronic device (901). The sound output module (955) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0122] The display module (960) can visually provide information to an external (e.g., user) of the electronic device (901). The display module (960) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (960) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0123] The audio module (970) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (970) can acquire sound through the input module (950) or output sound through the sound output module (955) or an external electronic device (e.g., electronic device (902)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (901).

[0124] The sensor module (976) can detect the operating state of the electronic device (901) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (976) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0125] The interface (977) may support one or more specified protocols that can be used for the electronic device (901) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (902)). According to one embodiment, the interface (977) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0126] The connection terminal (978) may include a connector through which the electronic device (901) can be physically connected to an external electronic device (e.g., electronic device (902)). According to one embodiment, the connection terminal (978) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0127] The haptic module (979) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module (979) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0128] The camera module (980) can capture still images and video. According to one embodiment, the camera module (980) may include one or more lenses, image sensors, image signal processors, or flashes.

[0129] The power management module (988) can manage the power supplied to the electronic device (901). According to one embodiment, the power management module (988) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0130] The battery (989) can supply power to at least one component of the electronic device (901). According to one embodiment, the battery (989) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0131] The communication module (990) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (901) and an external electronic device (e.g., electronic device (902), electronic device (904), or server (908)), and the performance of communication through the established communication channel. The communication module (990) may include one or more communication processors that operate independently of the processor (920) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (990) may include a wireless communication module (992) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (994) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (904) through a first network (998) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (999) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (992) can identify or authenticate the electronic device (901) within a communication network such as the first network (998) or the second network (999) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (996).

[0132] The wireless communication module (992) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (992) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (992) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (992) can support various requirements specified in the electronic device (901), external electronic device (e.g., electronic device (904)), or network system (e.g., second network (999)). According to one embodiment, the wireless communication module (992) can support a Peak data rate (e.g., 20 Gbps or more) for realizing eMBB, loss coverage (e.g., 164 dB or less) for realizing mMTC, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for realizing URLLC.

[0133] An antenna module (997) can transmit a signal or power to an external source (e.g., an external electronic device) or receive it from an external source. According to one embodiment, the antenna module (997) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (997) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (998) or a second network (999), may be selected from the plurality of antennas, for example, by a communication module (990). A signal or power may be transmitted or received between the communication module (990) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (997).

[0134] According to various embodiments, the antenna module (997) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0135] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0136] According to one embodiment, commands or data may be transmitted or received between the electronic device (901) and an external electronic device (904) through a server (908) connected to a second network (999). Each of the external electronic devices (902, or 904) may be the same or a different type of device as the electronic device (901). According to one embodiment, all or part of the operations performed on the electronic device (901) may be performed on one or more of the external electronic devices (902, 904, or 908). For example, if the electronic device (901) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (901) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (901). The electronic device (901) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (901) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (904) may include an Internet of Things (IoT) device. The server (908) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (904) or the server (908) may be included within a second network (999).The electronic device (901) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0137] The technical problems to be solved in this disclosure are not limited to those mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art to which this disclosure belongs.

[0138] An electronic device as described above (e.g., electronic device (100)) may include a main circuit board (e.g., main circuit board (200)). The electronic device may include an integrated circuit (e.g., integrated circuit (205)) mounted on the main circuit board. The integrated circuit may include at least one first processor and a second processor. The electronic device may include a first non-volatile memory mounted on the main circuit board and comprising one or more storage media. One or more storage media included in the first non-volatile memory may include a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device. One or more storage media included in the first non-volatile memory may store a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The electronic device may include a second non-volatile memory mounted on the main circuit board and comprising one or more storage media. The electronic device may include a control circuit mounted on the main circuit board and electrically connected to the at least one first processor, the first non-volatile memory, and the second non-volatile memory. The at least one first processor may be configured to execute the first firmware program based on the start of the boot-up of the electronic device. The at least one first processor may be configured to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program.The at least one first processor may be configured to transmit a command to the control circuit based on the state of the second firmware program identified as abnormal. The control circuit may be configured to obtain, based on the command received from the at least one first processor, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as normal. The control circuit may be configured to replace at least a portion of the second firmware program stored in the second non-volatile memory with the backup version.

[0139] According to one embodiment of the present disclosure, the at least one first processor may be configured to change the power state of the integrated circuit to a power-off state based on transmitting the command. The control circuit may be configured to identify the power state of the integrated circuit based on the command received from the at least one first processor. The control circuit may be configured to access the first non-volatile memory to replace the at least part of the second firmware program with the backup version based on the power state of the integrated circuit identified as the power-off state.

[0140] According to one embodiment of the present disclosure, the power-off state may include a G3 state.

[0141] According to one embodiment of the present disclosure, the first firmware program may include a basic input / output system (BIOS).

[0142] According to one embodiment of the present disclosure, the at least one first processor may be configured to execute the first firmware program based on the start of the boot-up of the electronic device after the at least part of the second firmware program has been replaced with the backup version. The at least one first processor may be configured to identify the state of the second firmware program as the normal state based on a restoration based on the backup version using the first firmware program.

[0143] According to one embodiment of the present disclosure, the integrated circuit may further include a register used to identify the state of the second firmware program. The at least one first processor may be configured to identify a flag indicating the state of the second firmware program based on accessing the register when identifying the state of the second firmware program using the first firmware program. The at least one first processor may be configured to identify the state of the second firmware program as an abnormal state based on the flag identified as an error flag.

[0144] According to one embodiment of the present disclosure, the control circuit may be configured to obtain, from the second non-volatile memory, first hash data representing the backup version and the first hash value based on the command received from the at least one first processor. The control circuit may be configured to obtain second hash data representing the second hash value corresponding to the backup version using the backup version. The control circuit may be configured to access the first non-volatile memory to replace the at least part of the second firmware program with the backup version based on a determination that the first hash value is identical to the second hash value.

[0145] According to one embodiment of the present disclosure, the at least one first processor may be configured to transmit the command and offset information to the control circuit based on the state of the second firmware program identified as the abnormal state. The control circuit may be configured to identify the portion of the second firmware program to be restored using the offset information. The control circuit may be configured to replace the second portion of the second firmware program corresponding to the portion of the second firmware program with the first portion of the backup version corresponding to the portion of the second firmware program based on access to the first non-volatile memory.

[0146] According to one embodiment of the present disclosure, the command may be a first command. The at least one first processor may be configured to transmit a second command to the control circuit based on the state of the second firmware program identified as the abnormal state. The control circuit may be configured to determine, based on receiving the second command, whether the backup version available to restore the state of the second firmware program using a hash value is stored in the second non-volatile memory. The control circuit may be configured to transmit a response indicating the determination to the at least one first processor based on the determination that the backup version available to restore the state of the second firmware program is stored in the second non-volatile memory. The at least one first processor may be configured to transmit the first command to the control circuit based on receiving the response.

[0147] According to one embodiment of the present disclosure, the control circuit may be configured to obtain from the second non-volatile memory a backup version and third hash data representing a third hash value for determining whether the backup version available to restore the state of the second firmware program is stored in the second non-volatile memory based on receiving the second command. The control circuit may be configured to obtain fourth hash data representing a fourth hash value corresponding to the backup version using the backup version. The control circuit may be configured to determine that the backup version is available to restore the state of the second firmware program based on the determination that the third hash value is identical to the fourth hash value.

[0148] According to one embodiment of the present disclosure, the control circuit may include a third processor for executing a third firmware program. The third firmware program may be used to monitor the power status of the integrated circuit and to update the firmware program of the electronic device.

[0149] An electronic device as described above (e.g., electronic device (100)) may include a main circuit board (e.g., main circuit board (200)). The electronic device may include an integrated circuit (e.g., integrated circuit (205)) mounted on the main circuit board. The integrated circuit may include at least one first processor and a second processor. The electronic device may include a first non-volatile memory mounted on the main circuit board and comprising one or more storage media. One or more storage media included in the first non-volatile memory may include a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device. One or more storage media included in the first non-volatile memory may store a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The electronic device may include a second non-volatile memory mounted on the main circuit board and comprising one or more storage media. The electronic device may include a control circuit mounted on the main circuit board and electrically connected to the at least one first processor, the first non-volatile memory, and the second non-volatile memory. The at least one first processor may be configured to execute the first firmware program based on the start of the boot-up of the electronic device. The at least one first processor may be configured to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program.The at least one first processor may be configured to transmit a command to the control circuit based on the state of the second firmware program identified as being in a normal state. The control circuit may be configured to obtain a backup version of the second firmware program identified as being in a normal state from the first non-volatile memory based on the command received from the at least one first processor. The control circuit may be configured to store the backup version in the second non-volatile memory to be used to restore the state of the second firmware program identified as being in an abnormal state to the normal state.

[0150] According to one embodiment of the present disclosure, the at least one first processor may be configured to change the power state of the integrated circuit to a power-off state based on transmitting the command. The control circuit may be configured to identify the power state of the integrated circuit based on the command received from the at least one first processor. The control circuit may be configured to access the first non-volatile memory to obtain the backup version based on the power state of the integrated circuit identified as the power-off state.

[0151] According to one embodiment of the present disclosure, the power-off state may include a G3 state.

[0152] According to one embodiment of the present disclosure, the first firmware program may include a basic input / output system (BIOS).

[0153] According to one embodiment of the present disclosure, the integrated circuit may further include a register used to identify the state of the second firmware program. The at least one first processor may be configured to identify a flag indicating the state of the second firmware program based on accessing the register when identifying the state of the second firmware program using the first firmware program. The at least one first processor may be configured to identify the state of the second firmware program as a normal state based on the flag identified by a predetermined flag.

[0154] According to one embodiment of the present disclosure, the control circuit may be configured to acquire hash data corresponding to the backup version based on acquiring the backup version. The control circuit may be configured to store the backup version and the hash data, which are to be used to restore the state of the second firmware program to the normal state, in the second non-volatile memory.

[0155] According to one embodiment of the present disclosure, the at least one first processor may be configured to transmit to the control circuit version information indicating the command and the version of the second firmware program stored in the first non-volatile memory, based on the state of the second firmware program identified as the normal state. The control circuit may be configured to store in the second non-volatile memory the backup version to be used to restore the version information and the state of the second firmware program.

[0156] According to one embodiment of the present disclosure, the command may be a first command. The at least one first processor may be configured to transmit to the control circuit a second command and first version information indicating a first version of the second firmware program stored in the first non-volatile memory, based on the state of the second firmware program identified as the normal state. The control circuit may be configured to obtain from the second non-volatile memory second version information indicating a second version of data stored in the second non-volatile memory, based on receiving the second command and the first version information. The control circuit may be configured to transmit to the at least one first processor a response indicating a decision based on a decision that the second version is prior to the first version. The at least one first processor may be configured to transmit the first command to the control circuit based on receiving the response.

[0157] According to one embodiment of the present disclosure, the response may be a first response. The control circuit may be configured to determine whether the data is stored in the second non-volatile memory upon accessing the second non-volatile memory based on receiving the second command and the first version information. The control circuit may be configured to transmit a second response indicating the determination to the at least one first processor based on the determination that the data is not stored in the second non-volatile memory. The at least one first processor may be configured to transmit the first command to the control circuit based on receiving the second response.

[0158] According to one embodiment of the present disclosure, the response may be a first response. The control circuit may be configured to transmit a third response indicating a decision to the at least one first processor based on a decision that the second version is not prior to the first version. The at least one first processor may be configured to refrain from transmitting the first command to the control circuit based on receiving the third response.

[0159] According to one embodiment of the present disclosure, the control circuit may be configured to obtain, from the second non-volatile memory, second hash data representing a second hash value for verifying the data and the data stored in the second non-volatile memory, based on receiving the second command. The control circuit may be configured to obtain, using the data, third hash data representing a third hash value corresponding to the data. The control circuit may be configured to transmit the response to the at least one first processor based on a determination that the second hash value is identical to the third hash value.

[0160] An electronic device as described above (e.g., electronic device (100)) may include a main circuit board (e.g., main circuit board (200)). The electronic device may include an integrated circuit (e.g., integrated circuit (205)) disposed on the main circuit board. The integrated circuit may include at least one first processor (e.g., at least one first processor (210)) and a second processor (e.g., second processor (220)). The electronic device may include a first non-volatile memory (e.g., first memory (230)) mounted on the main circuit board and comprising one or more storage media. The one or more storage media may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The electronic device may include a second non-volatile memory (e.g., second memory (250)) mounted on the main circuit board and comprising one or more storage media. The electronic device may include a control circuit (e.g., control circuit (240)) mounted on the main circuit board and electrically connected to at least one first processor, the first non-volatile memory, and the second non-volatile memory. The first firmware program may include instructions that cause the electronic device to execute the first firmware program based on the start of the boot-up of the electronic device. The first firmware program may include instructions that cause the electronic device to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program.The first firmware program may include instructions that cause the electronic device to transmit a command to the control circuit based on the state of the second firmware program identified as abnormal. The control circuit may be configured to obtain, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as normal based on the command received from the at least one first processor. The control circuit may be configured to replace at least a portion of the second firmware program stored in the second non-volatile memory with the backup version.

[0161] A method performed by an electronic device (e.g., electronic device (100)) having, as described above, a main circuit board, an integrated circuit mounted on the main circuit board, a first non-volatile memory mounted on the main circuit board and comprising one or more storage media, a second non-volatile memory mounted on the main circuit board and comprising one or more storage media, and a control circuit mounted on the main board and electrically connected to at least one first processor, the first memory, and the second memory, may include an operation of executing a first firmware program based on the start of a boot-up of the electronic device. The integrated circuit may include at least one first processor and a second processor. The one or more storage media included in the first non-volatile memory may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of a security function according to a command of the at least one first processor. The above method may include an operation of executing the first firmware program based on the start of the boot-up of the electronic device. The above method may include an operation of identifying the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program. The above method may include an operation of transmitting a command to the control circuit based on the state of the second firmware program identified as abnormal.The control circuit may be configured to obtain, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as a normal state based on the command received from the at least one first processor. The control circuit may be configured to replace at least a portion of the second firmware program stored in the second non-volatile memory with the backup version.

[0162] In a computer-readable storage medium in which one or more programs are stored as described above, the one or more programs may include instructions that cause the electronic device to execute a first firmware program based on the start of a boot-up of the electronic device when executed by an electronic device (e.g., electronic device (100)) having a main circuit board, an integrated circuit mounted on the main circuit board, a first non-volatile memory mounted on the main circuit board and comprising one or more storage media, a second non-volatile memory mounted on the main circuit board and comprising one or more storage media, and a control circuit mounted on the main board and electrically connected to at least one first processor, the first memory, and the second memory. The integrated circuit may include at least one first processor and a second processor. The one or more storage media included in the first non-volatile memory may store a first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and a second firmware program configured to be executed by the second processor to provide at least some of the security functions according to the commands of the at least one first processor. The one or more programs may include instructions that cause the electronic device to execute the first firmware program based on the start of the boot-up of the electronic device when executed by the electronic device. The one or more programs may include instructions that cause the electronic device to identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device using the first firmware program when executed by the electronic device.The above one or more programs may include instructions that cause the electronic device to transmit a command to the control circuit based on the state of the second firmware program identified as abnormal when executed by the electronic device. The control circuit may be configured to obtain, from the second non-volatile memory, a backup version of the second firmware program that was backed up when the state of the second firmware program is identified as normal based on the command received from the at least one first processor. The control circuit may be configured to replace at least a portion of the second firmware program stored in the second non-volatile memory with the backup version.

[0163] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure belongs.

[0164] The device described above may be implemented as a hardware component, a software component, and / or a combination of a hardware component and a software component. For example, the device and components described in the embodiments may be implemented using one or more general-purpose or special-purpose computers, such as a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions. The processing unit may execute an operating system (OS) and one or more software applications executed on said operating system. Additionally, the processing unit may access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing unit may be described as being used as a single unit, but those skilled in the art will understand that the processing unit may include multiple processing elements and / or multiple types of processing elements. For example, the processing unit may include multiple processors or one processor and one controller. In addition, other processing configurations, such as parallel processors, are also possible.

[0165] Software may include computer programs, code, instructions, or a combination of one or more of these, and may configure a processing unit to operate as desired or instruct the processing unit independently or collectively. Software and / or data may be embodied in any type of machine, component, physical device, computer storage medium, or device so as to be interpreted by the processing unit or to provide instructions or data to the processing unit. Software may be distributed over networked computer systems and may be stored or executed in a distributed manner. Software and data may be stored on one or more computer-readable recording media.

[0166] The method according to the embodiment may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer-readable medium. In this case, the medium may continuously store a computer-executable program, or temporarily store it for execution or download. Additionally, the medium may be various recording or storage means in the form of a single or several combined hardware, and may not be limited to a medium directly connected to a computer system but may exist distributed over a network. Examples of media may include magnetic media such as hard disks, floppy disks, and magnetic tapes; optical recording media such as CD-ROMs and DVDs; magneto-optical media such as floptical disks; and media configured to store program instructions, including ROM, RAM, and flash memory. Additionally, other examples of media may include recording or storage media managed by app stores that distribute applications or sites and servers that supply or distribute various other software.

[0167] Although the embodiments have been described above with reference to limited examples and drawings, those skilled in the art can make various modifications and variations from the description above. For example, suitable results may be achieved even if the described techniques are performed in a different order than described, and / or the components of the described system, structure, device, circuit, etc. are combined or assembled in a form different from described, or replaced or substituted by other components or equivalents.

[0168] Therefore, other implementations, other embodiments of the present disclosure, and equivalents to the claims set forth below are also within the scope of the claims. According to one embodiment of the present disclosure, the method according to the various embodiments disclosed herein may be provided as a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created in a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0169] According to various embodiments of the present disclosure, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments of the present disclosure, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the components of the multiple components in the same or similar manner as those performed by the corresponding components among the multiple components prior to the integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0170] It will be understood that various embodiments of the present disclosure according to the claims and description of this specification may be implemented in the form of hardware, software, or a combination of hardware and software.

[0171] Such software may be stored on a non-transient computer-readable storage medium. A non-transient computer-readable storage medium stores one or more computer programs (software modules), and one or more computer programs include computer-executable instructions that cause the electronic device to perform the method of the present disclosure when executed by one or more processors of the electronic device.

[0172] Such software may be stored on a volatile or non-volatile storage device, such as a storage device (regardless of whether it is erasable or rewritable), such as read-only memory (ROM), or in the form of memory (e.g., random access memory (RAM), memory chip, device, or integrated circuit), or on an optically or magnetically readable medium (e.g., compact disc (CD), digital multifunction disc (DVD), magnetic disc, or magnetic tape, etc.). It will be understood that the storage device and storage medium are various embodiments of a non-transient machine-readable storage device suitable for storing computer programs or computer programs that include instructions that implement various embodiments of the present disclosure at execution. Accordingly, various embodiments provide a program including code for implementing the device or method claimed in one of the claims of this specification, and a non-transient machine-readable storage device for storing such program.

[0173] Although the present disclosure has been illustrated and described with reference to various embodiments, those skilled in the art will understand that various changes in form and detail are possible without departing from the spirit and scope of the present disclosure as defined by the appended claims and equivalents.

Claims

1. In an electronic device, main circuit board; An integrated circuit mounted on the main circuit board above; The above integrated circuit is: At least one first processor, and Includes a second processor, A first non-volatile memory mounted on the main circuit board and comprising one or more storage media; The above one or more storage media are: A first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and A second firmware program configured to be executed by the second processor to provide at least a portion of security functions according to the command of the first processor, and A second non-volatile memory mounted on the main circuit board and comprising one or more storage media; and A control circuit mounted on the main circuit board and electrically connected to at least one first processor, the first non-volatile memory, and the second non-volatile memory, and The above at least one first processor is: Based on the start of the boot-up of the electronic device, the first firmware program is executed; Using the first firmware program, identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device; and Based on the state of the second firmware program identified as being in an abnormal state, the command is configured to be transmitted to the control circuit, and The above control circuit is: Based on the command received from the at least one first processor, if the state of the second firmware program is identified as a normal state, a backup version of the second firmware program that was backed up is obtained from the second non-volatile memory; and Configured to replace at least a portion of the second firmware program stored in the first non-volatile memory with the backup version, Electronic device.

2. In claim 1, the at least one first processor is, Based on transmitting the above command, the power state of the integrated circuit is configured to be changed to a power-off state, and The above control circuit is: Based on the command received from at least one first processor, the power state of the integrated circuit is identified; and Configured to access the first non-volatile memory to replace at least a portion of the second firmware program with the backup version based on the power state of the integrated circuit identified as the power-off state. Electronic device.

3. In claim 2, the power-off state is, including G3 state, Electronic device.

4. In claim 1, the first firmware program is, including BIOS (basic input / output system), Electronic device.

5. In Claim 1, The above at least one first processor is: After at least a portion of the second firmware program is replaced with the backup version, the first firmware program is executed based on the start of the boot-up of the electronic device, and Configured to identify the state of the second firmware program as the normal state according to restoration based on the backup version using the first firmware program. Electronic device.

6. In claim 1, the integrated circuit is, It further includes a register used to identify the state of the second firmware program, and The above at least one first processor is: When identifying the state of the second firmware program using the first firmware program, a flag indicating the state of the second firmware program is identified based on accessing the register; and Configured to identify the state of the second firmware program as the abnormal state based on the flag identified as an error flag, Electronic device.

7. In claim 1, the control circuit comprises: Based on the command received from the at least one first processor, first hash data representing the backup version and the first hash value is obtained from the second non-volatile memory; Using the above backup version, obtain second hash data representing a second hash value corresponding to the above backup version; and Configured to access the first non-volatile memory to replace at least a portion of the second firmware program with the backup version based on a determination that the first hash value is identical to the second hash value. Electronic device.

8. In claim 1, the at least one first processor is, Based on the state of the second firmware program identified as the abnormal state, the command and offset information is configured to be transmitted to the control circuit, and The above control circuit is: Using the above offset information, identify the part of the second firmware program to be restored; and Based on accessing the first non-volatile memory, configured to replace the second part of the second firmware program corresponding to the part of the second firmware program with the first part of the backup version corresponding to the part of the second firmware program. Electronic device.

9. In claim 1, the command is, It is the first command, and The above at least one first processor is, Based on the state of the second firmware program identified as the abnormal state, the second command is configured to be transmitted to the control circuit, and The above control circuit is: Based on receiving the second command, determining whether the backup version available to restore the state of the second firmware program using a hash value is stored in the second non-volatile memory; and Based on the determination that the backup version available for restoring the state of the second firmware program is stored in the second non-volatile memory, the system is configured to transmit a response indicating the determination to the at least one first processor, and The above at least one first processor is, Configured to transmit the first command to the control circuit based on receiving the above response, Electronic device.

10. In claim 9, the control circuit is: Based on receiving the second command, a third hash data representing a third hash value for determining whether the backup version available to restore the state of the second firmware program is stored in the second non-volatile memory, and the backup version are obtained from the second non-volatile memory; Using the above backup version, obtain fourth hash data representing a fourth hash value corresponding to the above backup version; and Configured to determine that the backup version is available to restore the state of the second firmware program based on the determination that the third hash value is identical to the fourth hash value. Electronic device.

11. In claim 1, the control circuit is, It includes a third processor for executing a third firmware program, and The above third firmware program is, Used to monitor the power status of the above integrated circuit and to update the firmware program of the above electronic device, Electronic device.

12. In an electronic device, main circuit board; An integrated circuit mounted on the main circuit board above; The above integrated circuit is: At least one first processor, and Includes a second processor, A first non-volatile memory mounted on the main circuit board and comprising one or more storage media; The above one or more storage media are: A first firmware program configured to be executed individually or collectively by the at least one first processor to perform a boot-up of the electronic device, and A second firmware program configured to be executed by the second processor to provide at least a portion of security functions according to the command of the first processor, and A second non-volatile memory mounted on the main circuit board and comprising one or more storage media; and A control circuit mounted on the main circuit board and electrically connected to at least one first processor, the first non-volatile memory, and the second non-volatile memory, and The above at least one first processor is: Based on the start of the boot-up of the electronic device, the first firmware program is executed; Using the first firmware program, identify the state of the second firmware program executed by the second processor based on the start of the boot-up of the electronic device; and Based on the state of the second firmware program identified as being in a normal state, the command is configured to be transmitted to the control circuit, and The above control circuit is: Based on the command received from at least one first processor, a backup version of the second firmware program identified as being in a normal state is obtained from the first non-volatile memory; and Configured to store, in the second non-volatile memory, the backup version to be used to restore the state of the second firmware program identified as an abnormal state to the normal state. Electronic device.

13. In claim 12, the at least one first processor is, Based on transmitting the above command, the power state of the integrated circuit is configured to be changed to a power-off state, and The above control circuit is: Based on the command received from at least one first processor, the power state of the integrated circuit is identified; and Configured to access the first non-volatile memory to obtain the backup version based on the power state of the integrated circuit identified as the power-off state. Electronic device.

14. In claim 12, the integrated circuit is, It further includes a register used to identify the state of the second firmware program, and The above at least one first processor is: When identifying the state of the second firmware program using the first firmware program, a flag indicating the state of the second firmware program is identified based on accessing the register; and Configured to identify the state of the second firmware program as a normal state based on the flag identified by a predetermined flag, Electronic device.

15. In claim 12, the control circuit is: Based on obtaining the above backup version, hash data corresponding to the above backup version is obtained; and Configured to store the backup version and the hash data to be used to restore the state of the second firmware program to the normal state within the second non-volatile memory. Electronic device.

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