Method for producing an optoelectronic component, optoelectronic semiconductor chip and optoelectronic component

Abstract

A method for producing an optoelectronic component comprises providing a wafer having at least one bond pad arranged on a top side, creating a resist structure on the bond pad, creating a layer of converter material on the top side, wherein the converter material covers the resist structure, saw dicing the layer of converter material to create access to the resist structure, wherein saw dicing is carried out using a saw blade having a width that is smaller than a width of the resist structure, and stripping the resist structure.

Description

[0001] 2024EM01199 1

[0002] METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT, OPTOELECTRONIC SEMICONDUCTOR CHIP AND OPTOELECTRONIC COMPONENT

[0003] DESCRIPTION

[0004] The present invention relates to a method for producing an optoelectronic component, to an optoelectronic semiconductor chip and to an optoelectronic component .

[0005] This patent application claims the priority of German patent application 10 2025 100 010.7, the disclosure content of which is hereby incorporated by reference .

[0006] Several different methods are known in the start of the art to provide optoelectronic semiconductor chips with layers of converter material for converting a wavelength of electromagnetic radiation.

[0007] It is an obj ect of the present invention to provide a method for producing an optoelectronic component . It is a further obj ect of the present invention to provide an optoelectronic semiconductor chip . It is a further obj ect of the present invention to provide an optoelectronic component . These obj ectives are achieved by a method for producing an optoelectronic component, an optoelectronic semiconductor chip and an optoelectronic component according to the independent claims . Further variants are disclosed in the dependent claims .

[0008] A method for producing an optoelectronic component comprises providing a wafer having at least one bond pad arranged on a top side, creating a resist structure on the bond pad, creating a layer of converter material on the top side, wherein the converter material covers the resist structure, saw dicing the layer of converter material to create access to the resist structure, wherein saw dicing is carried out using a saw blade having a width that is smaller than a width of the resist structure, and stripping the resist structure .2024EM01199 2

[0009] Advantageously, this method allows to create the layer of converter material with a thickness that exceeds a height of the resist structure . The method can be implemented using existing technologies and can be carried out at low costs .

[0010] In a variant of the method, the resist structure is created with a height of less than 60 pm, in particular less than 50 pm. The resist structure may be created with a height of 45 pm, for example . Advantageously, a resist structure with this height can be created in a reliable and reproducible manner .

[0011] In a variant of the method, the resist structure is created with a width between 30 pm and 100 pm. The resist structure may be created with a width of 50 pm, for example . Advantageously, such a width of the resist structure is sufficient to cover the bond pad on the top side of the wafer .

[0012] In a variant of the method, the resist structure comprises a plurality of bars forming a grid. In this way, the resist structure may form a grid around a plurality of individual chip portions of the wafer .

[0013] In a variant of the method, saw dicing is carried out using a saw blade having a width between 10 pm and 40 pm. The width of the saw blade may be 25 pm, for example . The width of the saw blade may be lower than the width of the resist structure . In this way, a notch is created after stripping the resist structure . The notch may advantageously improve a brightness of the optoelectronic component .

[0014] An alternative variant of the method for producing an optoelectronic component comprises providing a wafer having at least one bond pad arranged on a top side, creating a first resist structure on the bond pad, creating a second resist structure on the first resist structure, creating a layer of2024EM01199 3

[0015] converter material on the top side, and stripping the first resist structure and the second resist structure .

[0016] This method advantageously allows to create the layer of converter material with a thickness that equals the sum of the heights of the first resist structure and the second resist structure . This variant of the method can also be implemented using existing technology and can be carried out at low costs .

[0017] In a variant of the method, the first resist structure and the second resist structure are each created with a height of less than 60 pm, in particular less than 50 pm. The first resist structure and the second resist structure may be created with a height of 45 pm each, for example . Advantageously, such first resist structures and second resist structures can be created in a reliable and reproducible manner .

[0018] In a variant of the method, the first resist structure is created with a width between 30 pm and 100 pm. The width of the first resist structure may be around 50 pm, for example . Advantageously, this width of the first resist structure allows to cover the bond pad arranged on the top side of the wafer .

[0019] In a variant of the method, the width of the second resist structure is smaller than the width of the first resist structure . In this way, a notch is created after stripping the first resist structure and the second resist structure . This notch may improve the brightness of the optoelectronic component that is produced by this method.

[0020] In a variant of the method, the layer of converter material is created with a thickness of more than 80 pm, in particular more than 90 pm, in particular more than 100 pm. Advantageously, a layer of converter material having such a thickness may be higher than a bond wire connected to the bond pad .2024EM01199 4

[0021] In a variant of the method, the converter material comprises converter particles arranged in a siloxane matrix . The converter material may be designed to convert electromagnetic radiation into electromagnetic radiation having a different wavelength .

[0022] In a variant of the method, the layer of converter material is created by a casting method. Advantageously, this allows to create a layer of converter material in a simple and cost-effective manner .

[0023] A variant of the method further comprises dividing the wafer to obtain at least one optoelectronic semiconductor chip, wherein the bond pad is arranged on a top side of the optoelectronic semiconductor chip, arranging the optoelectronic semiconductor chip on a carrier, and connecting a bond wire to the bond pad. The optoelectronic semiconductor chip comprises a part of the layer of converter material that has previously been created on the top side of the wafer . Advantageously, the layer of converter material may comprise a height that exceeds the height of the bond wire connected to the bond pad.

[0024] A variant of the method further comprises embedding the optoelectronic semiconductor chip, the layer of converter material and the bond wire into a mold body. The mold body may advantageously protect the optoelectronic semiconductor chip, the converter material, and the bond wire .

[0025] In a variant of the method, the mold body is formed with a flat top side . Since the height of the layer of converter material may advantageously exceed the height of the bond wire, the top side of the mold body advantageously does not need to protrude above a top side of the layer of converter material to fully cover the bond wire . Advantageously, this allows to form the mold body in a simple and convenient way.2024EM01199 5

[0026] In a variant of the method, a top side of the layer of converter material remains at least partially uncovered by the mold body. Advantageously, this allows light to be emitted from the top side of the layer of converter material .

[0027] An optoelectronic semiconductor chip has a bond pad arranged on the top side . A layer of converter material is arranged on the top side . A notch is formed in at least some parts of an outer circumference of the layer of converter material . The bond pad is not covered by the layer of converter material . The layer of converter material comprises a thickness of more than 80 pm, in particular more than 90 pm, in particular more than 100 pm.

[0028] Advantageously, the layer of converter material may be higher than a bond wire connected to the bond pad.

[0029] An optoelectronic component comprises an optoelectronic semiconductor chip as described above . The optoelectronic semiconductor chip is arranged on a carrier . A bond wire is connected to the bond pad. The optoelectronic semiconductor chip, the layer of converter material and the bond wire are embedded into a mold body.

[0030] The mold body of this optoelectronic component may serve to protect the bond wire, the layer of converter material and the optoelectronic semiconductor chip . Since the layer of converter material may be thick enough to be higher than the bond wire connected to the bond pad, a top side of the mold body does not need to protrude above a top side of the layer of converter material to fully cover the bond wire . In this way, the mold body may comprise a flat top side that is flush with the top side of the layer of converter material .

[0031] The above-described properties, features and advantages of the invention, as well as the manner in which they are achieved, will become more clearly and comprehensively understandable through the following description of exemplary2024EM01199 6

[0032] variants . These variants will be explained in more detail in conjunction with the drawings, in which, in schematic representation :

[0033] Fig. 1 shows a sectional view of a wafer;

[0034] Fig. 2 shows a top view of the wafer;

[0035] Fig. 3 shows a sectional view of the wafer with a resist structure arranged on a top side of the wafer;

[0036] Fig. 4 shows a top view of the wafer and the resist structure ;

[0037] Fig. 5 shows the wafer with a layer of converter material created on the top side;

[0038] Fig. 6 shows the wafer during saw dicing of the layer of converter material;

[0039] Fig. 7 shows the wafer after stripping the resist structure ;

[0040] Fig. 8 shows a top view of a singulated optoelectronic semiconductor chip;

[0041] Fig. 9 shows a schematic sectional view of an optoelectronic component comprising the optoelectronic semiconductor chip;

[0042] Fig. 10 shows a sectional view of the wafer with a first resist structure and a second resist structure arranged on the top side according to another variant of the method;

[0043] Fig. 11 shows the wafer with a layer of converter material created on the top side; and2024EM01199 7

[0044] Fig. 12 shows the wafer after stripping the first resist structure and the second resist structure .

[0045] Figure 1 shows a schematic sectional view of a part of a wafer 100 having a top side 101. Figure 2 shows a schematic top view of the wafer 100.

[0046] The wafer 100 comprises at least one portion 140 that can be singulated to form an optoelectronic semiconductor chip 600 having a top side 601 that is formed from a portion of the top side 101 of the wafer 100. In most cases, the wafer 100 will comprise a plurality of such portions 140 that can be singulated along separation lines 130 into a plurality of optoelectronic semiconductor chips 600. These portions 140 may be arranged in a regular matrix pattern having rows and columns .

[0047] The optoelectronic semiconductor chips 600 that can be obtained by singulating the portion 140 of the wafer 100 are designed to emit electromagnetic radiation such as visible light . The optoelectronic semiconductor chips 600 may be light emitting diode chips (LED chips) , for example .

[0048] Each portion 140 of the wafer 100 comprises a mesa 120 arranged at the top side 101 of the wafer 100. The mesa 120 forms a light emitting surface for the optoelectronic semiconductor chip 600. The mesas 120 may be raised above other sections of the top side 101 of the wafer 100.

[0049] Each portion 140 of the wafer 100 furthermore comprises at least one bond pad 110 arranged at the top side 101 of the wafer 100 next to the mesa 120 of the respective portion 140. The bond pad 110 is provided to be connected to a bond wire to provide the optoelectronic semiconductor chip 600 with electric voltage and electric current .

[0050] Figure 3 shows a schematic sectional view of the wafer 100 in a processing state that follows the state depicted in figures2024EM01199 8

[0051] 1 and 2. Figure 4 shows a schematic top view of the top side 101 of the wafer 100 in this processing state .

[0052] A resist structure 300 has been created on the top side 101 of the wafer 100 such that the resist structure 300 covers the at least one bond pad 110 of the at least one portion 140 of the wafer 100. In the example depicted in figures 3 and 4, the resist structure 300 is formed with a plurality of bars 310 that form a regular grid 320 around the mesas 120 of all portions 140 of the wafer 100. In this way, the resist structure 300 covers all bond pads 110 arranged on the top side 101 of the wafer 100.

[0053] The resist structure 300 may be created from a photo resist using a photolithography method, for example .

[0054] The resist structure 300 is created with a height 330 measured in a direction perpendicular to the top side 101 of the wafer 100. The height 330 may be less than 60 pm, for example, or even less than 50 pm. The height 330 may be 45 pm, for example . In this way, the resist structure 300 can be created with a well-defined and reproducible shape and cross section .

[0055] The bars 310 of the resist structure 300 covering the bond pads 110 comprise a width 340 measured in a direction parallel to the top side 101 of the wafer 100. The width 340 may be between 30 pm and 100 pm, for example . In one example, the width 340 is 50 pm.

[0056] Figure 5 shows a schematic depiction of the wafer 100 in a processing state that follows the state depicted in figures 3 and 4. A layer of converter material 400 has been created on the top side 101 of the wafer 100. The layer of converter material 400 comprises a top side 401 which faces away from the top side 101 of the wafer 100. The converter material 400 covers at least a part of the top side 101 of the wafer or the2024EM01199 9

[0057] entire top side 101 of the wafer 100 and the resist structure 300 .

[0058] The layer of converter material 400 comprises a thickness 410 measured in a direction perpendicular to the top side 101. The thickness 410 of the layer of converter material 400 is larger than the height 330 of the resist structure 300. The thickness 410 may be higher than 80 pm and may even be higher than 90 pm or 100 pm.

[0059] The converter material 400 is designed to convert at least a part of light emitted by the optoelectronic semiconductor chips 600 that can be obtained from the wafer 100 into a light having a different wavelength. The converter material 400 may comprise converter particles arranged in a siloxane matrix, for example .

[0060] The layer of converter material 400 may be created by a casting method, for example .

[0061] Figure 6 shows a schematic sectional side view of a process step that follows the depiction of figure 5. Saw dicing of the layer of converter material 400 is carried out to create access to the resist structure 300. Saw dicing is carried out along the bars 310 of the resist structure 300 using a saw blade 500. Saw lines created by saw dicing the layer of converter material 400 using the saw blade 500 may be centered above the bars 310 of the resist structure 300.

[0062] The saw blade 500 comprises a width 510. The width 510 may be smaller than the width 340 of the bars 310 of the resist structure 300. The width 510 of the saw blade 500 may be between 10 pm and 40 pm, for example . In one example, the width 510 of the saw blade 500 may be 25 pm.

[0063] Figure 7 shows a schematic sectional view of the wafer 100 in a processing state that follows the state depicted in figure 6. The resist structure 300 has been stripped (removed) . This2024EM01199 10

[0064] may have been done by means of a solvent that penetrated through the openings created by saw dicing the layer of converter material 400.

[0065] Since the width 340 of the bars 310 of the resist structure 300 was higher than the width 410 of the saw blade 500 that has created the openings in the layer of converter material 400 in this example, notches 420 have been created around the mesas 120 of the portions 140 of the wafer 100. These notches 420 are formed from the cavities that remained after the removal of the resist structure 300.

[0066] In a following process step, the wafer 100 is divided along the separation lines 130 to separate and obtain the one or more optoelectronic semiconductor chips 600.

[0067] Figure 8 shows a schematic depiction of the top side 601 of one of these optoelectronic semiconductor chips 600 formed from one of the portions 140 of the wafer 100. The top side 601 comprises one of the mesas 120 and one or more bond pads 110. A part of the converter material 400 is arranged on the mesa 120. The notch 420 is formed in at least some parts of an outer circumference of the part of the layer of converter material 400. The layer of converter material 400 may slightly proj ect beyond the border of the mesa 120 due to the notches 420. The thickness 410 of the layer of converter material 400 may be higher than 80 pm or higher than 90 pm or higher than 100 pm. The bond pad 110 is not covered by the converter material 400.

[0068] Figure 9 shows a schematic sectional side view of an optoelectronic component 700 that can be manufactured from the optoelectronic semiconductor chip 600 by further processing steps . To this end, the optoelectronic semiconductor chip 600 is arranged on a carrier 710. A bond wire 720 is connected to the bond pad 110 of the optoelectronic semiconductor chip 600. Then, the optoelectronic semiconductor chip 600, the layer of converter material 400 arranged on the top side 6012024EM01199 11

[0069] of the optoelectronic semiconductor chip 600 and the bond wire 720 connected to the bond pad 110 of the optoelectronic semiconductor chip 600 are embedded into a mold body 730. The mold body 730 may be created by film-assisted molding, for example .

[0070] In most variants, the top side 401 of the layer of converter material 400 arranged on the top side 601 of the optoelectronic semiconductor chip 600 will not be covered by the mold body 730 such that light generated by the optoelectronic semiconductor chip 600 can be emitted at the top side 401 of the layer of converter material 400 without attenuation.

[0071] The thickness 410 of the layer of converter material 400 arranged at the top side 601 of the optoelectronic semiconductor chip 600 may be large enough that the layer of converter material 400 protrudes above the bond wire 720 in the direction perpendicular to the top side 601 of the optoelectronic semiconductor chip 600. This allows to form the mold body 730 with a flat top side 740 that is flush with the top side 401 of the layer of converter material 400 while still fully covering the bond wire 720. The flat top side 740 of the mold body 730 may help to reduce stray light leaking through the mold body 730 of the optoelectronic component 700.

[0072] The notches 420 created at the bottom side of the layer of converter material 400 in at least some parts of an outer circumference of the layer of converter material 400 may increase the brightness of the light emitted by the optoelectronic component 700.

[0073] In the following, an alternative variant of the fabrication method described above will be explained in conjunction with figures 10 to 12. The following description will focus on the differences between the previous variant of the method and the alternative variant of the method. Otherwise, the preceding description also applies to the alternative variant of the method.2024EM01199 12

[0074] Figure 10 shows a schematic sectional view of a processing state that follows the depiction of figures 1 and 2.

[0075] In a first process step, a first resist structure 301 has been created on the bond pads 110 on the top side 101 of the wafer 100. The first resist structure is formed like the resist structure 300 described in conjunction with figures 3 and 4. The first resist structure 301 comprises a height 331 and a width 341 that correspond to the height 330 and the width 340 of the resist structure 300 respectively.

[0076] In a following process step, a second resist structure 302 has been created on the first resist structure 301. The second resist structure 302 may comprise bars 310 forming a grid 320 like the first resist structure 301.

[0077] The second resist structure 302 comprises a height 332 measured in a direction perpendicular to the top side 101 of the wafer 100. The height 332 of the second resist structure 302 may comprise a value from the same range as described in conjunction with the height 330 of the resist structure 300. The height 332 of the second resist structure 302 may be smaller, the same or larger than the height 331 of the first resist structure 301. In particular, the height 331 of the first resist structure 301 and the height 332 of the second resist structure 302 may each be less than 60 pm or even less than 50 pm. In one example, the height 331 of the first resist structure 301 and / or the height 332 of the second resist structure 302 is 45 pm.

[0078] The bars 310 of the second resist structure 302 comprise a width 342 measured in a direction parallel to the top side 101 of the wafer 100. The width 342 may comprise a value from the same range as described in conjunction with the width 340 of the resist structure 300. In the example depicted in figure 10, the width 342 of the second resist structure 302 is smaller than the width 341 of the first resist structure 301.2024EM01199 13

[0079] The width 342 of the second resist structure 302 may be

[0080] 25 pm, for example .

[0081] Figure 11 shows a schematic sectional view of a processing state that follows the processing state depicted in figure 10 .

[0082] The layer 400 of converter material has been created on the top side 101 of the wafer 100 as described above in conjunction with figure 5. The thickness 410 of the layer of converter material 400 is such that the second resist structure 302 is not entirely covered by the converter material 400 but remains accessible at the top side 401 of the converter material 400. This means that the thickness 410 of the layer of converter material 400 is smaller or equal to the sum of the height 331 of the first resist structure 301 and the height 332 of the second resist structure 302.

[0083] Figure 12 shows a schematic sectional view of a processing state that follows the depiction of figure 11. The first resist structure 301 and the second resist structure 302 have been stripped (removed) . This has created a structure that is similar to the structure described in conjunction with figure 7. Since the width 342 of the second resist structure 302 was smaller than the width 341 of the first resist structure 301 in the example depicted in figure 11, notches 420 have been created .

[0084] In the following, the fabrication method continues as described above in conjunction with figures 7 to 9 .

[0085] The invention has been illustrated and described in more detail with the aid of exemplary variants . The invention is not, however, restricted to the examples disclosed. Rather, other variants may be derived therefrom by a person skilled in the art .2024EM01199 14

[0086] REFERENCE SYMBOLS

[0087] 100 wafer

[0088] 101 top side

[0089] 110 bond pad

[0090] 120 mesa

[0091] 130 separation line

[0092] 140 portion

[0093] 300 resist structure

[0094] 310 bars

[0095] 320 grid

[0096] 330 height

[0097] 340 width

[0098] 301 first resist structure

[0099] 302 second resist structure

[0100] 331 height

[0101] 332 height

[0102] 341 width

[0103] 342 width

[0104] 400 layer of converter material

[0105] 401 top side

[0106] 410 thickness

[0107] 420 notch

[0108] 500 saw blade

[0109] 510 width

[0110] 600 optoelectronic semiconductor chip 601 top side

[0111] 700 optoelectronic component

[0112] 710 carrier

[0113] 720 bond wire

[0114] 730 mold body

[0115] 740 flat top side

Claims

2024EM01199 15CLAIMS1. A method for producing an optoelectronic component (700) comprising- providing a wafer ( 100) having at least one bond pad ( 110) arranged on a top side ( 101 ) ;- creating a resist structure (300) on the bond pad ( 110) ;- creating a layer of converter material (400) on the top side ( 101 ) , wherein the converter material (400) covers the resist structure (300) ;- saw dicing the layer of converter material (400) to create access to the resist structure (300) ,wherein saw dicing is carried out using a saw blade (500) having a width (510) that is smaller than a width (340) of the resist structure (300) ;- stripping the resist structure (300) .

2. The method according to claim 1,wherein the resist structure (300) is created with a height (330) of less than 60 pm, in particular less than 50 pm.

3. The method according to any one of the preceding claims, wherein the width (340) of the resist structure (300) is between 30 pm and 100 pm.

4. The method according to any one of the preceding claims, wherein the resist structure (300) comprises a plurality of bars (310) forming a grid (320) .

5. The method according to any one of the preceding claims, wherein the width (510) of the saw blade (500) is between 10 pm and 40 pm.

6. A method for producing an optoelectronic component (700) comprising- providing a wafer ( 100) having at least one bond pad2024EM01199 16( 110) arranged on a top side ( 101 ) ;- creating a first resist structure (301 ) on the bond pad ( 110) ;- creating a second resist structure (302 ) on the first resist structure (301 ) ;- creating a layer of converter material (400) on the top side ( 101 ) ;- stripping the first resist structure (301 ) and the second resist structure (302 ) .

7. The method according to claim 6,wherein the first resist structure (301 ) and the second resist structure (302 ) are each created with a height (331, 332 ) of less than 60 pm, in particular less than 50 pm.

8. The method according to any one of claims 6 and 7, wherein the first resist structure (301 ) is created with a width (341 ) between 30 pm and 100 pm.

9. The method according to claim 8,wherein a width (342 ) of the second resist structure (302 ) is smaller than the width (341 ) of the first resist structure ( 301 ) .

10. The method according to any one of the preceding claims, wherein the layer of converter material (400) is created with a thickness (410) of more than 80 pm, in particular more than 90 pm, in particular more than 100 pm.

11. The method according to any one of the preceding claims, wherein the converter material (400) comprises converter particles arranged in a siloxane matrix .

12. The method according to any one of the preceding claims, wherein the layer of converter material (400) is created by a casting method.2024EM01199 1713. The method according to any one of the preceding claims, the method further comprising- dividing the wafer ( 100) to obtain at least one optoelectronic semiconductor chip ( 600) , wherein the bond pad ( 110) is arranged on a top side ( 601 ) of the optoelectronic semiconductor chip ( 600) ;- arranging the optoelectronic semiconductor chip ( 600) on a carrier (710) ;- connecting a bond wire (720) to the bond pad ( 110) .

14. The method according to claim 13,- embedding the optoelectronic semiconductor chip ( 600) , the layer of converter material (400) and the bond wire (720) into a mold body (730) .

15. The method according to claim 14,wherein the mold body (730) is formed with a flat top side (740) .

16. The method according to any one of claims 14 and 15, wherein a top side (401 ) of the layer of converter material (400) remains at least partially uncovered by the mold body (730) .

17. An optoelectronic semiconductor chip ( 600)having a bond pad ( 110) arranged on a top side ( 601 ) , wherein a layer of converter material (400) is arranged on the top side ( 601 ) ,wherein a notch (420) is formed in at least some parts of an outer circumference of the layer of converter material (400) ,wherein the bond pad ( 110) is not covered by the layer of converter material (400) ,wherein the layer of converter material (400) comprises a thickness (410) of more than 80 pm, in particular more than 90 pm, in particular more than 100 pm.2024EM01199 1818. An optoelectronic component (700)comprising an optoelectronic semiconductor chip ( 600) according to claim 17,wherein the optoelectronic semiconductor chip ( 600) is arranged on a carrier (710) ,wherein a bond wire (720) is connected to the bond pad ( 110) ,wherein the optoelectronic semiconductor chip ( 600) , the layer of converter material (400) and the bond wire (720) are embedded into a mold body (730) .

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