Energy Efficient ICT TRIZ Cases
- SPB Network Configuration via Edge Device Automation
Edge configuration device requests SPB settings from a remote management server to enable non-compatible end devices on the network.
- Network Power Management via Service Request Signaling
Service-based power management reduces energy waste by activating resources only during active service requests.
- Storage Controller Dynamic Clock Voltage Adjustment
Controller changes clock frequency and voltage level during data transmission to reduce power consumption in idle periods.
- USB ID Line Power Negotiation for Fast Charging
A USB identification line enables bidirectional communication between connected devices to negotiate power characteristics dynamically.
- GPU Power Management via Instant-On Boot Detection
A system detects instant-on boot events to disable additional graphics processing units and conserve battery power in portable devices.
- Storage System Current Management for Flash Memory Voltage Stability
A storage system manages current consumption across multiple flash memory devices using a state machine to coordinate operations.
- Mode-Switching Interface for Ultra Mobile Devices
Dynamic interface switching between large and small modes optimizes screen space utilization while reducing power consumption in ultra mobile devices.
- Communication Terminal Periodic Beacon Scanning for Power Reduction
A communication terminal alternates transmission and reception modes cyclically to reduce power consumption during ad hoc network discovery.
- Network Device Configuration Synchronization via Recursive Propagation
A network device propagates configuration files to peer devices using a processing engine and recursive link layer discovery protocol.
- Multi-Core Processor Clock Rate Prioritization via Dynamic Monitoring
A monitoring module measures instruction arrival rates to calculate optimal service frequencies for individual processor cores.
- Auto-Suspend NAND Die Control for Peak Power Management
NAND die auto-suspend and resume operations stagger high-current events, reducing peak power consumption without extending execution duration.
- PHICH Allocation by Transmit Energy Sorting
Sorts PHICH resources by transmit energy to balance group loads and reduce interference variance.
- Dynamic Function-Based Power Control for Integrated Circuits
A bridge unit manages functional units by applying clock-gating and power-gating based on idle time thresholds.
- Dynamic Power Grid Sharing for Noise Reduction
A controller adjusts switch states to dynamically share power grids, reducing noise interference and enabling independent voltage scaling.
- Dynamic Bus Clock Scaling for Power-Performance Tradeoffs
Bus frequency controller adjusts clock speed based on master module activity, resolving the contradiction between reduced CPU power and degraded bus bandwidth.
- Clock Gating Opportunity Detection in Pipelined Circuits
Automated simulation detects clock gating opportunities in pipeline stages, reducing active power consumption without manual design complexity.
- Bus Transceiver Self-Configuration via Wake-Up Detector
A bus transceiver uses a wake-up detector to configure itself from microcontroller signals without extra pins.
- Multi-Threading Processor Power Management via Buffer Monitoring
A resource manager monitors buffer levels and thread states to coordinate dispatch timing in multi-threading processors.
- Synchronous Bus Signal Encoding for Energy Reduction
Encoding digital signals onto a shared bus lead reduces switching activity.
- Power Supply Module Discovery Protocol for Load Sharing
Controllers exchange discovery messages to negotiate power budgets, enabling efficient load sharing while reducing formation complexity.
- Ultra-low Power Wireless Channel Selection via Frequency Segmentation
Frequency segmentation and priority assignment allow the apparatus to select clean channels, resolving interference from high-power services in shared bands.
- Current Balancing Module for Microprocessor Power Management
A current balancing module reduces consumption differences between processor modules using a buck converter.
- USB to SATA Bridge Power Limiting via Command Delay
A USB to SATA bridge delays acknowledgments to manage power usage within USB limits.