A method for manufacturing an LED chip and a mask set for an LED chip

Abstract

The application discloses a manufacturing method of an LED chip and a mask set used for the LED chip, and reserves a measurement pattern area on an LED chip wafer; measurement patterns to be measured are transferred to the measurement pattern area to obtain an LED chip wafer finished product; the mask set used for the pattern transfer comprises a plurality of mask bodies; each mask body is provided with the same measurement pattern area; the measurement pattern area is provided with a measurement pattern; when the measurement pattern areas on the plurality of mask bodies are overlapped, the measurement patterns on each mask body are not overlapped with each other, different measurement patterns have a certain spacing, other lines are prevented from interfering, and based on the measurement pattern area, some film layers which are irrelevant to line width measurement and can cause contrast reduction can be selectively not plated through photolithography, so that the line width measurement value error caused by pattern stacking or film layer multiple contrast difference or no data is avoided, and subsequent AOI machine is facilitated to accurately measure the line width of the LED chip.

Description

Technical Field

[0001] This invention relates to the field of semiconductor electronics technology, and more particularly to a method for manufacturing an LED chip and a photomask assembly for the LED chip. Background Technology

[0002] The minimum feature size (i.e., minimum linewidth) of a chip is crucial to its performance. However, traditional chip manufacturing almost entirely relies on manual measurement using microscopes, which introduces significant errors and uncertainties. This leads to inaccuracies in SPC (Statistical Process Control) monitoring by technicians, resulting in compromised product quality. Current methods utilize AOI (Automated Optical Inspection) equipment to calculate grayscale values ​​(0, 255) and capture high-contrast graphic boundaries to provide the chip's feature size values. However, this approach still faces the following challenges:

[0003] 1. After LED (light-emitting diode) chips are stacked with multiple film layers, the film layer boundaries are complex, and the reserved space at each film layer boundary is too small, such as... Figure 2 and Figure 3 As shown, when the AOI machine automatically measures and grabs the line width, there will be misgrabbing, resulting in inaccurate feature dimensions.

[0004] 2. After multiple film layers are stacked on top of the LED chip, the difference in grayscale values ​​at the boundary contours of the film layers is not obvious, such as... Figure 3 As shown, the AOI machine cannot accurately capture the boundaries of low-contrast film layers and cannot provide linewidth values. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method for manufacturing an LED chip and a photomask assembly for an LED chip, which can facilitate accurate linewidth measurement of the LED chip.

[0006] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0007] A method for manufacturing an LED chip, comprising the following steps:

[0008] Reserve a measurement pattern area on the LED chip wafer;

[0009] The measurement pattern to be measured is transferred to the measurement pattern area to obtain the finished LED chip wafer.

[0010] To solve the above-mentioned technical problems, another technical solution adopted by the present invention is as follows:

[0011] A photomask assembly for LED chips, characterized in that it comprises multiple photomask bodies;

[0012] Each of the aforementioned photomask bodies has a measurement pattern area in the same position;

[0013] The measurement graphic area is provided with a measurement graphic;

[0014] When the measurement pattern regions on multiple photomask bodies overlap, the measurement patterns on each photomask body do not overlap with each other.

[0015] The beneficial effects of this invention are as follows: a measurement pattern area is reserved on the LED chip wafer, and the measurement pattern to be measured is transferred to the measurement pattern area to obtain the finished LED chip wafer. In this way, the pattern to be measured can be transferred to the LED chip, and different measurement patterns can be kept apart without overlapping, avoiding interference from other lines. Furthermore, based on the measurement pattern area, some films that are irrelevant to linewidth measurement and would cause a decrease in contrast can be selectively not deposited through photolithography. This avoids the situation where the linewidth measurement value has a large error or no data due to pattern stacking or poor contrast due to multiple film layers. This facilitates the subsequent AOI machine to perform accurate linewidth measurement on the LED chip. Moreover, this transfer process can be carried out synchronously with the chip production process without adding any additional steps. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating the steps of an LED chip manufacturing method according to an embodiment of the present invention.

[0017] Figure 2 This is a schematic diagram of the complex film layer boundaries of LED chips in the prior art;

[0018] Figure 3 This is a schematic diagram of the film layer boundary in existing LED chips where the reserved space is too small.

[0019] Figure 4 This is a schematic diagram of the film layer boundary in LED chips with low contrast in the prior art;

[0020] Figure 5 This is a schematic diagram of a photomask structure in the prior art;

[0021] Figure 6 This is a schematic diagram of the photomask body structure in a photomask assembly for an LED chip wafer according to an embodiment of the present invention;

[0022] Figure 7 This is a schematic diagram of a measurement pattern area after multiple photomask bodies are overlapped in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0023] Figure 8 This is an ISO graphic schematic diagram of the first photomask body in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0024] Figure 9 This is a schematic diagram of the Mesa pattern of the second photomask body and the first stacking pattern in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0025] Figure 10 This is a schematic diagram of the finger pattern of the third photomask body in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0026] Figure 11 This is a schematic diagram of the DBR pattern of the fourth photomask body in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0027] Figure 12 This is a schematic diagram of the ITO pattern of the fifth photomask body and the second stacking pattern in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0028] Figure 13 This is a schematic diagram of the CBL pattern and the third stacking pattern of the sixth photomask body in a photomask assembly for an LED chip wafer according to an embodiment of the present invention.

[0029] Label Explanation:

[0030] 1. Multiple photomask bodies; 2. Measurement pattern area; 21. ISO pattern; 22. Mesa pattern; 23. Finger pattern; 24. DBR pattern; 25. ITO pattern; 26. CBL pattern; 27. First stacked pattern; 28. Second stacked pattern; 29. ​​Third stacked pattern; 3. Positioning area. Detailed Implementation

[0031] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0032] Please refer to Figure 1 This invention provides a method for manufacturing an LED chip, including the following steps:

[0033] Reserve a measurement pattern area on the LED chip wafer;

[0034] The measurement pattern to be measured is transferred to the measurement pattern area to obtain the finished LED chip wafer.

[0035] As can be seen from the above description, the beneficial effects of the present invention are as follows: a measurement pattern area is reserved on the LED chip wafer, and the measurement pattern to be measured is transferred to the measurement pattern area to obtain the finished LED chip wafer. In this way, the pattern to be measured can be transferred to the LED chip, and different measurement patterns can be kept apart without overlapping, avoiding interference from other lines. Furthermore, based on the measurement pattern area, some films that are irrelevant to linewidth measurement and would cause a decrease in contrast can be selectively not deposited through photolithography. This avoids the situation where the linewidth measurement value has a large error or no data due to pattern stacking or poor contrast due to multiple film layers. This facilitates the subsequent AOI machine to perform accurate linewidth measurement on the LED chip. Moreover, this transfer process can be carried out synchronously with the chip production process without adding any additional steps.

[0036] Furthermore, after reserving the measurement pattern area on the LED chip wafer, the process includes:

[0037] The graphics to be stacked are determined, and the graphics to be stacked are those that are guaranteed to have no difference from the line width of normal products;

[0038] The step of transferring the measurement pattern to be measured to the measurement pattern area to obtain the LED chip wafer finished product includes:

[0039] The photomask assembly is used to transfer the patterns to be stacked and the measurement patterns to be measured to the measurement pattern area to obtain the finished LED chip wafer.

[0040] As described above, the film material of the underlying structure affects the reflection and refraction of photolithography, leading to differences in linewidth. To ensure consistency with the linewidth of the pattern to be measured, the pattern in the corresponding measurement area must be identical to the underlying structure of the original product to achieve seamless photolithography and consistent linewidth. Therefore, the film structure of the pattern to be stacked is identical to that of the actual chip, thus achieving no difference in linewidth with the normal product. A photomask assembly is used to transfer the pattern to be stacked and the measurement pattern to be measured to the measurement area, resulting in the finished LED chip wafer. This allows for the rapid and accurate transfer of different film layers that need to be covered for measurement onto the LED chip wafer, thereby completing the LED chip wafer fabrication.

[0041] Furthermore, the step of using a photomask assembly to transfer the pattern to be stacked and the measurement pattern to be measured to the measurement pattern area to obtain the finished LED chip wafer includes:

[0042] The measurement pattern area of ​​the LED chip wafer is photolithographically developed using a second photomask body with Mesa pattern and first stackable pattern to obtain an LED chip wafer covered with Mesa pattern.

[0043] The measurement pattern area of ​​the LED chip wafer covered with the Mesa pattern is photolithographically developed using a first photomask body with ISO pattern to obtain an LED chip wafer covered with ISO pattern.

[0044] The measurement pattern area of ​​the LED chip wafer covered with ISO pattern is photolithographically developed using a sixth photomask body with CBL pattern and third stackable pattern to obtain an LED chip covered with CBL pattern.

[0045] The measurement pattern area of ​​the LED chip covered with the CBL pattern is photolithographically developed using a fifth photomask body with ITO pattern and a second stackable pattern to obtain an LED chip wafer covered with ITO pattern.

[0046] The measurement pattern area of ​​the LED chip wafer covered with the ITO pattern is photolithographically developed using a third photomask body with a finger pattern to obtain an LED chip wafer covered with a finger pattern.

[0047] The measurement pattern area of ​​the LED chip wafer covered with the Finger pattern is photolithographically developed using a fourth photomask body with DBR pattern to obtain the finished LED chip wafer.

[0048] As described above, Mesa, ISO, CBL, ITO, Finger, and DBR patterns can be sequentially formed on the LED chip wafer. These patterns do not overlap and have a certain spacing, which facilitates accurate linewidth measurement of the LED chip in the future.

[0049] Please refer to Figure 7 Another embodiment of the present invention provides a photomask assembly for LED chips, comprising a plurality of photomask bodies;

[0050] Each of the aforementioned photomask bodies has a measurement pattern area in the same position;

[0051] The measurement graphic area is provided with a measurement graphic;

[0052] When the measurement pattern regions on multiple photomask bodies overlap, the measurement patterns on each photomask body do not overlap with each other.

[0053] The beneficial effects of this invention are as follows: each photomask body is provided with a measurement pattern area in the same position; the measurement pattern area is provided with a measurement pattern; when the measurement pattern areas on multiple photomasks overlap, the measurement patterns on each photomask body do not overlap with each other. Using these photomasks, the pattern to be measured can be transferred to the LED chip. Different measurement patterns do not overlap and have a certain distance between them, avoiding interference from other lines. Furthermore, based on the measurement pattern area, some films that are irrelevant to linewidth measurement and would cause a decrease in contrast can be selectively not deposited through photolithography. This avoids the situation where the linewidth measurement value has a large error or no data due to pattern stacking or multiple film layers with poor contrast, thus facilitating the subsequent AOI machine to perform accurate linewidth measurement on the LED chip.

[0054] Furthermore, some of the measurement pattern areas on the photomask body are provided with patterns that need to be stacked;

[0055] When the measurement pattern areas on multiple photomask bodies overlap, some of the patterns on the photomask bodies that need to be stacked overlap.

[0056] As described above, the film material of the underlying structure affects the reflection and refraction of photolithography, which leads to differences in linewidth. In order to ensure that the linewidth of the pattern to be measured is consistent with that of the product, the pattern of the corresponding measurement pattern area needs to be consistent with the underlying structure of the original product to ensure that the photolithography is indistinguishable and the linewidth is consistent. Therefore, it is set that the stacked pattern retains the same film structure as the actual chip to achieve no difference in linewidth with the normal product.

[0057] Furthermore, the plurality of photomask bodies include a first photomask body;

[0058] The measurement graphics include ISO graphics;

[0059] The ISO pattern is disposed on the first photomask body, and when the measurement pattern areas overlap, the ISO pattern is located in the middle position of the measurement pattern areas.

[0060] As described above, the ISO pattern is set on the first photomask body, and when the measurement pattern areas overlap, the ISO pattern is located in the middle of the measurement pattern area. In this way, the ISO pattern is made on the LED chip through the first photomask body, which facilitates the AOI machine to accurately measure the ISO linewidth of the chip.

[0061] Furthermore, the plurality of photomask bodies also includes a second photomask body;

[0062] The measurement pattern also includes a Mesa pattern, and the pattern to be stacked includes a first pattern to be stacked.

[0063] The Mesa graphic and the first graphic to be stacked are disposed on the second photomask body, and when the measurement graphic areas overlap, the Mesa graphic and the first graphic to be stacked are located on both sides of the ISO graphic, and the Mesa graphic and the ISO graphic have a first preset interval.

[0064] As described above, when the measurement pattern areas overlap, the Mesa pattern and the first pattern to be stacked are located on opposite sides of the ISO pattern, and there is a first preset interval between the Mesa pattern and the ISO pattern. The Mesa pattern can be fabricated on the chip using the second photomask body, which can ensure that the lines of the Mesa pattern and the lines of the ISO pattern do not interfere with each other, thus improving the accuracy of Mesa linewidth measurement.

[0065] Furthermore, the plurality of photomask bodies also includes a third photomask body and a fourth photomask body;

[0066] The measurement graphics also include Finger graphics and DBR graphics;

[0067] The Finger pattern is disposed on the third photomask body, and the DBR pattern is disposed on the fourth photomask body;

[0068] When the measurement graphic areas overlap, both the Finger graphic and the DBR graphic are located on the other side of the ISO graphic, and the Finger graphic is located on one side of the DBR graphic.

[0069] As described above, when the measurement pattern areas overlap, both the Finger pattern and the DBR pattern are located on the other side of the ISO pattern, and the Finger pattern is located on one side of the DBR pattern. This allows for accurate measurement of the Finger line width, DBR hole line width, and ISO line width.

[0070] Furthermore, the plurality of photomask bodies also includes a fifth photomask body;

[0071] The measurement pattern also includes an ITO pattern, and the pattern to be stacked includes a second pattern to be stacked.

[0072] The ITO pattern and the second stackable pattern are disposed on the fifth photomask body;

[0073] When the measurement graphic areas overlap, the ITO graphic is located on the side of the Finger graphic that is away from the DBR graphic, and the second graphic to be stacked is located on the side of the ITO graphic that is close to the Finger graphic.

[0074] As described above, by setting the ITO pattern, the ITO pattern can be fabricated on the chip using the fifth photomask body, and a certain spacing is maintained from other patterns, facilitating the accurate measurement of the ITO line width.

[0075] Furthermore, the plurality of photomask bodies further includes a sixth photomask body;

[0076] The measurement pattern further includes a CBL pattern, and the required stacked pattern includes a third required stacked pattern;

[0077] The CBL pattern and the third required stacked pattern are disposed on the sixth photomask body, and the ITO pattern is in a "square" shape;

[0078] When the measurement pattern regions overlap, the CBL pattern is located at the middle position of the ITO pattern, and the third required stacked pattern is located on one side of the CBL pattern.

[0079] As described above, when the measurement pattern regions overlap, the CBL pattern is located at the middle position of the ITO pattern, and the third required stacked pattern is located on one side of the CBL pattern, facilitating the accurate measurement of the CBL line width using an AOI machine.

[0080] The above method for manufacturing an LED chip and the photomask set for an LED chip according to the present invention can be applied to the manufacture of LED chips that require line width measurement, which will be described below through specific embodiments:

[0081] Embodiment 1

[0082] Please refer to Figure 1 , a method for manufacturing an LED chip in this embodiment includes the steps of:

[0083] S0. Reserve a measurement pattern region on the LED chip wafer;

[0084] S1. Determine the required stacked pattern, where the required stacked pattern is a pattern that ensures no difference in line width from the normal product line;

[0085] S2. Transfer the measurement pattern to be measured to the measurement pattern region to obtain a finished LED chip wafer;

[0086] Specifically, using a photomask set to transfer the required stacked pattern and the measurement pattern to be measured to the measurement pattern region to obtain a finished LED chip wafer, which specifically includes:

[0087] S21. Perform photolithography and development processing on the measurement pattern region 2 of the LED chip wafer using the second photomask body with a Mesa (PN junction step, used to define the die pattern contour, define the die pattern contour) pattern and the first required stacked pattern to obtain an LED chip wafer covered with the Mesa pattern, which specifically includes:

[0088] S211. Coating photoresist onto the surface of an LED chip wafer to obtain a coated LED chip wafer;

[0089] S212. The coated LED chip wafer is patterned using an exposure machine and a second photomask body with Mesa pattern and first stackable pattern to obtain an exposed LED chip wafer.

[0090] S213. The photoresist on the exposed LED chip wafer is developed using a developing solution to obtain a developed LED chip wafer.

[0091] S214. The LED chip wafer after development is etched until the Mesa pattern and the first stackable pattern on the second photomask body with the Mesa pattern and the first stackable pattern are transferred to the measurement pattern area of ​​the LED chip wafer after development, so as to obtain an LED chip wafer covered with the Mesa pattern.

[0092] S22. Using a first photomask body with ISO (Isolation) pattern, the measurement pattern area of ​​the LED chip wafer covered with Mesa pattern is photolithographically developed to obtain an LED chip wafer covered with ISO pattern.

[0093] S23. Using a sixth photomask body with a CBL (Current Blocking Layer, used for diffusing current) pattern and a third stackable pattern, the measurement pattern area of ​​the LED chip wafer covered with the ISO pattern is photolithographically developed to obtain an LED chip covered with the CBL pattern.

[0094] S24. Using a fifth photomask body with ITO (indium tin oxide) pattern and a second stackable pattern, the measurement pattern area of ​​the LED chip covered with CBL pattern is photolithographically developed to obtain an LED chip wafer covered with ITO pattern.

[0095] S25. Using a third photomask body with a Finger (current spreading bar for diffusing current) pattern, perform photolithography and development on the measurement pattern area of ​​the LED chip wafer covered with the ITO pattern to obtain an LED chip wafer covered with the Finger pattern.

[0096] S26. Using a fourth photomask body with a DBR (Drawer Bragg reflector lens for enhanced light output) pattern, the measurement pattern area of ​​the LED chip wafer covered with the Finger pattern is subjected to photolithography and development to obtain the finished LED chip wafer.

[0097] The DBR process includes a Pad process (PN electrode, used for soldering and lead wires). However, since the production line currently does not have a project to measure the Pad line width, and because plating the Pad will cause extra irrelevant lines around the pattern to be measured, it will increase the difficulty of measuring the line width on the machine. In addition, the Pad is a metal film layer, and it is not necessary to plating the Pad unless necessary to increase gold recovery. Therefore, the Pad pattern was not transferred to the measurement pattern area in the above steps.

[0098] If it is necessary to form a pattern on the surface of the chip wafer that does not require measurement and is prone to having redundant lines, such as a Pad pattern, then in another optional embodiment, S2 includes: transferring the pattern to be stacked, the measurement pattern to be measured, and the pattern that does not require measurement and is prone to having redundant lines to the measurement pattern area to obtain the finished LED chip wafer.

[0099] It also includes the following steps:

[0100] S3. The LED chip wafer is cut to obtain LED chips.

[0101] Example 2

[0102] Please refer to Figures 5-13 This embodiment of the photomask assembly for LED chips is used in the LED chip manufacturing method described in Embodiment 1, and includes multiple photomask bodies 1;

[0103] Each of the photomask bodies 1 is provided with a measurement pattern area 2 in the same position;

[0104] The measurement pattern area 2 is provided with a measurement pattern;

[0105] When the measurement pattern regions 2 on multiple photomask bodies 1 overlap, the measurement patterns on each photomask body 1 do not overlap, such as... Figure 6 and Figure 7 As shown;

[0106] Specifically, the measurement pattern area 2 on part of the photomask body 1 is provided with patterns that need to be stacked. The patterns that need to be stacked are patterns that ensure no difference from the line width of normal products.

[0107] When the measurement pattern regions 2 on multiple photomask bodies 1 overlap, some of the stackable patterns on the photomask bodies 1 overlap.

[0108] Specifically, such as Figure 7 and Figure 8 As shown, the plurality of photomask bodies 1 include a first photomask body;

[0109] The measurement pattern includes ISO pattern 21;

[0110] The ISO pattern 21 is disposed on the first photomask body, and when the measurement pattern areas 2 overlap, the ISO pattern 21 is located in the middle position of the measurement pattern areas 2.

[0111] Specifically, such as Figure 7 and Figure 9 As shown, the plurality of photomask bodies 1 also includes a second photomask body;

[0112] The measurement pattern also includes a Mesa pattern 22, and the stackable pattern includes a first stackable pattern 27;

[0113] The Mesa pattern 22 and the first stackable pattern 27 are disposed on the second photomask body, and when the measurement pattern area 2 overlaps, the Mesa pattern 22 and the first stackable pattern 27 are located on both sides of the ISO pattern 21, and there is a first preset interval between the Mesa pattern 22 and the ISO pattern 21.

[0114] In one alternative implementation, such as Figure 9 As shown, the Mesa pattern 22 includes 3 pieces, and the 3 Mesa patterns 22 and the first stackable pattern 27 are arranged on the second photomask body, and there is a second preset interval between the 3 Mesa patterns 22;

[0115] Specifically, such as Figure 7 , Figure 10 and Figure 11 As shown, the plurality of photomask bodies 1 also include a third photomask body and a fourth photomask body;

[0116] The measurement pattern also includes Finger pattern 23 and DBR pattern 24;

[0117] The Finger pattern 23 is disposed on the third photomask body, and the DBR pattern 24 is disposed on the fourth photomask body;

[0118] When the measurement graphic area 2 overlaps, the Finger graphic 23 and the DBR graphic 24 are both located on the other side of the ISO graphic 21, and the Finger graphic 23 is located on one side of the DBR graphic 24. The Finger graphic 23 and the DBR graphic 24 have a third preset interval.

[0119] Specifically, such as Figure 7 and Figure 12 As shown, the plurality of photomask bodies 1 also includes a fifth photomask body;

[0120] The measurement pattern also includes an ITO pattern 25, and the pattern to be stacked includes a second pattern to be stacked 28;

[0121] The ITO pattern 25 and the second pattern to be stacked 28 are provided on the fifth photomask body;

[0122] When the measurement pattern regions 2 overlap, the ITO pattern 25 is located on a side of the Finger pattern 23 away from the DBR pattern 24, the second pattern to be stacked 28 is located on a side of the ITO pattern 25 close to the Finger pattern 23, and there is a fourth preset interval between the ITO pattern 25 and the Finger pattern 23;

[0123] Specifically, as Figure 7 and Figure 13 shown, the plurality of photomask bodies 1 further includes a sixth photomask body;

[0124] The measurement pattern further includes a CBL pattern 26, and the pattern to be stacked includes a third pattern to be stacked 29;

[0125] The CBL pattern 26 and the third pattern to be stacked 29 are provided on the sixth photomask body, and the ITO pattern 25 is in a "square" shape;

[0126] When the measurement pattern regions 2 overlap, the CBL pattern 26 is located at the middle position of the ITO pattern 25, and the third pattern to be stacked 29 is located on a side of the CBL pattern 26;

[0127] The first pattern to be stacked 27, the second pattern to be stacked 28 and the third pattern to be stacked 29 have the same size. When the measurement pattern regions 2 on the plurality of photomask bodies 1 overlap, the first pattern to be stacked 27, the second pattern to be stacked 28 and the third pattern to be stacked 29 overlap;

[0128] Specifically, as Figure 6 shown, a positioning region 3 is further included;

[0129] The positioning region 3 is provided on a side of the measurement pattern region 2;

[0130] The specific working principle is as follows:

[0131] Figure 5 shows the existing photomask structure, while Figure 6 shows the photomask structure of the present invention. On each of the stacked photomask bodies in the photomask group, there is a separate PCM (Process Control Monitor) region at the same position, that is, the measurement pattern region. The measurement pattern region is provided with a measurement pattern. On some of the photomask bodies, the measurement pattern region is provided with a pattern to be stacked. When the measurement pattern regions on the plurality of photomask bodies overlap, the measurement patterns on each photomask body do not overlap, and the patterns to be stacked on some of the photomask bodies overlap, as Figure 6 As shown, different photomasks are used in different steps of the LED chip manufacturing process to form film layers on the chip. For example, during the Mesa process, a second photomask is used to form the Mesa film layer; during the ISO process, a first photomask is used to form the ISO film layer; during the CBL process, a sixth photomask is used to form the CBL film layer; during the ITO process, a fifth photomask is used to form the ITO film layer; and during the Finger process... During the LED chip fabrication process, a third photomask is used to form a finger film layer. Then, during the DBR process, a fourth photomask is used to form a DBR film layer. This method ensures that even with multiple film layers stacked, each layer has sufficient space at its boundaries, allowing them to operate independently without interference. This avoids large errors in linewidth measurements due to pattern stacking and the lack of data due to poor contrast from multiple film layers. Furthermore, it enables accurate linewidth measurement of the LED chip during subsequent AOI linewidth measurement, and this transfer process can be synchronized with the chip production process without requiring additional steps.

[0132] In summary, the present invention provides a method for manufacturing an LED chip and a photomask assembly for the LED chip. A measurement pattern area is reserved on the LED chip wafer; the pattern to be stacked and the measurement pattern to be measured are transferred to the measurement pattern area to obtain the finished LED chip wafer; the photomask assembly used when transferring the pattern to be stacked and the measurement pattern to the measurement pattern area includes multiple photomask bodies; each photomask body has a measurement pattern area in the same position; the measurement pattern area has a measurement pattern, and some of the measurement pattern areas on the photomask bodies have patterns to be stacked; when the measurement pattern areas on multiple photomask bodies overlap, the measurement patterns on each photomask body do not overlap, but the patterns to be stacked on some of the photomask bodies overlap; the multiple photomask bodies include a first... The LED chip comprises a photomask body, a second photomask body, a third photomask body, a fourth photomask body, a fifth photomask body, and a sixth photomask body. The measurement patterns include ISO patterns, Mesa patterns, Finger patterns, DBR patterns, ITO patterns, and CBL patterns. These photomasks can be used to transfer the patterns to be measured onto the LED chip. Different measurement patterns are spaced apart to avoid interference from other lines. Furthermore, based on the measurement pattern area, photolithography can selectively exclude the deposition of some unrelated film layers that would reduce contrast. This avoids large errors or no data in linewidth measurement due to pattern stacking or poor contrast from multiple film layers. This facilitates accurate linewidth measurement of the LED chip by the subsequent AOI machine. Moreover, this transfer process can be performed synchronously with the chip production process without adding any additional steps.

[0133] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for manufacturing an LED chip, characterized in that, Including the following steps: Reserve a measurement pattern area on the LED chip wafer; The measurement pattern to be measured is transferred to the measurement pattern area to obtain the finished LED chip wafer; The process of reserving a measurement pattern area on the LED chip wafer includes: The graphics to be stacked are determined, and the graphics to be stacked are those that are guaranteed to have no difference from the line width of normal products; The step of transferring the measurement pattern to be measured to the measurement pattern area to obtain the LED chip wafer finished product includes: The photomask assembly is used to transfer the patterns to be stacked and the measurement patterns to be measured to the measurement pattern area to obtain the finished LED chip wafer.

2. The method for manufacturing an LED chip according to claim 1, characterized in that, The step of using a photomask assembly to transfer the patterns to be stacked and the measurement patterns to be measured to the measurement pattern area to obtain the finished LED chip wafer includes: The measurement pattern area of ​​the LED chip wafer is photolithographically developed using a second photomask body with Mesa pattern and first stackable pattern to obtain an LED chip wafer covered with Mesa pattern. The measurement pattern area of ​​the LED chip wafer covered with the Mesa pattern is photolithographically developed using a first photomask body with ISO pattern to obtain an LED chip wafer covered with ISO pattern. The measurement pattern area of ​​the LED chip wafer covered with ISO pattern is photolithographically developed using a sixth photomask body with CBL pattern and third stackable pattern to obtain an LED chip covered with CBL pattern. The measurement pattern area of ​​the LED chip covered with the CBL pattern is photolithographically developed using a fifth photomask body with ITO pattern and a second stackable pattern to obtain an LED chip wafer covered with ITO pattern. The measurement pattern area of ​​the LED chip wafer covered with the ITO pattern is photolithographically developed using a third photomask body with a finger pattern to obtain an LED chip wafer covered with a finger pattern. The measurement pattern area of ​​the LED chip wafer covered with the Finger pattern is photolithographically developed using a fourth photomask body with DBR pattern to obtain the finished LED chip wafer.

3. A photomask assembly for an LED chip, wherein the LED chip is manufactured by the method for manufacturing an LED chip according to claim 1 or 2, characterized in that, Includes multiple photomask bodies; Each of the aforementioned photomask bodies has a measurement pattern area in the same position; The measurement graphic area is provided with a measurement graphic; When the measurement pattern regions on multiple photomask bodies overlap, the measurement patterns on each photomask body do not overlap with each other.

4. A photomask assembly for an LED chip according to claim 3, characterized in that, The measurement pattern area on part of the photomask body is provided with patterns that need to be stacked; When the measurement pattern areas on multiple photomask bodies overlap, some of the patterns on the photomask bodies that need to be stacked overlap.

5. A photomask assembly for an LED chip according to claim 4, characterized in that, The plurality of photomask bodies include a first photomask body; The measurement graphics include ISO graphics; The ISO pattern is disposed on the first photomask body, and when the measurement pattern areas overlap, the ISO pattern is located in the middle position of the measurement pattern areas.

6. A photomask assembly for an LED chip according to claim 5, characterized in that, The plurality of photomask bodies also includes a second photomask body; The measurement pattern also includes a Mesa pattern, and the pattern to be stacked includes a first pattern to be stacked. The Mesa pattern and the first pattern to be stacked are disposed on the second reticle body. When the measurement pattern regions overlap, the Mesa pattern and the first pattern to be stacked are located on both sides of the ISO pattern, and there is a first preset interval between the Mesa pattern and the ISO pattern.

7. A photomask assembly for an LED chip according to claim 5, characterized in that, The plurality of reticle bodies further include a third reticle body and a fourth reticle body; The measurement pattern further includes a Finger pattern and a DBR pattern; The Finger pattern is disposed on the third reticle body, and the DBR pattern is disposed on the fourth reticle body; When the measurement pattern regions overlap, both the Finger pattern and the DBR pattern are located on the other side of the ISO pattern, and the Finger pattern is located on one side of the DBR pattern.

8. A photomask assembly for an LED chip according to claim 7, characterized in that, The plurality of reticle bodies further include a fifth reticle body; The measurement pattern further includes an ITO pattern, and the pattern to be stacked includes a second pattern to be stacked; The ITO pattern and the second pattern to be stacked are disposed on the fifth reticle body; When the measurement pattern regions overlap, the ITO pattern is located on the side of the Finger pattern away from the DBR pattern, and the second pattern to be stacked is located on the side of the ITO pattern close to the Finger pattern.

9. A photomask assembly for an LED chip according to claim 8, characterized in that, The plurality of reticle bodies further include a sixth reticle body; The measurement pattern further includes a CBL pattern, and the pattern to be stacked includes a third pattern to be stacked; The CBL pattern and the third pattern to be stacked are disposed on the sixth reticle body, and the ITO pattern is in a "square" shape; When the measurement pattern regions overlap, the CBL pattern is located at the middle position of the ITO pattern, and the third pattern to be stacked is located on one side of the CBL pattern.

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