A method, apparatus, device, and medium for reading and writing data within a device.

Abstract

This application discloses a method, apparatus, device, and medium for reading and writing data within a device, relating to the field of computer technology. The method includes: at the rising edge of the first pulse of SCLK, a fault diagnosis register stores data into an SDO shift register; at the falling edge of the first pulse, it determines whether the data has entered a daisy chain based on the first bit of the first group of data; it determines whether the second bit is a daisy chain header character, and if so, it shifts the first group of data into a device quantity register; it determines whether the device position count value and the device quantity satisfy a first preset relationship, and if so, it shifts the address bit group data into an address register; it stores the data in the first internal register corresponding to the address bit group data into the SDO shift register, and stores the data bit group data into a data register through an SDI shift register; then, it determines whether to write the data bit group data into the first internal register based on a read / write flag. This allows for arbitrary reading and writing of data in the device's internal registers and acquisition of diagnostic data information.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and medium for reading and writing data within a device. Background Technology

[0002] SPI is a high-speed, full-duplex, synchronous communication bus that operates in a master-slave mode, allowing data to be transmitted bit by bit. This mode typically involves one master device and one or more slave devices, and uses only four pins on the device. See [link to documentation] for details. Figure 1 The diagram shows SDI (Serial Data Input), SDO (Serial Data Output), SCLK (Serial Clock Input), and nSCS (Serial Device Select, Chip Select). Daisy-chain mode is a simplified cascading mode where all slave devices' chip select signals are connected together, and data propagates from one slave device to the next. In this configuration, all slave devices simultaneously receive the same SPI clock from the master device. Data from the master device is sent directly to the first slave device, which then provides data to the next slave device, and so on. A detailed communication diagram can be found in [link to diagram]. Figure 2 As shown in the diagram. Currently, under the conditions of SPI communication protocol and daisy chain communication mode, it is difficult to arbitrarily read and write data in the internal registers of a device, and to obtain the fault status of the device.

[0003] In summary, how to enable arbitrary reading and writing of data in the internal registers of a device and obtain diagnostic data information of that device is a problem that needs to be solved. Summary of the Invention

[0004] In view of this, the purpose of this invention is to provide a method, apparatus, device, and medium for reading and writing data within a device, capable of arbitrarily reading and writing data in the internal registers of the device and obtaining diagnostic data information of the device. The specific solution is as follows:

[0005] In a first aspect, this application discloses a method for reading and writing data within a device, comprising:

[0006] When the first rising edge of the SCLK pulse is detected, the diagnostic data in the fault diagnosis register is stored in the SDO shift register, and when the first falling edge of the first pulse is detected, the first data of the first group of data passed in by SDI is used to determine whether to enter the daisy chain communication mode.

[0007] If it enters, then based on the second bit of the first set of data, determine whether it is a daisy chain header text. If so, then store the first set of data into the device quantity register through the SDI shift register.

[0008] Determine whether the device position count value in the device position counter and the preset number of devices stored in the device quantity register satisfy a first preset relationship. If they satisfy the relationship, after detecting that the last bit of the address bit group data of the current device is shifted into the SDI shift register through the SDI, the address bit group data is stored in the address register through the SDI shift register.

[0009] The data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. After detecting that the last bit of the current device's data bit group data is shifted into the SDI shift register through the SDI, the data bit group data is stored in the data register through the SDI shift register. Then, based on the read / write flag of the address bit group data, it is determined whether to write the data bit group data in the data register into the first internal register.

[0010] Optionally, determining whether to enter daisy-chain communication mode based on the first data of the first group of data transmitted via SDI includes:

[0011] Determine the first data element of the first set of data passed in by SDI;

[0012] If the first bit is 0, it is determined that the daisy chain communication mode is entered, and the state machine is changed from the initial state to the first state for transmitting the fault diagnosis bit and the header bit.

[0013] If the first bit is 1, it is determined that the daisy chain communication mode will not be entered.

[0014] Optionally, determining whether the second data in the first set of data is a daisy chain header includes:

[0015] Determine the second digit of the first set of data;

[0016] If the second bit is 0, it is determined to be a daisy chain header, and the state machine is switched from the first state to the second state for transmitting the number of devices for the header;

[0017] If the second data is 1, it is determined to be a non-daisy chain header text.

[0018] Optionally, after determining whether the second data in the first set of data is a daisy chain header, the method further includes:

[0019] If the text is not from a daisy chain, then the second data digit is determined to be a fault diagnosis digit for other devices;

[0020] The diagnostic data in the SDO shift register is shifted out to SDO, and the fault diagnosis bit is stored in the SDO shift register.

[0021] Optionally, after determining whether the device position count value in the device position counter satisfies the first preset relationship with the preset number of devices stored in the device quantity register, the method further includes:

[0022] If not satisfied, the state machine is switched from the second state to the third state for transmitting address bits that do not belong to the current device and needs to be operated, and the address bit group data of the other devices passed in by the SDI is obtained until the device location count value and the preset number of devices satisfy the first preset relationship.

[0023] The third state of the state machine is converted to the fourth state for transmitting the address bits that the current device needs to operate, and then the process jumps back to the step of storing the address bit group data into the address register through the SDI shift register.

[0024] Optionally, storing the data in the first internal register corresponding to the address bit group data into the SDO shift register includes:

[0025] Determine whether the preset number of devices is 1;

[0026] If it is not 1, the fourth state of the state machine is converted to the fifth state for transmitting data bits that do not belong to the current device and need to be operated. When the first pulse rising edge of the data bit group data of the other devices is detected, the data in the first internal register corresponding to the address bit group data is stored in the SDO shift register.

[0027] When the device location count value and the preset number of devices satisfy the second preset relationship, the fifth state of the state machine is converted into the sixth state for transmitting the data bits that the current device needs to operate.

[0028] If it is 1, the fourth state of the state machine is converted to the sixth state for transmitting the data bits that the current device needs to operate. When the first pulse rising edge of the data bit group of the current device is detected, the data in the first internal register corresponding to the address bit group data is stored in the SDO shift register.

[0029] Optionally, after storing the address bit group data into the address register through the SDI shift register, the method further includes:

[0030] The data in the second internal register corresponding to the preset address is stored in the SDI shift register.

[0031] Secondly, this application discloses a device for reading and writing data within a device, comprising:

[0032] The daisy-chain communication judgment module is used to store the diagnostic data in the fault diagnosis register into the SDO shift register when the first rising edge of the SCLK pulse is detected, and to determine whether to enter the daisy-chain communication mode based on the first data of the first group of data passed in by SDI when the first falling edge of the pulse is detected.

[0033] The daisy chain header text determination module is used to determine whether the first group of data is a daisy chain header text based on the second data of the first group of data if it is entered. If it is, the first group of data is stored in the device quantity register through the SDI shift register.

[0034] The address bit register module is used to determine whether the device position count value in the device position counter and the preset number of devices stored in the device quantity register satisfy a first preset relationship. If they satisfy the relationship, after detecting that the last bit of the address bit group data of the current device is shifted into the SDI shift register through the SDI, the address bit group data is stored in the address register through the SDI shift register.

[0035] An internal register data acquisition module is used to store the data in the first internal register corresponding to the address bit group data into the SDO shift register;

[0036] The data bit register module is used to store the data bit group data into the data register through the SDI shift register after detecting that the last bit of the current device's data bit group data has been shifted into the SDI shift register via the SDI, and then determine whether to write the data bit group data in the data register into the first internal register based on the read / write flag bit of the address bit group data.

[0037] Thirdly, this application discloses an electronic device, including:

[0038] Memory, used to store computer programs;

[0039] A processor for executing the computer program to implement the steps of the aforementioned disclosed method for reading and writing data within a device.

[0040] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the aforementioned disclosed method for reading and writing data within a device.

[0041] As can be seen, this application discloses a method for reading and writing data within a device, comprising: upon detecting the rising edge of the first pulse of SCLK, storing diagnostic data in the fault diagnosis register into the SDO shift register; and upon the falling edge of the first pulse, determining whether to enter daisy-chain communication mode based on the first data of the first group of data transmitted via SDI; if so, determining whether it is a daisy-chain header text based on the second data of the first group of data; if so, storing the first group of data into the device quantity register via the SDI shift register; determining whether the device position count value in the device position counter satisfies a first preset relationship with the preset number of devices stored in the device quantity register; if so, then upon detecting... After the last bit of the address bit group data of the current device is shifted into the SDI shift register via the SDI, the address bit group data is stored in the address register via the SDI shift register. Data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. Upon detecting that the last bit of the data bit group data of the current device has been shifted into the SDI shift register via the SDI, the data bit group data is stored in the data register via the SDI shift register. Then, based on the read / write flag of the address bit group data, it is determined whether to write the data bit group data in the data register into the first internal register. Therefore, this application stores diagnostic data from the fault diagnosis register into the SDO shift register upon detecting the rising edge of the first pulse of SCLK, thereby obtaining diagnostic data information of the current device to understand the fault situation. Furthermore, after determining the entry into daisy-chain communication mode and detecting the daisy-chain header text based on the first set of data received via SDI, the first set of data is stored in the device quantity register via the SDI shift register. It is then determined whether the device position count value in the device position counter satisfies a first preset relationship with the preset number of devices stored in the device quantity register. If the first preset relationship is satisfied, the address bit group data shifted into the SDI shift register via SDI is stored in the address register, the data in the first internal register corresponding to the address bit group data is stored in the SDI shift register, and the data bit group data shifted into the SDI shift register via SDI is stored in the data register. Finally, based on the read / write flag in the address bit group data, it is determined whether to write the data bit group data to the first internal register. Through this method, data in the internal registers of the corresponding device can be accurately read and written according to the number of devices and the input address bits. In this way, this application can achieve arbitrary reading and writing of device internal register data and obtain diagnostic data information of the device. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0043] Figure 1 This is a schematic diagram of an SPI communication principle disclosed in this application;

[0044] Figure 2 This is a schematic diagram of a daisy-chain communication pattern disclosed in this application;

[0045] Figure 3 This is a schematic diagram of a framework structure for reading and writing data within a device, as disclosed in this application.

[0046] Figure 4 This application discloses a flowchart of a method for reading and writing data within a device.

[0047] Figure 5 This is a data structure diagram of an address bit group and a data bit group disclosed in this application;

[0048] Figure 6 This application discloses a flowchart of a specific method for reading and writing data within a device.

[0049] Figure 7 This is a flowchart illustrating data within a specific read / write device disclosed in this application;

[0050] Figure 8 This application discloses a data structure diagram of a daisy chain header text and fault diagnosis bits;

[0051] Figure 9 This is a timing diagram of a specific daisy chain disclosed in this application;

[0052] Figure 10 This is a schematic diagram of the device structure for reading and writing data within a device disclosed in this application;

[0053] Figure 11 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0054] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0055] Currently, under the conditions of SPI communication protocol and daisy-chain communication mode, it is difficult to arbitrarily read and write data in the internal registers of a device, and to obtain the fault information of the device. To this end, embodiments of this application disclose a method, apparatus, device and medium for reading and writing data in a device, which can realize arbitrary reading and writing of data in the internal registers of a device and obtain diagnostic data information of the device.

[0056] Figure 3 This is a schematic diagram of a framework structure for reading and writing data within a device, as disclosed in this application. Figure 3 As shown, this application mainly includes an SCLK pulse counter, a device quantity register, a device position counter, a fault diagnosis register, a state machine, an SDI shift register, an SDO shift register, a data register, and an address register. The SCLK pulse counter counts once on the rising edge of each SCLK pulse, and restarts counting after each data set, repeating this process. The number of SCLK pulses counted by the SCLK pulse counter is recorded as SCLKCNT, and the last count value of each set is recorded as last. The device quantity register stores the number of devices input by the user via SDI, i.e., the preset device quantity mentioned below. It is stored on the falling edge of SCLK and recorded as ChipNUM. The device position counter counts the number of SCLK pulses... Under the condition that the value is not 0, whenever the counted number of SCLK pulses is 1, that is, when the first input of each group of data is received, the device position counter increments by 1 on the falling edge of SCLK, until the counted device position is greater than the number of devices + 2, at which point the counted device position is cleared to zero, and this process is repeated, and the counted device position is recorded as LOC; the fault diagnosis register is used to store the internal fault diagnosis bits of the device; the state machine is used to locate the current transmission state of the daisy chain, and it transitions on the falling edge of SCLK, denoted as STATE. In this application, the daisy chain has several states as shown in Table 1:

[0057] Table 1

[0058] STATE Daisy chain status 0 initial state 1 First state: Transmitting fault diagnosis bits and header text bits 2 Second state: Number of devices transmitting header text 3 Third state: The transmission does not belong to the address bits that the current device needs to operate on. 4 Fourth state: Transmit the address bits that the current device needs to operate on. 5 Fifth state: Transmitting data bits that are not currently required by the device. 6 Sixth state: Transmit the data bits that the current device needs to operate on.

[0059] Additionally, the SDI shift register is used to shift out the data originally registered in the SDI shift register bit by bit on each falling edge of SCLK, and to shift the data input via SDI bit by bit into the SDI shift register bit by bit on each falling edge of SCLK. In other words, the SPI protocol captures data on the falling edge of SCLK. The SDO shift register is used to store a set of binary codes that need to be output to SDO into the SDO shift register, and then shift out the data stored in the SDO shift register bit by bit on each rising edge of SCLK by shifting the data into SDI bit by bit. In other words, the SPI protocol shifts out data on the rising edge of SCLK. The data register is used to register the data bits shifted into the SDI shift register via SDI, and is stored on the falling edge of SCLK. The address register is used to register the address bits shifted into the SDI shift register via SDI, and is stored on the falling edge of SCLK.

[0060] Additionally, it's important to note that the number of bits in the daisy-chain header byte, fault diagnosis bits, address bits, and data bits must be the same to facilitate counting by the SCLK pulse counter and ensure consistent conditions for each restart of the SCLK pulse counter. The daisy-chain header byte, fault diagnosis bits, address bits, and data bits are each referred to as a set of data.

[0061] See Figure 4 As shown in the figure, this application discloses a method for reading and writing data within a device, the method comprising:

[0062] Step S11: When the first rising edge of the SCLK pulse is detected, the diagnostic data in the fault diagnosis register is stored in the SDO shift register, and when the first falling edge of the pulse is detected, the first data of the first group of data passed in by SDI is used to determine whether to enter the daisy chain communication mode.

[0063] In this embodiment, upon detecting the rising edge of the first SCLK pulse, the diagnostic data in the fault diagnosis register is stored in the SDO shift register, thereby obtaining the current device's diagnostic data information to understand the device's fault status. At this time, the SCLK pulse count SCLKCNT, calculated by the SCLK pulse counter, is 1. Then, at the falling edge of the first SCLK pulse, the first data of the first group of data transmitted from SDI is used to determine whether to enter daisy-chain communication mode.

[0064] Step S12: If the input is successful, determine whether the second bit of the first set of data is a daisy chain header text based on the data of the first set. If it is, store the first set of data into the device quantity register through the SDI shift register.

[0065] In this embodiment, if it is determined that the daisy-chain communication mode has been entered, the second bit of the first group of data is used to determine whether it is the daisy-chain header (i.e., HEAD). If the second bit is determined to be the daisy-chain header, after detecting that the last bit of the first group of data is shifted into the SDI shift register via SDI, the first group of data is stored in the device quantity register via the SDI shift register. At this time, the value of the SCLK pulse count SCLKCNT is last.

[0066] Step S13: Determine whether the device position count value in the device position counter and the preset number of devices stored in the device quantity register satisfy the first preset relationship. If they satisfy the relationship, after detecting that the last bit of the address bit group data of the current device is shifted into the SDI shift register through the SDI, the address bit group data is stored in the address register through the SDI shift register.

[0067] In this embodiment, when the last data of the daisy chain header text, i.e., the last data of the first group, is shifted in, it is necessary to determine whether the device position count value in the device position counter and the preset number of devices stored in the device quantity register satisfy a first preset relationship. The first preset relationship is as follows:

[0068] Device location count = preset device quantity + 1;

[0069] If the above relationship is satisfied, it means that it is the turn of the current device to read and write data. After detecting that the last bit of the address bit group data of the current device is shifted into the SDI shift register through SDI, the address bit group data is stored in the address register through the SDI shift register.

[0070] Furthermore, after storing the address bit group data into the address register via the SDI shift register, the process further includes storing the data in the second internal register corresponding to the preset address into the SDI shift register. It can be understood that after the address bit group data in the SDI shift register is stored in the address register, the SDI shift register is empty. Therefore, it is necessary to store the data in the second internal register corresponding to the preset address into the SDI shift register. Specifically, the preset address can be 0x00, meaning that the original data in the internal register at address 0x00 is stored into the SDI shift register.

[0071] Step S14: Store the data in the first internal register corresponding to the address bit group data into the SDO shift register. After detecting that the last bit of the current device's data bit group data is shifted into the SDI shift register through the SDI, store the data bit group data into the data register through the SDI shift register. Then, determine whether to write the data bit group data in the data register into the first internal register based on the read / write flag bit of the address bit group data.

[0072] In this embodiment, the data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. After detecting that the last bit of the next data group (i.e., the current device's data bit group data) is shifted into the SDI shift register via SDI, the data bit group data is stored in the data register via the SDI shift register. Then, based on the read / write flag bit of the address bit group data, it is determined whether to write the data bit group data in the data register into the first internal register. It should be noted that the data structures of the address bit group data and the data bit group data can be found in [reference needed]. Figure 5 As shown in the figure, the second bit of the address bit group data is the read / write flag (RW). When the read / write flag is set to indicate a write command, the data bit group data in the data register is written to the first internal register.

[0073] As can be seen, this application discloses a method for reading and writing data within a device, comprising: upon detecting the rising edge of the first pulse of SCLK, storing diagnostic data in the fault diagnosis register into the SDO shift register; and upon the falling edge of the first pulse, determining whether to enter daisy-chain communication mode based on the first data of the first group of data transmitted via SDI; if so, determining whether it is a daisy-chain header text based on the second data of the first group of data; if so, storing the first group of data into the device quantity register via the SDI shift register; determining whether the device position count value in the device position counter satisfies a first preset relationship with the preset number of devices stored in the device quantity register; if so, then upon detecting... After the last bit of the address bit group data of the current device is shifted into the SDI shift register via the SDI, the address bit group data is stored in the address register via the SDI shift register. Data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. Upon detecting that the last bit of the data bit group data of the current device has been shifted into the SDI shift register via the SDI, the data bit group data is stored in the data register via the SDI shift register. Then, based on the read / write flag of the address bit group data, it is determined whether to write the data bit group data in the data register into the first internal register. Therefore, this application, upon detecting the rising edge of the first pulse of SCLK, stores the diagnostic data in the fault diagnosis register into the SDO shift register, at which point the diagnostic data information of the current device can be obtained to understand the fault situation. Furthermore, after determining the entry into daisy-chain communication mode and detecting the daisy-chain header text based on the first set of data received via SDI, the first set of data is stored in the device quantity register via the SDI shift register. It is then determined whether the device position count value in the device position counter satisfies a first preset relationship with the preset number of devices stored in the device quantity register. If the first preset relationship is satisfied, the address bit group data shifted into the SDI shift register via SDI is stored in the address register, the data in the first internal register corresponding to the address bit group data is stored in the SDI shift register, and the data bit group data shifted into the SDI shift register via SDI is stored in the data register. Finally, based on the read / write flag in the address bit group data, it is determined whether to write the data bit group data to the first internal register. Through this method, data in the internal registers of the corresponding device can be accurately read and written according to the number of devices and the input address bits. In this way, this application can achieve arbitrary reading and writing of device internal register data and obtain diagnostic data information of the device.

[0074] See Figure 6 and Figure 7As shown in the illustration, this application discloses a specific method for reading and writing data within a device. Compared to the previous embodiment, this embodiment further explains and optimizes the technical solution. Specifically, it includes:

[0075] Step S21: When the first rising edge of the SCLK pulse is detected, the diagnostic data in the fault diagnosis register is stored in the SDO shift register, and when the first falling edge of the pulse is detected, the first bit of the first group of data passed by SDI is determined. If the first bit is 0, it is determined that the daisy chain communication mode is entered, and the state machine is changed from the initial state to the first state for transmitting the fault diagnosis bit and the header label bit.

[0076] In this embodiment, when determining whether to enter the daisy chain communication mode based on the first data of the first group of data passed in by SDI, it is first necessary to determine the value of the first data of the first group of data passed in. At this time, SCLKCNT = 1.

[0077] In one specific implementation, if the first data bit is 0, it is determined that the daisy-chain communication mode has been entered, which means that the daisy-chain communication function has been entered. At this time, the state machine changes from the initial state to the first state used to transmit the fault diagnosis bit and the header character header bit, that is, the state machine changes from 0 to 1.

[0078] In another specific implementation, if the first bit is 1, it is determined that the daisy-chain communication mode will not be entered. That is, it indicates that the current function is not daisy-chain communication.

[0079] Step S22: Determine the second bit of the first group of data. If the second bit is 0, it is determined to be a daisy chain header. Then, the state machine is changed from the first state to the second state for transmitting the device quantity bit of the header. Then, the first group of data is stored in the device quantity register through the SDI shift register.

[0080] In this embodiment, upon determining whether to enter daisy-chain communication mode, it is necessary to determine whether the second bit of the incoming first group of data is a daisy-chain header character based on the falling edge of the second pulse of SCLK. First, the value of the second bit of the first group of data is determined. At this time, SCLKCNT = 2.

[0081] In one specific implementation, if the second bit is 0, it is determined to be a daisy-chain header. At this time, the state machine changes from the first state to the second state for transmitting the device quantity bits of the header, that is, the state machine changes from 1 to 2. Then, the first group of data is stored in the device quantity register through the SDI shift register. At this time, SCLKCNT = last.

[0082] In another specific implementation, if the second bit is 1, it is determined to be a non-daisy chain header character. Further, if it is a non-daisy chain header character, the second bit is determined to be a fault diagnosis bit for other devices; the diagnostic data in the SDO shift register is shifted out to SDO, and the fault diagnosis bit is stored in the SDO shift register. That is, if the second bit is 1, indicating a fault diagnosis bit, the diagnostic data of the current device originally stored in the SDO shift register is shifted out to SDO, and the data currently being passed from SDI, i.e., the fault diagnosis bit for other devices, is shifted into the SDO shift register.

[0083] It should be noted that the data structure for the daisy chain header text and fault diagnosis bits can be found in [link to documentation]. Figure 8 As shown, from Figure 8 As can be seen, the first bit of both the daisy chain header text and the fault diagnosis bit is 0, while the second bit of the daisy chain header text is 0 and the second bit of the fault diagnosis bit is 1. Therefore, by using the second bit of the first set of data transmitted from SDI at the falling edge of the second pulse of SCLK, it can be determined whether it is the daisy chain header text or the fault diagnosis bit.

[0084] Step S23: Determine whether the device position count value in the device position counter and the preset number of devices stored in the device quantity register satisfy the first preset relationship. If they satisfy the relationship, after detecting that the last bit of the address bit group data of the current device is shifted into the SDI shift register through the SDI, the address bit group data is stored in the address register through the SDI shift register.

[0085] In one specific implementation, when the last bit of the daisy chain header data, that is, the last bit of the first data, is moved in, the device position count value = preset number of devices + 1, indicating that it is the turn of the current device to read or write data. Then, the second state of the state machine is converted to the fourth state for transmitting the address bits that the current device needs to operate, that is, the state machine directly changes from 2 to 4.

[0086] In another specific implementation, after determining whether the device position count value in the device position counter satisfies the first preset relationship with the preset number of devices stored in the device quantity register, the method further includes: if not, changing the state machine from the second state to a third state for transmitting address bits that do not belong to the current device's operation, and acquiring the address bit group data of the remaining devices passed in by the SDI, until the device position count value and the preset number of devices satisfy the first preset relationship; changing the third state of the state machine to a fourth state for transmitting address bits that the current device needs to operate, and jumping back to the step of storing the address bit group data into the address register through the SDI shift register. That is, when the last bit of the daisy chain header data is shifted in, the device position count value is not equal to the preset number of devices + 1, indicating that it is not yet the turn of the current device to read or write data, so the state machine is changed from the second state to the third state for transmitting address bits that do not belong to the current device's operation, i.e., the state machine changes from state 2 to state 3. Then, it waits for the address bit groups belonging to other devices to be shifted in via SDI. When the last bit of a certain address bit group is shifted in, the device position count equals the preset number of devices + 1. This satisfies the first preset relationship, indicating that it's the current device's turn to read or write data. At this point, the third state of the state machine is converted to the fourth state, used to transmit the address bits that the current device needs to operate on; that is, the state machine changes from 3 to 4. The state machine changing to 4 indicates that the address bit group data shifted in by SDI is the address bit group data that the current device needs to write. To ensure that the data shifted into the SDI shift register can be stored in the address register, it must be ensured that the read / write bit is 0 when the last bit of this address bit group is shifted in. Then, the address bit group data of the current device is stored in the address register through the SDI shift register.

[0087] Step S24: Determine whether the preset number of devices is 1. If it is 1, convert the fourth state of the state machine to the sixth state for transmitting the data bits that the current device needs to operate. When the first pulse rising edge of the data bit group of the current device is detected, store the data in the first internal register corresponding to the address bit group data into the SDO shift register.

[0088] In this embodiment, it should first be noted that under the daisy-chain function, SPI communication can connect multiple devices or only one device. Since when only one device is connected, there will be no extra data groups belonging to other devices in the SDI input data group, it is necessary to first determine whether the preset number of input devices is 1, that is, whether ChipNUM is equal to 1.

[0089] In one specific implementation, if the value is 1, then when the last bit of the address bit group data to be written by the current device is shifted in, the fourth state of the state machine is converted to the sixth state for transmitting the data bits to be operated on by the current device; that is, the state machine changes from state 4 to state 6. When the first rising edge of SCLK of the next set of data, i.e., the data bit group data to be operated on by the current device, is detected, the data in the first internal register corresponding to the address bit group data is stored in the SDO shift register; that is, the original data in the internal register containing the address written when the state machine is in state 4 is stored in the SDO shift register. At this time, the value of the SCLK pulse count SCLKCNT is 1.

[0090] In another specific implementation, if the value is not 1, the fourth state of the state machine is converted to a fifth state for transmitting data bits that do not belong to the current device and need to be operated on. When the first rising edge of the data bit group data of the remaining devices is detected, the data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. When the device position count value and the preset number of devices satisfy a second preset relationship, the fifth state of the state machine is converted to a sixth state for transmitting data bits that the current device and need to be operated on. That is, if the input preset number of devices is not 1, when the last bit of the address bit group data is shifted in, the fourth state of the state machine is converted to a fifth state for transmitting data bits that do not belong to the current device and need to be operated on; that is, the state machine changes from state 4 to state 5 at this time. Upon detecting the rising edge of the first pulse of the data bit group data from other devices, the data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. Then, it waits for the data bit group data belonging to other devices input by SDI to be shifted in, until the last bit of a certain data bit group is shifted in. At this point, the device position count value and the preset number of devices satisfy the second preset relationship, indicating that the next shifted-in data bit group is the data bit that the current device needs to operate on. Then, the fifth state of the state machine is converted to the sixth state for transmitting the data bit that the current device needs to operate on; that is, the state machine changes from state 5 to state 6. The second preset relationship is as follows:

[0091] Device location count = preset number of devices - 1.

[0092] In addition, this application discloses a timing diagram of a daisy chain operation, which can be found in the following document. Figure 9 As shown.

[0093] Step S25: After detecting that the last bit of the current device's data bit group data is shifted into the SDI shift register through the SDI, the data bit group data is stored in the data register through the SDI shift register. Then, based on the read / write flag of the address bit group data, it is determined whether to write the data bit group data in the data register into the first internal register.

[0094] For a more detailed description of the process of step S25, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0095] As can be seen, under the daisy-chain function, this application allows SPI communication to connect multiple devices or only one device. It precisely reads and writes data in the internal registers of the corresponding device based on the preset number of devices and the address bits to be written, achieving accurate control of each device. Furthermore, it can obtain diagnostic data information of the corresponding device output by the SDO, helping users understand the device's status, such as fault status and previous configuration information. Moreover, the SPI bus saves MCU (Microcontroller Unit) resources, requiring only one SPI serial port for communication.

[0096] See Figure 10 As shown in the figure, this application discloses an apparatus for reading and writing data within a device, the apparatus comprising:

[0097] The daisy-chain communication judgment module 11 is used to store the diagnostic data in the fault diagnosis register into the SDO shift register when the first rising edge of the SCLK pulse is detected, and to determine whether to enter the daisy-chain communication mode based on the first data of the first group of data passed by SDI when the first falling edge of the pulse is detected.

[0098] The daisy chain header text judgment module 12 is used to determine whether it is a daisy chain header text based on the second data of the first group of data if it enters. If it is, the first group of data is stored in the device quantity register through the SDI shift register.

[0099] Address bit register module 13 is used to determine whether the device position count value in the device position counter and the preset number of devices stored in the device quantity register satisfy a first preset relationship. If they satisfy the relationship, after detecting that the last bit of the address bit group data of the current device is shifted into the SDI shift register through the SDI, the address bit group data is stored in the address register through the SDI shift register.

[0100] Internal register data acquisition module 14 is used to store the data in the first internal register corresponding to the address bit group data into the SDO shift register;

[0101] The data bit register module 15 is used to store the data bit group data into the data register through the SDI shift register after detecting that the last bit of the current device's data bit group data has been shifted into the SDI shift register through the SDI, and then determine whether to write the data bit group data in the data register into the first internal register based on the read / write flag bit of the address bit group data.

[0102] As can be seen, when the first rising edge of the SCLK pulse is detected, this application stores the diagnostic data in the fault diagnosis register into the SDO shift register. At the first falling edge of the pulse, it determines whether to enter daisy-chain communication mode based on the first bit of the first group of data passed in from SDI. If entered, it determines whether the second bit of the first group of data is a daisy-chain header character. If so, it stores the first group of data into the device quantity register via the SDI shift register. It then determines whether the device position count value in the device position counter satisfies a first preset relationship with the preset device quantity stored in the device quantity register. If satisfied, it detects the address bit of the current device... After the last bit of the data in the group is shifted into the SDI shift register via SDI, the address bit group data is stored in the address register via the SDI shift register. Data in the first internal register corresponding to the address bit group data is stored in the SDO shift register. Upon detecting that the last bit of the current device's data group data is shifted into the SDI shift register via SDI, the data bit group data is stored in the data register via the SDI shift register. Then, based on the read / write flag of the address bit group data, it is determined whether to write the data bit group data in the data register into the first internal register. Therefore, when the first rising edge of the SCLK pulse is detected, the diagnostic data in the fault diagnosis register is stored in the SDO shift register, thereby obtaining the diagnostic data information of the current device to understand the fault situation. Furthermore, after determining entry into daisy-chain communication mode based on the first group of data received via SDI and detecting the daisy-chain header text, the first group of data is stored in the device quantity register via the SDI shift register, and it is determined whether the device position count value in the device position counter and the preset device quantity stored in the device quantity register satisfy a first preset relationship. Under the condition of satisfying the first preset relationship, the address bit group data shifted into the SDI shift register via SDI is stored in the address register, and the data in the first internal register corresponding to the address bit group data is stored in the SDI shift register. The data bit group data shifted into the SDI shift register via SDI is stored in the data register. Finally, based on the read / write flag bit in the address bit group data, it is determined whether to write the data bit group data to the first internal register. Through the above method, data in the internal registers of the corresponding device can be accurately read and written according to the number of devices and the input address bits. In this way, this application can realize arbitrary reading and writing of device internal register data and obtain diagnostic data information of the device.

[0103] Figure 11This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Specifically, it may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the method for reading and writing data within the device disclosed in any of the foregoing embodiments.

[0104] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0105] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0106] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon include operating system 221, computer program 222 and data 223, etc., and the storage method can be temporary storage or permanent storage.

[0107] The operating system 221 manages and controls the various hardware devices on the electronic device 20 and the computer program 222 to enable the processor 21 to perform calculations and processing on the massive amount of data 223 in the memory 22. The operating system 221 can be Windows, Unix, Linux, etc. The computer program 222, in addition to including a computer program capable of performing the methods for reading and writing data within the device as disclosed in any of the foregoing embodiments, may further include computer programs capable of performing other specific tasks. The data 223 may include data received by the electronic device from external devices, as well as data collected by its own input / output interface 25.

[0108] Furthermore, embodiments of this application also disclose a computer-readable storage medium storing a computer program. When the computer program is loaded and executed by a processor, it implements the method steps performed during the process of reading and writing data within the device as disclosed in any of the foregoing embodiments.

[0109] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0110] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0111] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0112] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0113] The present invention has provided a detailed description of a method, apparatus, device, and storage medium for reading and writing data within a device. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method of reading data in a read-write device, characterized by, The method comprises the following steps: When the first rising edge of the SCLK is detected, the diagnostic data in the fault diagnosis register is stored to the SDO shift register, and at the first falling edge, whether to enter the daisy chain communication mode is determined based on the first bit of the first group of data transmitted by the SDI; If yes, whether the first group of data is the daisy chain head character is determined based on the second bit of the first group of data; If yes, the first group of data is stored to the device number register through the SDI shift register; Whether the device position count value in the device position counter and the preset device number stored in the device number register satisfy a first preset relationship is determined, and if yes, after the last bit of the address bit group data of the current device is detected to be transmitted to the SDI shift register through the SDI, the address bit group data is stored to the address register through the SDI shift register; 2. The method of reading and writing data in a device according to claim 1, wherein, The data in the first internal register corresponding to the address bit group data is stored to the SDO shift register, and after the last bit of the data bit group data of the current device is detected to be transmitted to the SDI shift register through the SDI, the data bit group data is stored to the data register through the SDI shift register, and then whether the data bit group data in the data register is written to the first internal register is determined based on the read-write flag bit of the address bit group data. The determination whether to enter the daisy chain communication mode based on the first bit of the first group of data transmitted by the SDI comprises the following steps: The first bit of the first group of data transmitted by the SDI is determined; If the first bit is 0, it is determined to enter the daisy chain communication mode, and the state machine is converted from the initial state to a first state for transmitting the fault diagnosis bit and the head character header bit; 3. The method of reading and writing data in a device according to claim 2, wherein, If the first bit is 1, it is determined not to enter the daisy chain communication mode. The determination whether the first group of data is the daisy chain head character based on the second bit of the first group of data comprises the following steps: The second bit of the first group of data is determined; If the second bit is 0, it is determined to be the daisy chain head character, and the state machine is converted from the first state to a second state for transmitting the device number bit of the head character; 4. The method of reading and writing data in a device according to claim 3, wherein, If the second bit is 1, it is determined to be a non-daisy chain head character. After the determination whether the first group of data is the daisy chain head character based on the second bit of the first group of data, the following steps are further included: If it is a non-daisy chain head character, the second bit is determined to be the fault diagnosis bit of the remaining devices; 5. The method of reading and writing data in a device according to claim 3, wherein, The diagnostic data in the SDO shift register is transmitted to the SDO, and the fault diagnosis bit is stored to the SDO shift register. After the determination whether the device position count value in the device position counter and the preset device number stored in the device number register satisfy the first preset relationship, the following steps are further included: If not, the state machine is converted from the second state to a third state for transmitting the address bit not belonging to the current device to be operated, and the address bit group data of the remaining devices transmitted by the SDI is acquired until the device position count value and the preset device number satisfy the first preset relationship; The third state of the state machine is converted into a fourth state for transmitting address bits which the current device needs to operate, and the step of storing the address bit group data into the address register through the SDI shift register is re-jumped.

6. The method of reading and writing data in a device according to claim 5, wherein, The storing of the data in the first internal register corresponding to the address bit group data into the SDO shift register comprises: determining whether the preset device quantity is 1; if not, converting the fourth state of the state machine into a fifth state for transmitting data bits which do not belong to the current device needs to operate, and storing the data in the first internal register corresponding to the address bit group data into the SDO shift register when a first pulse rising edge of the data bit group data of the remaining devices is detected; when the device position counter value and the preset device quantity satisfy a second preset relationship, converting the fifth state of the state machine into a sixth state for transmitting data bits which the current device needs to operate; if yes, converting the fourth state of the state machine into a sixth state for transmitting data bits which the current device needs to operate, and storing the data in the first internal register corresponding to the address bit group data into the SDO shift register when a first pulse rising edge of the data bit group data of the current device is detected.

7. The method of reading and writing data in a device according to any one of claims 1 to 6, characterized in that, After the storing of the address bit group data into the address register through the SDI shift register, the method further comprises: storing data in a second internal register corresponding to a preset address into the SDI shift register.

8. An apparatus for reading and writing data in a read-write device, characterized by The method comprises: a daisy chain communication determining module, configured to store diagnosis data in a fault diagnosis register into an SDO shift register when a first pulse rising edge of SCLK is detected, and determine whether to enter a daisy chain communication mode based on a first bit of data of a first group of data input through SDI at a first pulse falling edge; a daisy chain head character determining module, configured to determine whether to be a daisy chain head character based on a second bit of data of the first group of data if entering, and store the first group of data into a device quantity register through the SDI shift register if yes; an address bit register module, configured to determine whether a device position counter value in a device position counter and a preset device quantity stored in the device quantity register satisfy a first preset relationship, and store the address bit group data into an address register through the SDI shift register after a last bit of data in the address bit group data of the current device is input into the SDI shift register through the SDI; an internal register data obtaining module, configured to store data in a first internal register corresponding to the address bit group data into the SDO shift register; a data bit register module, configured to, after detecting that the last bit of the data bit group data of the current device passes into the SDI shift register through the SDI, store the data bit group data into a data register through the SDI shift register, and then determine whether to write the data bit group data in the data register into the first internal register based on the read-write flag bit of the address bit group data.

9. An electronic device, comprising: comprising: a memory for storing a computer program; a processor for executing the computer program to implement the steps of the method for reading and writing data in the read-write device according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, a computer program product for storing a computer program; wherein the computer program is executed by a processor to implement the steps of the method for reading and writing data in the read-write device according to any one of claims 1 to 7.

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