Industrial Ethernet protocol optimization method, system and readable storage medium

By integrated Ethernet on the RISC-V platform and set up an interrupt and communication mechanism of OpenSBI, the problem of low communication performance of the RISC-V platform industry Ethernet has been solved. V's application in industrial fields.

CN115695079BActive Publication Date: 2025-01-21PENG CHENG LAB
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Patent Information

Application Number
CN202211352900.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-31
Publication Date
2025-01-21
Estimated Expiration
2042-10-31

AI Technical Summary

Technical Problem

The performance level of RISC-V platform running industrial Ethernet communication is relatively weak, which affects its promotion and application in the industrial field.

Method used

By integrating the preset Ethernet driver into OpenSBI, and virtualizing the access interface of the shared memory according to the preset memory sharing mechanism, setting the interrupt mechanism and communication mechanism of OpenSBI, controlling the data interaction between the application and OpenSBI, bypassing the operating system mechanism to directly realize the interaction between user programs and the Ethernet driver in OpenSBI.

Benefits of technology

It has significantly shortened the IO processing time and data migration time, enhanced the real time of the industrial Ethernet communication protocol, and improved the communication capabilities of the RISC-V platform in the industrial field.

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Abstract

The present application discloses an industrial Ethernet protocol optimization method, system and readable storage medium, the industrial Ethernet protocol optimization method comprising the steps of: integrating a preset Ethernet driver into OpenSBI; virtualizing a shared memory access interface corresponding to an application, the OpenSBI and an operating system according to a preset memory sharing mechanism; setting an interrupt mechanism and a communication mechanism of the OpenSBI respectively according to the type of hardware and the access interface, wherein the type of hardware includes a single-core processor and a multi-core processor; controlling the application and the OpenSBI to perform data interaction according to the interrupt mechanism and the communication mechanism. The present application improves the communication capability of industrial Ethernet on the RISC‑V platform.
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Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to an industrial Ethernet protocol optimization method, system and readable storage medium. Background Art

[0002] In industrial scenarios, such as using PROFINET (automation bus standard), EtherCAT (Ethernet control automation technology), Ethernet / IP (Industrial Ethernet communication protocol) and other protocols for industrial system control, in order to achieve technical requirements such as low latency and low jitter, industrial Ethernet protocols often need to be optimized through a variety of technologies. First, use RTOS (Real Time Operating System) to ensure the real-time performance of the system. Even if using operating systems such as Linux, xenomai (strong real-time extension) and preempt_rt patch (hard real-time kernel patch) will be used first to enhance the real-time performance of the Linux system; second, use a special architecture, such as Ti's AM3358 uses PRU-ICSS (industrial communication subsystem), which optimizes the CPU (central processing unit CPU) bus access to the MAC layer, greatly shortening the processor's access cycle to IO devices, thereby reducing the jitter and delay caused by hardware.

[0003] Enhancing the real-time performance of the operating system will greatly improve the performance of the Ethernet industrial communication protocol. At present, there are many ARM and x86 processors in the industrial field. The operating system has optimized these two architectures more and has relatively good real-time performance. RISC-V is a newer processor in recent years. Compared with ARM, the real-time operating system is transplanted from the ARM platform or x86 platform and is not well adapted to RISC-V. At the same time, the software process has not fully considered the characteristics of the RISC-V architecture. Therefore, after comprehensive testing, compared with the ARM and x86 platforms, under the condition of comparable hardware performance, the performance level of the RISC-V platform running industrial Ethernet communication is relatively weak. This is extremely unfavorable to the promotion and application of the RISC-V platform in industry. Summary of the invention

[0004] The main purpose of this application is to provide an industrial Ethernet protocol optimization method, system and readable storage medium, aiming to solve the problem of weak performance level of industrial Ethernet communication running on RISC-V platform.

[0005] To achieve the above object, the present application provides an industrial Ethernet protocol optimization method, which is applied to a RISC-V architecture, wherein the RISC-V architecture includes an application, an operating system, OpenSBI, and hardware, and the industrial Ethernet protocol optimization method includes the steps of:

[0006] Integrate the default Ethernet driver into OpenSBI;

[0007] According to the preset memory sharing mechanism, a shared memory access interface corresponding to the application, the OpenSBI and the operating system is virtualized;

[0008] According to the type of hardware and the access interface, the interrupt mechanism and the communication mechanism of the OpenSBI are respectively set, wherein the type of hardware includes a single-core processor and a multi-core processor;

[0009] According to the interrupt mechanism and the communication mechanism, the application program is controlled to perform data interaction with the OpenSBI.

[0010] Optionally, according to the type of hardware and the access interface, the step of setting the interrupt mechanism of the OpenSBI includes:

[0011] When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a machine mode;

[0012] In the machine mode, controlling the external interrupt service program in the single-core processor to process the Ethernet interrupt in the external interrupt according to the access interface;

[0013] Obtain interrupt numbers and parameters of other interrupts in the external interrupts except the Ethernet interrupt, send the interrupt numbers and parameters to the software interrupt service program, and control the software interrupt service program to process the other interrupts.

[0014] Optionally, the step of setting the interrupt mechanism of the OpenSBI according to the type of hardware and the access interface further includes:

[0015] When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a supervisor mode;

[0016] In the supervisor mode, controlling the external interrupt program in the single-core processor to process other interrupts among the external interrupts except the Ethernet interrupt according to the access interface;

[0017] Switching the privileged mode of the single-core processor to the machine mode, and responding to the Ethernet interrupt in the external interrupt;

[0018] The interrupt service corresponding to the Ethernet interrupt is completed, and the privileged mode of the single-core processor is switched to the user mode.

[0019] Optionally, according to the type of hardware and the access interface, the step of setting the communication mechanism of the OpenSBI includes:

[0020] When the hardware type is a single-core processor, the application program is controlled according to the access interface to close the service program corresponding to the Ethernet interrupt in the OpenSBI, and the OpenSBI is controlled to stop accessing the shared memory.

[0021] Optionally, the step of setting the interrupt mechanism of the OpenSBI according to the type of hardware and the access interface further includes:

[0022] When the hardware type is a multi-core processor and the multi-core processor detects that an external interrupt is generated, controlling an Ethernet interrupt in the external interrupt to be sent to any one kernel in the multi-core processor whose privileged mode is a machine mode for processing;

[0023] Control the other interrupts in the external interrupts except the Ethernet interrupt to be sent to any core in the multi-core processor whose privileged mode is the supervisor mode for processing.

[0024] Optionally, according to the type of hardware and the access interface, the step of setting the communication mechanism of the OpenSBI includes:

[0025] When the hardware type is a multi-core processor, controlling the operating system to establish a lock corresponding to the shared memory;

[0026] Control the application, the operating system and the OpenSBI to execute a service program for acquiring the lock according to the access interface, and determine whether the application has acquired the lock through the operating system;

[0027] If the application acquires the lock, the lock is fed back to the application.

[0028] Optionally, after the step of controlling the application to execute the service program for acquiring the lock according to the access interface and determining whether the application has acquired the lock through the operating system, the method further includes:

[0029] If the application program fails to obtain the lock, the operating system is controlled to dispatch the execution right of the multi-core processor to other to-be-executed applications that have obtained the lock, and the state of the application program is controlled to switch to a sleep state.

[0030] Optionally, the step of setting the communication mechanism of the OpenSBI according to the type of hardware and the access interface further includes:

[0031] Controlling the application, the operating system and the OpenSBI to execute a service program to release the lock, and feeding back the state of the lock and the application to be executed to the operating system;

[0032] The operating system is controlled to switch the state of the application program to be executed to a ready state, and the multi-core processor is controlled to execute the application program to be executed.

[0033] In addition, to achieve the above-mentioned purpose, the present invention also provides an industrial Ethernet protocol optimization system, characterized in that the industrial Ethernet protocol optimization system includes: a memory, a processor, and an industrial Ethernet protocol optimization program stored in the memory and executable on the processor, and when the industrial Ethernet protocol optimization program is executed by the processor, the steps of the industrial Ethernet protocol optimization method as described above are implemented.

[0034] In addition, to achieve the above-mentioned purpose, the present invention also provides a computer-readable storage medium, on which an industrial Ethernet protocol optimization program is stored, and when the industrial Ethernet protocol optimization program is executed by a processor, the steps of the industrial Ethernet protocol optimization method as described above are implemented.

[0035] The present invention provides an industrial Ethernet protocol optimization method, system and readable storage medium, the industrial Ethernet protocol optimization method comprising the steps of: integrating a preset Ethernet driver into OpenSBI; according to a preset memory sharing mechanism, virtualizing an access interface of a shared memory corresponding to an application, the OpenSBI and an operating system; according to the type of hardware and the access interface, respectively setting an interrupt mechanism and a communication mechanism of the OpenSBI, wherein the type of the hardware includes a single-core processor and a multi-core processor; according to the interrupt mechanism and the communication mechanism, controlling the application and the OpenSBI to perform data interaction. Through the above method, the present invention can utilize the characteristics of the RISC-V architecture, directly put the Ethernet driver into OpenSBI for execution, bypass the mechanism of the operating system, and the user program directly interacts with the Ethernet driver in OpenSBI, which can greatly shorten the processing time of IO and the migration time of data, is not affected by the operating system mechanism, and enhances the real-time performance of the industrial Ethernet communication protocol. The communication capability of the industrial Ethernet in the RISC-V architecture is greatly improved, which is conducive to the promotion and application of the RISC-V platform in industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1It is a structural diagram of the hardware operating environment involved in the embodiment of the industrial Ethernet protocol optimization method of the present invention;

[0037] Figure 2 It is a flow chart of an embodiment of the industrial Ethernet protocol optimization method of the present invention;

[0038] Figure 3 It is a structural schematic diagram of the RISC-V architecture in the industrial Ethernet protocol optimization method of the present invention;

[0039] Figure 4 It is a schematic diagram of the structure of the existing RISC-V architecture;

[0040] Figure 5 It is a detailed flow chart of step S30 in an embodiment of the industrial Ethernet protocol optimization method of the present invention;

[0041] Figure 6 It is another detailed flow chart of step S30 in an embodiment of the industrial Ethernet protocol optimization method of the present invention.

[0042] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0044] like Figure 1 As shown, Figure 1 It is a schematic diagram of the terminal structure of the hardware operating environment involved in the embodiment of the present invention.

[0045] The terminal in the embodiment of the present invention is an industrial Ethernet protocol optimization system.

[0046] like Figure 1As shown, the terminal may include: a processor 1001, such as a CPU, a communication bus 1002, a user interface 1003, a DVI interface 1004, a USB interface 1005, and a memory 1006. Among them, the communication bus 1002 is used to realize the connection and communication between these components. The user interface 1003 may include a display screen (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface and a wireless interface. The DVI interface 1004 may optionally include a standard wired interface, which is connected to other external devices via a DVI line. The USB interface 1005 may optionally include a standard wired interface, which is connected to other external devices via a USB cable. The memory 1006 may be a high-speed RAM memory, or a stable memory (non-volatile memory), such as a disk memory. The memory 1006 may also be a storage device independent of the aforementioned processor 1001.

[0047] Optionally, the terminal may further include an audio circuit and the like, which will not be described in detail here.

[0048] Those skilled in the art will understand that Figure 1 The terminal structure shown in the figure does not constitute a limitation on the terminal, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0049] like Figure 1 As shown, the memory 1006 as a computer storage medium may include an operating system, a DVI interface module, a USB interface module, a user interface module, and an industrial Ethernet protocol optimization program.

[0050] exist Figure 1 In the terminal shown, the DVI interface 1004 is mainly used to connect to an external device and perform data communication with the external device; the USB interface 1005 is mainly used to connect to an external device and perform data communication with the external device; the user interface 1003 is mainly used to connect to a client and perform data communication with the client; and the processor 1001 can be used to call the industrial Ethernet protocol optimization program stored in the memory 1006 and perform the following operations:

[0051] Integrate the default Ethernet driver into OpenSBI;

[0052] According to the preset memory sharing mechanism, virtualize the shared memory access interface corresponding to the application layer, the OpenSBI and the operating system;

[0053] According to the type of hardware and the access interface, the interrupt mechanism and the communication mechanism of the OpenSBI are respectively set, wherein the type of hardware includes a single-core processor and a multi-core processor;

[0054] According to the interrupt mechanism and the communication mechanism, the application layer is controlled to perform data interaction with the OpenSBI.

[0055] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0056] When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a machine mode;

[0057] In the machine mode, controlling the external interrupt service program in the single-core processor to process the Ethernet interrupt in the external interrupt according to the access interface;

[0058] Obtain interrupt numbers and parameters of other interrupts in the external interrupts except the Ethernet interrupt, send the interrupt numbers and parameters to the software interrupt service program, and control the software interrupt service program to process the other interrupts.

[0059] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0060] When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a supervisor mode;

[0061] In the supervisor mode, controlling the external interrupt program in the single-core processor to process other interrupts among the external interrupts except the Ethernet interrupt according to the access interface;

[0062] Switching the privileged mode of the single-core processor to the machine mode, and responding to the Ethernet interrupt in the external interrupt;

[0063] The interrupt service corresponding to the Ethernet interrupt is completed, and the privileged mode of the single-core processor is switched to the user mode.

[0064] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0065] When the hardware type is a single-core processor, the application layer is controlled according to the access interface to close the service program corresponding to the Ethernet interrupt in the OpenSBI, and the OpenSBI is controlled to stop accessing the shared memory.

[0066] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0067] When the hardware type is a multi-core processor and the multi-core processor detects that an external interrupt is generated, controlling an Ethernet interrupt in the external interrupt to be sent to any one kernel in the multi-core processor whose privileged mode is a machine mode for processing;

[0068] Control the other interrupts in the external interrupts except the Ethernet interrupt to be sent to any core in the multi-core processor whose privileged mode is the supervisor mode for processing.

[0069] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0070] When the hardware type is a multi-core processor, controlling the operating system to establish a lock corresponding to the shared memory;

[0071] Control the application layer, the operating system and the OpenSBI to execute a service program for acquiring the lock according to the access interface, and determine whether the OpenSBI acquires the lock through the operating system;

[0072] If the OpenSBI obtains the lock, the operating system is controlled to feed the lock back to the current application in the application layer.

[0073] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0074] If the OpenSBI fails to obtain the lock, the operating system is controlled to dispatch the execution right of the multi-core processor to other to-be-executed applications that have obtained the lock, and the state of the current application is controlled to switch to a sleep state.

[0075] Further, the processor 1001 may call the industrial Ethernet protocol optimization program stored in the memory 1006, and further perform the following operations:

[0076] Control the application layer, the operating system and the OpenSBI to execute a service program to release the lock, and feed back the state of the lock and the application program to be executed to the operating system;

[0077] The operating system is controlled to switch the state of the application program to be executed to a ready state, and the multi-core processor is controlled to execute the application program to be executed.

[0078] The specific embodiments of the industrial Ethernet protocol optimization system of the present invention are basically the same as the embodiments of the industrial Ethernet protocol optimization program described below, and will not be described in detail here.

[0079] See also Figure 2 , Figure 2 This is a flow chart of a first embodiment of an industrial Ethernet protocol optimization method of an industrial Ethernet protocol optimization system of the present invention. The industrial Ethernet protocol optimization method of an industrial Ethernet protocol optimization system provided by this embodiment includes the following steps:

[0080] Step S10, integrating the preset Ethernet driver into OpenSBI;

[0081] The present invention is applied to RISC-V architecture, which includes an application layer, an operating system, OpenSBI and hardware, wherein the RISC-V architecture is an open instruction set architecture (ISA) based on the principle of reduced instruction set computing (RISC), V represents the fifth generation RISC, and the OpenSBI is a general specification of an open source RISC-V virtualization binary interface. In current practice, on the RISC-V system-level chip, OpenSBI runs in M ​​(Machine) state, and the operating system Linux runs in S (Superviosr) state. Application programs and the like run in U (User / Application) state. There are three different privilege levels, and the privilege levels are arranged from high to low as M state, S state and U state, to prevent the further spread of harmful actions made by programs of low privilege levels in different privilege states.

[0082] See also Figure 3 and Figure 4 , Figure 3 It is a schematic diagram of the structure of the RISC-V architecture of the present invention, Figure 4 It is a schematic diagram of the structure of the existing RISC-V architecture. In this embodiment, in order to enhance the real-time performance of the industrial Ethernet protocol, the Ethernet driver can be directly integrated into OpenSBI, and the Ethernet hardware can be directly driven by OpenSBI, so that the application layer can directly interact with the Ethernet driver in OpenSBI, thereby enhancing the real-time performance of the industrial Ethernet communication protocol.

[0083] Step S20, according to the preset memory sharing mechanism, virtualizing the shared memory access interface corresponding to the application layer, the OpenSBI and the operating system;

[0084] In this embodiment, the shared memory is a physical memory area accessible to the application layer, OpenSBI and the operating system. Specifically, the application layer directly applies to the operating system for a memory area of ​​appropriate size. The memory is used in the manner agreed upon by the user layer and the driver program inside OpenSBI, such as specifying the sending area, receiving area, storage of parameters, etc. The shared memory mainly completes: 1. Sending Ethernet data packets; 2. Receiving Ethernet data; 3. Managing data. After the user layer completes the application, the environment call, i.e., the (ecall) instruction, is used to call the relevant OpenSBI service, and the Ethernet driver in OpenSBI is notified of the applied shared memory address, which is used for data exchange between OpenSBI and the shared memory.

[0085] Since data interaction between the application layer and OpenSBI is required, a memory sharing mechanism is required to virtualize the access interface of the application layer to OpenSBI, so that in normal use, there is no need for operating system kernel access, and the kernel only performs necessary management and maintenance actions. The application directly penetrates the operating system and directly interacts with OpenSBI to transfer data. It should be noted that since OpenSBI does not require operating system scheduling, its running priority and privilege level are also higher than the operating system, which is equivalent to the highest priority thread under the operating system and cannot be preempted.

[0086] Step S30, setting the interrupt mechanism and the communication mechanism of the OpenSBI respectively according to the type of hardware and the access interface, wherein the type of hardware includes a single-core processor and a multi-core processor;

[0087] In this embodiment, the Ethernet driver is sunk into OpenSBI, and the user program interacts directly with the Ethernet driver in OpenSBI, which can greatly shorten the IO processing time and data migration time, is not affected by the operating system mechanism, and enhances the real-time performance of the industrial Ethernet communication protocol. However, in order to realize the data interaction between OpenSBI and the application program, it is also necessary to set the interrupt mechanism and communication mechanism of OpenSBI, and the terminal mechanism and communication mechanism have different setting procedures depending on the hardware type. Specifically, the step of setting the interrupt mechanism of OpenSBI according to the hardware type and the access interface in step S30 also includes:

[0088] Step S31, when the type of the hardware is a single-core processor and the single-core processor detects the generation of an external interrupt, switching the privileged mode of the single-core processor to a machine mode;

[0089] Step S32, in the machine mode, controlling the external interrupt service program in the single-core processor to process the Ethernet interrupt in the external interrupt according to the access interface;

[0090] Step S33, obtaining the interrupt numbers and parameters of other interrupts in the external interrupts except the Ethernet interrupt, and sending the interrupt numbers and the parameters to the software interrupt service program, and controlling the software interrupt service program to process the other interrupts.

[0091] It should be noted that when an interrupt occurs in the RISC-V architecture, the interrupt is processed by the M state, but RISC-V can proxy an interrupt from the M state to the S state through a proxy, that is, the proxy interrupt is directly served by the S state and no longer enters the M state, thereby saving processing time; it can also be proxied to the U state. At present, RISC-V divides interrupts into clock interrupts, software interrupts, and external interrupts. All external interrupts inside the chip are handled by the kernel of the operating system. For ease of processing, all interrupts are proxied to the S state for processing. If the SBI layer is required to solve Ethernet problems, the SBI is required to handle Ethernet interrupts. In this embodiment, when the privileged mode of the single-core processor is the machine mode, it means that the single-core processor runs in OpenSBI. When the hardware type is a single-core processor, all external interrupts of the single-core processor are processed in the M state, but the M state does not perform substantial processing. Instead, it is processed by software interrupt proxy to the S state, and the interrupt numbers and parameters of other interrupts except Ethernet interrupts are sent to the S state, and the software interrupt service program of the S state replaces the original external interrupt service program for processing, wherein the interrupt number is the interrupt number, and the parameters are the parameters required to run the interrupt. Through the above processing method, the present invention can realize interrupt processing under a single-core processor.

[0092] In one embodiment, the step of setting the interrupt mechanism of the OpenSBI according to the type of hardware and the access interface in step S30 further includes:

[0093] Step S34, when the type of the hardware is a single-core processor and the single-core processor detects the generation of an external interrupt, switching the privileged mode of the single-core processor to a supervisor mode;

[0094] Step S35, in the supervisor mode, controlling the external interrupt program in the single-core processor to process other interrupts in the external interrupt except the Ethernet interrupt according to the access interface;

[0095] Step S36, switching the privileged mode of the single-core processor to the machine mode, and responding to the Ethernet interrupt in the external interrupt;

[0096] Step S37, completing the interrupt service corresponding to the Ethernet interrupt, and switching the privileged mode of the single-core processor to the user mode.

[0097] In this embodiment, in addition to the above method, the method for processing interrupts in a single-core processor can also process all external interrupts of the single-core processor in the S state. For Ethernet interrupts among external interrupts, the scene is directly saved in the upper half of the operating system, and the ecall instruction is called, so that the privileged mode of the single-core processor falls into the M state OpenSBI, that is, the privileged mode of the single-core processor is switched to the machine mode, and OpenSBI directly completes the Ethernet interrupt service. After the service is completed, the ecall instruction is called again to return to the operating system, and then necessary processing (context switching, hardware processing, etc.) is performed, and the ecall instruction is called again to return to the application layer, that is, the privileged mode of the single-core processor is switched to the user mode.

[0098] In one embodiment, in step S30, the step of setting the communication mechanism of the OpenSBI according to the type of hardware and the access interface includes:

[0099] Step A38, when the hardware type is a single-core processor, control the application layer according to the access interface to close the service program corresponding to the Ethernet interrupt in the OpenSBI, and control the OpenSBI to stop accessing the shared memory.

[0100] In this embodiment, the communication between OpenSBI and the application layer mainly solves the integrity of the data in the shared memory; on this basis, the application layer should be able to promptly inform OpenSBI to execute related services.

[0101] When setting up the communication mechanism of a single-core processor, since the application layer and OpenSBI communicate, the synchronization mechanism of the operating system is completely bypassed. Therefore, the integrity of data preservation can be achieved by disabling interrupts. However, disabling the entire interrupt will affect the operating system's response to other interrupts. Therefore, the application layer calls the corresponding service in OpenSBI and only closes the corresponding Ethernet interrupt. At the same time, OpenSBI stops accessing the data structure in the shared memory area until the user layer allows OpenSBI to operate on the data structure in the shared memory.

[0102] In one embodiment, when the hardware is a multi-core processor, in step S30, the step of setting the interrupt mechanism of the OpenSBI according to the type of hardware and the access interface further includes:

[0103] Step A301, when the hardware type is a multi-core processor and the multi-core processor detects that an external interrupt is generated, controlling an Ethernet interrupt in the external interrupt to be sent to any core in the multi-core processor whose privileged mode is a machine mode for processing;

[0104] Step A302, controlling the other interrupts in the external interrupts except the Ethernet interrupt to be sent to any core in the multi-core processor whose privileged mode is the supervisor mode for processing.

[0105] In this embodiment, since there are multiple processing cores in the multi-core processor, it is possible to specify which processor core will serve the Ethernet interrupt. Using this feature, a core can be taken out separately, and its external interrupt is only one Ethernet interrupt, which can be directly processed in the M state in the core. Other interrupts except the Ethernet interrupt can be processed by other cores. For example, core 1 is the main core, and all interrupts except the Ethernet interrupt are proxied to the S state, which serves all other interrupts except the Ethernet interrupt; core 2, the Ethernet interrupt is directly served in the M state. It is not proxied to the S state for processing. Compared with the interrupt processing method of a single-core processor, a multi-core processor is more direct and efficient.

[0106] In addition, in one embodiment, in step S30, the step of setting the communication mechanism of the OpenSBI according to the type of hardware and the access interface includes:

[0107] Step A303, when the hardware type is a multi-core processor, controlling the operating system to establish a lock corresponding to the shared memory;

[0108] In this embodiment, the synchronization between OpenSBI and the application layer cannot use the synchronization and mutual exclusion mechanism provided by the traditional operating system. OpenSBI cannot call the access interface of the operating system to communicate with the application layer. Therefore, if the application layer effectively communicates with OpenSBI synchronously, it must provide a mechanism, i.e., a lock mechanism, so that the operating system can conveniently use this mechanism to provide synchronization and mutual exclusion services for the application layer and OpenSBI.

[0109] Step A304, controlling the application layer, the operating system and the OpenSBI to execute a service program for acquiring the lock according to the access interface, and determining whether the OpenSBI acquires the lock through the operating system;

[0110] In this embodiment, the specific process of acquiring the lock is:

[0111] Step a: The application layer executes the command to obtain the corresponding lock, and uses the ecall instruction to trap into the operating system (from U state to S state);

[0112] Step b: The operating system protects the relevant parameters and scenarios, and calls the ecall instruction again to fall into sbi (from S state to M state);

[0113] Step c: OpenSBI completes the actual operation of acquiring the lock and returns the actual status of the lock. If the lock is not acquired, the current thread that has not acquired the lock is recorded;

[0114] Step d: The operating system determines whether the lock is acquired, and returns to the application layer if the lock is acquired;

[0115] Step A305: If the OpenSBI obtains the lock, the operating system is controlled to feed the lock back to the current application in the application layer.

[0116] In one embodiment, after step A304, the method further includes:

[0117] Step A306: If the OpenSBI does not obtain the lock, the operating system is controlled to dispatch the execution right of the multi-core processor to other pending applications that have obtained the lock, and the state of the current application is controlled to switch to a sleep state.

[0118] In this embodiment, if the lock is not obtained, the operating system schedules other applications in the application layer. The application is in a sleeping state; at the same time, the data that the application to be scheduled needs to wake up is notified to the OpenSBI layer through the access interface. The OpenSBI layer retains this part of data to wake up the corresponding sleeping application.

[0119] In one embodiment, in step S30, the step of setting the communication mechanism of the OpenSBI according to the type of hardware and the access interface further includes:

[0120] Step A307, controlling the application layer, the operating system and the OpenSBI to execute a service program to release the lock, and feeding back the state of the lock and the application program to be executed to the operating system;

[0121] Step A307, controlling the operating system to switch the state of the application to be executed to a ready state, and controlling the multi-core processor to execute the application to be executed.

[0122] The ready state is a state ready to execute.

[0123] In this embodiment, specifically, the process of releasing the lock is:

[0124] Step e: The application layer calls the system call to release the lock, and uses the ecall instruction to trap into the operating system (U state changes to S state);

[0125] Step f: The operating system protects the relevant parameters and scenarios, and calls ecall to fall into sbi (transition from S state to M state);

[0126] Step g: OpenSBI completes the actual operation of releasing the lock, returns the actual state of the lock, and returns the next thread that obtains the lock (transitions from the M state to the S state);

[0127] Step h: The operating system puts the corresponding application in a ready state according to the thread returned by OpenSBI, so that it can be executed by the processor (S state);

[0128] Step i: Return to the application (S state changes to U state). The thread is the running application.

[0129] In this embodiment, by setting a communication mechanism of a multi-core processor, the application layer can give up the time for waiting for new applications according to the state of the OpenSBI core layer lock, thereby avoiding long waiting times and achieving efficient use of the processor.

[0130] Step S40: Control the application layer and the OpenSBI to perform data interaction according to the interrupt mechanism and the communication mechanism.

[0131] The present invention provides an industrial Ethernet protocol optimization method, system and readable storage medium, the industrial Ethernet protocol optimization method comprising the steps of: integrating a preset Ethernet driver into OpenSBI; according to a preset memory sharing mechanism, virtualizing an access interface of a shared memory corresponding to an application, the OpenSBI and an operating system; according to the type of hardware and the access interface, respectively setting an interrupt mechanism and a communication mechanism of the OpenSBI, wherein the type of the hardware includes a single-core processor and a multi-core processor; according to the interrupt mechanism and the communication mechanism, controlling the application and the OpenSBI to perform data interaction. Through the above method, the present invention can utilize the characteristics of the RISC-V architecture, directly put the Ethernet driver into OpenSBI for execution, bypass the mechanism of the operating system, and the user program directly interacts with the Ethernet driver in OpenSBI, which can greatly shorten the processing time of IO and the migration time of data, is not affected by the operating system mechanism, and enhances the real-time performance of the industrial Ethernet communication protocol. The communication capability of the industrial Ethernet in the RISC-V architecture is greatly improved, which is conducive to the promotion and application of the RISC-V platform in industry.

[0132] In addition, an embodiment of the present invention further provides a computer-readable storage medium, on which an industrial Ethernet protocol optimization program is stored. When the industrial Ethernet protocol optimization program is executed by a processor, the following operations are implemented:

[0133] Integrate the default Ethernet driver into OpenSBI;

[0134] According to the preset memory sharing mechanism, virtualize the shared memory access interface corresponding to the application layer, the OpenSBI and the operating system;

[0135] According to the type of hardware and the access interface, the interrupt mechanism and the communication mechanism of the OpenSBI are respectively set, wherein the type of hardware includes a single-core processor and a multi-core processor;

[0136] According to the interrupt mechanism and the communication mechanism, the application layer is controlled to perform data interaction with the OpenSBI.

[0137] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0138] When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a machine mode;

[0139] In the machine mode, controlling the external interrupt service program in the single-core processor to process the Ethernet interrupt in the external interrupt according to the access interface;

[0140] Obtain interrupt numbers and parameters of other interrupts in the external interrupts except the Ethernet interrupt, send the interrupt numbers and parameters to the software interrupt service program, and control the software interrupt service program to process the other interrupts.

[0141] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0142] When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a supervisor mode;

[0143] In the supervisor mode, controlling the external interrupt program in the single-core processor to process other interrupts among the external interrupts except the Ethernet interrupt according to the access interface;

[0144] Switching the privileged mode of the single-core processor to the machine mode, and responding to the Ethernet interrupt in the external interrupt;

[0145] The interrupt service corresponding to the Ethernet interrupt is completed, and the privileged mode of the single-core processor is switched to the user mode.

[0146] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0147] When the hardware type is a single-core processor, the application layer is controlled according to the access interface to close the service program corresponding to the Ethernet interrupt in the OpenSBI, and the OpenSBI is controlled to stop accessing the shared memory.

[0148] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0149] When the hardware type is a multi-core processor and the multi-core processor detects that an external interrupt is generated, controlling an Ethernet interrupt in the external interrupt to be sent to any one kernel in the multi-core processor whose privileged mode is a machine mode for processing;

[0150] Control the other interrupts in the external interrupts except the Ethernet interrupt to be sent to any core in the multi-core processor whose privileged mode is the supervisor mode for processing.

[0151] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0152] When the hardware type is a multi-core processor, controlling the operating system to establish a lock corresponding to the shared memory;

[0153] Control the application layer, the operating system and the OpenSBI to execute a service program for acquiring the lock according to the access interface, and determine whether the OpenSBI acquires the lock through the operating system;

[0154] If the OpenSBI obtains the lock, the operating system is controlled to feed the lock back to the current application in the application layer.

[0155] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0156] If the OpenSBI fails to obtain the lock, the operating system is controlled to dispatch the execution right of the multi-core processor to other to-be-executed applications that have obtained the lock, and the state of the current application is controlled to switch to a sleep state.

[0157] Furthermore, when the industrial Ethernet protocol optimization program is executed by the processor, the following operations are also implemented:

[0158] Control the application layer, the operating system and the OpenSBI to execute a service program to release the lock, and feed back the state of the lock and the application program to be executed to the operating system;

[0159] The operating system is controlled to switch the state of the application program to be executed to a ready state, and the multi-core processor is controlled to execute the application program to be executed.

[0160] The present invention also provides a computer-readable storage medium on which a computer program is stored. The computer-readable storage medium may be Figure 1 The memory 02 in the industrial Ethernet protocol optimization system may also be at least one of a ROM (Read-Only Memory) / RAM (Random Access Memory), a magnetic disk, and an optical disk. The computer-readable storage medium includes some information for enabling the industrial Ethernet protocol optimization system to execute the methods described in the various embodiments of the present invention.

[0161] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.

[0162] The serial numbers of the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.

[0163] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method.

[0164] The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An industrial Ethernet protocol optimization method, characterized in that: The industrial Ethernet protocol optimization method is applied to the RISC-V architecture, the RISC-V architecture includes an application layer, an operating system, OpenSBI and hardware, and the industrial Ethernet protocol optimization method includes the steps of: Integrate the default Ethernet driver into OpenSBI; According to the preset memory sharing mechanism, virtualize the shared memory access interface corresponding to the application layer, the OpenSBI and the operating system; According to the type of hardware and the access interface, the interrupt mechanism and the communication mechanism of the OpenSBI are respectively set, wherein the type of hardware includes a single-core processor and a multi-core processor; According to the interruption mechanism and the communication mechanism, the application layer is controlled to perform data interaction with the OpenSBI.

2. The industrial Ethernet protocol optimization method according to claim 1, characterized in that: According to the type of hardware and the access interface, the steps of setting the interrupt mechanism of the OpenSBI include: When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a machine mode; In the machine mode, controlling the external interrupt service program in the single-core processor to process the Ethernet interrupt in the external interrupt according to the access interface; Obtain interrupt numbers and parameters of other interrupts in the external interrupts except the Ethernet interrupt, send the interrupt numbers and parameters to the software interrupt service program, and control the software interrupt service program to process the other interrupts.

3. The industrial Ethernet protocol optimization method according to claim 1, characterized in that: The step of setting the interrupt mechanism of the OpenSBI according to the type of hardware and the access interface further includes: When the type of the hardware is a single-core processor, and when the single-core processor detects that an external interrupt is generated, switching the privileged mode of the single-core processor to a supervisor mode; In the supervisor mode, controlling the external interrupt program in the single-core processor to process other interrupts among the external interrupts except the Ethernet interrupt according to the access interface; Switching the privileged mode of the single-core processor to the machine mode, and responding to the Ethernet interrupt in the external interrupt; The interrupt service corresponding to the Ethernet interrupt is completed, and the privileged mode of the single-core processor is switched to the user mode.

4. The industrial Ethernet protocol optimization method according to claim 3, characterized in that: According to the type of hardware and the access interface, the steps of setting the communication mechanism of the OpenSBI include: When the hardware type is a single-core processor, the application layer is controlled according to the access interface to close the service program corresponding to the Ethernet interrupt in the OpenSBI, and the OpenSBI is controlled to stop accessing the shared memory.

5. The industrial Ethernet protocol optimization method according to claim 1, characterized in that: The step of setting the interrupt mechanism of the OpenSBI according to the type of hardware and the access interface further includes: When the hardware type is a multi-core processor and the multi-core processor detects that an external interrupt is generated, controlling an Ethernet interrupt in the external interrupt to be sent to any one kernel in the multi-core processor whose privileged mode is a machine mode for processing; Control the other interrupts in the external interrupts except the Ethernet interrupt to be sent to any core in the multi-core processor whose privileged mode is the supervisor mode for processing.

6. The industrial Ethernet protocol optimization method according to claim 5, characterized in that: According to the type of hardware and the access interface, the steps of setting the communication mechanism of the OpenSBI include: When the hardware type is a multi-core processor, controlling the operating system to establish a lock corresponding to the shared memory; Control the application layer, the operating system and the OpenSBI to execute a service program for acquiring the lock according to the access interface, and determine whether the OpenSBI acquires the lock through the operating system; If the OpenSBI obtains the lock, the operating system is controlled to feed the lock back to the current application in the application layer.

7. The industrial Ethernet protocol optimization method according to claim 6, characterized in that: After the step of controlling the application layer, the operating system and the OpenSBI to execute the service program for acquiring the lock according to the access interface and determining whether the OpenSBI has acquired the lock through the operating system, the method further includes: If the OpenSBI fails to obtain the lock, the operating system is controlled to dispatch the execution right of the multi-core processor to other to-be-executed applications that have obtained the lock, and the state of the current application is controlled to switch to a sleep state.

8. The industrial Ethernet protocol optimization method according to claim 7, characterized in that: The step of setting the communication mechanism of the OpenSBI according to the type of hardware and the access interface also includes: Control the application layer, the operating system and the OpenSBI to execute a service program to release the lock, and feed back the state of the lock and the application program to be executed to the operating system; The operating system is controlled to switch the state of the application program to be executed to a ready state, and the multi-core processor is controlled to execute the application program to be executed.

9. An industrial Ethernet protocol optimization system, characterized in that: The industrial Ethernet protocol optimization system comprises: a memory, a processor, and an industrial Ethernet protocol optimization program stored in the memory and executable on the processor. When the industrial Ethernet protocol optimization program is executed by the processor, the steps of the industrial Ethernet protocol optimization method according to any one of claims 1 to 8 are implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores an industrial Ethernet protocol optimization program, which, when executed by a processor, implements the steps of the industrial Ethernet protocol optimization method according to any one of claims 1 to 8.

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