Method for preparing ultra-high resistivity silicon substrate by czochralski method

Abstract

The application discloses a method for preparing ultra-high resistivity silicon substrate by a Czochralski method, and the process flow of the method is as follows: preparing a silicon single crystal by the Czochralski method, rolling and grinding the single crystal rod, multi-wire cutting, edge chamfering, double-side grinding, chemical etching, heat treatment and chemical mechanical polishing; wherein, in the process of preparing the silicon single crystal by the Czochralski method, a horizontal superconducting magnetic field is used in the single crystal growth process, the magnetic field strength is 1000-5000 Gauss, meanwhile, specific crystal rotation speed and crucible rotation speed are matched, the crystal rotation speed is 1-12 rpm, and the crucible rotation speed is 0.1-2 rpm; the heat treatment process is POLY+LTO thin film growth or high-temperature annealing. The method is suitable for preparing P-type silicon substrate with a diameter of 8 inches or above, a resistivity of 3000 ohm*cm or above and oxygen content of 5 ppma or below. The prepared single crystal has an oxygen content of less than 5 ppma, a resistivity of more than 3000 ohm*cm after annealing, an oxygen content uniformity of less than 10%, and a resistivity uniformity of less than 5%.

Description

Technical Field

[0001] This invention relates to a method for preparing ultra-high resistivity silicon substrates using the Czochralski method, belonging to the field of semiconductor integrated circuit manufacturing technology. Background Technology

[0002] Ultra-high resistivity silicon substrates have wide applications in the fabrication of radio frequency, filtering, and power semiconductor devices. Currently, the common method for preparing ultra-high resistivity silicon substrates involves first using the zone melting method to prepare silicon single crystals with high resistivity, and then processing the silicon single crystals into silicon wafers through cutting, grinding, and polishing. However, the zone melting method for preparing silicon single crystals suffers from difficulties in crystal formation, limitations in preparing large-size single crystals of 8 inches or larger, poor resistivity uniformity, and high cost. Therefore, the use of the zone melting method for preparing silicon substrates has significant limitations.

[0003] The traditional Czochralski method is more likely to produce large-size silicon single crystals of 8 inches and above, and the produced single crystals have better resistivity uniformity. However, the Czochralski method requires the use of a SiO2 quartz crucible, which results in a high oxygen content in the produced silicon single crystals. This oxygen becomes an N-type impurity, making it difficult to achieve high resistivity levels. Therefore, in addition to using the Czochralski method to produce silicon single crystals with high resistivity and low oxygen content, it is also necessary to design a reasonable heat treatment process in the silicon wafer fabrication process to reduce the influence of oxygen in the silicon substrate, ultimately obtaining silicon substrates with ultra-high resistivity and ultra-low oxygen content. Summary of the Invention

[0004] To address the aforementioned problems in the existing technology, the present invention aims to propose a method for preparing ultra-high resistivity silicon substrates using the Czochralski method. This method is suitable for preparing P-type silicon substrates with a diameter of 8 inches or more, a resistivity of 3000 Ω·cm or more, and an oxygen content of 5 ppma or less.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A method for preparing ultra-high resistivity silicon substrates using the Czochralski method, the process flow of which is as follows: silicon single crystal preparation by Czochralski method → ​​single crystal rod rolling → multi-wire cutting → edge chamfering → double-sided grinding → chemical etching → heat treatment → chemical mechanical polishing; wherein,

[0007] In the Czochralski method for preparing silicon single crystals, a horizontal superconducting magnetic field with a strength of 1000-5000 Gauss is used during single crystal growth. Simultaneously, the Czochralski method for preparing silicon single crystals employs a specific combination of crystal rotation speed and crucible rotation speed: a crystal rotation speed of 1-12 rpm and a crucible rotation speed of 0.1-2 rpm.

[0008] The heat treatment process can be selected from one of the following two methods: one is POLY+LTO thin film growth; the other is high-temperature annealing.

[0009] In the POLY thin film growth process, LPCVD (low-pressure chemical vapor deposition) is used, with a temperature range of 600-680℃ and an actual temperature gradient of ≤0.5% in the deposition area. The gas flow rate of LPCVD is 50-200 mL / min, with an actual gas concentration gradient of ≤5% in the deposition area. The thickness of the grown POLY thin film is 6000-10000 angstroms, with intra-wafer uniformity ≤5% and inter-wafer uniformity ≤10%.

[0010] The LTO thin film growth process employs APCVD (atmospheric pressure chemical vapor deposition) at a temperature of 380-450℃, a SiH4 flow rate of 0.1-0.5 slm, an oxygen flow rate of 0.5-2.5 slm, and a growth rate of 1000-1500 Å / min. Single-wafer continuous conveyor growth is performed at atmospheric pressure, resulting in a film thickness of 4000-6000 Å. Intra-wafer uniformity is ≤5%, inter-wafer uniformity is ≤10%, and density is assessed using an electrode method, with fewer than 3 bubbles and no leakage failures caused by impurities.

[0011] In the high-temperature annealing process, the heat treatment temperature is 500-700℃ and the heat treatment time is 20-60min.

[0012] The silicon substrate prepared using the method of the present invention is P-type, with a resistivity greater than 3000 Ω·cm, an oxygen content less than 5 ppma, a resistivity uniformity of less than 5%, and an oxygen content uniformity of less than 10%.

[0013] The beneficial effects of this invention are as follows:

[0014] 1. This invention produces silicon single crystals with ultra-high resistivity and ultra-low oxygen content using the Czochralski method. The prepared single crystals have an oxygen content of less than 5 ppma, and after annealing, the resistivity can reach more than 3000 Ω·cm. Furthermore, the oxygen content uniformity is less than 10%, and the resistivity uniformity is less than 5%.

[0015] 2. The ultra-high resistivity silicon substrate prepared by this invention can replace the zone melt silicon substrate in some IC products and has good performance. Attached Figure Description

[0016] Figure 1 This is a process flow diagram for preparing ultra-high resistivity silicon substrates according to the present invention. Detailed Implementation

[0017] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments, but this does not imply a limitation on the scope of protection of the present invention.

[0018] like Figure 1 As shown, the process flow for preparing the ultra-high resistivity silicon substrate of this invention is as follows: Czochralski method for preparing silicon single crystals → single crystal rod rolling → multi-wire cutting → edge chamfering → double-sided grinding → chemical etching → heat treatment → chemical mechanical polishing. The main technical point of this invention is the use of the Czochralski method to prepare silicon single crystals with high resistivity and low oxygen content, which simultaneously possess good resistivity uniformity and low COP.

[0019] The most crucial aspect of fabricating ultra-high resistivity silicon substrates is controlling the oxygen content within the silicon single crystal to an extremely low level. The Czochralski single crystal growth technique used in this invention employs a horizontal superconducting magnetic field with a strength of 1000-5000 Gauss. This magnetic field significantly hysteresis the melt convection, effectively reducing the oxygen content within the silicon melt. Simultaneously, it ensures a uniform temperature gradient distribution within the silicon melt, which is beneficial for improving the uniformity of resistivity and oxygen content distribution in the silicon single crystal and reducing COP. The Czochralski single crystal growth technique used in this invention also places specific requirements on the crystal rotation speed and crucible rotation speed: 1-12 rpm for the crystal and 0.1-2 rpm for the crucible.

[0020] Because the oxygen content in ultra-high resistivity silicon substrates is extremely low, it is difficult to form sufficient BMD (bulk microdefects) for gettering during subsequent processing. Therefore, this invention designs a thermal treatment process for POLY (polycrystalline silicon) + LTO (low-temperature oxide) thin film growth. The temperature range of the POLY thin film growth process is 600-630℃, with an actual temperature gradient of ≤0.5% in the deposition area. The gas flow rate range of LPCVD is 50-200mL / min, with a gas concentration gradient of ≤5% in the actual deposition area. The temperature of the LTO thin film growth process is 380-450℃, the SiH4 flow rate is 0.1-0.5slm, the oxygen flow rate is 0.5-2.5slm, and the growth is carried out in a single continuous conveyor belt manner at atmospheric pressure. The thickness of the thin film is 4000-6000 angstroms. This process forms a POLY+LTO thin film on the back side of the substrate, which can effectively attract the substrate. At the same time, the setting of the heat treatment process window can anneal the substrate, eliminate the effect of oxygen donors inside the substrate, and make the resistivity of the substrate reach more than 3000 Ω·cm and remain stable.

[0021] For substrates without getter requirements, the annealing process designed in this invention can also make the resistivity of the substrate reach more than 3000 Ω·cm after annealing and remain stable.

[0022] In this invention, the resistivity uniformity test method is as follows: the resistivity values ​​of the center position and four points (each point is 90° apart) of the substrate sample are tested using the four-probe method. The resistivity uniformity is obtained by dividing the difference between the average resistivity of the four edge points and the resistivity of the center point by the resistivity value of the center point.

[0023] The method for testing oxygen content uniformity is as follows: Fourier transform infrared spectroscopy is used to test the oxygen content values ​​at the center and four points (each point is 90° apart) of the substrate sample. The ratio of the difference between the average oxygen content of the four edge points and the oxygen content of the center point to the oxygen content value of the center point is the oxygen content uniformity.

[0024] Example 1

[0025] An 8-inch silicon single crystal was grown using the Czochralski single crystal growth technique described in this invention. During the single crystal growth process, the magnetic field strength was 3000 Gauss, the crucible rotation speed was 0.1 rpm, and the crystal rotation speed was 1 rpm.

[0026] The single crystal is processed into a silicon substrate polished wafer using the following steps of this invention: single crystal rod rolling → multi-wire dicing → edge chamfering → double-sided grinding → chemical etching → POLY thin film growth → LTO thin film growth → chemical mechanical polishing. The POLY thin film has a thickness of 8000 angstroms, a process temperature of 615°C, an actual deposition area temperature gradient ≤0.5%, and an LPCVD gas flow rate range of 150 mL / min, with an actual deposition area gas concentration gradient ≤5%. The LTO thin film growth process uses APCVD at a temperature of 400°C, a SiH4 flow rate of 0.2 slm, an oxygen flow rate of 1.0 slm, and a single-wafer continuous conveyor belt growth at atmospheric pressure, resulting in a film thickness of 4000 angstroms.

[0027] The silicon substrate polished wafers prepared using the method of the present invention were sampled and tested, and the data are as follows:

[0028]

[0029] Example 2

[0030] An 8-inch silicon single crystal was grown using the Czochralski single crystal growth technique described in this invention. During the single crystal growth process, the magnetic field strength was 3000 Gauss, the crucible rotation speed was 0.1 rpm, and the crystal rotation speed was 5 rpm.

[0031] The single crystal is processed into a silicon substrate polished wafer using the following steps of this invention: single crystal rod rolling → multi-wire dicing → edge chamfering → double-sided grinding → chemical etching → POLY thin film growth → LTO thin film growth → chemical mechanical polishing. The POLY thin film has a thickness of 8500 angstroms, a process temperature of 615°C, an actual deposition area temperature gradient ≤0.5%, and an LPCVD gas flow rate range of 180 mL / min, with an actual deposition area gas concentration gradient ≤5%. The LTO thin film growth process uses APCVD at a temperature of 400°C, a SiH4 flow rate of 0.2 slm, an oxygen flow rate of 1.0 slm, and a single-wafer continuous conveyor belt growth at atmospheric pressure, resulting in a film thickness of 5000 angstroms.

[0032] The silicon substrate polished wafers prepared using the method of the present invention were sampled and tested, and the data are as follows:

[0033]

[0034] Example 3

[0035] An 8-inch silicon single crystal was grown using the Czochralski single crystal growth technique described in this invention. During the single crystal growth process, the magnetic field strength was 3000 Gauss, the crucible rotation speed was 0.1 rpm, and the crystal rotation speed was 3 rpm.

[0036] The single crystal is processed into a silicon substrate polished wafer using the following steps of the present invention: single crystal rod rolling → multi-wire cutting → edge chamfering → double-sided grinding → chemical etching → annealing → chemical mechanical polishing. The annealing temperature is 650℃ and the annealing time is 30 minutes.

[0037] The silicon substrate polished wafers prepared using the method of the present invention were sampled and tested, and the data are as follows:

[0038]

Claims

1. A method for preparing ultra-high resistivity silicon substrates using the Czochralski method, the process flow of which is: silicon single crystal preparation by Czochralski method → ​​single crystal rod rolling → multi-wire cutting → edge chamfering → double-sided grinding → chemical etching → heat treatment → chemical mechanical polishing; characterized in that, In the process of preparing silicon single crystals by the Czochralski method, a horizontal superconducting magnetic field with a magnetic field strength of 1000-5000 Gauss is used during the single crystal growth process. At the same time, a specific crystal rotation speed and crucible rotation speed are used in combination, with the crystal rotation speed being 1-12 rpm and the crucible rotation speed being 0.1-2 rpm. The heat treatment is for POLY+LTO thin film growth; in the POLY thin film growth process, LPCVD process is used, the temperature range is 600-630℃, the actual temperature gradient in the deposition area is ≤0.5%, the gas flow rate range of LPCVD is 50-200mL / min, and the actual gas concentration gradient in the deposition area is ≤5%; the thickness of the grown POLY thin film is 6000-10000 angstroms. The LTO thin film growth process employs APCVD technology at a temperature of 380-450℃, a SiH4 flow rate of 0.1-0.5 slm, an oxygen flow rate of 0.5-2.5 slm, and a growth rate of 1000-1500 angstroms / min; the thickness of the LTO thin film is 4000-6000 angstroms. The prepared silicon substrate is P-type, with a resistivity greater than 3000 Ω·cm and an oxygen content less than 5 ppma.

2. The method for preparing ultra-high resistivity silicon substrates using the Czochralski method according to claim 1, characterized in that, The intra-sheet uniformity of the grown POLY film is ≤5%, and the inter-sheet uniformity is ≤10%. The LTO film is grown using a single-sheet continuous conveyor belt method under normal pressure; the intra-sheet uniformity is ≤5%, the inter-sheet uniformity is ≤10%, the density is tested by electrode method, the number of bubbles is less than 3, and there is no leakage failure caused by impurities.

3. The method for preparing ultra-high resistivity silicon substrates using the Czochralski method according to claim 1 or 2, characterized in that, The prepared silicon substrate has a resistivity uniformity of less than 5% and an oxygen content uniformity of less than 10%.

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