A wideband high-efficiency rectifier circuit based on GaN HEMT

By using GaN HEMT devices and a broadband high-efficiency rectifier circuit designed based on the inverse-time binary principle, the problem of small power capacity of Si-based and GaAs-based rectifier diodes is solved, achieving high-power broadband high-efficiency rectification and significantly improving rectification efficiency.

CN117240114BActive Publication Date: 2026-07-24CHONGQING UNIV OF POSTS & TELECOMM +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHONGQING UNIV OF POSTS & TELECOMM
Filing Date
2023-09-18
Publication Date
2026-07-24

AI Technical Summary

Technical Problem

The existing Si-based and GaAs-based rectifier diodes have relatively small power capacities, resulting in large rectifier circuit sizes and efficiency losses, which limits the development of high-power, high-efficiency rectification technology.

Method used

By employing GaN HEMT devices and combining the principle of reverse time duality, an input matching network, a harmonic suppression network, a DC output circuit, a second harmonic suppression network, a current stabilizing circuit, a gate matching network, and a gate biasing circuit are designed to achieve broadband high-efficiency rectification.

Benefits of technology

It achieves high-power broadband high-efficiency rectification, with a rectification efficiency of more than 58% in the 1.8-3GHz frequency band and a rectification efficiency of 75.5% when the input power is 42dBm, significantly improving power capacity and efficiency.

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Abstract

The application relates to a wideband high-efficiency rectifier circuit based on a GaN HEMT, which comprises an input matching network, a harmonic suppression network, a direct-current output circuit, a second harmonic suppression network, a current stabilizing circuit, a radio frequency junction gate field effect transistor, a gate matching network and a gate bias circuit; the input matching network is used for direct-current isolation processing of received signals; the harmonic suppression network is used for suppressing second and third harmonics, adjusting fundamental wave impedance and expanding the distribution interval of each harmonic impedance to realize wideband characteristics; the direct-current output circuit is used for converting input alternating-current power into direct-current power for output; the second harmonic suppression network is used for suppressing the second harmonic of the gate of the radio frequency junction gate field effect transistor; the current stabilizing circuit is used for preventing the whole circuit from oscillating; the gate matching network is used for impedance matching between the second harmonic suppression network and the ground end; and the gate bias circuit is used for providing direct-current bias voltage for the gate of the radio frequency junction gate field effect transistor.
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Description

Technical Field

[0001] This invention belongs to the field of wireless power transfer technology, and in particular relates to a broadband high-efficiency rectifier circuit based on GaN HEMT. Background Technology

[0002] Wireless Power Transmission (WPT) eliminates the need for physical cables and enables wireless energy transfer between multiple points in space via electric fields, magnetic fields, electromagnetic waves, ultrasound, or lasers. Currently, thanks to the robustness and cost-effectiveness of microwaves, Microwave Power Transmission (MPT) has become a mainstream technology for long-distance WPT and is being widely studied.

[0003] A microwave power transmission system consists of a power supply, a microwave power source, a transmitting antenna / array, a receiving antenna / array, a rectifier circuit unit / rectifier circuit array, and a power management unit. The rectifier circuit is responsible for converting radio frequency signals into DC signals and transmitting them to specific loads / actuators, thus enabling long-distance microwave power transmission. With the development of microwave power transmission systems, higher requirements have been placed on performance indicators such as high power and high efficiency. Currently, commercially available Si-based and GaAs-based high-power microwave rectifier diodes have relatively low power capacity. While rectifier diode arrays / power distribution networks can increase power capacity, the system efficiency remains low. Therefore, research on key technologies for high-power rectifier circuits is urgently needed.

[0004] The journal article "A Miniaturized High-Power Microwave Rectifier Circuit" (Journal: Space Electronics Technology, Vol. 2, No. 17, 2020, pp. 104-108) reports a microwave rectifier circuit based on a Schottky diode array. The rectifier circuit presented in the literature consists of eight rectifier diodes connected in series and parallel. To prevent high-order harmonics from returning to the receiving antenna from the input port of the microwave rectifier circuit, a simple quarter-wavelength parallel short-circuited stub is added at the input port as an input filter. This parallel short-circuited stub is equivalent to an open circuit at the fundamental frequency and a short circuit at the second harmonic. Therefore, the quarter-wavelength parallel short-circuited stub can allow the fundamental frequency to pass without loss while reflecting all second harmonics.

[0005] With the development of microwave power transmission systems, rectifier circuits, as a crucial component, have been continuously evolving towards wider bandwidth, higher power, and higher efficiency in recent years. Traditional diode rectifier circuits are no longer suitable for high-power applications. Research on using Schottky diodes as rectifiers has been ongoing for decades, achieving rectifier efficiencies of 70%-90%. However, when the input power exceeds 10W, although GaN Schottky diodes can be used, multiple rectifier circuits must be combined, and the rectifier efficiency is affected by power division losses. Therefore, in high-power applications, the large circuit area and efficiency losses of diode rectifier circuits make them no longer the optimal choice.

[0006] In summary, most existing rectifier circuits are designed using diodes. However, existing Si-based and GaAs-based rectifier diodes have relatively small power capacities. Although the power capacity of rectifier circuits can be increased through rectifier diode arrays / power distribution networks, this results in larger circuit sizes and a loss of rectification efficiency, thus limiting the development of high-power, high-efficiency rectification technology. Summary of the Invention

[0007] To address the problems existing in the background technology, this invention provides a broadband high-efficiency rectifier circuit based on GaN HEMT. It utilizes the advantages of GaN HEMT, such as high current density, high breakdown voltage, high transition frequency, low parasitic capacitance, and low on-resistance, and proposes a broadband high-efficiency rectifier circuit with large power capacity, high efficiency, and suitable for watt-level high power by combining the reverse time duality principle.

[0008] To achieve the above-mentioned technical objectives, the present invention provides the following technical solution, including:

[0009] Input matching network, harmonic suppression network, DC output circuit, second harmonic suppression network, current stabilizing circuit, RF junction gate field-effect transistor, gate matching network, and gate bias circuit;

[0010] The input matching network is used to perform DC blocking processing on the received microwave energy signal and output a microwave signal with the DC component filtered out.

[0011] The harmonic suppression network is used to suppress the second and third harmonics, adjust the fundamental impedance, and expand the distribution range of each harmonic impedance to achieve broadband characteristics.

[0012] The DC output circuit is used to convert the input AC power into DC power for output.

[0013] The second harmonic suppression network is used to suppress the second harmonic of the gate of the radio frequency junction gate field-effect transistor.

[0014] The current stabilizing circuit is used to prevent the entire circuit from oscillating.

[0015] A gate matching network is used for impedance matching between the second harmonic suppression network and the ground terminal;

[0016] The gate bias circuit is used to provide a DC bias voltage to the gate of the radio frequency junction gate field-effect transistor;

[0017] The input terminal of the input matching network is connected in series with the input terminal of the broadband high-efficiency rectifier circuit.

[0018] The first input terminal of the harmonic suppression network is connected in series with the output terminal of the input matching network;

[0019] The output of the harmonic suppression network is connected in series with the input of the DC output circuit;

[0020] The second input terminal of the harmonic suppression network is connected in series with the drain of the radio frequency junction gate field-effect transistor; the source of the radio frequency junction gate field-effect transistor is grounded;

[0021] The gate of the radio frequency junction gate field-effect transistor is connected in series with a second harmonic suppression network, a current stabilizing circuit, and a gate matching network in sequence; the input terminal of the gate matching network is connected in series with a gate bias circuit.

[0022] The output terminal of the DC output circuit is connected in series with the output terminal of the broadband high-efficiency rectifier circuit.

[0023] Preferably, the input matching network includes: microstrip line TL7, microstrip line TL8, microstrip line TL9, capacitor C1 and microstrip line TL10 connected in series;

[0024] The microstrip line TL7 is connected to the output of the input matching network; the microstrip line TL10 is connected to the input of the broadband high-efficiency rectifier circuit.

[0025] Preferably, the harmonic suppression network includes: microstrip lines TL1 to TL6, fan-shaped microstrips Stub1 to Stub3, and microstrip line TL11;

[0026] One end of the microstrip line TL1 is connected to one end of the microstrip line TL2, one end of the microstrip line TL3 and one end of the microstrip line TL4;

[0027] The other end of the microstrip line TL2 is connected to the output of the harmonic suppression network.

[0028] The other end of the microstrip line TL3 is connected to the fan-shaped microstrip Stub1;

[0029] The other end of the microstrip line TL1 is connected to one end of the microstrip line TL11; the other end of the microstrip line TL11 is connected to the second input terminal of the harmonic suppression network.

[0030] The other end of the microstrip line TL4 is connected to one end of the fan-shaped microstrip Stub3, one end of the microstrip line TL6, and one end of the microstrip line TL5; the other end of the microstrip line TL5 is connected to the fan-shaped microstrip Stub2.

[0031] The other end of the microstrip line TL6 is connected to the first input of the harmonic suppression network.

[0032] Preferably, the DC output circuit includes: microstrip lines TL23 to TL27 and capacitors C7 to C9;

[0033] One end of the microstrip line TL23 is connected to the input terminal of the DC output circuit; the other end of the microstrip line TL23 is connected to one end of the microstrip line TL24.

[0034] One end of the microstrip line TL23 is connected to the input terminal of the DC output circuit; the other end of the microstrip line TL23 is connected to one end of the microstrip line TL24.

[0035] The other end of the microstrip line TL24 is connected to one end of capacitor C7 and one end of microstrip line TL25; the other end of capacitor C7 is grounded.

[0036] The other end of the microstrip line TL25 is connected to one end of capacitor C8 and one end of microstrip line TL26; the other end of capacitor C8 is grounded.

[0037] The other end of the microstrip line TL26 is connected to one end of capacitor C9 and one end of microstrip line TL27; the other end of capacitor C9 is grounded.

[0038] The other end of the microstrip line TL27 is connected to the output terminal of the DC output circuit.

[0039] Preferably, the second harmonic suppression network includes: microstrip lines TL12 to TL14; one end of microstrip line TL12 is connected to one end of microstrip line TL13 and one end of microstrip line TL14; the other end of microstrip line TL12 is connected to the output terminal of the second harmonic suppression network; the other end of microstrip line TL14 is connected to the input terminal of the second harmonic suppression network; and the other end of microstrip line TL13 is open.

[0040] Preferably, the current stabilizing circuit includes a resistor R1 and a capacitor C2 connected in parallel.

[0041] Preferably, the gate matching network includes: microstrip lines TL15 to TL18 connected in series, and capacitor C3; capacitor C3 is grounded; one end of microstrip line TL15 is connected to the output terminal of the gate matching network; the other end of microstrip line TL15 is connected to one end of microstrip line TL16 and the input terminal of the gate matching network.

[0042] Preferably, the gate bias circuit includes: a voltage source VDC, capacitors C4 to C6, a resistor R2, and microstrip lines TL19 to TL22; the negative terminal of the voltage source VDC is grounded; the positive terminal of the voltage source VDC is connected to one end of capacitor C6 and one end of microstrip line TL22; the other end of capacitor C6 is grounded.

[0043] The other end of the microstrip line TL22 is connected to one end of the capacitor C5 and one end of the microstrip line TL21; the other end of the capacitor C5 is grounded.

[0044] The other end of the microstrip line TL21 is connected to one end of the capacitor C4 and one end of the microstrip line TL20; the other end of the capacitor C4 is grounded.

[0045] The other end of the microstrip line TL20 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to one end of the microstrip line TL19; and the other end of the microstrip line TL19 is connected in series with the output of the gate bias circuit.

[0046] The present invention has at least the following beneficial effects

[0047] The rectifier circuit of this invention is derived from a power amplifier, meaning it can be flexibly transformed according to application requirements. If it is necessary to amplify DC power and convert it to AC power, the rectifier circuit of this patent can be adjusted to become a power amplifier based on the principle of reverse time duality; conversely, the power amplifier can also be transformed into a rectifier circuit based on the principle of reverse time duality.

[0048] The rectifier circuit of this invention exhibits good broadband characteristics, and its gate matching and drain matching network structures are simple. In the research of high-power transistor rectifier circuits, most are narrow-band rectifier circuits, and the bandwidth urgently needs to be expanded. The rectifier circuit of this patent achieves good broadband characteristics in the 1.8–3 GHz frequency band by using harmonic suppression networks 2 and 4. Simultaneously, both drain matching network 1 and gate matching network 6 employ Chebyshev high-low impedance converters, which have simple structures, are easy to match, and possess good broadband characteristics. They also offer large power capacity, high efficiency, and are suitable for watt-level high-power broadband high-efficiency rectifier circuits. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of the broadband high-efficiency rectifier circuit of the present invention;

[0050] Figure 2 This is a simulation diagram of the broadband high-efficiency rectifier circuit when the input power is set to 40dBm according to the present invention.

[0051] Figure 3 This is a simulation diagram of the present invention under different input powers. Detailed Implementation

[0052] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0053] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual pictures. They should not be construed as limiting the invention. To better illustrate the embodiments of the invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0054] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0055] Please see Figure 1 This invention provides a wideband high-efficiency rectifier circuit based on GaN HEMT, comprising:

[0056] Input matching network 1, harmonic suppression network 2, DC output circuit 3, second harmonic suppression network 4, current stabilizing circuit 5, RF junction gate field-effect transistor, gate matching network 6, and gate bias circuit 7;

[0057] The input matching network is used to perform DC blocking processing on the received microwave energy signal and output a microwave signal with the DC component filtered out.

[0058] The harmonic suppression network is used to suppress the second and third harmonics, adjust the fundamental impedance, and expand the distribution range of each harmonic impedance to achieve broadband characteristics.

[0059] The DC output circuit is used to convert the input AC power into DC power for output.

[0060] The second harmonic suppression network is used to suppress the second harmonic of the gate of the radio frequency junction gate field-effect transistor.

[0061] The current stabilizing circuit is used to prevent the entire circuit from oscillating.

[0062] A gate matching network is used for impedance matching between the second harmonic suppression network and the ground terminal;

[0063] The gate bias circuit is used to provide a DC bias voltage to the gate of the radio frequency junction gate field-effect transistor;

[0064] The input terminal of the input matching network is connected in series with the input terminal of the broadband high-efficiency rectifier circuit.

[0065] The first input terminal of the harmonic suppression network is connected in series with the output terminal of the input matching network;

[0066] The output of the harmonic suppression network is connected in series with the input of the DC output circuit;

[0067] The second input terminal of the harmonic suppression network is connected in series with the drain of the radio frequency junction gate field-effect transistor; the source of the radio frequency junction gate field-effect transistor is grounded;

[0068] The gate of the radio frequency junction gate field-effect transistor is connected in series with a second harmonic suppression network, a current stabilizing circuit, and a gate matching network in sequence; the input terminal of the gate matching network is connected in series with a gate bias circuit.

[0069] The output terminal of the DC output circuit is connected in series with the output terminal of the broadband high-efficiency rectifier circuit.

[0070] Preferably, this embodiment provides a specific implementation of an input matching network, including:

[0071] The input matching network adopts the structure of a Chebyshev high-low impedance transformer, which consists of four microstrip lines TL7-TL10 connected in series. A capacitor C1 is introduced to isolate the DC component. Its main function is to achieve impedance matching between the signal source input and the harmonic suppression network, while also extending the bandwidth. The input matching network includes: microstrip lines TL7, TL8, TL9, capacitor C1, and TL10 connected in series. Microstrip line TL7 is connected to the output of the input matching network; microstrip line TL10 is connected to the input of the broadband high-efficiency rectifier circuit. In this embodiment, the RF junction-gate field-effect transistor is a CGH40010F transistor. The electrical length of each microstrip line TL7-TL10 is set to one-sixteenth of a wavelength, and the impedance of each section can be given by the formula: Where r is the impedance conversion ratio, and in this embodiment, r = 5.

[0072] Preferably, this embodiment provides a specific implementation of a harmonic suppression network, including: microstrip lines TL1 to TL6, fan-shaped microstrips Stub1 to Stub3, and microstrip line TL11;

[0073] One end of the microstrip line TL1 is connected to one end of the microstrip line TL2, one end of the microstrip line TL3 and one end of the microstrip line TL4;

[0074] The other end of the microstrip line TL2 is connected to the output of the harmonic suppression network.

[0075] The other end of the microstrip line TL3 is connected to the fan-shaped microstrip Stub1;

[0076] The other end of the microstrip line TL1 is connected to one end of the microstrip line TL11; the other end of the microstrip line TL11 is connected to the second input terminal of the harmonic suppression network.

[0077] The other end of the microstrip line TL4 is connected to one end of the fan-shaped microstrip Stub3, one end of the microstrip line TL6, and one end of the microstrip line TL5; the other end of the microstrip line TL5 is connected to the fan-shaped microstrip Stub2.

[0078] The other end of the microstrip line TL6 is connected to the first input terminal of the harmonic suppression network.

[0079] The harmonic suppression network consists of multiple microstrip lines connected in series and parallel. TL1 and TL2 suppress the second harmonic; since the two microstrip lines are connected in parallel, the second harmonic impedance is reduced, thus expanding the bandwidth. Similarly, TL3 and TL4 suppress the third harmonic, and TL5 and TL6 work together to adjust the fundamental impedance. The introduction of fan-shaped microstrips Stub1-Stub3 further expands the distribution range of each harmonic impedance, thereby achieving broadband characteristics. TL11 has an impedance of 50 ohms, and its function is to reduce the loss between the drain of the RF junction-gate field-effect transistor and the harmonic suppression network. The entire harmonic suppression network makes the drain current of the RF junction-gate field-effect transistor approximately a half-sine wave, and the drain voltage approximately a square wave, with less overlap between the current and voltage waveforms, thereby improving the rectification efficiency of the rectifier circuit. The microstrip TL11 in the harmonic suppression network has an impedance of 50 ohms and its length is adjustable. The sum of the electrical lengths of TL1 and TL2 is one-eighth of the wavelength, and together they suppress the second harmonic. The sum of the electrical lengths of TL3 and TL4 is one-twelfth of the wavelength, and together they suppress the third harmonic. Similarly, the sum of the electrical lengths of TL5 and TL6 is one-quarter of the wavelength. The impedance and electrical length of the sector microstrip Stub1-Stub3 have no fixed values ​​and can be adjusted according to the harmonic suppression effect. Their main function is to extend the bandwidth.

[0080] Preferably, this embodiment provides a specific implementation of a DC output circuit 3, including: microstrip lines TL23 to TL27 and capacitors C7 to C9;

[0081] One end of the microstrip line TL23 is connected to the input terminal of the DC output circuit; the other end of the microstrip line TL23 is connected to one end of the microstrip line TL24.

[0082] The other end of the microstrip line TL24 is connected to one end of capacitor C7 and one end of microstrip line TL25; the other end of capacitor C7 is grounded.

[0083] The other end of the microstrip line TL25 is connected to one end of capacitor C8 and one end of microstrip line TL26; the other end of capacitor C8 is grounded.

[0084] The other end of the microstrip line TL26 is connected to one end of capacitor C9 and one end of microstrip line TL27; the other end of capacitor C9 is grounded.

[0085] The other end of the microstrip line TL27 is connected to the output terminal of the DC output circuit. The DC output circuit is composed of quarter-wavelength microstrip lines, that is, the total electrical length of TL23-TL27 is a quarter wavelength, and the impedance value is 50 ohms. The microstrip lines are connected in series, and the capacitance values ​​of capacitors C7-C9 are 100pF, 1nF, and 1μF, respectively.

[0086] Preferably, this embodiment provides a specific implementation of a second harmonic suppression network 4, including: microstrip lines TL12 to TL14; one end of microstrip line TL12 is connected to one end of microstrip line TL13 and one end of microstrip line TL14; the other end of microstrip line TL12 is connected to the output terminal of the second harmonic suppression network; the other end of microstrip line TL14 is connected to the input terminal of the second harmonic suppression network; the other end of microstrip line TL13 is open-circuited; the function of the second harmonic suppression network 4 is to short-circuit the second harmonic at the gate of the RF junction gate field-effect transistor, thereby improving efficiency. The electrical length of microstrip line TL13 is one-eighth of the wavelength, and its impedance value can be adjusted according to the harmonic suppression effect. The main functions of TL12 and TL14 are to connect the transistor gate and the RC stabilization circuit, respectively. TL12 has an impedance value of 50 ohms and an adjustable length, while the impedance value and length of TL14 are both adjustable.

[0087] Preferably, this embodiment provides a specific implementation of a current stabilizing circuit 5, including: a resistor R1 and a capacitor C2 connected in parallel, wherein the resistor R1 is 5 ohms and the capacitor C2 is 10pF, the function of which is to prevent the entire circuit from oscillating.

[0088] Preferably, this embodiment provides a specific implementation of a gate matching network 6, including: microstrip lines TL15 to TL18 connected in series, and a capacitor C3; the capacitor C3 is grounded; one end of the microstrip line TL15 is connected to the output terminal of the gate matching network; the other end of the microstrip line TL15 is connected to one end of the microstrip line TL16 and the input terminal of the gate matching network. Similar to the input matching network 1, the electrical lengths of the microstrip lines TL15-TL18 in the gate matching network 6 are all set to one-sixteenth of the wavelength, and the impedance of each section is calculated according to the above formula, i.e.:

[0089]

[0090] Among them, Z i Indicates microstrip line TL i The impedance.

[0091] Preferably, this embodiment provides a specific implementation of a gate bias circuit 7, including: a voltage source VDC, capacitors C4 to C6, a resistor R2, and microstrip lines TL19 to TL22; the negative terminal of the voltage source VDC is grounded; the positive terminal of the voltage source VDC is connected to one end of capacitor C6 and one end of microstrip line TL22; the other end of capacitor C6 is grounded.

[0092] The other end of the microstrip line TL22 is connected to one end of the capacitor C5 and one end of the microstrip line TL21; the other end of the capacitor C5 is grounded.

[0093] The other end of the microstrip line TL21 is connected to one end of the capacitor C4 and one end of the microstrip line TL20; the other end of the capacitor C4 is grounded.

[0094] The other end of microstrip line TL20 is connected to one end of resistor R2; the other end of resistor R2 is connected to one end of microstrip line TL19; the other end of microstrip line TL19 is connected in series with the output of the gate bias circuit. The gate bias circuit is composed of quarter-wavelength microstrip lines, meaning the total electrical length of TL19-TL22 is one-quarter wavelength, and the impedance value is 50 ohms. The four microstrip lines are connected in series. To better filter out AC components, three parallel capacitors C4-C6 of different magnitudes are introduced, with capacitance values ​​of 100pF, 1nF, and 1μF, respectively. Resistor R2 is 50 ohms.

[0095] Simulation analysis, with input power set at 40dBm and DC load at 50Ω, the simulation results of the rectifier circuit are as follows: Figure 2 As shown, the rectification efficiency in the 1.8–3 GHz frequency band is greater than 58%, achieving a high rectification efficiency. Figure 3The diagram shows the rectification efficiency of the rectifier circuit under different input power. The rectification efficiency is higher than 60% within a 13dB input power range, with the highest rectification efficiency of 75.5% at an input power of 42dBm. Some microstrip lines and fan-shaped microstrip Stub1-Stub3 in this patent do not have theoretical values; they are obtained by continuous tuning based on the rectification efficiency of the final rectifier circuit.

[0096] This invention proposes a high-power broadband high-efficiency rectifier circuit. First, a "continuous" design concept is introduced into the power amplifier design, employing an F-class harmonic suppression network to improve the amplifier's efficiency while maintaining broadband characteristics. Then, the reverse-time binary principle is used to convert the power amplifier into a broadband high-efficiency rectifier circuit. Compared to the literature "A Miniaturized High-Power Microwave Rectifier Circuit," the simulation examples of this invention demonstrate higher power capacity and efficiency.

[0097] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A broadband high-efficiency rectifier circuit based on GaN HEMT, characterized in that, include: Input matching network, harmonic suppression network, DC output circuit, second harmonic suppression network, current stabilizing circuit, RF junction gate field-effect transistor, gate matching network, and gate bias circuit; The input matching network is used to perform DC blocking processing on the received microwave energy signal and output a microwave signal with the DC component filtered out. The harmonic suppression network is used to suppress the second and third harmonics, adjust the fundamental impedance, and expand the distribution range of each harmonic impedance to achieve broadband characteristics. The DC output circuit is used to convert the input AC power into DC power for output. The second harmonic suppression network is used to suppress the second harmonic of the gate of the radio frequency junction gate field-effect transistor. The current stabilizing circuit is used to prevent the entire circuit from oscillating. A gate matching network is used for impedance matching between the second harmonic suppression network and the ground terminal; The gate bias circuit is used to provide a DC bias voltage to the gate of the radio frequency junction gate field-effect transistor; The input terminal of the input matching network is connected in series with the input terminal of the broadband high-efficiency rectifier circuit. The first input terminal of the harmonic suppression network is connected in series with the output terminal of the input matching network; The output of the harmonic suppression network is connected in series with the input of the DC output circuit; The second input terminal of the harmonic suppression network is connected in series with the drain of the radio frequency junction gate field-effect transistor; the source of the radio frequency junction gate field-effect transistor is grounded; The harmonic suppression network includes: microstrip lines TL1~TL6, fan-shaped microstrips Stub1~Stub3, and microstrip line TL11; One end of the microstrip line TL1 is connected to one end of the microstrip line TL2, one end of the microstrip line TL3 and one end of the microstrip line TL4; The other end of the microstrip line TL2 is connected to the output of the harmonic suppression network. The other end of the microstrip line TL3 is connected to the fan-shaped microstrip Stub1; The other end of the microstrip line TL1 is connected to one end of the microstrip line TL11; the other end of the microstrip line TL11 is connected to the second input terminal of the harmonic suppression network. The other end of the microstrip line TL4 is connected to one end of the fan-shaped microstrip Stub3, one end of the microstrip line TL6, and one end of the microstrip line TL5; the other end of the microstrip line TL5 is connected to the fan-shaped microstrip Stub2. The other end of the microstrip line TL6 is connected to the first input terminal of the harmonic suppression network. The gate of the radio frequency junction gate field-effect transistor is connected in series with a second harmonic suppression network, a current stabilizing circuit, and a gate matching network in sequence; the input terminal of the gate matching network is connected in series with a gate bias circuit. The output terminal of the DC output circuit is connected in series with the output terminal of the broadband high-efficiency rectifier circuit.

2. The broadband high-efficiency rectifier circuit based on GaN HEMT according to claim 1, characterized in that, The input matching network includes: microstrip line TL7, microstrip line TL8, microstrip line TL9, capacitor C1 and microstrip line TL10 connected in series. The microstrip line TL7 is connected to the output of the input matching network; the microstrip line TL10 is connected to the input of the broadband high-efficiency rectifier circuit.

3. The broadband high-efficiency rectifier circuit based on GaN HEMT according to claim 1, characterized in that, The DC output circuit includes: microstrip lines TL23~TL27 and capacitors C7~C9; One end of the microstrip line TL23 is connected to the input terminal of the DC output circuit; the other end of the microstrip line TL23 is connected to one end of the microstrip line TL24. The other end of the microstrip line TL24 is connected to one end of capacitor C7 and one end of microstrip line TL25; the other end of capacitor C7 is grounded. The other end of the microstrip line TL25 is connected to one end of capacitor C8 and one end of microstrip line TL26; the other end of capacitor C8 is grounded. The other end of the microstrip line TL26 is connected to one end of capacitor C9 and one end of microstrip line TL27; the other end of capacitor C9 is grounded. The other end of the microstrip line TL27 is connected to the output terminal of the DC output circuit.

4. The broadband high-efficiency rectifier circuit based on GaN HEMT according to claim 1, characterized in that, The second harmonic suppression network includes: microstrip lines TL12 to TL14; one end of microstrip line TL12 is connected to one end of microstrip line TL13 and one end of microstrip line TL14; the other end of microstrip line TL12 is connected to the output terminal of the second harmonic suppression network; the other end of microstrip line TL14 is connected to the input terminal of the second harmonic suppression network; and the other end of microstrip line TL13 is open.

5. A broadband high-efficiency rectifier circuit based on GaN HEMT according to claim 1, characterized in that, The current stabilizing circuit includes a resistor R1 and a capacitor C2 connected in parallel.

6. A broadband high-efficiency rectifier circuit based on GaN HEMT according to claim 1, characterized in that, The gate matching network includes: microstrip lines TL15~TL18 connected in series, and capacitor C3; capacitor C3 is grounded; one end of microstrip line TL15 is connected to the output terminal of the gate matching network; the other end of microstrip line TL15 is connected to one end of microstrip line TL16 and the input terminal of the gate matching network.

7. A broadband high-efficiency rectifier circuit based on GaN HEMT according to claim 1, characterized in that, The gate bias circuit includes: a voltage source VDC, capacitors C4~C6, a resistor R2, and microstrip lines TL19~TL22; the negative terminal of the voltage source VDC is grounded; the positive terminal of the voltage source VDC is connected to one end of capacitor C6 and one end of microstrip line TL22; the other end of capacitor C6 is grounded. The other end of the microstrip line TL22 is connected to one end of the capacitor C5 and one end of the microstrip line TL21; the other end of the capacitor C5 is grounded. The other end of the microstrip line TL21 is connected to one end of the capacitor C4 and one end of the microstrip line TL20; the other end of the capacitor C4 is grounded. The other end of the microstrip line TL20 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to one end of the microstrip line TL19; and the other end of the microstrip line TL19 is connected in series with the output of the gate bias circuit.