Data processing method and device based on convolutional neural network, equipment and medium

Abstract

The invention discloses a data processing method and device based on a convolutional neural network, equipment and a medium, and relates to the field of computer learning, and the method comprises the steps: obtaining to-be-processed data in a preset memory, and alternately caching the to-be-processed data into a preset cache block according to a preset data caching rule; determining a processing task corresponding to the to-be-processed data, and allocating a corresponding processing unit to the to-be-processed data according to the processing task; processing the to-be-processed data according to a preset neural network model based on the processing unit to obtain corresponding processing unit output data; the preset neural network model is a neural network model obtained based on depth separable convolution. By alternately using the two cache modules, continuous processing of data streams is achieved, meanwhile, the processing units are allocated according to different calculation tasks, resource allocation can be dynamically adjusted according to task requirements, software algorithm processing and hardware structure optimization are combined, and the data calculation efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of computer learning, and in particular to a data processing method, device, equipment and medium based on a convolutional neural network. Background Art

[0002] At present, CNN (Convolutional Neural Networks) can handle problems in some complex environments due to its good fault tolerance, parallel processing and self-learning capabilities. It has fast running speed, good adaptability and high resolution, and is widely used in image recognition, intelligent driving, image segmentation and other fields. However, in the training stage of deep learning, due to the use of a large number of data sets, the complexity of parameters and implementation is increased, and some requirements are also put forward for personnel and equipment. Therefore, some high-performance platforms are needed. Among them, FPGA (Field Programmable Gate Array) is widely used as an acceleration platform because of its low energy consumption, strong versatility, and parallel computing method that can greatly improve its acceleration performance.

[0003] Although there are many accelerator designs for FPGA platforms, and relevant researchers have invested a lot of energy in studying such accelerators and have achieved certain results, the research on accelerators needs to be deepened. In addition, the rapid development of CNN has made the update of accelerators particularly important. However, since the general accelerator adopts a streaming structure, different hardware units are implemented for each computing part (each layer) in the computing process of the target model, and they are optimized separately. However, due to the correlation between the front and back data streams, the allocation flexibility of the computing units is low, and the architecture of CNNs with different structures needs to be redesigned. In addition, in CNN acceleration, hardware architecture design is important, but the acceleration of the algorithm model itself cannot be ignored. Most related technologies only consider the acceleration of a single aspect but do not consider the processing of the algorithm model itself. Therefore, how to design a more effective method to accelerate the processing of CNN is a problem to be solved in this field. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a data processing method, device, equipment and medium based on convolutional neural network, which realizes continuous processing of data stream by alternating two cache modules, and allocates processing units according to different computing tasks, and can dynamically adjust resource allocation according to task requirements, combining software algorithm processing and hardware structure optimization to improve data computing efficiency. The specific scheme is as follows:

[0005] In a first aspect, the present application provides a data processing method based on a convolutional neural network, comprising:

[0006] Acquire the data to be processed in the preset memory, and alternately cache the data to be processed into the preset cache blocks according to the preset data cache rule;

[0007] Determine a processing task corresponding to the data to be processed, and assign a corresponding processing unit to the data to be processed according to the processing task;

[0008] Based on the processing unit, the data to be processed is processed according to a preset neural network model to obtain corresponding processing unit output data; the preset neural network model is a neural network model obtained based on deep separable convolution.

[0009] Optionally, the alternately caching the to-be-processed data into preset cache blocks according to preset data caching rules includes:

[0010] Dividing the cache period of the data to be processed according to a preset time period division rule;

[0011] Determine the cache period corresponding to the current time;

[0012] If the current time is the first cache cycle, the data to be processed currently being cached is cached in a first cache block in the preset cache blocks, and when the data to be processed exists in a second cache block in the preset cache blocks, the data to be processed cached in the second cache block is output to the corresponding processing unit;

[0013] If the current time is the second cache cycle, the data to be processed currently being cached is cached in the second cache block, and the data to be processed cached in the first cache block is output to the corresponding processing unit.

[0014] Optionally, allocating a corresponding processing unit to the data to be processed according to the processing task includes:

[0015] The calculation type corresponding to the data to be processed is determined according to the processing task, and the corresponding processing unit is allocated to the data to be processed according to the calculation type.

[0016] Optionally, determining the calculation type corresponding to the to-be-processed data according to the processing task includes:

[0017] Determine the task requirements of the processing task, and allocate the corresponding computing type to the data to be processed according to the task requirements and the system resources corresponding to the processing unit; the task requirements include processing resource requirements and processing time requirements.

[0018] Optionally, allocating a corresponding processing unit to the data to be processed according to the calculation type includes:

[0019] If the computing type is computing-intensive computing, allocating a first number of the processing units to the data to be processed according to a preset processing unit allocation rule;

[0020] If the computing type is I / O intensive computing, a second number of the processing units are allocated to the data to be processed according to the preset processing unit allocation rule; the first number is greater than the second number.

[0021] Optionally, after the processing unit processes the data to be processed according to a preset neural network model to obtain corresponding processing unit output data, the method further includes:

[0022] The processing unit output data is cached in a preset internal cache block, so that when a target processing task is received, the processing unit output data in the preset internal cache block is directly read.

[0023] Optionally, before the processing unit processes the data to be processed according to a preset neural network model, the method further includes:

[0024] Several network layers in the initial neural network model are layer-fused to obtain the preset neural network model.

[0025] In a second aspect, the present application provides a data processing device based on a convolutional neural network, comprising:

[0026] A data cache module, used to obtain the to-be-processed data in the preset memory, and alternately cache the to-be-processed data into the preset cache blocks according to the preset data cache rules;

[0027] A resource allocation module, used to determine the processing task corresponding to the data to be processed, and allocate a corresponding processing unit to the data to be processed according to the processing task;

[0028] A data processing module is used to process the data to be processed based on the processing unit according to a preset neural network model to obtain corresponding processing unit output data; the preset neural network model is a neural network model obtained based on deep separable convolution.

[0029] In a third aspect, the present application provides an electronic device, comprising a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the aforementioned data processing method based on a convolutional neural network.

[0030] In a fourth aspect, the present application provides a computer-readable storage medium for storing a computer program, which, when executed by a processor, implements the aforementioned convolutional neural network-based data processing method.

[0031] The present application first obtains the data to be processed in the preset memory, and alternately caches the data to be processed into the preset cache block according to the preset data cache rule, then determines the processing task corresponding to the data to be processed, and allocates the corresponding processing unit to the data to be processed according to the processing task, and processes the data to be processed according to the preset neural network model based on the processing unit, and obtains the corresponding processing unit output data; wherein the preset neural network model is a neural network model obtained based on the depth separable convolution. In the present application, the data to be processed is alternately cached in the cache block, which helps to ensure the continuity of the data flow, and realizes the continuous processing of the data flow by alternating the two cache modules, thereby improving the processing speed. At the same time, the processing unit is reasonably allocated according to different computing tasks, which helps to dynamically adjust the computing resource allocation according to the task requirements, realize the flexible use of resources, improve the general performance of the present application, and pre-process the algorithm model, and introduce the depth separable convolution to significantly reduce the number of parameters and the amount of calculation of the model, making it more suitable for resource-constrained environments. In this way, not only the overall performance is accelerated by the processing of the software algorithm, but also the software algorithm processing and hardware structure optimization are combined. Compared with the current problem of focusing only on unilateral optimization, it is no longer just focusing on the optimization of hardware performance, which improves the overall computing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0033] Figure 1 A flow chart of a data processing method based on a convolutional neural network provided in this application;

[0034] Figure 2 A schematic diagram of an FPGA neural network acceleration architecture provided for this application;

[0035] Figure 3 A layer fusion and depth-separable convolution combined graph provided for this application;

[0036] Figure 4 A flow chart of a specific data processing method based on a convolutional neural network provided in this application;

[0037] Figure 5A schematic diagram of the structure of a data processing device based on a convolutional neural network provided in this application;

[0038] Figure 6 A structural diagram of an electronic device provided for this application. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] Although there are many accelerator designs for FPGA platforms, general accelerators use a streaming structure to implement different hardware units for each computing part in the computing process of the target model. However, due to the association between the previous and subsequent data streams, the flexibility of allocating computing units is low. In addition, in CNN acceleration, hardware architecture design is certainly important, but the acceleration of the algorithm model itself cannot be ignored. In this application, two cache modules are used alternately to achieve continuous processing of data streams. At the same time, processing units are allocated according to different computing tasks. Resource allocation can be dynamically adjusted according to task requirements, and data computing efficiency can be improved by combining software algorithm processing and hardware structure optimization.

[0041] See also Figure 1 As shown, the embodiment of the present invention discloses a data processing method based on a convolutional neural network, comprising:

[0042] Step S11, obtaining the data to be processed in the preset memory, and alternately caching the data to be processed into the preset cache blocks according to the preset data caching rule.

[0043] In this embodiment, after the data to be processed is obtained from the preset memory, the data to be processed can be alternately cached into the preset cache block according to the preset double-buffer ping-pong operation. It can be understood that the preset memory includes but is not limited to the following: Figure 2DDR (Double Data Rate Synchronous Dynamic Random Access Memory, double rate synchronous dynamic random access memory) and other data storage devices shown. Specifically, when the data to be processed is alternately cached in the preset cache block according to the double-buffer ping-pong operation, the cache period of the data to be processed can be first divided according to the preset time period division rule, and the cache period corresponding to the current time can be determined; if the current time is the first cache period, the data to be processed currently cached is cached in the first cache block in the preset cache block, and when there is data to be processed in the second cache block in the preset cache block, the data to be processed cached in the second cache block is output to the corresponding processing unit (PE, Processing Element); if the current time is the second cache period, the data to be processed currently cached is cached in the second cache block, and the data to be processed cached in the first cache block is output to the corresponding processing unit. It should be pointed out that the above-mentioned double-buffer ping-pong operation is a commonly used data flow control processing technique, which can alternately cache the input data stream through two independent storage buffers (ping-pong caches) and ensure that the output data stream can be continuously processed. For example, in this embodiment, the data stream of the input data to be processed can be distributed to two data buffers (ping-pong cache) in a synchronous manner through the preset "input data selection unit". And in this process, the data cache cycle can be switched. In the first buffer cycle, the input data stream is cached to the first cache block, that is, the data buffer module 1 (such as at this time in the second buffer cycle, through the switching of the "input data selection unit", the input data stream is cached to the second cache block, that is, another data buffer module 2, and the cached data is transmitted to the "data stream operation processing module" (processing unit) through the "output data selection unit" for operation processing. In this way, through the above cycle, the two cache modules are used alternately in each cycle to ensure the continuity and processing efficiency of the data stream, and the buffer space can be saved and the storage efficiency can be improved. Therefore, by alternating the use of the two cache modules, the continuous processing of the data stream is realized and the data processing speed is improved.

[0044] Step S12: determine the processing task corresponding to the data to be processed, and allocate a corresponding processing unit to the data to be processed according to the processing task.

[0045] In this embodiment, Figure 2 As shown, the processing tasks corresponding to the data to be processed can be determined first, and then the corresponding processing units can be allocated to the data to be processed according to the processing tasks. In this way, the optimal computing performance and resource utilization can be achieved by reasonably allocating computing resources (PE computing units) according to different processing tasks (i.e., different operators) through the preset computing units.

[0046] Step S13: Based on the processing unit, the data to be processed is processed according to a preset neural network model to obtain corresponding processing unit output data; the preset neural network model is a neural network model obtained based on deep separable convolution.

[0047] In this embodiment, the processing unit corresponding to the determined data to be processed processes the data to be processed using a preset neural network model to obtain the corresponding processing unit output data. It should be noted that the above-mentioned preset neural network model is a neural network model obtained based on deep separable convolution. Specifically, before processing the data to be processed, several network layers in the initial neural network model can be layer-fused to obtain the preset neural network model.

[0048] In this embodiment, Figure 3 As shown, the algorithm model of the initial neural network model needs to be compressed, specifically using deep separable convolution to replace the traditional convolution layer and performing layer fusion on the replaced deep convolution. It can be understood that deep separable convolution is a different operation from traditional convolution, and the traditional convolution operation can be decomposed into two steps: one is deep convolution and point-by-point convolution. Deep convolution applies a filter to each input channel separately, thereby reducing the number of parameters and the amount of calculation; point-by-point convolution then fuses the information of different channels through a 1x1 convolution kernel to generate a new feature representation. By using the above decomposition method, the computational complexity can be significantly reduced, making the model lighter. Then, the neural network model is layer-fused to reduce the model complexity by merging multiple network layers. It can be understood that in a deep neural network, there may be redundant connections and parameters between adjacent layers. By merging these layers into a more efficient layer, the number of parameters and the amount of calculation of the model can be significantly reduced. Therefore, layer fusion helps to simplify the network structure, improve the reasoning speed of the model, and reduce storage requirements. In this way, through the combination of layer fusion and depthwise separable convolution, the model can be further lightweight. By applying depthwise separable convolution to reduce the computational complexity of each convolution layer and using layer fusion to reduce redundant layers in the network, a neural network model that is both efficient and lightweight can be constructed. While maintaining the performance of the model, the number of parameters and the amount of computation of the model are significantly reduced, making it more suitable for resource-constrained environments, such as mobile devices or embedded systems.

[0049] In this embodiment, a method for accelerating data processing by software and hardware collaboration with good versatility is designed. A modular design is adopted to design and allocate computing units according to different computing types. Under the condition that the computing type remains unchanged, no matter how the CNN structure changes, the architecture does not need to be redesigned. This modular design enables the accelerator to flexibly respond to different types of CNNs without frequent redesign of the architecture, thereby improving design efficiency and adaptability. In addition, the algorithm model is preprocessed, and two technologies, deep separable convolution and layer fusion, are introduced and combined. While maintaining the model performance, the number of parameters and the amount of calculation of the model are significantly reduced, making it more suitable for resource-constrained environments, thereby achieving end-to-end acceleration of software and hardware collaboration. While ensuring versatility, it has high acceleration performance. The processing of the software algorithm can not only accelerate the overall performance, but also facilitate the deployment of the model on the hardware platform. Combining software algorithm processing and hardware structure optimization can improve the overall computing efficiency, and make the design no longer focus on the optimization of hardware performance, solving the problem that the existing solution only focuses on unilateral optimization.

[0050] Based on the previous embodiment, it can be known that the present application can alternately use two cache modules and allocate processing units according to different computing tasks, so as to dynamically adjust resource allocation according to task requirements. Next, the data processing process will be described in detail in this embodiment. Figure 4 As shown, the embodiment of the present application discloses a specific data processing method based on a convolutional neural network, including:

[0051] Step S21, determining a processing task corresponding to the data to be processed, and determining a calculation type corresponding to the data to be processed according to the processing task, and allocating a corresponding processing unit to the data to be processed according to the calculation type.

[0052] In this embodiment, when allocating corresponding processing units to the data to be processed, the processing tasks corresponding to the data to be processed can be first determined, and the calculation types corresponding to the data to be processed can be determined according to the processing tasks, so as to allocate corresponding processing units to the data to be processed according to the calculation types. And when determining the calculation type corresponding to the data to be processed according to the processing tasks, the task requirements of the processing tasks can be specifically determined, and the corresponding calculation types can be allocated to the data to be processed according to the determined task requirements and the system resources corresponding to the processing units; wherein the above-mentioned task requirements include processing resource requirements and processing time requirements. If it is then determined that the calculation type is a calculation-intensive calculation, a first number of processing units are allocated to the data to be processed according to the preset processing unit allocation rules; if the calculation type is an I / O-intensive calculation, a second number of processing units are allocated to the data to be processed according to the preset processing unit allocation rules. It should be pointed out that the above-mentioned first number is greater than the second number.

[0053] In this embodiment, when analyzing the calculation type in the processing task, the computing resources and processing time required for each operator can be determined first, and then the PE computing units can be reasonably allocated to different calculation types according to the needs of the operator and the actual situation of the system resources. For example, for computationally intensive calculations, more PE computing units can be allocated to speed up the processing speed; for I / O intensive operators, fewer PE computing units can be allocated to save resources. In this way, system resources can be fully utilized, computing efficiency can be improved, and computing resource allocation can be dynamically adjusted according to task requirements to achieve flexible use of resources.

[0054] Step S22: Based on the processing unit, the data to be processed is processed according to a preset neural network model to obtain corresponding processing unit output data.

[0055] Step S23: Cache the processing unit output data into a preset internal cache block, so that when receiving a target processing task, directly read the processing unit output data in the preset internal cache block.

[0056] In this embodiment, after the data to be processed is processed to obtain the corresponding processing unit output data, the processing unit output data can be cached in a preset internal cache block, so that when the target processing task is received, the processing unit output data in the preset internal cache block can be directly read. Figure 3 As shown, in this embodiment, the PE output data can be cached internally. For example, the PE output data that needs to be reused is stored in the internal cache block so that it can be quickly accessed and reused in subsequent processing. After the PE computing unit completes the computing task, the output data is stored in the internal cache block. When the subsequent processing task needs to access this data, it is directly read from the internal cache block instead of recalculating or reading from external storage, which helps to speed up data processing, reduce repeated calculations, and reduce system I / O load and storage requirements.

[0057] For a more specific processing procedure of the above step S22, reference may be made to the corresponding contents disclosed in the above embodiments, which will not be described in detail here.

[0058] In this embodiment, the processing task corresponding to the data to be processed is first determined, and the calculation type corresponding to the data to be processed is determined according to the processing task, and the corresponding processing unit is allocated to the data to be processed according to the calculation type, and then the processing unit processes the data to be processed according to the preset neural network model to obtain the corresponding processing unit output data, so as to cache the processing unit output data to the preset internal cache block, and when the target processing task is received, the processing unit output data in the preset internal cache block is directly read. Compared with placing the calculated data in the off-chip storage and waiting for the output calculation at the other end to be completed and then transferred into the chip for associated transportation, after the PE unit completes the calculation task, the controller can store the data to be reused in the internal cache reuse module instead of extracting it from the outside, which speeds up the processing speed, reduces the recalculation time, and reduces the I / O load. In this way, by introducing on-chip cache and optimizing data flow strategies, the off-chip storage time is reduced, the number of internal and external memory accesses is reduced, and the delay caused by the call is reduced, thereby improving the overall computing efficiency. In addition, operators can be allocated according to different computing units, the computing types in the processing tasks can be analyzed, and after determining the computing resources and processing time required for each operator, PE computing units can be reasonably allocated to different computing types, thereby improving the general performance during data processing and the CNN acceleration performance of the FPGA platform.

[0059] See also Figure 5 As shown, the embodiment of the present application also discloses a data processing device based on a convolutional neural network, including:

[0060] The data cache module 11 is used to obtain the data to be processed in the preset memory, and alternately cache the data to be processed into the preset cache blocks according to the preset data cache rules;

[0061] A resource allocation module 12, used to determine the processing task corresponding to the data to be processed, and allocate a corresponding processing unit to the data to be processed according to the processing task;

[0062] The data processing module 13 is used to process the data to be processed based on the processing unit according to a preset neural network model to obtain corresponding processing unit output data; the preset neural network model is a neural network model obtained based on deep separable convolution.

[0063] In this embodiment, the data to be processed in the preset memory is first obtained, and the data to be processed is alternately cached in the preset cache block according to the preset data cache rule, and then the processing task corresponding to the data to be processed is determined, and the corresponding processing unit is allocated to the data to be processed according to the processing task, and the data to be processed is processed according to the preset neural network model based on the processing unit to obtain the corresponding processing unit output data. In this way, by caching the data to be processed alternately in the cache block, it is helpful to ensure the continuity of the data flow, and by alternating the use of two cache modules, the continuous processing of the data flow is realized, and the processing speed is improved. At the same time, the processing unit is reasonably allocated according to different computing tasks, which helps to dynamically adjust the computing resource allocation according to the task requirements, realize the flexible use of resources, and improve the general performance of this application. The algorithm model is preprocessed, and the introduction of deep separable convolution significantly reduces the number of parameters and the amount of calculation of the model, making it more suitable for resource-constrained environments. Through the above-mentioned technical solution, not only the overall performance is accelerated by the processing of the software algorithm, but also the software algorithm processing and hardware structure optimization are combined. Compared with the current problem of focusing only on unilateral optimization, it is no longer just focusing on the optimization of hardware performance, which improves the overall computing efficiency.

[0064] In some specific embodiments, the data cache module 11 specifically includes:

[0065] A period division unit, used to divide the cache period of the data to be processed according to a preset time period division rule;

[0066] A period determination unit, used to determine the cache period corresponding to the current time;

[0067] A first data cache unit, configured to cache the currently cached data to be processed into a first cache block in the preset cache blocks if the current time is a first cache cycle, and output the cached data to be processed in the second cache block to the corresponding processing unit when the data to be processed exists in a second cache block in the preset cache blocks;

[0068] The second data cache unit is used to cache the currently cached data to be processed into the second cache block if the current time is the second cache cycle, and output the cached data to be processed in the first cache block to the corresponding processing unit.

[0069] In some specific embodiments, the resource allocation module 12 specifically includes:

[0070] The resource allocation submodule is used to determine the calculation type corresponding to the data to be processed according to the processing task, and allocate the corresponding processing unit to the data to be processed according to the calculation type.

[0071] In some specific embodiments, the resource allocation submodule specifically includes:

[0072] A type determination unit is used to determine the task requirements of the processing task and allocate the corresponding computing type to the data to be processed according to the task requirements and the system resources corresponding to the processing unit; the task requirements include processing resource requirements and processing time requirements.

[0073] In some specific embodiments, the resource allocation submodule specifically includes:

[0074] A first resource allocation unit, configured to allocate a first number of the processing units to the data to be processed according to a preset processing unit allocation rule if the computing type is computing-intensive computing;

[0075] The second resource allocation unit is used to allocate a second number of the processing units to the data to be processed according to the preset processing unit allocation rule if the computing type is I / O intensive computing; the first number is greater than the second number.

[0076] In some specific embodiments, the data processing module 13 further includes:

[0077] The third data cache unit is used to cache the processing unit output data to a preset internal cache block, so that when receiving a target processing task, the processing unit output data in the preset internal cache block can be directly read.

[0078] In some specific embodiments, the data processing module 13 further includes:

[0079] The model fusion unit is used to fuse several network layers in the initial neural network model to obtain the preset neural network model.

[0080] Furthermore, the present application also discloses an electronic device. Figure 6 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0081] Figure 6 A schematic diagram of the structure of an electronic device 20 provided in an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the data processing method based on a convolutional neural network disclosed in any of the aforementioned embodiments. In addition, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0082] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0083] In addition, the memory 22, as a carrier for storing resources, can be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon can include an operating system 221, a computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0084] The operating system 221 is used to manage and control the hardware devices and computer program 222 on the electronic device 20, which can be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program that can be used to complete the data processing method based on the convolutional neural network performed by the electronic device 20 disclosed in any of the aforementioned embodiments, the computer program 222 can further include a computer program that can be used to complete other specific tasks.

[0085] Furthermore, the present application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the aforementioned disclosed data processing method based on a convolutional neural network is implemented. The specific steps of the method can refer to the corresponding contents disclosed in the aforementioned embodiments, and will not be repeated here.

[0086] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0087] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0088] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0089] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0090] The technical solution provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A data processing method based on convolutional neural network, It is characterized in that include: Acquire the data to be processed in the preset memory, and alternately cache the data to be processed into the preset cache blocks according to the preset data cache rule; Determine a processing task corresponding to the data to be processed, and assign a corresponding processing unit to the data to be processed according to the processing task; Based on the processing unit, the data to be processed is processed according to a preset neural network model to obtain corresponding processing unit output data; the preset neural network model is a neural network model obtained based on deep separable convolution.

2. The data processing method based on convolutional neural network according to claim 1, It is characterized in that The step of alternately caching the to-be-processed data into preset cache blocks according to preset data caching rules includes: Dividing the cache period of the data to be processed according to a preset time period division rule; Determine the cache period corresponding to the current time; If the current time is the first cache cycle, the data to be processed currently being cached is cached in a first cache block in the preset cache blocks, and when the data to be processed exists in a second cache block in the preset cache blocks, the data to be processed cached in the second cache block is output to the corresponding processing unit; If the current time is the second cache cycle, the data to be processed currently being cached is cached in the second cache block, and the data to be processed cached in the first cache block is output to the corresponding processing unit.

3. The data processing method based on convolutional neural network according to claim 1, It is characterized in that The allocating corresponding processing units to the data to be processed according to the processing tasks includes: The calculation type corresponding to the data to be processed is determined according to the processing task, and the corresponding processing unit is allocated to the data to be processed according to the calculation type.

4. The data processing method based on convolutional neural network according to claim 3, It is characterized in that The determining, according to the processing task, the calculation type corresponding to the data to be processed includes: Determine the task requirements of the processing task, and allocate the corresponding computing type to the data to be processed according to the task requirements and the system resources corresponding to the processing unit; the task requirements include processing resource requirements and processing time requirements.

5. The data processing method based on convolutional neural network according to claim 3, It is characterized in that The allocating the corresponding processing unit to the data to be processed according to the calculation type includes: If the computing type is computing-intensive computing, allocating a first number of the processing units to the data to be processed according to a preset processing unit allocation rule; If the computing type is I / O intensive computing, a second number of the processing units are allocated to the data to be processed according to the preset processing unit allocation rule; the first number is greater than the second number.

6. The data processing method based on convolutional neural network according to claim 1, It is characterized in that After the processing unit processes the data to be processed according to the preset neural network model to obtain the corresponding processing unit output data, the method further includes: The processing unit output data is cached in a preset internal cache block, so that when a target processing task is received, the processing unit output data in the preset internal cache block is directly read.

7. The data processing method based on convolutional neural network according to any one of claims 1 to 6, It is characterized in that Before the processing unit processes the data to be processed according to a preset neural network model, the method further includes: Several network layers in the initial neural network model are layer-fused to obtain the preset neural network model.

8. A data processing device based on convolutional neural network, It is characterized in that include: A data cache module, used to obtain the to-be-processed data in the preset memory, and alternately cache the to-be-processed data into the preset cache blocks according to the preset data cache rules; A resource allocation module, used to determine the processing task corresponding to the data to be processed, and allocate a corresponding processing unit to the data to be processed according to the processing task; A data processing module, used to process the data to be processed based on the processing unit according to a preset neural network model to obtain corresponding processing unit output data; The preset neural network model is a neural network model obtained based on deep separable convolution.

9. An electronic device, It is characterized in that The electronic device includes a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the data processing method based on a convolutional neural network as described in any one of claims 1 to 7.

10. A computer-readable storage medium, It is characterized in that Used to store a computer program, which, when executed by a processor, implements the data processing method based on a convolutional neural network as described in any one of claims 1 to 7.

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