Back contact solar cell and preparation method thereof

Abstract

The invention relates to a back contact solar cell and a preparation method thereof. The back contact solar cell comprises a monocrystalline silicon substrate, a tunneling oxide layer, a first doping type polycrystalline silicon layer, a second doping type polycrystalline silicon layer, an intrinsic amorphous silicon layer, a first electrode and a second electrode. The tunneling oxide layer is arranged on the first side of the monocrystalline silicon substrate, the first doping type polycrystalline silicon layer, the second doping type polycrystalline silicon layer and the intrinsic amorphous silicon layer are respectively arranged on the tunneling oxide layer, and the intrinsic amorphous silicon layer is arranged between the first doping type polycrystalline silicon layer and the second doping type polycrystalline silicon layer. The back contact solar cell is provided with an isolation groove, and the isolation groove divides the intrinsic amorphous silicon layer into a first part connected to the first doping type polycrystalline silicon layer and a second part connected to the second doping type polycrystalline silicon layer. According to the back contact solar cell, the interface defect of the monocrystalline silicon substrate at the back contact solar cell is overcome, and the insulation of two different doping types of media is realized.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a back-contact solar cell and a preparation method thereof. Background Art

[0002] All-back-contact crystalline silicon solar cells (BC cells) place all metal electrodes on the back of the cell. Since there is no metal electrode blocking the front of the cell, the area of ​​the cell that absorbs sunlight can be maximized, reducing optical losses and thus improving photoelectric conversion efficiency. However, this type of cell also has a P region and an N region on the back, which can easily form leakage channels during the process preparation of the N and P regions, reducing cell efficiency. Summary of the invention

[0003] Based on this, it is necessary to provide a back-contact solar cell and a method for preparing the same to solve the problem of a leakage channel formed between the P region and the N region of a BC cell.

[0004] The first aspect of the present invention is to provide a back contact solar cell, the scheme is as follows:

[0005] A back-contact solar cell comprises a single crystal silicon substrate, a tunneling oxide layer, a first doping type polysilicon layer, a second doping type polysilicon layer, an intrinsic amorphous silicon layer, a first electrode and a second electrode;

[0006] The tunneling oxide layer is arranged on the first side of the single crystal silicon substrate, the first doped type polycrystalline silicon layer, the second doped type polycrystalline silicon layer and the intrinsic amorphous silicon layer are respectively arranged on the tunneling oxide layer, the intrinsic amorphous silicon layer is arranged between the first doped type polycrystalline silicon layer and the second doped type polycrystalline silicon layer, the first electrode is connected to the first doped type polycrystalline silicon layer, and the second electrode is connected to the second doped type polycrystalline silicon layer; the back contact solar cell has an isolation groove, and the isolation groove separates the intrinsic amorphous silicon layer into a first part connected to the first doped type polycrystalline silicon layer and a second part connected to the second doped type polycrystalline silicon layer; the first electrode is connected to the first doped type polycrystalline silicon layer, and the second electrode is connected to the second doped type polycrystalline silicon layer.

[0007] In one embodiment, the isolation trench penetrates the intrinsic amorphous silicon layer and the tunneling oxide layer to the single crystal silicon substrate.

[0008] In one embodiment, the thickness of the tunnel oxide layer is 1 nm to 3 nm.

[0009] In one of the embodiments, the thickness of the first doping type polysilicon layer is 80 nm to 300 nm.

[0010] In one embodiment, the thickness of the second doping type polysilicon layer is 80 nm to 300 nm.

[0011] In one of the embodiments, the thickness of the intrinsic amorphous silicon layer is 80nm-300nm.

[0012] In one embodiment, the width of the isolation trench is 50 μm to 150 μm.

[0013] In one of the embodiments, the back-contact solar cell comprises a front-side passivation anti-reflection layer, and the front-side passivation anti-reflection layer is disposed on the second side of the single-crystalline silicon substrate.

[0014] In one embodiment, the back-contact solar cell includes a back-side passivation anti-reflection layer, and the back-side passivation anti-reflection layer entirely covers the first doped type polysilicon layer, the second doped type polysilicon layer, the intrinsic amorphous silicon layer and the groove wall of the isolation groove.

[0015] The second aspect of the present invention is to provide a method for preparing a back-contact solar cell, the scheme is as follows:

[0016] A method for preparing a back contact solar cell comprises the following steps:

[0017] forming a tunneling oxide layer on one side of a single crystal silicon substrate;

[0018] Preparing a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is located between the first doping type polysilicon layer and the second doping type polysilicon layer;

[0019] preparing an isolation trench, wherein the isolation trench separates the intrinsic amorphous silicon layer into a first portion connected to the first doping type polysilicon layer and a second portion connected to the second doping type polysilicon layer;

[0020] preparing a first electrode connected to the first doping type polysilicon layer;

[0021] A second electrode connected to the second doping type polysilicon layer is prepared.

[0022] In one of the embodiments, the step of preparing a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is disposed between the first doping type polysilicon layer and the second doping type polysilicon layer comprises:

[0023] preparing an intrinsic amorphous silicon layer on the tunneling oxide layer;

[0024] Disposing a first doping type paste on the intrinsic amorphous silicon layer in the first region, and disposing a second doping type paste on the intrinsic amorphous silicon layer in the second region;

[0025] The silicon wafer provided with the first doping type slurry and the second doping type slurry is subjected to hydrogen plasma treatment, so that the intrinsic amorphous silicon layer in the first region is doped to form the first doping type polysilicon layer, and the intrinsic amorphous silicon layer in the second region is doped to form the second doping type polysilicon layer, and the first doping type polysilicon layer and the second doping type polysilicon layer are separated by the intrinsic amorphous silicon layer.

[0026] In one embodiment, the radio frequency of the hydrogen plasma treatment is 30mw / cm 2 ~mw / cm 2 The process pressure is 0.9Torr~1.2Torr, the process temperature is 300℃~800℃, and the process time is 30s~180s.

[0027] In one embodiment, the step of preparing the isolation trench comprises:

[0028] An etching protection layer is prepared on the first doping type polysilicon layer, the second doping type polysilicon layer and the intrinsic amorphous silicon layer, wherein the etching protection layer exposes the intrinsic amorphous silicon layer in a third region, and the third region is located between the first region and the second region;

[0029] The intrinsic amorphous silicon layer in the third region is removed by etching to form the isolation trench.

[0030] Compared with the conventional technology, the above-mentioned back contact solar cell and its preparation method have the following beneficial effects:

[0031] The above-mentioned back-contact solar cell and its preparation method set an intrinsic amorphous silicon layer between the first doping type polysilicon layer and the second doping type polysilicon layer on the back to prevent the generation of leakage channels, and the intrinsic amorphous silicon layer can chemically passivate the single-crystal silicon substrate, repair the interface dangling bonds, and eliminate the internal recombination center, thereby improving the conversion efficiency of the battery. The above-mentioned back-contact solar cell is also provided with an isolation groove to separate the intrinsic amorphous silicon layer into a first part connected to the first doping type polysilicon layer and a second part connected to the second doping type polysilicon layer, which not only makes up for the interface defects of the single-crystal silicon substrate at this location, but also realizes the insulation of the two different doping type media to prevent mutual conduction. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] FIG1 is a schematic structural diagram of a back contact solar cell according to an embodiment;

[0033] FIG2 is a schematic diagram of preparing a tunneling oxide layer and an intrinsic amorphous silicon layer on a single crystal silicon substrate;

[0034] 3 is a schematic diagram of disposing a first doping type paste and a second doping type paste on an intrinsic amorphous silicon layer;

[0035] 4 is a schematic diagram of performing hydrogen plasma treatment to dope the intrinsic amorphous silicon layer in the first region to form a first doping type polysilicon layer, and to dope the intrinsic amorphous silicon layer in the second region to form a second doping type polysilicon layer;

[0036] 5 is a schematic diagram of preparing an etching protection layer on a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer;

[0037] FIG6 is a schematic diagram of removing the etching protection film on the third region by laser processing;

[0038] 7 is a schematic diagram of etching and removing the intrinsic amorphous silicon layer in the third region to form an isolation trench;

[0039] FIG8 is a schematic diagram of preparing a back passivation anti-reflection layer and a front passivation anti-reflection layer.

[0040] Description of reference numerals:

[0041] 100, back contact solar cell; 110, single crystal silicon substrate; 120, tunneling oxide layer; 130, first doping type polysilicon layer; 140, second doping type polysilicon layer; 150, intrinsic amorphous silicon layer; 151, first part; 152, second part; 161, first electrode; 162, second electrode; 170, isolation groove; 180, front passivation anti-reflection layer; 190, back passivation anti-reflection layer; 111, first region; 112, second region; 113, third region; 114, velvet; 131, first doping type slurry; 141, second doping type slurry; 200, etching protection layer. DETAILED DESCRIPTION

[0042] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0044] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0045] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0046] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0047] As shown in FIG. 1 , a back-contact solar cell 100 of an embodiment includes a single crystal silicon substrate 110 , a tunneling oxide layer 120 , a first doped type polysilicon layer 130 , a second doped type polysilicon layer 140 , an intrinsic amorphous silicon layer 150 , a first electrode 161 , and a second electrode 162 .

[0048] The tunnel oxide layer 120 is disposed on the first side of the single crystal silicon substrate 110, the first doping type polysilicon layer 130, the second doping type polysilicon layer 140 and the intrinsic amorphous silicon layer 150 are respectively disposed on the tunnel oxide layer 120, the intrinsic amorphous silicon layer 150 is disposed between the first doping type polysilicon layer 130 and the second doping type polysilicon layer 140, the first electrode 161 is connected to the first doping type polysilicon layer 130, and the second electrode 162 is connected to the second doping type polysilicon layer 140. The back contact solar cell 100 has an isolation trench 170, which separates the intrinsic amorphous silicon layer 150 into a first portion 151 connected to the first doping type polysilicon layer 130 and a second portion 152 connected to the second doping type polysilicon layer 140.

[0049] The first electrode 161 is connected to the first doping type polysilicon layer 130 , and the second electrode 162 is connected to the second doping type polysilicon layer 140 .

[0050] The single crystal silicon substrate 110 may be N-type doped or P-type doped.

[0051] The single crystal silicon substrate 110 has a first side and a second side that are arranged opposite to each other. The tunneling oxide layer 120, the first doping type polysilicon layer 130, the second doping type polysilicon layer 140, the intrinsic amorphous silicon layer 150, the first electrode 161 and the second electrode 162 are all arranged on the first side of the single crystal silicon substrate 110. The second side of the single crystal silicon substrate 110 can be set to a velvet surface 114.

[0052] The material of the tunnel oxide layer 120 may be, but is not limited to, SiO x The thickness of the tunnel oxide layer 120 is, for example, 1-3 nm, and specifically, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, etc.

[0053] The first doping type polysilicon layer 130 and the second doping type polysilicon layer 140 have opposite doping types. For example, the first doping type polysilicon layer 130 is P-type doped, and the second doping type polysilicon layer 140 is N-type doped. Alternatively, the first doping type polysilicon layer 130 is N-type doped, and the second doping type polysilicon layer 140 is P-type doped.

[0054] In some of the examples, the first doping type polysilicon layer 130 and the second doping type polysilicon layer 140 are distributed in an interdigitated shape. This design can reduce the current transmission path, reduce resistance, and improve the conversion efficiency of the battery.

[0055] The thickness of the first doped type polysilicon layer 130 is, for example, 80 nm to 300 nm, and specifically, for example, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0056] The thickness of the second doping type polysilicon layer 140 is, for example, 80 nm to 300 nm, and specifically, for example, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0057] The thickness of the intrinsic amorphous silicon layer 150 is, for example, 80 nm to 300 nm, and specifically, for example, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0058] In some examples, the isolation trench 170 penetrates the intrinsic amorphous silicon layer 150 and the tunnel oxide layer 120 to the single crystal silicon substrate 110 .

[0059] In some of the examples, the width of the isolation trench 170 is 50 μm-150 μm, for example, 50 nm, 70 nm, 90 nm, 110 nm, 130 nm, 150 nm, etc.

[0060] In some examples, the back contact solar cell 100 includes a front passivation anti-reflection layer 180 disposed on the second side of the single crystal silicon substrate 110. The material of the front passivation anti-reflection layer 180 can be, but is not limited to, aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride, and the like.

[0061] In some examples, the back contact solar cell 100 includes a back passivation anti-reflection layer 190, which entirely covers the first doping type polysilicon layer 130, the second doping type polysilicon layer 140, the intrinsic amorphous silicon layer 150, and the groove wall of the isolation groove 170. The material of the back passivation anti-reflection layer 190 can be, but is not limited to, aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride, and the like.

[0062] Optionally, the first electrode 161 and the second electrode 162 may be made of metal materials such as silver and aluminum.

[0063] The back contact solar cell 100 is provided with an intrinsic amorphous silicon layer 150 between the first doping type polycrystalline silicon layer 130 and the second doping type polycrystalline silicon layer 140 on the back side to prevent the generation of leakage channels, and the intrinsic amorphous silicon layer 150 can chemically passivate the single crystal silicon substrate 110, repair the interface dangling bonds, and eliminate the internal recombination center, thereby improving the conversion efficiency of the battery. The back contact solar cell 100 is also provided with an isolation groove 170, which separates the intrinsic amorphous silicon layer 150 into a first part 151 connected to the first doping type polycrystalline silicon layer 130 and a second part 152 connected to the second doping type polycrystalline silicon layer 140, which not only makes up for the interface defects of the single crystal silicon substrate 110 at this location, but also realizes the insulation of two different doping type media to prevent mutual conduction.

[0064] Furthermore, the present invention also provides a method for preparing the back-contact solar cell 100 according to any of the above examples.

[0065] A method for preparing a back contact solar cell 100 according to an embodiment includes the following steps:

[0066] Step S10 , forming a tunneling oxide layer 120 on one side of the single crystal silicon substrate 110 .

[0067] Step S20 , preparing a first doped type polysilicon layer 130 , a second doped type polysilicon layer 140 and an intrinsic amorphous silicon layer 150 on the tunneling oxide layer 120 , wherein the intrinsic amorphous silicon layer 150 is located between the first doped type polysilicon layer 130 and the second doped type polysilicon layer 140 .

[0068] In step S30 , an isolation trench 170 is formed. The isolation trench 170 separates the intrinsic amorphous silicon layer 150 into a first portion 151 connected to the first doping type polysilicon layer 130 and a second portion 152 connected to the second doping type polysilicon layer 140 .

[0069] Step S40 , preparing a first electrode 161 connected to the first doping type polysilicon layer 130 .

[0070] Step S50 , preparing a second electrode 162 connected to the second doping type polysilicon layer 140 .

[0071] Before preparing the tunnel oxide layer 120 on the single crystal silicon substrate 110, the single crystal silicon substrate 110 is preferably chemically cleaned. Chemical cleaning, for example, uses an alkali solution, and chemical polishing is performed at 65° C. to 90° C. for a time of, for example, 180 seconds to 420 seconds. The alkali solution is, for example, KOH, NaOH, etc. Then, oxygen or nitrogen is introduced for high-temperature drying to obtain a double-sided polished single crystal silicon substrate 110.

[0072] Optionally, in step S10 , the tunnel oxide layer 120 may be prepared by, but is not limited to, high temperature oxidation, nitric acid oxidation, ozone oxidation, and the like.

[0073] In some examples, step S20 includes:

[0074] Step S21 , as shown in FIG. 2 , an intrinsic amorphous silicon layer 150 is formed on the tunneling oxide layer 120 .

[0075] In step S22 , as shown in FIG. 3 , a first doping type paste 131 is disposed on the intrinsic amorphous silicon layer 150 in the first region 111 , and a second doping type paste 141 is disposed on the intrinsic amorphous silicon layer 150 in the second region 112 .

[0076] Step S23, as shown in Figure 4, the silicon wafer provided with the first doping type paste 131 and the second doping type paste 141 is treated with hydrogen plasma, so that the intrinsic amorphous silicon layer 150 in the first area 111 is doped to form a first doping type polysilicon layer 130, and the intrinsic amorphous silicon layer 150 in the second area 112 is doped to form a second doping type polysilicon layer 140, and the first doping type polysilicon layer 130 and the second doping type polysilicon layer 140 are separated by the intrinsic amorphous silicon layer 150.

[0077] Optionally, in step S21 , the preparation method of the intrinsic amorphous silicon layer 150 may be but is not limited to low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, catalytic chemical vapor deposition, atomic layer deposition, hot wire vapor deposition, physical vapor deposition, etc.

[0078] In some of the examples, in step S22 , the first doping type paste 131 and the second doping type paste 141 are printed using a mask having a specific stiffness and pattern.

[0079] In some examples, the first doping type paste 131 is phosphorus paste. The solid content of the phosphorus paste is 10% to 40%, and the viscosity is 20Pa to 50Pa. The width of the phosphorus paste is about 350μm to 650μm. The second doping type paste 141 is boron paste. The solid content of the boron paste is 10% to 50%, and the viscosity is 20PaPa to 50Pa. The width of the boron paste is 250μm to 450μm.

[0080] In some examples, in step S23, the radio frequency of the hydrogen plasma treatment is 30 mw / cm 2 ~80mw / cm 2 , for example, 30mw / cm 2 、40mw / cm 2 、50mw / cm 2 、60mw / cm 2 、70mw / cm 2 、80mw / cm 2 wait.

[0081] In some of the examples, in step S23 , the process pressure of the hydrogen plasma treatment is 0.9 Torr to 1.2 Torr, for example, 0.9 Torr, 1 Torr, 1.1 Torr, 1.2 Torr, etc.

[0082] In some of the examples, in step S23, the process temperature of the hydrogen plasma treatment is 300°C to 800°C, for example, 300°C, 400°C, 500°C, 600°C, 700°C, 800°C, etc.

[0083] In some of the examples, in step S23, the process time of the hydrogen plasma treatment is 30s~180s, for example, 30s, 50s, 70s, 90s, 110s, 130s, 150s, 170s, etc.

[0084] After the hydrogen plasma treatment, the doping concentration of the first doping type polysilicon layer 130 is about 1×10 15 cm -3 The doping concentration of the second doping type polysilicon layer 140 is about 7×10 18 cm -3 .

[0085] In some examples, step S30 includes:

[0086] In step S31, as shown in Figures 5 and 6, an etching protection layer 200 is prepared on the first doping type polysilicon layer 130, the second doping type polysilicon layer 140 and the intrinsic amorphous silicon layer 150, and the etching protection layer 200 exposes the intrinsic amorphous silicon layer 150 in the third region 113, and the third region 113 is located between the first region 111 and the second region 112.

[0087] In step S32 , as shown in FIG. 7 , the intrinsic amorphous silicon layer 150 in the third region 113 is removed by etching to form an isolation trench 170 .

[0088] Optionally, the etching protection film may be, but is not limited to, silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), borosilicate glass (BSG), etc. The thickness of the etching protection film is, for example, 2 nm to 50 nm.

[0089] Optionally, the preparation method of the etching protection film may be, but is not limited to, low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, catalytic chemical vapor deposition, atomic layer deposition, physical vapor deposition, and the like.

[0090] As shown in FIG6 , in step S31 , the etching protection film can be deposited on the entire surface and then laser treated to remove the portion on the third region 113 . The laser treatment uses, for example, a laser with a wavelength of 355 nm and a working power of 30 W to 80 W. The width of the laser treated region is, for example, 30 μm to 50 μm.

[0091] In step S32, an alkaline etching solution may be used to etch and remove the intrinsic amorphous silicon layer 150 in the third region 113. The alkaline etching solution, for example, contains an alkali, an additive, and water in a volume ratio of 2:1:10. The alkali is, for example, NaOH, KOH, etc. The etching treatment time is, for example, 300s to 500s.

[0092] In some examples, in step S32, the tunnel oxide layer 120 in the third region 113 is further etched away to expose the single crystal silicon substrate 110. At this time, the alkaline etching solution increases the opening width by 2 μm to 5 μm based on the width of the laser-processed region, and finally retains an intrinsic polysilicon layer with a width of 70 μm to 150 μm.

[0093] In some of the examples, as shown in FIG8 , the method for preparing the back-contact solar cell 100 also includes the step of preparing a back-side passivation anti-reflection layer 190 , which entirely covers the first doped type polysilicon layer 130 , the second doped type polysilicon layer 140 , the intrinsic amorphous silicon layer 150 , and the groove wall of the isolation groove 170 .

[0094] In some examples, as shown in FIG. 8 , the method for preparing the back-contact solar cell 100 further includes the step of preparing a front passivation anti-reflection layer 180 , where the front passivation anti-reflection layer 180 is disposed on the second side of the single crystal silicon substrate 110 .

[0095] In some examples, a layer of aluminum oxide with a thickness of about 3nm to 10nm is deposited on the front and back of the battery. The atomic layer passivation film can be deposited by one of PEALD, ALD, and PVD, and trimethylaluminum and H2O or trimethylaluminum and O3 can be used as the reaction gas. Then, a passivation anti-reflection film with a thickness of 70nm to 110nm and a refractive index of 2.0% to 2.4% is deposited on the front and back of the battery. The passivation anti-reflection film can be at least one of silicon nitride, silicon oxide, and silicon oxynitride.

[0096] In step S40 and step S50 , the first electrode 161 and the second electrode 162 may be printed with silver paste, aluminum paste, etc. by a printing process, and then sintered at 700° C. to 900° C. to achieve metallization.

[0097] When preparing the emitter of the two heavily doped regions on the back, it is also necessary to avoid direct contact between the P region and the N region to prevent short circuits, so it is inevitable to require multiple steps of mask preparation and laser film opening processes. The above preparation method uses a printed doping slurry to achieve the accuracy of local doping on the back, and then undergoes hydrogen plasma treatment to effectively improve the passivation performance of the printed area; it also reduces the process steps and production costs, and is more conducive to large-scale production. The above preparation method sets an intrinsic amorphous silicon layer 150 between the two types of emitters on the back, and only uses a laser process to open a groove, which not only compensates for the interface defects of the single crystal silicon substrate 110 at this location, but also achieves insulation between two different doping types of media to prevent mutual conduction.

[0098] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0099] The above-mentioned embodiments only express several implementation methods of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims, and the description can be used to interpret the content of the claims.

Claims

1. A back contact solar cell, characterized in that: It includes a single crystal silicon substrate, a tunneling oxide layer, a first doping type polysilicon layer, a second doping type polysilicon layer, an intrinsic amorphous silicon layer, a first electrode and a second electrode; The tunneling oxide layer is arranged on the first side of the single crystal silicon substrate, the first doped type polycrystalline silicon layer, the second doped type polycrystalline silicon layer and the intrinsic amorphous silicon layer are respectively arranged on the tunneling oxide layer, the intrinsic amorphous silicon layer is arranged between the first doped type polycrystalline silicon layer and the second doped type polycrystalline silicon layer, the first electrode is connected to the first doped type polycrystalline silicon layer, and the second electrode is connected to the second doped type polycrystalline silicon layer; the back contact solar cell has an isolation groove, and the isolation groove separates the intrinsic amorphous silicon layer into a first part connected to the first doped type polycrystalline silicon layer and a second part connected to the second doped type polycrystalline silicon layer; the first electrode is connected to the first doped type polycrystalline silicon layer, and the second electrode is connected to the second doped type polycrystalline silicon layer.

2. The back contact solar cell according to claim 1, characterized in that The isolation trench penetrates the intrinsic amorphous silicon layer and the tunneling oxide layer to the single crystal silicon substrate.

3. The back contact solar cell according to claim 1, characterized in that The width of the isolation groove is 50 μm to 150 μm.

4. The back contact solar cell according to claim 1, characterized in that: The thickness of the tunnel oxide layer is 1 nm to 3 nm; and / or The thickness of the first doping type polysilicon layer is 80nm-300nm; and / or The thickness of the second doping type polysilicon layer is 80nm-300nm; and / or The thickness of the intrinsic amorphous silicon layer is 80nm-300nm.

5. The back contact solar cell according to claim 1, wherein: The back-contact solar cell includes a front-side passivation anti-reflection layer disposed on the second side of the single-crystal silicon substrate.

6. The back contact solar cell according to any one of claims 1 to 5, characterized in that: The back-contact solar cell comprises a back-side passivation anti-reflection layer, and the back-side passivation anti-reflection layer entirely covers the first doped type polysilicon layer, the second doped type polysilicon layer, the intrinsic amorphous silicon layer and the groove wall of the isolation groove.

7. A method for preparing a back contact solar cell, characterized in that: The following steps are involved: forming a tunneling oxide layer on one side of a single crystal silicon substrate; Preparing a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is located between the first doping type polysilicon layer and the second doping type polysilicon layer; preparing an isolation trench, wherein the isolation trench separates the intrinsic amorphous silicon layer into a first portion connected to the first doping type polysilicon layer and a second portion connected to the second doping type polysilicon layer; preparing a first electrode connected to the first doping type polysilicon layer; A second electrode connected to the second doping type polysilicon layer is prepared.

8. The method for preparing a back contact solar cell according to claim 7, characterized in that: The step of preparing a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is disposed between the first doping type polysilicon layer and the second doping type polysilicon layer comprises: preparing an intrinsic amorphous silicon layer on the tunneling oxide layer; Disposing a first doping type paste on the intrinsic amorphous silicon layer in the first region, and disposing a second doping type paste on the intrinsic amorphous silicon layer in the second region; The silicon wafer provided with the first doping type slurry and the second doping type slurry is subjected to hydrogen plasma treatment, so that the intrinsic amorphous silicon layer in the first region is doped to form the first doping type polysilicon layer, and the intrinsic amorphous silicon layer in the second region is doped to form the second doping type polysilicon layer, and the first doping type polysilicon layer and the second doping type polysilicon layer are separated by the intrinsic amorphous silicon layer.

9. The method for preparing a back contact solar cell according to claim 8, characterized in that: The radio frequency of the hydrogen plasma treatment is 30mw / cm 2 ~mw / cm 2 The process pressure is 0.9Torr~1.2Torr, the process temperature is 300℃~800℃, and the process time is 30s~180s.

10. The method for preparing a back contact solar cell according to any one of claims 7 to 9, characterized in that: The step of preparing the isolation groove comprises: An etching protection layer is prepared on the first doping type polysilicon layer, the second doping type polysilicon layer and the intrinsic amorphous silicon layer, wherein the etching protection layer exposes the intrinsic amorphous silicon layer in a third region, and the third region is located between the first region and the second region; The intrinsic amorphous silicon layer in the third region is removed by etching to form the isolation trench.

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