Cross-platform compatibility automated testing method

Abstract

An embodiment of the present application provides a cross-platform compatibility automation testing method, the method comprising: scanning a target platform architecture specification file to extract instruction set features, collecting chip platform information to build a test environment database, building a test case feature model based on the instruction set features and the test environment database, designing a test case generator based on the test case feature model, and generating a test task scheduling plan based on a test execution framework; inputting abnormal behavior features and performance baseline thresholds into a test result analyzer, building a scoring dimension including functional completeness, performance compliance rate and stability indicators, mapping abnormal behavior features and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculating a weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generating a test report based on the compatibility level and performing regression verification; the present application can improve the comprehensiveness and accuracy of the test and achieve more efficient compatibility evaluation.

Description

Technical Field

[0001] The present application relates to the field of data processing, and in particular to a cross-platform compatibility automated testing method. Background Art

[0002] With the rapid development of software and hardware technologies, system compatibility testing faces increasingly complex challenges. Traditional manual testing methods can no longer meet the diverse platform adaptation requirements, and existing automated testing solutions still have many shortcomings when dealing with cross-platform compatibility issues.

[0003] The current mainstream compatibility testing methods mainly rely on preset test cases and fixed evaluation criteria, lacking in-depth understanding of the characteristics of the target platform and the ability to dynamically adapt. This approach performs poorly in terms of test coverage and efficiency, and is difficult to effectively identify potential problems caused by platform differences. At the same time, the existing test systems are not intelligent enough in terms of performance evaluation and anomaly detection, and often use static thresholds for judgment, which cannot accurately reflect the actual operating status of the system.

[0004] In terms of test result analysis and evaluation, the existing technology still has a lot of room for improvement. The test system lacks a scientific scoring mechanism and adaptive weight adjustment capabilities, making it difficult to comprehensively and objectively evaluate the platform compatibility level. In addition, the regression test and continuous optimization mechanisms are relatively weak, affecting the reliability of the test results and the improvement of test efficiency. These problems restrict the quality and effectiveness of cross-platform compatibility testing. Summary of the invention

[0005] In response to the problems in the prior art, the present application provides a cross-platform compatibility automated testing method that can improve the comprehensiveness and accuracy of the test and achieve more efficient compatibility evaluation.

[0006] In order to solve at least one of the above problems, the present application provides the following technical solutions:

[0007] In a first aspect, the present application provides a cross-platform compatibility automated testing method, comprising:

[0008] Scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, the test case generator adaptively creates functional test sets and performance test sets based on the execution constraints of the instruction set features, configure the automated testing tool to deploy a test execution framework, and generate a test task scheduling plan based on the test execution framework;

[0009] Execute the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collect the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, train the fault detection model with a deep learning algorithm to establish a standard behavior pattern of the system call trajectory, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trajectory to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0010] The abnormal behavior characteristics and the performance baseline threshold are input into the test result analyzer, and a scoring dimension including functional integrity, performance compliance rate and stability index is constructed. An initial weight coefficient is assigned to the scoring dimension according to the instruction set characteristics. The initial weight coefficient is dynamically adjusted based on the standard behavior pattern to obtain an optimized weight coefficient. The abnormal behavior characteristics and the performance baseline threshold are mapped to the scoring dimension to generate a test result scoring matrix. The weighted average of the test result scoring matrix and the optimized weight coefficient is calculated as the compatibility level. A test report is generated based on the compatibility level and regression verification is performed.

[0011] Further, the target platform architecture specification file is scanned to extract instruction set features, chip platform information is collected to build a test environment database, a test case feature model is built according to the instruction set features and the test environment database, a test case generator is designed based on the test case feature model, and the test case generator adaptively creates a functional test set and a performance test set according to the execution constraint conditions of the instruction set features, including:

[0012] Parsing the instruction set architecture file of the target platform to obtain hardware information such as CPU architecture type, instruction length, register specification, and memory alignment requirement, classifying and arranging the obtained hardware information based on preset instruction set classification rules to obtain a platform instruction feature library, and generating an instruction set feature vector according to the platform instruction feature library;

[0013] The instruction set feature vector is mapped to the feature space to construct an instruction set dependency graph, and an environmental constraint rule set is constructed based on the software and hardware configuration information in the test environment database. A deep neural network is used to fuse the features of the instruction set dependency graph and the environmental constraint rule set, and a test case feature model is obtained by optimizing network parameters through a back-propagation algorithm.

[0014] Furthermore, the configuration of the automated testing tool to deploy a test execution framework and generate a test task scheduling scheme based on the test execution framework include:

[0015] Select a test tool set based on the test scenario, deploy the test tool set to the target test environment, configure the running parameters and environment variables of the test tools, establish a calling interface and data exchange channel between the test tools, and build a distributed test execution framework;

[0016] A task priority algorithm is used to grade test cases, a task execution dependency graph is built based on test resource utilization and test scenario dependencies, a load balancing algorithm is used to allocate resources to test tasks, and a test task scheduling plan is generated that includes execution order, resource quotas, and timeout limits.

[0017] Furthermore, the function test set and the performance test set are executed on the target platform according to the test task scheduling scheme, the CPU usage, memory occupancy and interface response time of the target platform are collected to build a performance indicator sequence, a fault detection model is trained using a deep learning algorithm to establish a standard behavior pattern of the system call trace, and the fault detection model continuously optimizes the standard behavior pattern through online learning, including:

[0018] Start the test task according to the execution order in the scheduling plan, collect performance data in real time through the system monitoring interface, standardize the indicator data of CPU occupancy, memory usage, disk read and write rate, network transmission rate, and instruction execution frequency, apply the sliding window algorithm to the standardized performance data to construct a time series feature matrix, and calculate the performance indicator sequence according to the preset performance indicator weights;

[0019] A long short-term memory network is used to extract features of system call sequences, and a training dataset containing normal samples is constructed. The encoder network is trained using a contrastive learning method to extract contextual features of system calls. A standard behavior pattern is established based on the extracted contextual features. The model parameters are continuously updated through incremental learning, and the discrimination threshold of the standard behavior pattern is dynamically optimized.

[0020] Furthermore, the analyzing the system call trace to identify abnormal behavior characteristics and establishing a dynamically adaptive performance baseline threshold based on the performance indicator sequence includes:

[0021] Convert the system call sequence into a call frequency matrix within a time window, extract the call timing relationship, parameter distribution characteristics, and return value pattern to construct a feature vector, use the fault detection model to calculate the similarity score between the feature vector and the standard behavior pattern, determine the abnormality of the system call sequence based on the similarity score, and generate a behavioral feature description including the abnormal call type, abnormal occurrence time, and abnormality degree;

[0022] The performance indicator sequence is decomposed into time series to extract trend items and periodic items, an autoregressive model is constructed to predict the changing trend of the performance indicators, the performance baseline value is calculated based on the exponentially weighted moving average algorithm, an adaptive threshold interval is set in combination with the predicted trend, and the upper and lower limits of the threshold are dynamically adjusted according to the fluctuation range of the performance indicators.

[0023] Furthermore, the abnormal behavior characteristics and the performance baseline threshold are input into a test result analyzer, a scoring dimension including functional integrity, performance compliance rate and stability index is constructed, an initial weight coefficient is assigned to the scoring dimension according to the instruction set characteristics, and the initial weight coefficient is dynamically adjusted based on the standard behavior mode to obtain an optimized weight coefficient, including:

[0024] Establish a spatiotemporal correlation map of abnormal behavior characteristics, map the performance baseline threshold to a multi-dimensional evaluation index, construct a scoring dimension including functional test pass rate, interface response delay, resource utilization efficiency, system stability duration, and error recovery capability, calculate the relative importance of each scoring dimension based on the hierarchical analysis method, and generate standardized quantitative indicators for the scoring dimension;

[0025] The complexity indicators and compatibility constraints of the instruction set characteristics are extracted, and an initial weight allocation model based on the instruction set complexity is constructed. The initial weights are modified according to the system call frequency distribution and resource consumption characteristics in the standard behavior pattern, and the weight coefficients are continuously optimized using an adaptive learning algorithm to generate a dynamic weight matrix that reflects the platform characteristics.

[0026] Further, mapping the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculating a weighted average of the test result scoring matrix and the optimized weight coefficient as a compatibility level, generating a test report based on the compatibility level and performing regression verification, includes:

[0027] Construct a mapping rule base between abnormal features and scoring dimensions, convert the performance baseline threshold into a performance compliance index, calculate the impact factor of abnormal behavior on each scoring dimension based on the mapping rule base, generate a multidimensional scoring vector in combination with the performance compliance index, and obtain a scoring matrix reflecting the global characteristics of the test results through matrix operations;

[0028] A dot product operation is performed on the test result scoring matrix and the dynamic weight matrix to obtain a weighted scoring value, and a piecewise function is used to map the weighted scoring value to a preset compatibility level range. A test report including test coverage statistics, performance fluctuation analysis, and stability evaluation is constructed based on the compatibility level, and regression testing is performed on key indicators in the test results to verify the reliability of the test conclusions.

[0029] In a second aspect, the present application provides a cross-platform compatibility automated testing device, comprising:

[0030] A scheduling scheme determination module is used to scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, and the test case generator adaptively creates a functional test set and a performance test set according to the execution constraints of the instruction set features, configures the automated testing tool to deploy a test execution framework, and generates a test task scheduling scheme based on the test execution framework;

[0031] An abnormal behavior analysis module is used to execute the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collect the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, use a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0032] A compatibility processing module is used to input the abnormal behavior characteristics and the performance baseline threshold into a test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

[0033] In a third aspect, the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the cross-platform compatibility automated testing method when executing the program.

[0034] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the cross-platform compatibility automated testing method.

[0035] In a fifth aspect, the present application provides a computer program product, including a computer program / instruction, which implements the steps of the cross-platform compatibility automated testing method when executed by a processor.

[0036] It can be seen from the above technical scheme that the present application provides a cross-platform compatibility automation testing method, which extracts instruction set features by scanning the target platform architecture specification file, collects chip platform information to build a test environment database, builds a test case feature model based on the instruction set features and the test environment database, designs a test case generator based on the test case feature model, and generates a test task scheduling plan based on the test execution framework; inputs abnormal behavior characteristics and performance baseline thresholds into the test result analyzer, constructs a scoring dimension including functional completeness, performance compliance rate and stability indicators, maps abnormal behavior characteristics and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculates the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generates a test report based on the compatibility level and performs regression verification, thereby improving the comprehensiveness and accuracy of the test and achieving more efficient compatibility evaluation. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0038] Figure 1 This is one of the flow charts of the cross-platform compatibility automated testing method in the embodiment of the present application;

[0039] Figure 2 This is the second flow chart of the cross-platform compatibility automated testing method in the embodiment of the present application;

[0040] Figure 3 This is the third flow chart of the cross-platform compatibility automated testing method in the embodiment of the present application;

[0041] Figure 4 This is a fourth flow chart of the cross-platform compatibility automated testing method in an embodiment of the present application;

[0042] Figure 5 This is a fifth flow chart of the cross-platform compatibility automated testing method in the embodiment of the present application;

[0043] Figure 6 This is the sixth flow chart of the cross-platform compatibility automated testing method in the embodiment of the present application;

[0044] Figure 7 This is the seventh flow chart of the cross-platform compatibility automated testing method in the embodiment of the present application;

[0045] Figure 8 A structural diagram of a cross-platform compatibility automated testing device in an embodiment of the present application;

[0046] Fig. 9 It is a schematic diagram of the structure of an electronic device in an embodiment of the present application.

[0047] Reference numerals:

[0048] Electronic device 9600, central processing unit 9100, memory 9140, communication module 9110, input unit 9120, audio processor 9130, display 9160, power supply 9170, buffer memory 9141, application / function storage unit 9142, data storage unit 9143, driver program storage unit 9144, antenna 9111, speaker 9131, microphone 9132. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0050] The acquisition, storage, use, and processing of data in the technical solution of this application comply with the relevant provisions of national laws and regulations.

[0051] Taking into account the problems existing in the prior art, the present application provides a cross-platform compatibility automation testing method, which extracts instruction set features by scanning the target platform architecture specification file, collects chip platform information to build a test environment database, builds a test case feature model according to the instruction set features and the test environment database, designs a test case generator based on the test case feature model, and generates a test task scheduling plan based on the test execution framework; inputs abnormal behavior features and performance baseline thresholds into a test result analyzer, constructs a scoring dimension including functional completeness, performance compliance rate and stability indicators, maps abnormal behavior features and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculates the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, and generates a test report based on the compatibility level, thereby improving the comprehensiveness and accuracy of the test.

[0052] In order to improve the comprehensiveness and accuracy of the test and achieve more efficient compatibility evaluation, this application provides an embodiment of a cross-platform compatibility automation testing method, see Figure 1 The cross-platform compatibility automated testing method specifically includes the following contents:

[0053] Step S101: Scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, the test case generator adaptively creates a functional test set and a performance test set according to the execution constraints of the instruction set features, configure the automated testing tool to deploy a test execution framework, and generate a test task scheduling plan based on the test execution framework;

[0054] Optionally, this embodiment first scans the architecture specification file of the target platform through a dedicated architecture analysis tool to extract instruction set features including instruction format, register allocation rules, memory alignment requirements, instruction pipeline characteristics, etc. For different processor architectures, such as ARM, RISC-V, X86, etc., specific parsing rules are used to identify their unique instruction set features and establish instruction set feature vectors. This feature vector contains not only basic instruction encoding information, but also advanced features such as correlation between instructions, resource competition relations, and execution timing constraints.

[0055] This embodiment acquires chip platform information such as processor main frequency, cache hierarchy, memory bandwidth, bus architecture, etc. through the hardware information acquisition interface, and builds a multi-dimensional test environment database in combination with software environment information such as operating system version, compiler optimization level, and driver version. The database is stored in a graph database structure, which effectively expresses the interconnection relationship between hardware components and the dependency relationship between software and hardware, and provides comprehensive environmental constraint information for subsequent test case generation.

[0056] In the test case feature model construction stage, this embodiment uses an improved graph neural network to fuse instruction set features and environmental information. By designing a special attention mechanism, the importance of key instruction sequences and performance-sensitive operations is highlighted, and a multi-level feature model including instruction dependencies, resource competition patterns, and execution timing requirements is established. The model can adaptively adjust feature weights to ensure that the generated test cases can fully cover the key features of the target platform.

[0057] Based on the constructed feature model, this embodiment designs an intelligent test case generator. The generator uses a reinforcement learning algorithm to learn the optimal instruction combination strategy through continuous interaction with the target platform. In the process of generating functional test sets, the focus is on the integrity of instruction sequences, the coverage of boundary conditions, and the effectiveness of exception handling. When generating performance test sets, the focus is on constructing instruction sequences that can trigger performance bottlenecks, including memory access patterns, cache conflict scenarios, and concurrent execution.

[0058] The deployment of the test execution framework adopts containerization technology to achieve standardized packaging and rapid deployment of the test environment. This embodiment automatically deploys the test tool chain through the configuration management interface to establish a scalable distributed test execution environment. In the process of generating the test task scheduling scheme, an improved task priority algorithm and resource balancing algorithm are used to ensure the reasonable allocation and efficient execution of test tasks. By establishing a dependency graph between test cases, parallel execution and dynamic scheduling optimization of test tasks are achieved.

[0059] This embodiment effectively solves technical problems in cross-platform compatibility testing, such as the difficulty of test cases in fully covering platform features, complex test environment deployment, and low task scheduling efficiency. Through automated feature extraction and deep learning model construction, the pertinence and coverage of test cases are significantly improved; with the help of reinforcement learning algorithms, the intelligent and adaptive generation of test cases is achieved; through distributed execution frameworks and dynamic scheduling strategies, the test execution efficiency is improved. This solution is particularly suitable for compatibility verification of heterogeneous computing platforms, and can effectively ensure the functional integrity and performance stability of software on different hardware platforms, providing reliable technical support for the quality assurance of cross-platform software.

[0060] Step S102: executing the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collecting the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, using a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0061] Optionally, this embodiment carries out functional and performance testing on the target platform according to the preset execution strategy based on the test task scheduling scheme generated in the previous steps. During the test execution process, multi-dimensional performance indicators such as CPU usage, memory occupancy, disk I / O, network throughput, and response time of key interfaces are collected in real time through point monitoring and performance collection agents. After preprocessing, the collected performance data forms a performance indicator sequence with time series characteristics for subsequent anomaly detection and performance evaluation.

[0062] This embodiment designs a deep learning model based on a recurrent neural network (RNN) to train a fault detector. The model uses a long short-term memory network (LSTM) structure, which can effectively capture long-term dependencies in system call sequences. During the training process, the system call traces under normal operating conditions are first collected as a benchmark data set, including features such as the type, parameters, return value, and call interval of the system call. Through feature extraction and sequence modeling of a multi-layer LSTM network, a standard behavior pattern of system calls is gradually established.

[0063] In order to adapt to the dynamic changes in the target platform's operating status, this embodiment uses an online learning mechanism to continuously optimize the fault detection model. The latest system call data is obtained through a sliding window method, and the model parameters are updated in real time, so that the standard behavior pattern can be adaptively adjusted as the application load characteristics change. At the same time, the attention mechanism is introduced to focus on the key patterns in the system call sequence to improve the accuracy of anomaly detection.

[0064] In the abnormal behavior feature identification stage, this embodiment identifies potential abnormal patterns by comparing the deviation between the actual system call trace and the standard behavior pattern. Specifically, it includes various abnormal types such as abnormal system call frequency, parameter value out of bounds, and wrong call sequence. Through the designed multi-level abnormality scoring mechanism, different types of abnormal behaviors are quantitatively evaluated to establish abnormal feature vectors.

[0065] This embodiment innovatively proposes a method for establishing a dynamic and adaptive performance baseline threshold. This method is based on the collected performance indicator sequence, combined with time series analysis and change point detection algorithms, to identify the changing trends and periodic characteristics of performance indicators. The performance data is segmented by an adaptive clustering algorithm to establish differentiated performance baseline thresholds for different load scenarios. At the same time, a prediction model is introduced to predict performance trends, dynamically adjust the threshold range, and improve the accuracy of performance anomaly detection.

[0066] This embodiment solves technical problems such as the difficulty of traditional fault detection methods to adapt to complex application scenarios and the inflexible fixed performance baseline threshold. The deep learning algorithm realizes the accurate modeling of system call behavior, the online learning mechanism ensures the continuous optimization capability of the model, and the dynamic adaptive threshold setting method improves the accuracy of performance anomaly detection. This solution is particularly suitable for critical business systems with high stability requirements. It can promptly detect potential performance failures and abnormal behaviors, provide strong guarantees for the reliable operation of the system, and significantly reduce the false alarm rate and improve operation and maintenance efficiency. In practical applications, this solution can effectively identify typical faults such as memory leaks, deadlocks, and resource competition, and provide accurate problem location basis for system optimization.

[0067] Step S103: Input the abnormal behavior characteristics and the performance baseline threshold into the test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

[0068] Optionally, this embodiment first constructs a multi-dimensional test result analysis framework, takes the abnormal behavior characteristics and performance baseline thresholds obtained from the previous steps as input, and performs in-depth analysis through the test result analyzer. The design of the scoring dimension covers three core aspects: the functional integrity assessment focuses on the correctness and completeness of instruction execution, the performance compliance rate assessment focuses on the compliance of key performance indicators, and the stability index comprehensively considers the reliability and sustainability of system operation.

[0069] This embodiment innovatively proposes a weight allocation mechanism based on instruction set characteristics. By analyzing the key characteristics of the instruction set, such as instruction type distribution, execution frequency, resource consumption and other factors, initial weight coefficients are assigned to different scoring dimensions. For compute-intensive instructions, the performance compliance rate dimension is given a higher weight; for control flow instructions, the weight of the functional completeness dimension is increased accordingly; for memory access instructions, a greater weight is given to the stability index dimension.

[0070] In the weight optimization stage, this embodiment uses the standard behavior pattern established in the previous step as a reference benchmark and dynamically adjusts the initial weight coefficient through a feedback adjustment mechanism. Specifically, when the deviation of the abnormal performance of a certain dimension from the standard behavior pattern exceeds a preset threshold, the weight coefficient of the dimension will be adaptively adjusted. Using an improved gradient descent algorithm, through multiple rounds of iterative optimization, the optimized weight coefficient that can accurately reflect the characteristics of the platform is finally obtained.

[0071] In the scoring mapping phase, this embodiment designs a special mapping algorithm to convert abnormal behavior characteristics and performance indicator deviations into standardized scores. By establishing a multi-dimensional scoring matrix, the score of each dimension fully considers the severity and impact of the abnormality. For example, for the functional integrity dimension, the score is based on the frequency and degree of destructiveness of the abnormal behavior; for the performance compliance rate, the score is quantified based on the degree of deviation of the performance indicator from the baseline threshold.

[0072] This embodiment uses a weighted average algorithm to multiply the scoring matrix with the optimized weight coefficient, and comprehensively calculates the final compatibility level. This level not only reflects the overall compatibility level of the target platform, but also displays the specific problem areas in detail through the dimensional scores. Based on the calculated compatibility level, a test report containing detailed test data, problem analysis and optimization suggestions is automatically generated. At the same time, a complete regression verification mechanism is established to re-execute the test after the problems found are repaired to ensure that the problems are effectively solved.

[0073] This embodiment solves technical problems in traditional test result evaluation methods, such as fixed weight distribution, single scoring criteria, and one-sided result analysis. By establishing a multi-dimensional scoring system and combining it with a dynamic weight optimization mechanism, a more objective and comprehensive compatibility evaluation is achieved. This solution is particularly suitable for compatibility testing scenarios in complex software and hardware environments. It can accurately identify and locate compatibility issues and provide clear direction guidance for subsequent optimization. In practical applications, this solution significantly improves the credibility of test results, and effectively guides the continuous improvement of product quality through detailed problem analysis and optimization suggestions.

[0074] From the above description, it can be seen that the cross-platform compatibility automation testing method provided in the embodiment of the present application can extract instruction set features by scanning the target platform architecture specification file, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, and generate a test task scheduling plan based on the test execution framework; input abnormal behavior characteristics and performance baseline thresholds into the test result analyzer, construct a scoring dimension including functional completeness, performance compliance rate and stability indicators, map abnormal behavior characteristics and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, and generate a test report based on the compatibility level, thereby improving the comprehensiveness and accuracy of the test.

[0075] In one embodiment of the cross-platform compatibility automated testing method of the present application, see Figure 2 , and can also include the following:

[0076] Step S201: parsing the instruction set architecture file of the target platform to obtain hardware information such as CPU architecture type, instruction length, register specification, and memory alignment requirement; classifying and arranging the obtained hardware information based on a preset instruction set classification rule to obtain a platform instruction feature library; and generating an instruction set feature vector according to the platform instruction feature library;

[0077] Step S202: Map the instruction set feature vector to the feature space to construct an instruction set dependency graph, build an environment constraint rule set based on the software and hardware configuration information in the test environment database, use a deep neural network to fuse the instruction set dependency graph and the environment constraint rule set, and optimize the network parameters through the back propagation algorithm to obtain a test case feature model.

[0078] Optionally, this embodiment first uses a specially designed parser to deeply parse the instruction set architecture file of the target platform. During the parsing process, the core hardware information such as the CPU architecture type (such as ARM, RISC-V, X86, etc.), instruction length (fixed-length instruction or variable-length instruction), the number and bit width of general registers and special registers, and memory access alignment constraints are extracted. For processors of different architectures, corresponding parsing rules are used to ensure the accuracy and completeness of the extracted information.

[0079] This embodiment designs a set of scientific instruction set classification rules to classify and organize the acquired hardware information according to dimensions such as functional attributes, execution characteristics, and resource requirements. For example, instructions are classified into categories such as arithmetic operations, logical operations, data transfer, and control flow according to the operation type; they are classified into categories such as integer operations, floating-point operations, and vector operations according to the execution unit; and they are classified into categories such as load / store and atomic operations according to the memory access characteristics. Through this multi-dimensional classification method, a structured platform instruction feature library is constructed.

[0080] In the feature vector generation stage, this embodiment uses an improved feature encoding algorithm to convert the information in the platform instruction feature library into a numerical vector of fixed dimension. The feature vector not only contains basic instruction attribute information, but also encodes the mutual influence relationship between instructions, such as pipeline conflicts, resource competition and other dynamic characteristics. Through the designed feature extraction strategy, it is ensured that the generated feature vector can fully reflect the instruction set characteristics of the target platform.

[0081] This embodiment innovatively proposes an instruction set dependency modeling method based on feature space mapping. After mapping the instruction set feature vector to a high-dimensional feature space, an instruction set dependency graph is constructed through a graph neural network. In this graph structure, nodes represent different types of instructions, and edges represent dependencies between instructions, including data dependency, control dependency, resource dependency, and other types of relationships. Through the topological structure of the graph, the constraints and optimization space of instruction execution are intuitively displayed.

[0082] In the feature fusion stage, this embodiment designs a multi-level deep neural network structure to effectively integrate the instruction set dependency graph with the environmental constraint rule set. The environmental constraint rule set contains multi-dimensional constraint information such as processor configuration, memory hierarchy, and compilation options. Through the designed attention mechanism, the network can automatically identify and focus on key constraints and generate a more targeted test case feature model.

[0083] This embodiment uses an improved back propagation algorithm to optimize the neural network parameters. Through the designed loss function, multiple objectives such as instruction coverage, constraint satisfaction and test efficiency are comprehensively considered to achieve multi-objective optimization of network parameters. Through multiple rounds of iterative training, the network parameters are continuously adjusted, and finally a feature model that can accurately describe the test requirements is obtained.

[0084] This embodiment effectively solves technical problems in traditional test case generation methods, such as incomplete feature extraction, insufficient constraint processing, and poor feature fusion effects. Through systematic feature extraction and classification methods, comprehensive capture of instruction set features is achieved; innovative graph structure modeling methods accurately express the complex dependencies between instructions; deep learning-based feature fusion mechanisms ensure the accuracy and practicality of the test case feature model. This solution is particularly suitable for compatibility testing scenarios of complex processor architectures, and can effectively guide the precise generation of subsequent test cases, providing reliable technical support for improving test efficiency and coverage.

[0085] In one embodiment of the cross-platform compatibility automated testing method of the present application, see Figure 3 , and can also include the following:

[0086] Step S301: Select a test tool set based on the test scenario, deploy the test tool set to the target test environment, configure the operating parameters and environment variables of the test tools, establish a calling interface and data exchange channel between the test tools, and build a distributed test execution framework;

[0087] Step S302: Use the task priority algorithm to classify the test cases, build a task execution dependency graph based on the test resource utilization and test scenario dependencies, use the load balancing algorithm to allocate resources to the test tasks, and generate a test task scheduling plan that includes execution order, resource quotas, and timeout limits.

[0088] This embodiment first selects a suitable tool combination from the test tool library according to the specific requirements of the test scenario. The test tool set includes different types such as functional testing tools, performance testing tools, coverage analysis tools and monitoring tools. In the tool selection process, the characteristics of the test scenario are fully considered. For example, instruction set compatibility testing requires the selection of instruction-level testing tools, system call testing requires system call tracing tools, and performance testing requires the selection of load stress testing tools.

[0089] This embodiment designs an automated tool deployment mechanism to deploy the selected test tool set to the target test environment. The deployment process includes steps such as tool installation, dependency library configuration, and environment variable setting. According to the characteristics of different tools, corresponding operating parameters are configured, such as test data storage path, log level, sampling frequency, etc. At the same time, call interfaces and data exchange channels between tools are established to achieve information sharing and collaborative work during the test process.

[0090] In the test framework construction phase, this embodiment adopts a distributed architecture design to distribute test tasks to multiple execution nodes for parallel processing. Through the designed master-slave node mechanism, unified scheduling of test tasks and result collection are achieved. The master node is responsible for task distribution and status monitoring, and the slave node is responsible for the execution of specific test cases. Nodes communicate through message queues to ensure the reliability and real-time performance of data transmission.

[0091] This embodiment innovatively proposes a test case grading method based on multi-dimensional indicators. By analyzing factors such as the importance of test cases, execution time, and resource consumption, an improved task priority algorithm is used to grade test cases. Critical function test cases are given higher priority, and performance test cases are dynamically adjusted in priority according to resource requirements.

[0092] In the task scheduling scheme generation stage, this embodiment first builds a task execution dependency graph based on test resource utilization and scenario dependencies. The nodes in the dependency graph represent test tasks, and the edges represent the execution dependencies between tasks. Through the graph analysis algorithm, the critical path and parallel execution opportunities of the tasks are identified. At the same time, the hardware resource limitations of the test environment, such as the number of CPU cores and memory capacity, are considered to ensure the rationality of resource allocation.

[0093] This embodiment uses an improved load balancing algorithm for resource allocation. The algorithm comprehensively considers factors such as the computing power of the node, the current load status, and the network bandwidth to achieve dynamic scheduling of test tasks. By monitoring the resource usage of each node in real time, tasks are migrated and rebalanced when necessary to ensure maximum test efficiency. The test task scheduling plan finally generated specifies in detail the execution order, resource quota, and timeout limit of each test case.

[0094] This embodiment solves technical problems in traditional test execution solutions, such as cumbersome tool deployment, low resource utilization, and unreasonable task scheduling. The automated tool deployment mechanism simplifies the process of setting up the test environment; the distributed test framework significantly improves the parallelism of test execution; and the scientific task classification and scheduling strategy ensures the efficient use of test resources. This solution is particularly suitable for large-scale instruction set compatibility testing scenarios, and can effectively manage and schedule complex test tasks, improve test execution efficiency, and shorten the test cycle. In actual applications, this solution significantly improves the throughput of test execution through reasonable resource allocation and task scheduling, while ensuring the reliability and stability of test results.

[0095] In one embodiment of the cross-platform compatibility automated testing method of the present application, see Figure 4 , and can also include the following:

[0096] Step S401: Start the test task according to the execution order in the scheduling plan, collect performance data in real time through the system monitoring interface, standardize the indicator data of CPU occupancy, memory usage, disk read and write rate, network transmission rate, and instruction execution frequency, apply the sliding window algorithm to the standardized performance data to construct a time series feature matrix, and calculate the performance indicator sequence according to the preset performance indicator weight;

[0097] Step S402: Use a long short-term memory network to extract features from the system call sequence, construct a training data set containing normal samples, use a contrastive learning method to train the encoder network to extract context features of the system calls, establish a standard behavior pattern based on the extracted context features, continuously update the model parameters through incremental learning, and dynamically optimize the discrimination threshold of the standard behavior pattern.

[0098] Optionally, this embodiment first starts the test tasks in sequence according to the established scheduling scheme. During the task execution process, multi-dimensional performance indicator data is collected in real time through the monitoring interface provided by the system. For CPU occupancy, monitor the utilization and load distribution of each core; for memory usage, track the usage of physical memory and virtual memory; for disk I / O, collect read and write rates and queue depth; for network performance, monitor packet throughput and latency; for instruction execution, count the execution frequency and time distribution of various instructions.

[0099] This embodiment designs a special data standardization processing flow to convert performance indicators of different dimensions into a unified standard distribution. Through methods such as maximum and minimum value normalization or Z-score standardization, the comparability of various indicators is ensured. An improved sliding window algorithm is used to extract time series features from the standardized performance data. The window size is dynamically adjusted according to the changing characteristics of the performance indicators, which not only ensures the time series continuity of the data, but also captures the characteristics of performance fluctuations.

[0100] This embodiment innovatively designs a weight-based performance indicator fusion method. The weight coefficient of each indicator is preset according to the sensitivity of different test scenarios to the performance indicator. For example, in computing-intensive tests, CPU-related indicators are given higher weights; in I / O-intensive tests, the weights of disk and network indicators are increased accordingly. Through weighted calculation, an indicator sequence reflecting the overall performance status of the system is generated.

[0101] In the system call sequence analysis phase, this embodiment uses a long short-term memory network (LSTM) for feature extraction. The structural design of the LSTM network fully considers the temporal dependency characteristics of the system call sequence and effectively captures long-term dependencies through a gating mechanism. The input layer of the network processes the original system call sequence, the hidden layer extracts temporal features, and the output layer generates feature vectors.

[0102] This embodiment proposes a context feature extraction method based on contrastive learning. First, a training data set containing a large number of normal system call sequences is constructed, and the sample diversity is expanded through data enhancement technology. During the training process, a contrast loss function is used to make the feature representations of similar contexts close and the feature representations of different contexts far apart, so as to learn more discriminative feature representations.

[0103] In the process of establishing the standard behavior pattern, this embodiment constructs a multi-dimensional behavior feature space based on the extracted context features. Through cluster analysis, the typical pattern of normal behavior is identified. The incremental learning strategy is adopted to allow the model to continuously absorb new normal behavior samples during operation and dynamically update the model parameters. At the same time, an adaptive discrimination threshold optimization mechanism is designed to dynamically adjust the discrimination boundary of the behavior pattern according to the false alarm rate and missed alarm rate monitored in real time.

[0104] This embodiment solves technical problems in traditional performance monitoring methods such as incomplete data collection, insufficient feature extraction, and fixed behavior patterns. Through multi-dimensional performance data collection and standardized processing, comprehensive monitoring of system status is achieved; the feature extraction method based on deep learning effectively captures the deep characteristics of the system call sequence; the incremental learning mechanism ensures the dynamic adaptability of the behavior pattern. This solution is particularly suitable for compatibility testing scenarios in complex software and hardware environments. It can promptly detect performance anomalies and behavioral deviations, and provide strong support for subsequent problem location. In practical applications, this solution significantly improves the observability of the test process and the accuracy of anomaly detection through precise performance monitoring and behavior analysis.

[0105] In one embodiment of the cross-platform compatibility automated testing method of the present application, see Figure 5 , and can also include the following:

[0106] Step S501: convert the system call sequence into a call frequency matrix within a time window, extract the call timing relationship, parameter distribution characteristics, and return value pattern to construct a feature vector, use the fault detection model to calculate the similarity score between the feature vector and the standard behavior pattern, determine the abnormality of the system call sequence according to the similarity score, and generate a behavior feature description including abnormal call type, abnormal occurrence time, and abnormality degree;

[0107] Step S502: Perform time series decomposition on the performance indicator sequence to extract trend items and periodic items, construct an autoregressive model to predict the changing trend of the performance indicator, calculate the performance baseline value based on the exponentially weighted moving average algorithm, set an adaptive threshold interval based on the predicted trend, and dynamically adjust the upper and lower limits of the threshold according to the fluctuation range of the performance indicator.

[0108] Optionally, this embodiment first divides the continuously collected system call sequence into time windows, calculates the frequency of occurrence of different system calls in each window, and forms a time series feature matrix. In the feature extraction process, the focus is on the time series dependency between system calls, such as the order of calls, time interval, etc.; at the same time, the numerical distribution, type distribution and length distribution of system call parameters are analyzed; in addition, the return value mode of the system call is also extracted, including information such as the return value type and error code distribution.

[0109] This embodiment designs a multi-dimensional feature vector construction method to effectively integrate the extracted timing relationship, parameter features and return value pattern. An improved feature encoding algorithm is used to ensure that the weights of features of different dimensions are reasonably distributed. The similarity score between the feature vector and the pre-established standard behavior pattern is calculated through the fault detection model, and the score calculation process takes into account the importance weights of different feature dimensions.

[0110] This embodiment innovatively proposes an abnormality assessment method based on similarity scores. According to the degree of deviation of the scores, the abnormalities are divided into multiple levels, and the specific type, occurrence time and abnormality degree of the abnormal system call are recorded. This information is organized into a structured behavioral feature description to facilitate subsequent analysis and processing.

[0111] In the performance indicator analysis phase, this embodiment uses time series decomposition technology to decompose the performance indicator sequence into trend items, period items, and random items. The trend item reflects the long-term change trend of the performance indicator, and the period item captures the periodic fluctuation characteristics of the performance indicator. Through decomposition, the changing rules of the performance indicator can be understood more accurately.

[0112] This embodiment constructs an autoregressive model to predict the changing trend of performance indicators. The model takes into account the temporal correlation of historical data and continuously updates the prediction results through a sliding window method. The prediction results are used to guide the calculation of performance baselines and the setting of thresholds, thereby improving the accuracy of anomaly detection.

[0113] This embodiment uses an improved exponentially weighted moving average algorithm to calculate the performance baseline value. The algorithm can adaptively adjust the weight parameters, giving a higher weight to recent performance data while retaining the influence of historical data. Based on the calculated performance baseline and combined with the predicted change trend, a dynamic threshold interval is set.

[0114] In terms of threshold adjustment, this embodiment designs an adaptive threshold adjustment mechanism. According to the real-time fluctuation of performance indicators, the upper and lower limits of the threshold are dynamically adjusted. When the performance indicators fluctuate greatly, the threshold interval is appropriately relaxed; when the performance indicators are relatively stable, the threshold interval is narrowed to improve the detection sensitivity. This dynamic adjustment strategy can effectively reduce the false alarm rate and improve the accuracy of anomaly detection.

[0115] This embodiment solves technical problems in traditional anomaly detection methods, such as incomplete feature extraction, fixed threshold settings, and high false alarm rates. Through multi-dimensional feature analysis, accurate characterization of system behavior is achieved; the dynamic threshold adjustment mechanism improves the adaptability of anomaly detection; structured anomaly description facilitates subsequent fault location and analysis. This solution is particularly suitable for compatibility testing scenarios of complex systems, and can detect system call anomalies and performance degradation problems in a timely and accurate manner. In practical applications, this solution significantly improves the accuracy and reliability of anomaly detection through sophisticated feature analysis and flexible threshold adjustment, providing strong support for system stability assessment.

[0116] In one embodiment of the cross-platform compatibility automated testing method of the present application, see Figure 6 , and can also include the following:

[0117] Step S601: Establish a spatiotemporal correlation map of abnormal behavior characteristics, map the performance baseline threshold to a multi-dimensional evaluation index, construct a scoring dimension including function test pass rate, interface response delay, resource utilization efficiency, system stability duration, and error recovery capability, calculate the relative importance of each scoring dimension based on the hierarchical analysis method, and generate standardized quantitative indicators for the scoring dimension;

[0118] Step S602: Extract the complexity index and compatibility constraints of the instruction set characteristics, construct an initial weight allocation model based on the instruction set complexity, modify the initial weight according to the system call frequency distribution and resource consumption characteristics in the standard behavior pattern, use an adaptive learning algorithm to continuously optimize the weight coefficient, and generate a dynamic weight matrix that reflects the platform characteristics.

[0119] Optionally, this embodiment first constructs a spatiotemporal correlation graph of abnormal behavior features, and performs correlation analysis on abnormal behavior features that appear at different time points and locations. The nodes in the graph represent abnormal events, and the edges represent the correlation between events, including information such as temporal dependency, causal relationship, and spatial distribution. Through graph analysis, the propagation path and impact range of abnormal behavior can be effectively identified.

[0120] This embodiment innovatively designs a multi-dimensional evaluation system for performance baselines. In terms of functional test pass rate, the execution results of various test cases are counted; in terms of interface response latency, the response time distribution of key interfaces is monitored; in terms of resource utilization efficiency, the use of computing resources is evaluated; in terms of system stability duration, the continuous operation time of the system is recorded; in terms of error recovery capability, the time and resources required for the system to recover from a faulty state to a normal state are analyzed.

[0121] This embodiment uses the hierarchical analysis method to determine the weight of each scoring dimension. By establishing a judgment matrix, each dimension is compared pairwise, and the characteristic vector is calculated as the weight value. In the weight calculation process, the characteristics of different test scenarios are fully considered. For example, the performance test scenario focuses more on resource utilization efficiency, and the stability test scenario focuses more on the system stability duration.

[0122] In the instruction set feature analysis phase, this embodiment proposes a complexity index system, including dimensions such as the number of instruction types, operand combinations, and execution path complexity. At the same time, the compatibility constraints of the instruction set are extracted, such as instruction format requirements, operand restrictions, execution conditions, etc. These features are used to construct the initial weight allocation model.

[0123] This embodiment designs a weight correction mechanism based on system call characteristics. By analyzing the frequency distribution of system calls in standard behavior patterns, key system call sequences are identified; by statistically analyzing resource consumption characteristics, resource overhead of different operations is evaluated. This information is used to fine-tune the initial weights.

[0124] This embodiment uses an adaptive learning algorithm to continuously optimize the weight coefficients. The algorithm monitors the system operation status, collects actual execution data, and dynamically adjusts the weight coefficients. When new behavior patterns or performance characteristics are detected, the algorithm can automatically update the weight matrix to ensure the accuracy of the evaluation results.

[0125] In the process of generating the weight matrix, this embodiment particularly considers the influence of platform characteristics. The instruction execution characteristics, resource management strategies, performance bottlenecks and other factors of different hardware platforms will affect the allocation of weights. By establishing a platform characteristic model, the platform adaptation of the weight matrix is ​​achieved.

[0126] This embodiment solves technical problems in traditional evaluation methods such as single indicators, fixed weights, and poor platform adaptability. Through a multi-dimensional evaluation system, a comprehensive evaluation of system performance is achieved; a dynamic weight adjustment mechanism improves the accuracy of the evaluation results; and platform-adaptive feature modeling ensures the versatility of the evaluation method. This solution is particularly suitable for compatibility testing scenarios of heterogeneous computing platforms, and can accurately evaluate system performance and stability on different platforms. In practical applications, this solution significantly improves the accuracy and reliability of performance evaluation through precise feature extraction and flexible weight adjustment, providing effective guidance for system optimization.

[0127] In one embodiment of the cross-platform compatibility automated testing method of the present application, see Figure 7 , and can also include the following:

[0128] Step S701: construct a mapping rule base between abnormal features and scoring dimensions, convert the performance baseline threshold into a performance compliance index, calculate the impact factor of abnormal behavior on each scoring dimension based on the mapping rule base, generate a multidimensional scoring vector in combination with the performance compliance index, and obtain a scoring matrix reflecting the global characteristics of the test results through matrix operations;

[0129] Step S702: Perform a dot product operation on the test result scoring matrix and the dynamic weight matrix to obtain a weighted scoring value, use a piecewise function to map the weighted scoring value to a preset compatibility level range, construct a test report based on the compatibility level that includes test coverage statistics, performance fluctuation analysis, and stability assessment, and perform regression testing on key indicators in the test results to verify the reliability of the test conclusions.

[0130] Optionally, this embodiment first establishes a complete rule base for mapping abnormal features to scoring dimensions. The rule base defines the mapping relationship between the impact of different types of abnormal behaviors on each scoring dimension, including the impact of functional defects on test pass rate, the impact of performance bottlenecks on response latency, and the impact of resource leakage on system stability. The rule base adopts a hierarchical structure and supports dynamic updating and expansion of rules.

[0131] This embodiment uses an algorithm to convert the performance baseline threshold into a standardized performance index. The conversion process takes into account the characteristics of different performance indicators, using a direct normalization method for linear indicators and a piecewise function mapping for nonlinear indicators. The performance index reflects the degree of compliance between the actual performance and the expected target.

[0132] This embodiment innovatively proposes a scoring calculation method based on impact factors. The influence scope and degree of abnormal behavior are queried through the rule base, and the impact factors of each scoring dimension are calculated in combination with the frequency and duration of the abnormality. These impact factors are combined with the performance compliance index to form a multi-dimensional scoring vector.

[0133] In the scoring matrix generation stage, this embodiment adopts an improved matrix operation method to organize the multi-dimensional scoring vectors in time series and construct a scoring matrix that reflects the entire test process. Each row in the matrix represents the scoring status at a time point, and each column represents the change trend of a scoring dimension.

[0134] This embodiment designs a special dot product operation strategy to operate the score matrix and the dynamic weight matrix to obtain a comprehensive weighted score value. The continuity of the time dimension is considered during the operation, and the local score is calculated by sliding window method, and then integrated to obtain the global score.

[0135] This embodiment uses an adaptive piecewise function to map the weighted score value to a predefined compatibility level interval. The design of the piecewise function is based on the statistical analysis of a large amount of test data to ensure the rationality and differentiation of the level division. Different levels reflect the comprehensive level of the system in terms of functional integrity, performance, and stability.

[0136] In the test report generation phase, this embodiment constructs a multi-level report structure. In terms of test coverage statistics, the execution status and coverage of test cases are recorded in detail; in terms of performance fluctuation analysis, the changing trends and abnormal points of key performance indicators are displayed; in terms of stability evaluation, the continuity and reliability of system operation are summarized.

[0137] This embodiment specially designs a regression test verification mechanism. Repeated tests are performed on key indicators in the test results to verify the reproducibility and stability of the test conclusions. The regression test adopts an intelligent sampling strategy, focusing on abnormal indicators and boundary conditions to improve verification efficiency.

[0138] This embodiment solves technical problems in traditional test evaluation, such as incomplete result analysis, inconsistent scoring standards, and low credibility of conclusions. Through a regularized mapping system, a quantitative assessment of the impact of abnormal behavior is achieved; a dynamic scoring calculation mechanism provides an objective measure of test results; and a systematic regression verification process ensures the reliability of test conclusions. This solution is particularly suitable for compatibility testing scenarios of complex systems, and can comprehensively evaluate various indicators of the system and give reliable test conclusions. In practical applications, this solution significantly improves the credibility and availability of test results through precise scoring calculations and strict verification processes, providing strong support for system quality assessment.

[0139] In order to improve the comprehensiveness and accuracy of the test and achieve more efficient compatibility evaluation, the present application provides an embodiment of a cross-platform compatibility automation testing device for implementing all or part of the cross-platform compatibility automation testing method, see Figure 8 The cross-platform compatibility automated testing device specifically includes the following contents:

[0140] The scheduling scheme determination module 10 is used to scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, and the test case generator adaptively creates a functional test set and a performance test set according to the execution constraint conditions of the instruction set features, configures the automated testing tool to deploy a test execution framework, and generates a test task scheduling scheme based on the test execution framework;

[0141] The abnormal behavior analysis module 20 is used to execute the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collect the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, use a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0142] The compatibility processing module 30 is used to input the abnormal behavior characteristics and the performance baseline threshold into the test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

[0143] From the above description, it can be seen that the cross-platform compatibility automation testing device provided in the embodiment of the present application can extract instruction set features by scanning the target platform architecture specification file, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, and generate a test task scheduling plan based on the test execution framework; input abnormal behavior characteristics and performance baseline thresholds into the test result analyzer, construct a scoring dimension including functional completeness, performance compliance rate and stability indicators, map abnormal behavior characteristics and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, and generate a test report based on the compatibility level, thereby improving the comprehensiveness and accuracy of the test.

[0144] From the hardware level, in order to improve the comprehensiveness and accuracy of the test and achieve more efficient compatibility evaluation, the present application provides an embodiment of an electronic device for implementing all or part of the content of the cross-platform compatibility automated testing method, and the electronic device specifically includes the following content:

[0145] Processor, memory, communication interface and bus; wherein the processor, memory and communication interface communicate with each other through the bus; the communication interface is used to realize information transmission between the cross-platform compatibility automation test device and related devices such as the core business system, user terminal and related database; the logic controller can be a desktop computer, a tablet computer and a mobile terminal, etc., but the present embodiment is not limited thereto. In the present embodiment, the logic controller can be implemented with reference to the embodiment of the cross-platform compatibility automation test method and the embodiment of the cross-platform compatibility automation test device in the embodiment, and the contents thereof are incorporated herein, and the repeated parts are not repeated.

[0146] It is understandable that the user terminal may include a smart phone, a tablet electronic device, a network set-top box, a portable computer, a desktop computer, a personal digital assistant (PDA), a vehicle-mounted device, a smart wearable device, etc. Among them, the smart wearable device may include smart glasses, a smart watch, a smart bracelet, etc.

[0147] In practical applications, part of the cross-platform compatibility automated testing method can be performed on the electronic device side as described above, or all operations can be completed in the client device. The specific selection can be based on the processing capability of the client device and the limitations of the user's usage scenario. This application does not limit this. If all operations are completed in the client device, the client device may also include a processor.

[0148] The client device may have a communication module (i.e., a communication unit) that can communicate with a remote server to achieve data transmission with the server. The server may include a server on the task scheduling center side, and other implementation scenarios may also include a server on an intermediate platform, such as a server on a third-party server platform that has a communication link with the task scheduling center server. The server may include a single computer device, or a server cluster consisting of multiple servers, or a server structure of a distributed device.

[0149] Fig. 9 FIG. 9 is a schematic block diagram of the system structure of the electronic device 9600 according to an embodiment of the present application. Fig. 9 As shown, the electronic device 9600 may include a central processor 9100 and a memory 9140; the memory 9140 is coupled to the central processor 9100. It is worth noting that Fig. 9 is exemplary; other types of structures may also be used to supplement or replace this structure to implement telecommunication functions or other functions.

[0150] In one embodiment, the cross-platform compatibility automated testing method function may be integrated into the central processing unit 9100. The central processing unit 9100 may be configured to perform the following control:

[0151] Step S101: Scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, the test case generator adaptively creates a functional test set and a performance test set according to the execution constraints of the instruction set features, configure the automated testing tool to deploy a test execution framework, and generate a test task scheduling plan based on the test execution framework;

[0152] Step S102: executing the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collecting the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, using a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0153] Step S103: Input the abnormal behavior characteristics and the performance baseline threshold into the test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

[0154] From the above description, it can be seen that the electronic device provided in the embodiment of the present application extracts instruction set features by scanning the target platform architecture specification file, collects chip platform information to build a test environment database, builds a test case feature model based on the instruction set features and the test environment database, designs a test case generator based on the test case feature model, and generates a test task scheduling plan based on the test execution framework; inputs abnormal behavior characteristics and performance baseline thresholds into the test result analyzer, constructs a scoring dimension including functional completeness, performance compliance rate and stability indicators, maps abnormal behavior characteristics and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculates the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, and generates a test report based on the compatibility level, thereby improving the comprehensiveness and accuracy of the test.

[0155] In another embodiment, the cross-platform compatibility automation testing device can be configured separately from the central processing unit 9100. For example, the cross-platform compatibility automation testing device can be configured as a chip connected to the central processing unit 9100, and the cross-platform compatibility automation testing method function can be implemented through the control of the central processing unit.

[0156] like Fig. 9 As shown, the electronic device 9600 may also include: a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is worth noting that the electronic device 9600 does not necessarily have to include Fig. 9 In addition, the electronic device 9600 may also include Fig. 9 For components not shown, reference may be made to the prior art.

[0157] like Fig. 9 As shown, the central processing unit 9100 is sometimes also referred to as a controller or an operation control, and may include a microprocessor or other processor device and / or logic device, which receives input and controls the operation of various components of the electronic device 9600.

[0158] The memory 9140 may be, for example, one or more of a cache, a flash memory, a hard drive, a removable medium, a volatile memory, a non-volatile memory or other suitable devices. The above-mentioned information related to the failure may be stored, and a program for executing the relevant information may also be stored. The CPU 9100 may execute the program stored in the memory 9140 to implement information storage or processing, etc.

[0159] The input unit 9120 provides input to the central processing unit 9100. The input unit 9120 is, for example, a key or a touch input device. The power supply 9170 is used to provide power to the electronic device 9600. The display 9160 is used to display display objects such as images and texts. The display may be, for example, an LCD display, but is not limited thereto.

[0160] The memory 9140 may be a solid-state memory, such as a read-only memory (ROM), a random access memory (RAM), a SIM card, etc. It may also be a memory that saves information even when the power is off, can be selectively erased, and is provided with more data, examples of which are sometimes referred to as EPROMs, etc. The memory 9140 may also be some other type of device. The memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application / function storage unit 9142, which is used to store application programs and function programs or processes for executing the operation of the electronic device 9600 through the central processor 9100.

[0161] The memory 9140 may also include a data storage unit 9143 for storing data, such as contacts, digital data, pictures, sounds, and / or any other data used by the electronic device. The driver storage unit 9144 of the memory 9140 may include various drivers for communication functions of the electronic device and / or for executing other functions of the electronic device (such as messaging applications, address book applications, etc.).

[0162] The communication module 9110 is a transmitter / receiver that sends and receives signals via the antenna 9111. The communication module 9110 (transmitter / receiver) is coupled to the central processor 9100 to provide input signals and receive output signals, which may be the same as the case of a conventional mobile communication terminal.

[0163] Based on different communication technologies, multiple communication modules 9110 may be provided in the same electronic device, such as a cellular network module, a Bluetooth module and / or a wireless LAN module. The communication module 9110 (transmitter / receiver) is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130 to provide an audio output via the speaker 9131 and receive an audio input from the microphone 9132, thereby realizing a common telecommunication function. The audio processor 9130 may include any suitable buffer, decoder, amplifier, etc. In addition, the audio processor 9130 is also coupled to the central processor 9100, so that recording can be performed on the local machine through the microphone 9132, and the sound stored on the local machine can be played through the speaker 9131.

[0164] The embodiments of the present application also provide a computer-readable storage medium capable of implementing all the steps of the cross-platform compatibility automated testing method in the above-mentioned embodiment in which the execution subject is a server or a client. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, all the steps of the cross-platform compatibility automated testing method in the above-mentioned embodiment in which the execution subject is a server or a client are implemented. For example, when the processor executes the computer program, the following steps are implemented:

[0165] Step S101: Scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, the test case generator adaptively creates a functional test set and a performance test set according to the execution constraints of the instruction set features, configure the automated testing tool to deploy a test execution framework, and generate a test task scheduling plan based on the test execution framework;

[0166] Step S102: executing the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collecting the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, using a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0167] Step S103: Input the abnormal behavior characteristics and the performance baseline threshold into the test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

[0168] From the above description, it can be seen that the computer-readable storage medium provided in the embodiment of the present application extracts instruction set features by scanning the target platform architecture specification file, collects chip platform information to build a test environment database, builds a test case feature model based on the instruction set features and the test environment database, designs a test case generator based on the test case feature model, and generates a test task scheduling plan based on the test execution framework; inputs abnormal behavior characteristics and performance baseline thresholds into the test result analyzer, constructs a scoring dimension including functional completeness, performance compliance rate and stability indicators, maps abnormal behavior characteristics and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculates the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, and generates a test report based on the compatibility level, thereby improving the comprehensiveness and accuracy of the test.

[0169] The embodiments of the present application also provide a computer program product capable of implementing all steps of the cross-platform compatibility automated testing method in the above embodiments, where the execution subject is a server or a client. When the computer program / instruction is executed by a processor, the steps of the cross-platform compatibility automated testing method are implemented. For example, the computer program / instruction implements the following steps:

[0170] Step S101: Scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, the test case generator adaptively creates a functional test set and a performance test set according to the execution constraints of the instruction set features, configure the automated testing tool to deploy a test execution framework, and generate a test task scheduling plan based on the test execution framework;

[0171] Step S102: executing the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collecting the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, using a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence;

[0172] Step S103: Input the abnormal behavior characteristics and the performance baseline threshold into the test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

[0173] From the above description, it can be seen that the computer program product provided in the embodiment of the present application extracts instruction set features by scanning the target platform architecture specification file, collects chip platform information to build a test environment database, builds a test case feature model based on the instruction set features and the test environment database, designs a test case generator based on the test case feature model, and generates a test task scheduling plan based on the test execution framework; inputs abnormal behavior characteristics and performance baseline thresholds into the test result analyzer, constructs a scoring dimension including functional completeness, performance compliance rate and stability indicators, maps abnormal behavior characteristics and performance baseline thresholds to the scoring dimension to generate a test result scoring matrix, calculates the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, and generates a test report based on the compatibility level, thereby improving the comprehensiveness and accuracy of the test.

[0174] It should be understood by those skilled in the art that embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0175] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (apparatus), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0176] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0177] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0178] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A cross-platform compatibility automated testing method, characterized in that: The method comprises: Scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, the test case generator adaptively creates functional test sets and performance test sets based on the execution constraints of the instruction set features, configure the automated testing tool to deploy a test execution framework, and generate a test task scheduling plan based on the test execution framework; Execute the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collect the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, train the fault detection model with a deep learning algorithm to establish a standard behavior pattern of the system call trajectory, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trajectory to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence; The abnormal behavior characteristics and the performance baseline threshold are input into the test result analyzer, and a scoring dimension including functional integrity, performance compliance rate and stability index is constructed. An initial weight coefficient is assigned to the scoring dimension according to the instruction set characteristics. The initial weight coefficient is dynamically adjusted based on the standard behavior pattern to obtain an optimized weight coefficient. The abnormal behavior characteristics and the performance baseline threshold are mapped to the scoring dimension to generate a test result scoring matrix. The weighted average of the test result scoring matrix and the optimized weight coefficient is calculated as the compatibility level. A test report is generated based on the compatibility level and regression verification is performed.

2. The cross-platform compatibility automated testing method according to claim 1, characterized in that: The scanning target platform architecture specification file extracts instruction set features, collects chip platform information to build a test environment database, builds a test case feature model based on the instruction set features and the test environment database, designs a test case generator based on the test case feature model, and the test case generator adaptively creates a functional test set and a performance test set according to the execution constraint conditions of the instruction set features, including: Parsing the instruction set architecture file of the target platform to obtain hardware information such as CPU architecture type, instruction length, register specification, and memory alignment requirement, classifying and arranging the obtained hardware information based on preset instruction set classification rules to obtain a platform instruction feature library, and generating an instruction set feature vector according to the platform instruction feature library; The instruction set feature vector is mapped to the feature space to construct an instruction set dependency graph, and an environmental constraint rule set is constructed based on the software and hardware configuration information in the test environment database. A deep neural network is used to fuse the features of the instruction set dependency graph and the environmental constraint rule set, and a test case feature model is obtained by optimizing network parameters through a back-propagation algorithm.

3. The cross-platform compatibility automated testing method according to claim 1, characterized in that: The configuration of the automated testing tool to deploy a test execution framework and generating a test task scheduling scheme based on the test execution framework include: Select a test tool set based on the test scenario, deploy the test tool set to the target test environment, configure the running parameters and environment variables of the test tools, establish a calling interface and data exchange channel between the test tools, and build a distributed test execution framework; A task priority algorithm is used to grade test cases, a task execution dependency graph is built based on test resource utilization and test scenario dependencies, a load balancing algorithm is used to allocate resources to test tasks, and a test task scheduling plan is generated that includes execution order, resource quotas, and timeout limits.

4. The cross-platform compatibility automated testing method according to claim 1, characterized in that: The function test set and the performance test set are executed on the target platform according to the test task scheduling scheme, the CPU usage, memory occupancy and interface response time of the target platform are collected to build a performance indicator sequence, a fault detection model is trained by a deep learning algorithm to establish a standard behavior pattern of a system call trace, and the fault detection model continuously optimizes the standard behavior pattern by online learning, including: Start the test task according to the execution order in the scheduling plan, collect performance data in real time through the system monitoring interface, standardize the indicator data of CPU occupancy, memory usage, disk read and write rate, network transmission rate, and instruction execution frequency, apply the sliding window algorithm to the standardized performance data to construct a time series feature matrix, and calculate the performance indicator sequence according to the preset performance indicator weights; A long short-term memory network is used to extract features of system call sequences, and a training dataset containing normal samples is constructed. The encoder network is trained using a contrastive learning method to extract contextual features of system calls. A standard behavior pattern is established based on the extracted contextual features. The model parameters are continuously updated through incremental learning, and the discrimination threshold of the standard behavior pattern is dynamically optimized.

5. The cross-platform compatibility automated testing method according to claim 1, characterized in that: The analyzing the system call trace to identify abnormal behavior characteristics and establishing a dynamically adaptive performance baseline threshold based on the performance indicator sequence includes: Convert the system call sequence into a call frequency matrix within a time window, extract the call timing relationship, parameter distribution characteristics, and return value pattern to construct a feature vector, use the fault detection model to calculate the similarity score between the feature vector and the standard behavior pattern, determine the abnormality of the system call sequence based on the similarity score, and generate a behavioral feature description including the abnormal call type, abnormal occurrence time, and abnormality degree; The performance indicator sequence is decomposed into time series to extract trend items and periodic items, an autoregressive model is constructed to predict the changing trend of the performance indicators, the performance baseline value is calculated based on the exponentially weighted moving average algorithm, an adaptive threshold interval is set in combination with the predicted trend, and the upper and lower limits of the threshold are dynamically adjusted according to the fluctuation range of the performance indicators.

6. The cross-platform compatibility automated testing method according to claim 1, characterized in that: The step of inputting the abnormal behavior characteristics and the performance baseline threshold into a test result analyzer, constructing a scoring dimension including functional integrity, performance compliance rate, and stability index, allocating an initial weight coefficient to the scoring dimension according to the instruction set characteristics, and dynamically adjusting the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient includes: Establish a spatiotemporal correlation map of abnormal behavior characteristics, map the performance baseline threshold to a multi-dimensional evaluation index, construct a scoring dimension including functional test pass rate, interface response delay, resource utilization efficiency, system stability duration, and error recovery capability, calculate the relative importance of each scoring dimension based on the hierarchical analysis method, and generate standardized quantitative indicators for the scoring dimension; The complexity indicators and compatibility constraints of the instruction set characteristics are extracted, and an initial weight allocation model based on the instruction set complexity is constructed. The initial weights are modified according to the system call frequency distribution and resource consumption characteristics in the standard behavior pattern, and the weight coefficients are continuously optimized using an adaptive learning algorithm to generate a dynamic weight matrix that reflects the platform characteristics.

7. The cross-platform compatibility automated testing method according to claim 6, characterized in that: The mapping of the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculating a weighted average of the test result scoring matrix and the optimized weight coefficient as a compatibility level, generating a test report based on the compatibility level and performing regression verification, includes: Construct a mapping rule base between abnormal features and scoring dimensions, convert the performance baseline threshold into a performance compliance index, calculate the impact factor of abnormal behavior on each scoring dimension based on the mapping rule base, generate a multidimensional scoring vector in combination with the performance compliance index, and obtain a scoring matrix reflecting the global characteristics of the test results through matrix operations; A dot product operation is performed on the test result scoring matrix and the dynamic weight matrix to obtain a weighted scoring value, and a piecewise function is used to map the weighted scoring value to a preset compatibility level range. A test report including test coverage statistics, performance fluctuation analysis, and stability evaluation is constructed based on the compatibility level, and regression testing is performed on key indicators in the test results to verify the reliability of the test conclusions.

8. A cross-platform compatibility automated testing device, characterized in that: The device comprises: A scheduling scheme determination module is used to scan the target platform architecture specification file to extract instruction set features, collect chip platform information to build a test environment database, build a test case feature model based on the instruction set features and the test environment database, design a test case generator based on the test case feature model, and the test case generator adaptively creates a functional test set and a performance test set according to the execution constraints of the instruction set features, configures the automated testing tool to deploy a test execution framework, and generates a test task scheduling scheme based on the test execution framework; An abnormal behavior analysis module is used to execute the functional test set and the performance test set on the target platform according to the test task scheduling scheme, collect the CPU usage, memory occupancy and interface response time of the target platform to build a performance indicator sequence, use a deep learning algorithm to train a fault detection model to establish a standard behavior pattern of a system call trace, the fault detection model continuously optimizes the standard behavior pattern through online learning, analyzes the system call trace to identify abnormal behavior characteristics, and establishes a dynamically adaptive performance baseline threshold based on the performance indicator sequence; A compatibility processing module is used to input the abnormal behavior characteristics and the performance baseline threshold into a test result analyzer, construct a scoring dimension including functional integrity, performance compliance rate and stability indicators, assign an initial weight coefficient to the scoring dimension according to the instruction set characteristics, dynamically adjust the initial weight coefficient based on the standard behavior pattern to obtain an optimized weight coefficient, map the abnormal behavior characteristics and the performance baseline threshold to the scoring dimension to generate a test result scoring matrix, calculate the weighted average of the test result scoring matrix and the optimized weight coefficient as the compatibility level, generate a test report based on the compatibility level and perform regression verification.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps of the cross-platform compatibility automated testing method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the cross-platform compatibility automated testing method described in any one of claims 1 to 7 are implemented.

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