Diversified configurable embedded system boot loading method and device and storage medium

Abstract

The invention discloses a diversified configurable embedded system boot loading method, which supports a multifunctional mode and a quick start mode, and the multifunctional mode comprises four operation stages: (1) executing first relocation, establishing a high-level language operation environment, and operating a hardware debugging user interface in a context without a system memory; (2) carrying out system memory initialization and secondary relocation, and moving an operating environment to a system memory; (3) starting the kernel of the mini operating system, wherein various advanced characteristics are supported in the starting stage; and (4) loading and starting the target operating system. And directly loading the real-time application after hardware initialization is completed in the quick start mode. According to the method, the running defects of a traditional boot loader are overcome, an independent debugging stage independent of a memory is provided to complete diagnosis and testing of hardware, the application requirements of different scenes are met through dynamic configuration, and the application prospect is wide. In addition, the invention also discloses a system boot loading device and a storage medium.

Description

Technical Field

[0001] The present invention relates to the technical field of computer bottom layer operation and embedded system, and in particular to a boot loading method, device and storage medium of a diversified configurable embedded system. Background Art

[0002] The boot loader is a key component for the startup and operation of embedded systems. When the system starts, the boot loader is responsible for initializing hardware devices such as the processor, memory, and peripherals to ensure that the system is in normal working condition. In addition, it also needs to read the operating system image from the storage device, load it into the memory, and start the target operating system.

[0003] Secondly, an efficient and configurable boot loader can provide flexible operating system options. In some cases, an embedded system may need to support multiple operating systems or different boot modes. By providing boot options, the boot loader allows users to select different operating systems or boot modes as needed, thereby meeting diverse application requirements.

[0004] Furthermore, the boot loader also has a firmware upgrade mechanism, which is crucial for the maintenance and upgrade of embedded systems. Through the boot loader, the system can easily update and upgrade the firmware to support new functions, fix vulnerabilities or improve system performance. This mechanism ensures the continuous evolution and adaptability of embedded systems.

[0005] In addition, the bootloader also plays an important role in the integrity check of the embedded system. It manages the system image and checks and ensures the security of software updates. This is important for preventing malware attacks and maintaining system stability.

[0006] Finally, an efficient and configurable boot loader helps reduce the development and maintenance costs of embedded systems. By optimizing the system startup and operation process, it reduces resource consumption and failure rate, and improves system reliability and stability. At the same time, flexible configuration options enable developers to more easily customize and optimize the system to meet specific application requirements.

[0007] Boot loaders used in embedded systems are traditionally divided into two stages: low-level language stage and high-level language stage. The low-level language stage is usually written in assembly language. This stage mainly uses the instruction affinity of assembly language to complete some low-level hardware initialization work. The most important task is to initialize the system memory and establish the stack pointer in order to enter the high-level language stage as soon as possible. The second stage is usually completed in a high-level language. The boot loader at this stage can use advanced data structures and algorithms to drive more complex tasks. This stage is mainly responsible for further complete hardware initialization, configuration of the system environment, loading of device drivers, and loading and starting of the operating system.

[0008] Embedded systems are often faced with problems such as wiring complexity and signal interference due to limited area. The wiring complexity mainly comes from the large number of signal transmission lines in embedded systems. These lines are not only numerous, but also often densely arranged, and are easily interfered by external electromagnetic fields and other factors. Signal interference may come from other components inside the system, such as high-frequency circuits or power supplies, or from the external environment, such as lightning, radio waves, etc. All these factors are combined and superimposed, resulting in the fact that the actual access timing required by the on-board memory is not completely consistent with the ideal timing of the simulation results, and usually requires further adjustment; in addition, hardware developers also need a set of test-oriented tools (DFT, design for test) to perform stress tests on the entire memory access space and basic external interfaces. Ideally, the entire test should be completely independent of the object under test, especially the memory itself. Given that the memory configuration link, especially the timing configuration, is usually completed at the assembly language stage in traditional systems, the assembly language's natural coupling characteristics to the processor architecture and the complexity of the instruction set determine that it is impossible to provide a portable, programmable interface at this stage to perform complex hardware debugging functions such as timing adjustment and stress testing.

[0009] The functions of traditional embedded boot loaders are relatively simple, mainly focusing on initializing hardware, booting the operating system or starting applications. However, with the development of technology and the increasing complexity of embedded systems, it is urgent to support more advanced functions and features. Based on the existing differences, porting functions directly from the operating system to the boot loader usually requires a lot of modification and reconstruction work, including redesigning the program structure, adjusting the programming interface, optimizing resource usage, and strengthening security. If the required functions are too complex or rely on specific services provided by the operating system, they cannot be directly ported to the boot loader.

[0010] In addition, the slow startup speed of traditional embedded systems has brought about a series of problems such as poor user experience, low system efficiency, limited application scenarios, and difficult maintenance and upgrades. In many embedded applications, especially those with extremely high real-time requirements (such as industrial automation, medical equipment, aerospace, etc.), fast startup and fast response speed of the system are crucial. Slow startup speed means that there is a long delay from the time the device is turned on to the time it can perform key tasks, which may affect the real-time performance of the entire system. Summary of the invention

[0011] In view of this, one of the purposes of the present invention is to provide an embedded system boot loading method oriented to hardware debugging, so as to solve the problems faced by traditional boot loaders of lacking hardware debugging means and relying on system memory for operation.

[0012] One of the purposes of the present invention is achieved through the following technical solutions:

[0013] The diversified configurable embedded system boot loading method comprises the following steps:

[0014] Phase 1: Initialize the hardware and set up the environment, perform the first relocation with the help of the microprocessor cache and establish the high-level language runtime environment to support running the hardware debugging user interface in the context of unavailable system memory;

[0015] The second stage: perform hardware debugging and solidify the debugged parameters into the flash memory parameter area, perform system memory initialization and second relocation, and move the overall operating environment to the main memory;

[0016] The third stage: in the multi-function mode, the mini operating system kernel is started and used as a part of the boot loader of the present invention to support various complex advanced features in the startup stage; this step will be skipped directly in the fast startup mode;

[0017] Phase 4: Loading and starting the target operating system; Different from the normal loading process of the target system in the multi-function mode, the fast startup mode will perform a special optimization process and load the embedded real-time application in the shortest time.

[0018] Furthermore, in the first stage, the data cache of the processor is locked and mapped to a memory address accessible to the processor to provide a basic environment for the operation of high-level language programs that is independent of the main storage; the data segment required for the operation of the first stage code is moved from the flash memory to the corresponding position of the data cache using the relocation technology, the address of the uninitialized data segment bss in the data cache is located and a clear operation is performed, and finally a stack pointer is established at the top of the data cache.

[0019] Furthermore, the first stage specifically includes the following steps:

[0020] Step S11: starting the embedded system, and the microprocessor starts to load the reset vector fixed in the predetermined address on the directly executable flash memory;

[0021] Step S12: loading the first stage initialization program to complete the initialization of the on-chip cache of the processor; the on-chip cache includes an instruction cache and a data cache;

[0022] Step S13: configure the processor memory management control unit to linearly map the data cache to the processor's accessible space and perform a lock operation to prohibit swapping in and out. After the above steps, the data cache is now equivalent to a high-speed static random read-write memory mounted inside the processor;

[0023] Step S14: Move the data segment from the flash memory to the data cache address space, perform a clear operation on the bss segment of the space (i.e., the first relocation), and establish a stack pointer at the top of the data cache; jump the program pointer to the second-stage address in the flash memory and execute the second-stage code.

[0024] Furthermore, the specific steps of the second phase include:

[0025] In the second stage, the following specific steps are performed:

[0026] Step S21: constructing a hardware debugging user interface that does not rely on the system main memory based on the cache;

[0027] Step S22: Initialize the system memory using the memory parameters obtained by debugging;

[0028] Step S23: Move the data segment and the bss segment from the cache and the flash memory to the system memory respectively, and re-establish the stack pointer at the highest address of the memory, i.e., the second relocation;

[0029] Step S24: moving the code segment from the flash memory to the system memory;

[0030] Step S25: Release the lock and address space mapping for the data cache.

[0031] Furthermore, it is first necessary to formulate the memory layout and data transfer rules of the boot loader at each stage according to the address access space specifications of the processor;

[0032] Furthermore, in the second stage, a locking operation is performed on the data cache and the processor is prohibited from triggering a page fault exception and subsequent data exchange actions with the system memory when data access is missing in the cache. This process depends on the operation interface provided by the processor.

[0033] Furthermore, before the first stage, the memory layout and data transfer rules of the boot loader at each stage need to be formulated according to the address access specifications of the processor.

[0034] Furthermore, in the second stage, a locking operation is performed on the data cache to prohibit the processor from triggering a page fault exception and data exchange actions with the system memory when data is missing from cache access.

[0035] Furthermore, the mini version is streamlined based on the complete operating system, including a minimized kernel and root file system of the operating system, so as to meet the requirement of minimizing the boot time while supporting various advanced features.

[0036] The second object of the present invention is to provide a diversified and configurable embedded system boot loading device, comprising a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the processor implements the above-mentioned method when executing the computer program.

[0037] A third object of the present invention is to provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the method described above when executed by a processor.

[0038] The present invention provides a flexible boot loading method. After the second stage is completed, it will determine whether the current state is a multi-function startup mode or a fast startup mode according to a preset startup mode. This can not only meet the multi-function requirements of modern embedded systems for boot loaders, but also meet the requirements of traditional embedded real-time systems and specific application scenarios for fast startup.

[0039] If the system is currently in multi-function boot mode, it will jump to a streamlined mini operating system, which will serve as an independent stage of the boot loader and provide a series of advanced features that traditional loaders do not have. Due to the limitation of the amount of code, the traditional boot loader has a significant gap compared with the real operating system, whether in terms of the new hardware devices supported or in terms of software functions such as communication protocols and network protocols. For this reason, the present invention introduces a mini operating system and uses it as part of the boot loader. The mini operating system described in the present invention includes a streamlined operating system kernel and a streamlined root file system.

[0040] If the current mode is fast boot, the target operating system kernel will be loaded directly in an optimized boot mode. In this mode, the kernel will be loaded immediately after the CPU subsystem (PLL, DDR) is initialized in the second stage; at the same time, the boot loader will set the kernel to fast boot mode by passing parameters. The operating system kernel booted in this mode will perform a series of startup optimization actions, such as turning off command line output printing, loading a minimum set of drivers and system services, skipping actions with large time complexity overhead such as Loops_per_jeffy calibration through preset values, turning off kernel IP automatic configuration, etc., so as to ensure that the embedded real-time application is loaded with the minimum time cost and respond to real-time events as quickly as possible.

[0041] Beneficial effects of the present invention:

[0042] The method of the present invention solves the defect that the boot loader of the traditional embedded system runs completely based on the system main memory, and provides a debugging stage and debugging interface independent of the system main memory based on the data cache, which can complete the diagnosis and testing of the main memory and other on-chip / board devices; the present invention innovatively introduces the mini system into the boot loading stage, and can provide rich functions that the traditional system does not have in the early stage of system startup; the present invention can meet the different requirements of the boot loader for the two application scenarios of modern non-real-time system and traditional real-time system through configuration, and has a wide range of application and good application prospects.

[0043] Other advantages, objectives and features of the present invention will be described in the following description to some extent, and to some extent, will be obvious to those skilled in the art based on the following examination and study, or can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description and the preceding claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below with reference to the accompanying drawings, in which:

[0045] Figure 1 This is a flowchart of the first stage of the embodiment of the present invention.

[0046] Figure 2 This is a flowchart of the second stage of the embodiment of the present invention.

[0047] Figure 3 This is a flowchart of the fourth stage of the embodiment of the present invention.

[0048] Figure 4 A flowchart for quick startup of an embodiment of the present invention

[0049] Figure 5 Schematic diagram of system composition of an embodiment of the present invention. DETAILED DESCRIPTION

[0050] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments are only for illustrating the present invention, rather than for limiting the protection scope of the present invention.

[0051] The hardware system of the present invention is composed of an embedded microprocessor (CPU), a flash memory chip (supporting on-chip execution, eXecute-In-Place, referred to as XIP) and a memory chip (usually a dynamic random access memory SDRAM, or a double data rate memory DDR).

[0052] Embedded microprocessor: The core component in the embedded system, integrating CPU, memory, input and output interfaces, widely used in various embedded systems. Compared with general-purpose processors, it has the advantages of low power consumption, low cost, customization, and high integration.

[0053] Flash memory chips and on-chip execution: Flash memory chips store the embedded system's boot code, operating system, applications, and other critical data. XIP technology allows the CPU to execute code directly from the flash memory chip without copying it to the system memory to increase the system startup speed. The boot loader can use the XIP function to execute part or all of the boot code directly from the flash memory.

[0054] Memory chip: used to store data and programs during operation. Since the read speed of flash memory chips is relatively slow, loading data and programs into system memory can significantly increase the operating speed of the system. The boot loader initializes the system memory and sets its working parameters (such as clock frequency, delay, etc.) at startup. This chip is also the main working memory for the operating system and application programs.

[0055] The codes involved in the present invention are all position-independent codes (PIC). PIC code is a machine code that allows the code to run correctly at any location in the main memory, regardless of its absolute address. This feature is particularly critical to support the multiple relocations involved in the execution process of the present invention. PIC relies on the following mechanisms to achieve:

[0056] 1. Global Offset Table (GOT): In the implementation of PIC, the compiler creates a GOT at the beginning of each data segment, which contains the address of each global object referenced by the target module. The program indirectly references and modifies global variables through the GOT during runtime, thus ensuring that the relocated data can be loaded and referenced normally by the program;

[0057] 2. Procedure Link Table (PLT): PIC uses the procedure link table to implement delayed binding. When the program calls an external function for the first time, it interacts with the dynamic linker through the PLT and GOT to obtain the actual address of the function and store it in the GOT. Subsequent calls can be made directly through the address in the GOT, thus ensuring that the present invention can call the relocated function and interface from any address.

[0058] Since the boot loader has different address space layouts at different execution stages, it is very important to accurately control the memory layout of the program at different stages. This operation is done through the linker script, including:

[0059] 1. Describe the memory layout: describe how the segments in the input file (such as code segment, data segment, bss segment, stack segment, additional segment, etc.) are mapped to the output file, and the layout of the output file in the system memory;

[0060] 2. Define symbol addresses: Define the symbol table. These symbols play an important role in the startup and running of the program, such as the program entry point (_start), the starting address of the data segment (_data_start), etc.

[0061] In the present invention, the memory layout undergoes two changes during the execution of the program (the first relocation and the second relocation). Relocation refers to the process of moving code from one memory address to another memory address; during the relocation process, the symbol references in the code need to be corrected to ensure that they point to the correct memory address. As mentioned above, symbol correction must be done based on position-independent code (PIC).

[0062] The relationship between relocation and link script is as follows:

[0063] 1. Memory layout and relocation target: The memory layout defined by the link script provides the target address for relocation. Through the link script, it is possible to determine where each segment of the boot loader should be loaded into the address space, as well as the starting address and size of each segment;

[0064] 2. Symbol address and relocation correction: The symbol address defined in the link script is the basis for relocation correction. During the relocation process, the boot loader will refer to the symbol address defined in the link script and correct the symbol references in the code to ensure that they point to the correct memory address;

[0065] 3. Dependency: The implementation of relocation depends on the link script. Without the correct link script definition, the boot loader cannot correctly complete the relocation process, resulting in the program not being able to run normally.

[0066] The following will fully describe the working process of the present invention in conjunction with the accompanying drawings.

[0067] The present invention takes into account the requirements of modern non-real-time systems for diversified functions and the strict requirements of traditional strong real-time systems for the startup time of real-time applications, and supports configuring the boot loader into two different modes: multi-function and fast startup to cope with different usage scenarios. The configuration of the startup mode will be solidified in the flash memory.

[0068] The present invention comprises four stages in the multifunctional mode:

[0069] Phase 1: This phase is written in a low-level language (usually assembly language), and mainly involves hardware initialization and environment settings to ensure that the system can normally transition to the second phase and load the hardware debugging user interface. Figure 1 As shown, the data cache of the processor is locked and mapped to a memory address accessible to the processor to provide a basic environment for the operation of high-level language programs that is independent of the main storage; the data segment required for the operation of the first-stage code is moved from the flash memory to the corresponding position of the data cache using the relocation technology, the address of the uninitialized data segment bss in the data cache is located and cleared, a stack pointer is established at the top of the data cache, and finally the hardware debugging user interface is loaded.

[0070] The first phase includes the following steps:

[0071] Step S11: starting the embedded system and starting to load the reset vector that is fixed in the directly executable flash memory;

[0072] In this embodiment, the startup entry is defined in the link script ENTRY (_start), where _start is the starting point for the boot loader to start.

[0073] Startup mode: After the processor is powered on, it will load the first-stage assembly code at the agreed address of the corresponding startup medium (flash memory in this invention) according to the preset startup mode. The code sets the processor to privileged (Supervisor) mode. This mode is mainly used for programs that the underlying loader and the operating system need to perform privileged operations. It can freely access protected registers and perform privileged operations, thereby realizing refined management of the system.

[0074] Step S12: Complete the initialization of the processor's on-chip cache, which includes an instruction cache and a data cache; the initialization of the data cache mainly involves locking it to disable the swap-in and swap-out functions between the data cache and the main memory. This operation usually requires programming the processor's control registers. These registers contain bit fields that control cache behavior, memory management, and other processor features. The specific operation involves setting specific bit fields to disable the write-back or write-through mode of the data cache.

[0075] Step S13: Configure the processor memory control unit (Memory Management Unit, MMU for short) to linearly map the data cache to the processor's accessible space. MMU is an important component in the processor, which is responsible for converting virtual addresses into physical addresses so that the processor can access data in the memory. MMU uses a page table to achieve the mapping of virtual addresses to physical addresses. The page table is a data structure stored in the memory that records the mapping relationship between virtual addresses and physical addresses. The first stage code of the present invention will set the corresponding virtual address range for the physical address range of the data cache in the page table. When the processor attempts to access these virtual addresses, the MMU will convert them into the corresponding physical addresses of the data cache.

[0076] After the above steps, the data cache has been locked by the processor and cannot be automatically swapped in and out with the system memory, and is mapped to an independent address space accessible to the processor. Accessing this address will directly hit the processor's data cache, which is equivalent to having an additional static memory that can be directly accessed through the address space like accessing system memory.

[0077] Step S14: Execute the first relocation. As mentioned above, the link script has determined the location of the data segment and the bss segment in the static memory simulated by the data cache. At this time, you only need to copy the data segment to the corresponding location in the cache, clear the bss segment, and establish a stack pointer at a reasonable location (usually the top of the data cache) to complete the first relocation.

[0078] Phase 2: In this embodiment, the codes of the second phase are all completed in high-level languages.

[0079] The main functions of this stage:

[0080] 1. Provide a powerful command line tool to provide diagnostic functions for the system's hardware and basic peripherals;

[0081] 2. The operation of this stage is completely independent of the system memory, so the system memory can be initialized and configured, access timing can be tested, and the entire memory can be scanned and stressed.

[0082] 3. Support writing the tested memory access configuration into the configuration parameter area defined by the flash memory.

[0083] like Figure 2As shown in the figure, the second stage includes: building a hardware debugging user interface written in a high-level language that is independent of the system main memory. Based on this user interface, the system main memory can be initialized and the timing configuration can be realized, as well as the entire system main memory space can be fully scanned and stress tested. The second relocation operation is implemented based on the system memory that has completed the initialization and stability test, and the data segment and bss segment contents are copied from the data cache to the system memory, and the stack pointer is re-established in the system memory. Finally, the kernel and root file system of the mini operating system are moved to the system memory and jump to the starting address of the third-stage mini kernel.

[0084] The specific steps of the second phase are as follows:

[0085] Step S21: Initialize system memory:

[0086] 1. Write the memory parameters (including memory timing and chip configuration) stored in the flash parameter area into the memory controller;

[0087] 2. Initialize other registers and control logic related to memory access.

[0088] Step S22: According to the link script, the data segment, bss segment and code segment are moved from the cache and flash memory to the system memory space that has been tested and verified, and the stack pointer is re-established at the highest address of the memory (second relocation); the layout after the second relocation is still defined by the link script:

[0089] 1. Find the addresses of the data and bss segments in the data cache and the addresses in the system memory after relocation; copy the data segment and bss segment from the data cache to the specified addresses in the system memory respectively;

[0090] 2. Reset the stack pointer in system memory;

[0091] Step S23: Unlock the data cache and remove the address space mapping for the data cache in the MMU. At this time, the data cache returns to its normal function and is no longer used as an on-chip static memory;

[0092] Step S24: Get the current startup configuration and decide whether this startup is in multi-function startup mode or fast startup mode. In multi-function startup mode, the execution will jump to the starting address of the mini kernel and start the third stage; the fast startup mode will directly load the target operating system kernel in the context of the second stage. The execution steps of the fast startup mode will be described in detail in the following chapters.

[0093] Step S25: In the multi-function mode, the tailored mini operating system is copied from the flash memory to the system memory and a jump is performed. The specific steps are as follows:

[0094] 1. Copy the mini-kernel to a predefined kernel area in system memory;

[0095] 2. Copy the mini root file system to the predefined file system area in the system memory;

[0096] 3. Write the address of the mini-root file system to the specified register or address (so that the mini-kernel can obtain the file system address);

[0097] 4. Jump to the starting address of the mini kernel and start loading the mini operating system.

[0098] Stage 3: The third stage will jump to a streamlined mini operating system, which will be used as an independent stage of this boot loader to provide a series of advanced features not available in traditional loaders. In fast boot mode, this stage will be skipped.

[0099] Due to the limitation of the amount of code, the traditional boot loader has a significant gap compared with the real operating system in terms of the new hardware devices supported and the software functions such as communication protocols and network protocols. The present invention introduces a mini operating system and uses it as a part of the boot loader. The mini operating system includes a streamlined operating system kernel and a streamlined root file system.

[0100] In this embodiment, the simplified operating system kernel includes the following parts:

[0101] 1. Core functions: Contains the most basic system management and scheduling functions, but compared with the complete operating system kernel, it greatly reduces unnecessary modules and services to reduce size and memory usage;

[0102] 2. Hardware abstraction layer: supports the latest storage devices, network devices, input and output devices, etc. This enables the present invention to run on a variety of hardware platforms to ensure versatility and compatibility;

[0103] 3. Security features: Includes basic security features such as boot verification, secure boot, and early malware detection.

[0104] The simplified root file system consists of the following parts:

[0105] 1. Basic tool set: Contains the tools and configuration files necessary for the startup process, including file system mounting tools, network configuration tools, logging tools, etc. Through these tools, the present invention can perform more complex tasks, such as network startup, remote configuration, etc.;

[0106] 2. Modular design: In order to keep the root file system simple, the present invention adopts modular design. Only necessary modules and files will be included in the root file system, while other non-essential functions can be implemented by dynamic loading;

[0107] 3. Fast startup: Since the main task of the boot loader is to boot the system to a usable state in the shortest time, the root file system should be designed to be as efficient as possible to reduce the startup time.

[0108] With the help of the mini operating system, the present invention will provide a variety of rich advanced features at the startup stage, including but not limited to:

[0109] 1. File system support: This mini operating system can support file system operations, allowing users to access and modify files on the storage medium during the startup process;

[0110] 2. Network support: This mini system includes a complete network driver and protocol stack, which can work in a network environment and realize network startup, remote management and other functions;

[0111] 3. Graphical User Interface: This mini system provides a simple graphical user interface so that users can select and configure more intuitively;

[0112] 4. Advanced Diagnosis and Repair: This mini system contains tools and programs for system diagnosis, repair and recovery, helping users solve problems encountered during the startup process;

[0113] 5. Multiple operating system support: If the system has multiple operating systems installed, this mini system can also provide a selection menu, allowing the user to select the target operating system to be started.

[0114] Stage 4: Load the target operating system in the context of the mini operating system. Figure 3 As shown, the specific steps are as follows:

[0115] Step S41: parse the target kernel image and extract necessary header information and segment information;

[0116] Step S42: Memory allocation. Physical memory pages are allocated to the target kernel and the target root file system, and these pages are linked to form a reserved memory layout; these reserved areas are write-protected using the mechanism provided by the mini-kernel; and the code and data segments in the target kernel image are copied to the reserved memory area.

[0117] Step S43: Record key information, including the entry address of the new kernel and the loading address of the new root file system. This information will be used in the following jumps.

[0118] Step S44: execute a jump to start the new kernel. Move the instruction pointer to jump to the entry address of the new kernel, and use the designated register to transfer the entry address of the root file system to start the target operating system.

[0119] In step S42, the new kernel and the new root file system image will be loaded into the memory that is stored as continuously as possible, and the address of the new root file system will be recorded separately in a special variable for use by subsequent processes; since the new kernel image has a specified entry address, and this memory is being used by the current mini operating system kernel, it is necessary to temporarily allocate memory space for the new kernel image to temporarily store the image, and move its content to the specified entry address before jumping and jumping; if the new root file system is large in size, it can be first stored in a dispersed manner in the memory pages that can be applied for, and then moved and spliced ​​to the destination address before jumping to the new kernel.

[0120] Compared with the multi-function mode, the present invention will prepare the loading parameters of the target operating system based on the second-stage context in the fast startup mode; these parameters will perform a series of optimization settings on the initialization process of the target operating system to increase the startup speed of the target operating system and ensure that the system control is switched to the embedded real-time application with the minimum time cost. These optimization parameters include optimization settings at the operating system level and the application level:

[0121] Optimization settings for the operating system level:

[0122] 1. Disable time-consuming functions of the operating system kernel, such as IP automatic configuration function;

[0123] 2. Turn off console output printing during the operating system startup phase;

[0124] 3. Preset the loops_per_jiffy parameter. loops_per_jiffy (LPJ for short) is an important kernel parameter used to calculate small time delays. When the kernel boots, a delay loop calibration process is performed to calculate the accurate value of LPJ. In fast boot mode, this value will be passed directly from the boot loader to the kernel, and the kernel does not need to perform the delay loop calibration process;

[0125] 4. Load the embedded real-time application at a priority location in the initialization script;

[0126] 5. Keep the root file system in memory to ensure the real-time access of the application to the file system;

[0127] 6. Turn off kernel debug printing;

[0128] 7. Turn off system logging.

[0129] Optimization settings for application level:

[0130] 1. Reduce the application's dependence on system libraries. For strong real-time applications, static linking can be used to reduce the overhead caused by dynamic loader indexing and dynamic loading of library files.

[0131] 2. Use lightweight standard C libraries such as uClibC to reduce file size and reduce the loading overhead of the target application;

[0132] 3. Optimize the application build, using acceleration methods such as space-optimized compilers, hardware soft-decoding instructions, and hardware floating-point vector units.

[0133] In embedded real-time systems, application layer services are usually divided into real-time and non-real-time parts. The real-time part mainly refers to embedded real-time applications, which are key processes for the system to respond to external real-time events, and their startup speed is a key indicator for measuring the real-time performance of the system; the non-real-time part is other background service processes (such as network time synchronization services, etc.), which are not time-critical and can be loaded later. The present invention will use the mini file system solidified in the system in the third stage to complete the fast loading of real-time applications and delay the startup of other non-real-time services.

[0134] In the fast start mode, the following corrections are made to the second stage:

[0135] Step S51: quickly load the target operating system kernel and mini file system from the external medium to the system memory in a DMA manner.

[0136] Step S52: preparing optimization parameters for the kernel to start quickly, such as LPJ value, minimizing serial port printing, etc.

[0137] Step S53: Jump to the fourth stage and start fast loading the target system.

[0138] In the quick start mode, the following corrections are made to the fourth stage:

[0139] Step S61: passing the quick start parameters to the target operating system kernel, and specifying the mini file system as its root file system.

[0140] Step S62: After the target kernel quickly completes initialization, the mini file system is immediately mounted and a simplified initialization script is executed;

[0141] Step S63: Immediately start the embedded real-time application at the priority position of the mini file system initialization script and start responding to external real-time events; at this point, the real-time part is loaded.

[0142] The following steps complete the loading of the non-real-time part:

[0143] Step S64: Mount the target file system to the specified directory of the mini file system;

[0144] Step S65: Switch the root file system from the mini file system to the target file system;

[0145] Step S66: Delay the execution of the non-real-time service of the target file system to complete the booting of the entire system.

[0146] Based on the above design, the boot loader in fast boot mode will optimize the default parameters of the target kernel and perform the root file system switching action. Figure 4 As shown, the target kernel exists in the external medium in the form of a compressed file. First, the target kernel is quickly loaded from the external medium to the system memory by DMA, the decompression operation is performed, the startup parameters are optimized, and the root file system is designated as the mini file system; the kernel completes the fast startup based on the optimized parameters, and immediately executes the initialization script of the mini file system, which directly loads the embedded real-time application solidified to the predetermined position of the external medium into the memory and executes it; the embedded real-time application is statically linked with the dependent library to remove the dependence on the execution environment (the current root file system); finally, the root file system is switched to the target file system and the non-real-time system services therein are loaded.

[0147] Based on the design concept of the above method, the present invention also provides a diversified configurable embedded system boot loading device, including a processor, a memory, and a computer program stored in a medium such as the memory, and the processor implements the above method when executing the computer program. Figure 5 As shown, a feasible implementation scheme includes an embedded microprocessor, which includes a storage management unit, an instruction cache and a data cache. The storage management unit is connected to the instruction cache and data cache inside the microprocessor, and interacts with the system memory and memory outside the microprocessor for data.

[0148] It should be noted that any process or method description in the flowchart or otherwise described herein may be understood to represent a module, fragment or portion of a code comprising one or more executable instructions for implementing steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations, in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present invention belong.

[0149] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute the instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic devices), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, then editing, interpreting or processing in other suitable ways if necessary, and then storing it in a computer memory.

[0150] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0151] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0152] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium. The above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0153] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the present invention.

Claims

1. A boot loading method for a diversified and configurable embedded system, characterized in that: The method comprises the following steps: Phase 1: Initialize the hardware and set up the environment. Establish the high-level language operating environment and perform the first relocation without relying on system memory to ensure that the system can normally transition to the subsequent steps and load the hardware debugging user interface. Phase 2: After debugging, the parameters will be solidified into the flash parameter area. During the normal memory initialization process, the parameters will be loaded and relocated for the second time to completely move the operating environment to the memory. At this time, the startup mode is determined according to the preset configuration: in multi-function mode, the third phase is loaded and rich advanced features are provided; in fast startup mode, the fourth phase is jumped and a special process is executed to quickly load the target system and real-time applications; Stage 3: Load the mini system, including the mini operating system and mini root file system. This system is the third stage of the boot loader and is used to provide a series of advanced features that traditional loaders do not have. This stage will be skipped in fast boot mode. The fourth stage: loading the target operating system and applications. In the multi-function mode, the target operating system and target root file system are loaded in the mini system context. In the fast startup mode, this stage will complete the fast loading of embedded real-time applications in the shortest time with the assistance of the mini file system, and start other non-real-time services of the target root file system in a delayed manner.

2. The boot loading method of a diversified configurable embedded system according to claim 1, characterized in that: The first stage locks the processor's data cache and maps it to a memory address accessible to the processor, providing a basic environment for high-level languages ​​to run that is independent of the main memory. Use relocation technology to move the data segment required for the first-stage code execution from the flash memory to the corresponding position of the data cache, locate the address of the uninitialized data segment bss in the data cache and perform a zeroing operation, and finally establish a stack pointer at the top of the data cache.

3. The boot loading method of a diversified configurable embedded system according to claim 2, characterized in that: The specific steps include: Step S11: starting the embedded system, and the microprocessor starts to load the reset vector fixed in the predetermined address on the directly executable flash memory; Step S12: loading the first stage initialization program to complete the initialization of the on-chip cache of the processor; the on-chip cache includes an instruction cache and a data cache; Step S13: configure the processor memory management control unit to linearly map the data cache to the processor's accessible space and perform a locking operation to prohibit swapping in and out. After the above steps, the data cache is now equivalent to a high-speed static random read-write memory mounted inside the processor; Step S14: Move the data segment from the flash memory to the data cache address space, perform a clear operation on the bss segment of the space, i.e., the first relocation, and establish a stack pointer at the top of the data cache; jump the program pointer to the second-stage address in the flash memory and execute the second-stage code.

4. The boot loading method of a diversified configurable embedded system according to claim 1, characterized in that: In the second stage, the following specific steps are performed: Step S21: constructing a hardware debugging user interface that does not rely on the system main memory based on the cache; Step S22: Initialize the system memory using the memory parameters obtained by debugging; Step S23: Move the data segment and the bss segment from the cache and the flash memory to the system memory respectively, and re-establish the stack pointer at the highest address of the memory, i.e., the second relocation; Step S24: moving the code segment from the flash memory to the system memory; Step S25: Release the lock and address space mapping for the data cache.

5. The boot loading method of a diversified configurable embedded system according to claim 1, characterized in that: Before the first stage, the memory layout and data transfer rules of the boot loader at each stage need to be formulated according to the processor's address access specifications.

6. The boot loading method of a diversified configurable embedded system according to claim 1, characterized in that: In the second stage, a locking operation is performed on the data cache to prohibit the processor from triggering a page fault exception and data exchange actions with the system memory when data is missing from cache access.

7. The boot loading method of a diversified configurable embedded system according to claim 1, characterized in that: The mini version is streamlined based on the complete operating system, including a minimized kernel and root file system of the operating system, so as to meet the requirement of minimizing the boot time while supporting various advanced features.

8. A boot loader device for a diversified and configurable embedded system, comprising a memory, a processor, and a computer program stored in the memory and capable of running on the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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