Back contact battery and preparation method thereof

Abstract

The invention discloses a back contact battery and a preparation method thereof, and belongs to the technical field of photovoltaics. The back contact cell comprises a silicon substrate, a first doping layer and a second doping layer are arranged on the backlight surface of the silicon substrate at intervals, and the conduction types of the first doping layer and the second doping layer are opposite; the silicon substrate comprises a first region, a second region and a channel region, the first region corresponds to the first doping layer, and the second region corresponds to the second doping layer; the channel region is located between the first region and the second region; a concave structure is arranged at the edge junction, close to the first region, of the channel region, and / or a concave structure is arranged at the edge junction, close to the second region, of the channel region, the concave structure extends into the silicon substrate from the surface of the channel region to form a groove, the depth of the groove is d, and d is larger than or equal to 0.1 micron. And obtaining a concave structure at at least one boundary of the channel region by regulating and controlling the laser.

Description

Technical Field

[0001] The present invention belongs to the field of photovoltaic technology, and more specifically, relates to a back contact battery and a preparation method thereof. Background Art

[0002] Solar photovoltaic is the most promising and sustainable energy in the world. With the development of high-efficiency photovoltaic cells, its production technology is also constantly improving and enhancing. Among them, on the back side of the back contact cell, two electrode areas of opposite conductivity types are formed by laser etching. This design can reduce or eliminate the shading loss of the front grid line and improve the cell efficiency. At the same time, the back contact cell is easy to assemble during the component packaging, which can reduce the spacing between the cells, improve the packaging density, and have a beautiful appearance. Since the back contact cell completely eliminates the shading loss caused by the front grid line, it can obtain a larger short-circuit current and effectively improve the cell efficiency. Therefore, it has the advantages of high efficiency, low temperature coefficient and beautiful appearance. The back contact cell has become a research hotspot for the development of high-efficiency photovoltaic cells. At present, the metal electrodes of the back contact cell are all on the back, and the doping areas are all doped on the whole surface during the preparation process. It is necessary to use printing or high-temperature deposition to mask and use laser and other graphical methods to complete the preparation of the heterogeneous doping area. Finally, the preparation of the metal electrode is completed by screen printing metal slurry. In this process, the heterogeneous doping area will be turned on, resulting in an increased risk of leakage of the back contact solar cell, affecting the electrical stability of the back contact solar cell, and then affecting the conversion efficiency of the back contact solar cell. In the prior art, in order to reduce the risk of leakage caused by the conduction of the heterogeneous doped regions, the back contact battery designs a spacing area between the heterogeneous doped regions. At the same time, the greater the depth of the spacing area into the silicon wafer, the lower the risk of leakage. However, on the one hand, this requires that the thickness of the silicon wafer cannot be too thin. At the same time, the greater the depth of the spacing area, the greater the risk of silicon wafer cracking and the lower the yield rate; on the other hand, the processing cycle will increase, which is not conducive to mass production.

[0003] For example, the patent application document with Chinese patent application number 202410111957.7 and application publication date March 1, 2024 discloses a back-contact battery and its manufacturing method. The purpose of this patent is to prevent the first doped semiconductor layer and the second doped semiconductor layer from being turned on, while shortening the movement distance of some carriers. Its back-contact battery includes: a silicon substrate, and a first doped semiconductor layer and a second doped semiconductor layer alternately distributed on one side of the backlight surface of the silicon substrate, and the first doped semiconductor layer and the second doped semiconductor layer have opposite conductivity types. In the backlight surface of the silicon substrate, the area corresponding to the first doped semiconductor layer is the first area, the area corresponding to the second doped semiconductor layer is the second area, the area between the first area and the second area adjacent to itself is the spacing area, the surface of the second area is concave into the silicon substrate relative to the surface of the first area, the surface of the spacing area is concave into the silicon substrate relative to the surface of the second area, and the depth of the concave into the silicon substrate relative to the surface of the first area is less than 3000 nm, and the side surfaces of the first doped semiconductor layer and the second doped semiconductor layer close to the spacing area are both quasi-wavy; wherein the fluctuation amplitude corresponding to the side surface of the second doped semiconductor layer close to the spacing area is greater than the fluctuation amplitude corresponding to the side surface of the first doped semiconductor layer close to the spacing area, and / or the fluctuation frequency corresponding to the side surface of the second doped semiconductor layer close to the spacing area is less than the fluctuation frequency corresponding to the side surface of the first doped semiconductor layer close to the spacing area. The purpose of this scheme is to reduce the depth of the spacing area, which is achieved by designing a wavy shape on the side surfaces of the first doped semiconductor layer and the second doped semiconductor layer close to the spacing area, and designing the fluctuation amplitude and fluctuation frequency parameters at the same time, but it is more difficult to design a wavy shape on the side surfaces of the first doped semiconductor layer and the second doped semiconductor layer.

[0004] Therefore, there is an urgent need to design a back-contact battery and a preparation method thereof, which can reduce the production cycle while ensuring the yield rate and at the same time reduce the risk of leakage. Summary of the invention

[0005] 1. Problem to be solved One of the purposes of the present invention is to provide a back-contact battery, aiming to reduce the risk of leakage caused by conduction of heterogeneous doped regions and improve the conversion efficiency of the battery.

[0006] Another object of the present invention is to provide a method for preparing a back-contact battery, so as to obtain a back-contact battery of the above structure without increasing the production cycle, and the process is simple and conducive to mass production.

[0007] 2. Technical solution In order to solve the above problems, the technical solution adopted by the present invention is as follows: According to the purpose of the present invention, the first aspect of the present invention provides a back contact battery, comprising: a silicon substrate, a first doping layer and a second doping layer are alternately arranged on the backlight surface of the silicon substrate, and the first doping layer and the second doping layer have opposite conductivity types; the silicon substrate comprises a first region, a second region and a channel region, wherein the first region corresponds to the first doping layer, and the second region corresponds to the second doping layer; the channel region is located between the first region and the second region; A concave structure is provided at the edge junction of the channel region near the first region, so that the leakage current is smaller. The concave structure extends from the surface of the channel region into the silicon substrate to form a groove, and the depth of the groove is d, and d≥0.1 μm; and / or, A concave structure is provided at the edge junction of the channel region near the second region, which has a smaller leakage current. The concave structure extends from the surface of the channel region into the silicon substrate to form a groove, and the depth of the groove is d, and d≥0.1 μm.

[0008] When the above technical solution is adopted, the first doped layer and the second doped layer on the backlight surface of the silicon substrate are separated by the channel region, which can reduce the possibility of conduction between the oppositely doped layers to a certain extent, thereby reducing the reverse leakage current of the battery. However, since the doped area of ​​the back-contact battery is prepared by covering the entire surface, if the depth of the channel area relative to the surface of the first doped layer or the second doped layer on both sides is not enough, the polarity in the channel area cannot be completely removed, resulting in the risk of leakage. This requires that the depth of the channel area be deep enough. In the prior art, the depth of the silicon substrate is etched to ensure the removal rate of the polarity in the channel area, while lengthening the path of the light-excited minority carrier recombination, making it difficult to transmit through the silicon substrate below to generate reverse current. The deeper the channel, the more difficult it is to pass; but the thickness of the silicon substrate of the back-contact battery is usually micron-level, which is relatively thin. Removing part of the silicon substrate is prone to cracks, etc., resulting in a high defective rate. Therefore, the present application only reduces the depth of the concave part at the junction of the channel and the first area and / or the second area. The applicant unexpectedly discovered that there is no need to deepen the depth of the channel as a whole to achieve the leakage current performance of the battery cell with the same effect as deepening the depth of the entire channel area.

[0009] As a possible implementation scheme, the extending direction X of the concave structure in the silicon substrate, the angle between X and the silicon substrate in the channel region is 88° to 92°.

[0010] As a possible implementation scheme, the boundary between the first region and the channel region is a boundary line n, the boundary line n is set along the edge of the first doped layer, the concave structure does not exceed the boundary line n, and / or, The boundary between the second region and the channel region is a junction line m, which is arranged along the edge of the second doped layer, and the concave structure does not exceed the junction line m.

[0011] As a possible implementation solution, in the above-mentioned concave structure, the depth of the groove d is ≥ 0.5 μm.

[0012] As a possible implementation solution, in the above-mentioned concave structure, the depth d of the groove is ≤1 μm.

[0013] When the above technical solution is adopted, in theory, the greater the depth of the depression into the silicon substrate from the surface of the channel area, the better. However, considering the defective rate of the battery cell comprehensively, the depth of the depression into the silicon substrate at the junction of the channel area and the first area and / or the second area connected thereto is controlled within 0.5~1 μm, which reduces the damage to the silicon substrate and improves the qualified rate of the battery cell.

[0014] As a possible implementation scheme, in the above-mentioned concave structure, the width of the groove is at least 1% of the width of the entire channel area. When the above-mentioned technical scheme is adopted, the width of the groove determines the degree of damage to the silicon substrate. The applicant has found that when the width of the groove is at least 1% of the width of the entire channel area, the leakage current performance of the cell can be basically improved.

[0015] As a possible implementation scheme, the width of the channel region is 25 μm~50 μm, that is, the spacing between the first region and the adjacent second region is 25 μm~50 μm. When the above technical scheme is adopted, the width of the channel region is affected by the stability and accuracy of the laser film opening. The width of the channel region between the first region and the second region may not be fixed, but the width of a single channel region shall not be less than the machine processing accuracy. At the same time, considering that wet etching causes side corrosion to the layers on the first region and the second region, the width of the channel region needs to be guaranteed to be above 25 μm. On the other hand, in order to ensure the passage of photogenerated carriers, the width of the channel region should not be set too wide. The applicant found that the width of the channel region below 50 μm has a relatively small impact on the back contact battery.

[0016] As a possible implementation scheme, in the backlight surface of the silicon substrate, the surface of the second region is recessed into the silicon substrate relative to the surface of the first region, so that the polarity of the first doping layer remaining on the second region can be fully removed.

[0017] As a possible implementation scheme, in the backlight surface of the silicon substrate, the depth of the surface of the channel region recessed into the silicon substrate relative to the surface of the second region is 1.6-2.3 μm.

[0018] As a possible implementation scheme, the first doped layer ohmically contacts the first collector electrode, and the second doped layer ohmically contacts the second collector electrode: the position where the first collector electrode contacts the first doped layer is at least 100 μm away from the edge of the first doped layer; and / or the position where the second collector electrode contacts the second doped layer is at least 100 μm away from the edge of the second doped layer. When the above technical scheme is adopted, the electrode can be prevented from being printed into the channel.

[0019] As a possible implementation scheme, the first region or the second region is set at the edge position of the backlight surface of the silicon substrate. When the above technical scheme is adopted, the photogenerated carriers in the edge region of the back contact cell are collected.

[0020] As a possible implementation scheme, the first region or the second region is set in the middle position of the backlight surface of the silicon substrate. When the above technical scheme is adopted, it is beneficial to collect the photogenerated carriers at the edge of the half-cell after the back contact cell is cut in half, thereby improving the conversion efficiency of the back contact cell.

[0021] As a possible implementation scheme, the back contact cell further includes a surface passivation layer covering the first doping layer and the second doping layer, and the surface passivation layer is AlO x / SiN x ; And / or, the back contact battery further includes a first passivation layer and a second passivation layer, wherein the first passivation layer is located between the first region and the first doped layer, and the second passivation layer is located between the second region and the second doped layer.

[0022] A second aspect of the present invention provides a method for preparing a back contact battery, comprising: S1, silicon substrate surface treatment step: polishing the surface of the silicon substrate to form a double-sided planar silicon substrate structure, wherein the backlight surface of the silicon substrate includes a first region and a second region that are alternately distributed, and a channel region between the first region and the second region adjacent thereto; S2, forming a first doping layer step: forming a first doping layer on the first region; S3, forming a second doping layer step: forming a second doping layer on the second region; S4, metallization process: printing a first collector electrode and a second collector electrode on the first doped layer and the second doped layer respectively; The order of steps S2 and S3 is not limited, the polarities of the first doping layer and the second doping layer are opposite, and: During the step of forming the second doping layer, a concave structure is formed at the edge junction of the channel region close to the first region and / or the second region, and the concave structure extends from the surface of the channel region into the silicon substrate to form a groove, and the depth of the groove is d, and d≥0.1 μm; Alternatively, after the step of forming the second doping layer is completed, a concave structure is formed near the edge junction of the first region and / or the second region, and the concave structure extends from the surface of the channel region into the silicon substrate to form a groove, and the depth of the groove is d, and d≥0.1 μm.

[0023] As a possible implementation scheme, in step S2, the steps of forming the first doping layer are: S21, sequentially depositing a first passivation layer, a first doping layer, and a first barrier layer on the backlight surface of the silicon substrate; S22, using a first laser to remove the first barrier layer on the second region and the channel region to expose the first doping layer on the second region and the channel region; S23, performing a wet etching process to remove the first doping layer and the first passivation layer in the second region and the channel region; At this time, the first area of ​​the backlight surface is sequentially stacked with a first passivation layer, a first doping layer and a first barrier layer, and the second area of ​​the backlight surface and the channel area are exposed to the silicon substrate; In step S3, the steps of forming the second doping layer are: S31, depositing a second passivation layer, a second doping layer, and a second barrier layer in sequence on the backlight surface of the silicon substrate; S32, using a second laser to remove the second barrier layer above the first region and the channel region, exposing the second doping layer on the first region and the channel region; S33, performing a wet etching process to remove the second doping layer and the second passivation layer in the first region and the channel region; S34, using a third laser to remove the first barrier layer in the first region and the second barrier layer in the second region; or, using a third laser to remove the first barrier layer in the first region and the second barrier layer in the second region, and simultaneously forming a concave structure at the junction of the edge of the channel region near the first region and / or the second region, the concave structure extending from the surface of the channel region into the silicon substrate to form a groove, the depth of the groove is d, and d≥0.1 μm; At this time, the first area of ​​the backlight surface is sequentially stacked with a first passivation layer and a first doping layer, the channel area exposes the silicon substrate, and the second area is sequentially stacked with a second passivation layer and a second doping layer.

[0024] As a possible implementation scheme, in step S34, while removing the first barrier layer in the first region and the second barrier layer in the second region, a concave structure is formed in the channel region near the edge junction of the first region and / or the second region, and the concave structure extends from the surface of the channel region to the silicon substrate to form a groove, and the depth of the groove is d, and d≥0.1 μm. At this time, the third laser meets one of the following conditions: 1) When the output power of the third laser is 50%~100%, under high power conditions, the spot energy is relatively uniform, and the laser engraving speed v1 at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be lower than the laser engraving speed v2 at other positions, so as to increase the spot overlap rate at the junction, preferably v1=(0.5~0.7) ×v2; 2) When the output power of the third laser is 50%~100%, under high power conditions, the spot energy is relatively uniform, and the laser light frequency γ1 at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be higher than the laser light frequency γ2 at other positions, so as to increase the spot overlap rate at the junction, preferably γ1=(2~3) × γ2; 3) The output power of the third laser is 0%~50%. Under low power conditions, the edge spot energy is relatively weak and irradiates the channel region to dope the middle region on the exposed silicon substrate. The doping solubility of amorphous silicon increases, and the amorphous silicon in the edge region, i.e., the junction of the channel region and the first region and / or the second region connected thereto, is relatively loose. After wet etching, a concave structure is formed in the silicon substrate at the junction of the channel region and the first region and / or the second region connected thereto. In the concave structure, the deepest point of the concave in the silicon substrate is at least 0.1 μm away from the junction of the first region and / or the second region connected thereto.

[0025] As a possible implementation scheme, when a concave structure is not formed at the edge junction of the channel region close to the first region and / or the second region in step S34, before the metallization process starts, a fourth laser is used to irradiate the channel region to form a concave structure at the edge junction of the channel region close to the first region and / or the second region, and the concave structure extends from the surface of the channel region to the silicon substrate to form a groove, and the depth of the groove is d, and d≥0.1 μm; at this time, the fourth laser meets one of the following conditions, and at this time, the control process cycle is increased relative to the third laser, but the defective rate is reduced: 1) When the output power of the fourth laser is 50%~100%, under high power conditions, the spot energy is relatively uniform, and the laser engraving speed v3 at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be lower than the laser engraving speed v4 at other positions, so as to increase the spot overlap rate at the junction, preferably v3=(0.5~0.7) ×v4; 2) When the output power of the fourth laser is 50%~100%, under high power conditions, the spot energy is relatively uniform, and the laser light frequency γ3 at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be higher than the laser light frequency γ4 at other positions, so as to increase the spot overlap rate at the junction, preferably γ3=(2~3) × γ4; 3) The output power of the fourth laser is 0%~50%. Under low power conditions, the edge spot energy is relatively weak and irradiates the channel region to dope the middle region on the exposed silicon substrate. The doping solubility of amorphous silicon increases, and the amorphous silicon in the edge region, i.e., the junction of the channel region and the first region and / or the second region connected thereto, is relatively loose. After wet etching, a concave structure is formed in the silicon substrate at the junction of the channel region and the first region and / or the second region connected thereto. In the concave structure, the deepest point of the concave in the silicon substrate is at least 0.1 μm away from the junction of the first region and / or the second region connected thereto.

[0026] As a possible implementation scheme, the step S4 further includes a texturing and passivation process: texturing the silicon substrate, and then performing a passivation film to form a surface passivation layer.

[0027] 3. Beneficial effects Compared with the prior art, the present invention has the following beneficial effects: (1) The back contact battery structure of the present invention provides a channel region between a first doping layer and a second doping layer of different conductive types, and at the same time, the edge of the channel region, i.e., the junction with the first region and the second region on the silicon substrate, is recessed into the silicon substrate. Compared with the case where the channel edge recessed structure is not involved under the same conditions, the leakage current of the present invention is smaller, which is beneficial to improving the electrical stability of the back contact battery and improving the conversion efficiency of the back contact battery.

[0028] (2) The preparation method of the back contact battery structure of the present invention is simple. It only needs to adjust the laser parameters when processing the channel area, so as to obtain the structure in which the edge of the channel area of ​​the present application is concave into the silicon substrate. In addition, the setting of the laser parameters has a low defective rate, which is conducive to mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the longitudinal cross-sectional structure of the back contact battery in Example 1; Figure 2for Figure 1 A partial enlarged view of the middle A area; Figure 3 Schematic diagram of the structure of the silicon substrate of the back contact battery in Examples 1 and 2; Figure 4 for Figure 3 A partial enlarged view of the middle B area; Figure 5 Schematic diagram of the longitudinal cross-sectional structure of the back contact battery in Example 2; Figure 6 for Figure 5 A partial enlarged view of the middle C area; Figure 7 Schematic diagram of the longitudinal cross-sectional structure of the back contact battery in Example 3; Figure 8 for Figure 7 A partial enlarged view of the D area in the middle; Fig. 9 Schematic diagram of the structure of the silicon substrate of the back contact battery in Example 3; Fig.10 for Fig. 9 A partial enlarged view of the middle E area; Fig.11 Schematic diagram of the longitudinal cross-sectional structure of the back contact battery in Example 4; Fig.12 for Fig.11 A partial enlarged view of the middle F area; Fig.13 Schematic diagram of the structure of the silicon substrate of the back contact battery in Example 4; Fig.14 for Fig.13 A partial enlarged view of the middle H region; Fig.15 is a schematic diagram of the longitudinal cross-sectional structure of the back contact battery in Example 5; Fig.16 for Fig.15 A partial enlarged view of the middle I area; Fig.17 Schematic diagram of the structure of the silicon substrate of the back contact battery in Example 5; Fig.18 for Fig.17 A partial enlarged view of the middle J region; Fig.19 is a top view of the back contact battery in Example 6; Fig. 20 is a top view of a back contact battery in Example 7; In the figure: 1. Silicon substrate; 11. First region; 12. Second region; 13. Channel region; 131. Concave structure; 2. First doping layer; 3. Second doping layer; 4. First collector electrode; 5. Second collector electrode; 6. Surface passivation layer; 61. AlO x Layer; 62, SiN x Layer; 7, first passivation layer; 8, second passivation layer. DETAILED DESCRIPTION

[0030] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0031] It should also be noted that, for ease of description, only the parts related to the invention are shown in the drawings. In the absence of conflict, the embodiments and features in the embodiments of the present disclosure can be combined with each other.

[0032] It should be noted that the concepts such as "first" and "second" mentioned in the present disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0033] It should be noted that the modifications of "one" and "plurality" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0034] The names of the messages or information exchanged between multiple devices in the embodiments of the present disclosure are only used for illustrative purposes and are not used to limit the scope of these messages or information.

[0035] As a first aspect of the present application, a back contact battery structure is provided, as shown in Examples 1 to 7.

[0036] Example 1 A back contact battery of this embodiment, such as Figure 1The device shown in the figure includes: a silicon substrate 1, and a first doping layer 2 and a second doping layer 3 alternately distributed on the backlight surface of the silicon substrate 1, wherein the first doping layer 2 and the second doping layer 3 have opposite conductivity types, and at the same time, a first collector electrode 4 is in ohmic contact with the first doping layer 2, and a second collector electrode 5 is in ohmic contact with the second doping layer 3, and the distance between the position where the first collector electrode 4 contacts the first doping layer 2 and the edge of the first doping layer 2 is at least 100 μm; the distance between the position where the second collector electrode 5 contacts the second doping layer 3 and the edge of the second doping layer 3 is at least 100 μm. Figure 3 As shown, in the backlight surface of the silicon substrate 1, the area corresponding to the first doping layer 2 is the first area 11, the area corresponding to the second doping layer 3 is the second area 12, and the area between the first area 11 and the second area 12 adjacent thereto is the channel area 13, and the width of the channel area 13 is 25 μm to 50 μm. Figure 2 and Figure 4 As shown, a concave structure 131 is arranged at the edge junction of the channel region 13 near the second region 12 connected thereto, the boundary between the second region 12 and the channel region 13 is the junction line m, the junction line m is arranged along the edge of the second doping layer 3, and the concave structure 131 does not exceed the junction line m; the concave structure 131 extends from the surface of the channel region 13 into the silicon substrate 1 to form a groove, the depth of the groove is between 0.5 μm and 1 μm; the deepest point of the groove into the silicon substrate 1 is between 0.1 μm and 0.2 μm from the junction of the second region 12 connected thereto; the width of the groove is 1% of the width of the entire channel region. Among them, the extension direction X of the concave structure 131 in the silicon substrate 1, the angle between X and the silicon substrate 1 of the channel region 13 is 88°~92°, which refers to the extension direction of the concave structure 131, and in this embodiment, it is 90°.

[0037] Example 2 The back contact battery of this embodiment is different from that of embodiment 1 in that: Figure 5 and Figure 6 As shown, it also includes a surface passivation layer 6 covering the first doping layer 2 and the second doping layer 3, as well as a first passivation layer 7 and a second passivation layer 8. The surface passivation layer 6 is made of AlO x Layer 61, SiN x The layer 62 is composed of a first passivation layer 7 located between the first region 11 and the first doped layer 2 , and a second passivation layer 8 located between the second region 12 and the second doped layer 3 .

[0038] Example 3 The back contact battery of this embodiment is different from that of embodiment 2 in that: Figures 7-10As shown, the surface of the second region 12 and the surface of the channel region 13 on the silicon substrate 1 are both recessed into the silicon substrate 1 relative to the surface of the first region 11 , that is, the surface height of the first region 11 > the surface height of the second region = the surface height of the channel region 13 .

[0039] Example 4 The back contact battery of this embodiment is different from that of embodiment 3 in that: Figures 11 to 14 As shown, the surface height of the first region 11 is greater than the surface height of the second region 12 and greater than the surface height of the channel region 13 , wherein the depth of the surface of the channel region 13 recessed into the silicon substrate 1 relative to the surface of the second region 12 is 1.6-2.3 μm.

[0040] Example 5 The back contact battery of this embodiment is different from that of embodiment 4 in that: Figures 15 to 18 As shown, a concave structure 131 is arranged at the edge junction of the channel region 13 near the first region 11 and the second region 12. The boundary between the first region 11 and the channel region 13 is a junction line n, which is arranged along the edge of the first doped layer 2, and the concave structure 131 does not exceed the junction line n. The boundary between the second region 12 and the channel region 13 is a junction line m, which is arranged along the edge of the second doped layer 3, and the concave structure 131 does not exceed the junction line m. The concave structure 131 extends from the surface of the channel region 13 into the silicon substrate 1 to form a groove, and the depth of the groove is between 0.5 μm and 1 μm.

[0041] Example 6 The back contact cell of this embodiment is different from that of embodiment 5 in that the first region 11 and / or the second region 12 are arranged at the edge of the back side of the silicon substrate 1. Fig.19 As shown, in this embodiment, a first region 11 is disposed at the edge of the back side of the silicon substrate 1 , that is, the first region 11 has the same conductivity type as the first doped layer 2 .

[0042] Example 7 The back-contact battery of this embodiment is different from that of Embodiment 4 in that a recessed structure 131 is arranged at the edge junction of the first region 11 and the second region 12 connected to the channel region 13, and the recessed structure 131 extends from the surface of the channel region 13 into the silicon substrate 1 to form a groove, and the depth of the groove is between 0.1 μm and 0.5 μm.

[0043] Example 8 A back contact cell of this embodiment is different from that of embodiment 6 in that a first region 11 or a second region 12 is arranged in the middle of the silicon substrate 1, such as Fig. 20As shown, in this embodiment, a first region 11 is disposed at the edge of the back side of the silicon substrate 1 , that is, the first region 11 has the same conductivity type as the first doped layer 2 .

[0044] As the second aspect of the present application, a back contact battery method is provided. Taking the structure of the back contact battery in Example 8, which is the best solution among Examples 1 to 8, as an example, a method for preparing a back contact battery with this structure is provided.

[0045] On the basis of the existing method for preparing back-contact cells, in order to form a recessed structure 131 at the edge junction of the channel region 13 close to the first region 11 and / or the second region 12 connected thereto, the recessed structure 131 extends from the surface of the channel region 13 into the silicon substrate 1 to form a groove, and the depth of the groove is ≥0.1 μm. The applicant has found that this can be achieved by changing the laser parameters in the channel region 13.

[0046] Example 8-1 S1, silicon substrate surface treatment process: select a suitable battery substrate, which can be single crystal silicon, polycrystalline silicon or thin film silicon, etc. In this embodiment, single crystal silicon is selected as the battery substrate, and its thickness is 115-175 microns. The surface of the silicon substrate 1 is wet-polished to form a double-sided planar silicon substrate structure. The backlight surface of the silicon substrate includes a first region 11 and a second region 12 that are alternately distributed, and a channel region 13 between the first region 11 and the second region 12 adjacent thereto; S2, forming a first doping layer step: forming a first doping layer 2 on the first region 11; wherein the conductivity type of the first doping layer 2 is N type: S21, depositing a first passivation layer 7, a first doping layer 2 and a first barrier layer in sequence on the backlight surface of the silicon substrate 1; S22. Use a first laser to remove the first barrier layer on the second region 12 and the channel region 13 to expose the first doping layer 2 on the second region 12 and the channel region 13. The process parameters of the first laser etching are as follows: laser power is 70-100 W, laser frequency is 50 KHz, scanning speed is 5 mm / s, and spot diameter is 100-200 microns.

[0047] S23, performing a wet etching process to remove the first doping layer 2 and the first passivation layer 7 in the second region 12 and the channel region 13; S3, forming a second doping layer step: forming a second doping layer 3 on the second region 12; the conductivity type of the second doping layer 3 is P type: S31, depositing a second passivation layer 8, a second doping layer 3, and a second barrier layer in sequence on the backlight surface of the silicon substrate 1; S32, using a second laser to remove the second barrier layer above the first region 11 and the channel region 13, exposing the second doping layer 3 on the first region 11 and the channel region 13; wherein the process parameters of the second laser etching are as follows: laser power of 35-55W, laser frequency of 50 KHz, scanning speed of 5 mm / s, and spot diameter of 100-200 microns; S33, performing a wet etching process to remove the second doping layer 3 and the second passivation layer 8 in the first region 11 and the channel region 13; S34, using a third laser to remove the first barrier layer in the first region 11 and the second barrier layer in the second region 12; at the same time, forming a concave structure 131 into the silicon substrate at the junction of the channel region 13 and the second region 12 connected thereto, and the concave structure 131 extends from the surface of the channel region 13 into the silicon substrate 1 to form a groove, and the depth of the groove is at least 0.1 μm.

[0048] Among them, when the output power of the third laser is 50%~100%, the laser engraving speed v1 irradiated at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be lower than the laser engraving speed v2 at other positions; preferably, v1=(0.5~0.7)×v2; in this embodiment, the laser irradiated at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be: engraving speed v1=45000mm / s, frequency 270KHz; laser at other positions: engraving speed v2=75000mm / s, frequency 270KHz, at this time, at the junction of the channel area and the first area and / or the second area connected thereto, under the condition of high power and high overlap, the etching depth is greater than the channel depth, forming a concave, IRev2 is smaller, and the anti-leakage effect is better.

[0049] S4, metallization process: printing the first collector electrode 4 and the second collector electrode 5 on the first doping layer 2 and the second doping layer 3 respectively to form a back contact battery.

[0050] Example 8-2 This embodiment is basically the same as embodiment 8-1, except that: in step S34, when the output power of the third laser is 50%~100%, the laser light emission frequency γ1 irradiated at the junction of the channel area and the first area and / or the second area connected thereto is controlled to be higher than the laser light emission frequency γ2 at other positions, γ1=(2~3) γ2; this embodiment controls the laser irradiated at the junction of the channel area and the first area and / or the second area connected thereto: the laser engraving speed is 75000mm / s, the frequency γ1=540KHz; the laser at other positions: the laser engraving speed is 75000mm / s, γ2=frequency 270KHz; under the condition of high power and high overlap at the junction, the etching depth is greater than the channel depth, forming a concave structure 131, IRev2 is smaller, and the anti-leakage effect is better.

[0051] Example 8-3 This embodiment is basically the same as embodiment 8-1, except that: in step S34, the output power of the third laser is 0%~50%. Under low power conditions, the middle energy is strong and the edge energy is weak. After the laser removes the oxide layer, the middle area is doped, and the doping solubility of amorphous silicon increases. The amorphous silicon at the junction of the edge area, i.e., the channel area and the first area and / or the second area connected thereto is relatively loose, and a height difference is formed after wet etching. IRev2 is smaller, and the anti-leakage effect is better.

[0052] Example 8-4 S1, silicon substrate surface treatment step: polishing the surface of the silicon substrate 1 to form a double-sided planar silicon substrate structure, wherein the backlight surface of the silicon substrate includes a first region 11 and a second region 12 that are alternately distributed, and a channel region 13 between the first region 11 and the second region 12 adjacent thereto; S2, forming a first doping layer step: forming a first doping layer 2 on the first region 11; S21, depositing a first passivation layer 7, a first doping layer 2 and a first barrier layer in sequence on the backlight surface of the silicon substrate 1; S22, using a first laser to remove the first barrier layer on the second region 12 and the channel region 13, exposing the first doping layer 2 on the second region 12 and the channel region 13; S23, performing a wet etching process to remove the first doping layer 2 and the first passivation layer 7 in the second region 12 and the channel region 13; S3, forming a second doping layer step: forming a second doping layer 3 on the second region 12; S31, depositing a second passivation layer 8, a second doping layer 3, and a second barrier layer in sequence on the backlight surface of the silicon substrate 1; S32, using a second laser to remove the second barrier layer above the first region 11 and the channel region 13, exposing the second doping layer 3 on the first region 11 and the channel region 13; S33, performing a wet etching process to remove the second doping layer 3 and the second passivation layer 8 in the first region 11 and the channel region 13; S34, using a third laser to remove the first barrier layer in the first area 11 and the second barrier layer in the second area 12; S4. Use a fourth laser to process the channel region to form a recessed structure 131 in the silicon substrate at the junction of the channel region 13 and the first region 11 and / or the second region 12 connected thereto, and the recessed structure 131 extends from the surface of the channel region 13 into the silicon substrate 1 to form a groove, and the depth of the groove is at least 0.1 μm.

[0053] Among them, when the output power of the fourth laser is 50%~100%, the laser engraving speed v3 irradiated at the intersection of the channel area and the first area and / or the second area connected thereto is controlled to be lower than the laser engraving speed v4 at other positions; preferably, v3=(0.5~0.7) ×v4. In this embodiment, the laser irradiated at the intersection of the channel area and the first area and / or the second area connected thereto is controlled to be: engraving speed 45000mm / s, frequency 270KHz; laser at other positions: engraving speed 75000mm / s, frequency 270KHz. At this time, at the intersection of the channel area and the first area and / or the second area connected thereto, under the condition of high power and high overlap, the etching depth is greater than the channel depth, forming a concave structure 131, IRev2 is smaller, and the anti-leakage effect is better.

[0054] S5, metallization process: printing the first collector electrode 4 and the second collector electrode 5 on the first doping layer 2 and the second doping layer 3 respectively to form a back contact battery.

[0055] Example 8-5 This embodiment is basically the same as embodiment 8-4, except that: in step S4, when the output power of the fourth laser is 50% to 100%, the laser light frequency γ3 irradiated at the intersection of the channel area and the first area and / or the second area connected thereto is controlled to be higher than the laser light frequency γ4 at other positions, γ3=(2 to 3) γ4. This embodiment controls the laser irradiated at the intersection of the channel area and the first area and / or the second area connected thereto: the laser engraving speed is 75000mm / s, the frequency is 540KHz; the laser at other positions: the laser engraving speed is 75000mm / s, the frequency is 270KHz; at the intersection, under the condition of high power and high overlap, the etching depth is greater than the channel depth, forming a concave structure 131, IRev2 is smaller, and the anti-leakage effect is better.

[0056] Example 8-6 This embodiment is basically the same as embodiment 8-4, except that: in step S4, the output power of the fourth laser is 0% to 50%. In the case of low power, the middle energy is strong and the edge energy is weak. After the laser removes the oxide layer, the middle area is doped, the amorphous silicon doping solubility increases, and the amorphous silicon at the junction of the edge area, i.e., the channel area and the first area and / or the second area connected thereto is relatively loose, and a height difference is formed after wet etching, IRev2 is smaller, and the anti-leakage effect is better.

[0057] Comparative Example 1 The back contact cell of Comparative Example 1 is different from that of Example 8 in that the depth of the groove is 2 μm.

[0058] Comparative Example 2 The back contact cell of Comparative Example 1 is different from that of Example 8 in that the width of the groove is less than 1% of the width of the entire channel region.

[0059] Comparative Example 3 In comparative example 3, when the width of the channel region is designed to be 50 μm, 80 μm, 90 μm, 100 μm, and 150 μm, the performance test of the back contact battery is shown in Table 1: Table 1 The performance tests of back contact cells with different channel widths are as follows

[0060] It can be seen from Table 1 that as the width of the channel region increases, the conversion efficiency of the back contact battery decreases, and the width of the channel region is best controlled at 50 μm.

[0061] Comparative Example 4 Compared with Example 8, the back-contact battery of Comparative Example 4 does not form a concave structure into the silicon substrate at the junction of the channel region 13 and the first region 11 and the second region 12 connected thereto, and the depth of the surface of the channel region 13 recessed into the silicon substrate 1 relative to the surface of the second region 12 is 1.6~2.3 μm.

[0062] Comparative Example 5 Compared with Comparative Example 4, the back-contact battery of Comparative Example 5 has a depth of 3.7~5.1 μm indented into the silicon substrate 1 by the surface of the channel region 13 relative to the surface of the second region 12. At this time, relative to the preparation process of Comparative Example 4, the preparation cycle of each back-contact battery of Comparative Example 5 is increased by 150 s.

[0063] Compared with Example 2, the back contact battery of Example 1 lacks the first passivation layer 7, the second passivation layer 8, and the surface passivation layer 6 on the surface of the first doping layer 2 and the second doping layer 3 on its silicon substrate 1, which has a great influence on the battery performance. Therefore, the back contact battery of Example 1 is not tested and studied in Table 2; the back contact battery of Example 2 does not remove the first doping layer 2 in the second area on the silicon substrate 1, and the leakage current will be relatively large, so the back contact battery of Example 2 is not tested and studied; but it can be seen that among the back contact batteries of the same structure in Example 1 and Example 2, the leakage current is reduced, which is within the scope of protection required by this application. Therefore, the performance test of the back contact battery prepared for the other embodiments and comparative examples mentioned above is shown in Table 2: Table 2 Performance test of back contact cells obtained in Examples and Comparative Examples

[0064] It can be concluded from Table 2 that the back contact battery of Example 3 removes the polarity of the first doped layer in the second region and the channel region on the silicon substrate, but the channel region of Example 4 is deepened compared with that of Example 3, that is, there is obvious isolation between the doped layers of the two polarities, so the back contact battery of Example 4 has a lower IRev2 and a smaller leakage current than that of the back contact battery of Example 3. Compared with Example 4, both boundaries of the channel region of Example 5 are recessed into the silicon substrate by 0.5 μm to 1 μm, that is, the channel region 13 on the silicon substrate has a recessed structure that plays an isolation role relative to the first region 11 and the second region 12, and the back contact battery of Example 5 has a lower leakage current. In Example 6, the channel region 13 is not provided at the back edge of the silicon substrate 1, the area of ​​the first doping layer or the second doping layer of the overall back contact cell is increased, and the first or second collector electrode is stacked to collect the current in the edge area, thereby improving the back contact cell conversion efficiency; in Example 8, the channel region 13 is not provided at the middle position of the silicon substrate 1, that is, the middle position is the same as the first doping layer or the second doping layer, the area of ​​the first doping layer or the second doping layer of the overall back contact cell is increased, thereby improving the back contact cell conversion efficiency; at the same time, the middle-cut channel of Example 8 is designed to prepare a half-cell cell. The back contact cell structure position of Example 8 is used to demonstrate the preparation method of the back contact cell of the present application. Example 8-1 reduces the engraving speed of the third laser, thereby increasing the original 4s laser cycle by 1s, affecting the production capacity. Example 8-2 and Example 8-3 are more preferred relative to Example 8-1. Embodiment 8-4, embodiment 8-5, and embodiment 8-6 add a fourth laser to prepare a structure that is concave toward the silicon substrate at the boundary between the channel region 13 and the first region 11 and the second region 12, and an overall process is added. The depth of the concave into the silicon substrate at the junction of the channel region of the back contact battery in Example 1 and the first region and / or the second region connected thereto is greater than that of embodiment 8, and the defective rate is high. The width of the concave into the silicon substrate at the junction of the channel region of the back contact battery in Example 2 and the first region and / or the second region connected thereto is less than 1% of the width of the entire channel region, and the leakage current is relatively large. The leakage current of Example 4 is significantly larger than that of Example 8. The leakage current of the back contact battery in Example 5 is smaller than that of Example 4, but higher than that of Example 8, which can prove that the battery structure of the present application has unexpected effects.

[0065] The above descriptions are only some preferred embodiments of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the embodiments of the present disclosure is not limited to the technical solutions formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the embodiments of the present disclosure.

Claims

1. A back contact battery, characterized in that: include: A silicon substrate (1), wherein a first doping layer (2) and a second doping layer (3) are arranged at intervals on a backlight surface of the silicon substrate (1), and the first doping layer (2) and the second doping layer (3) have opposite conductivity types; the silicon substrate (1) comprises a first region (11), a second region (12) and a channel region (13), wherein the first region (11) corresponds to the first doping layer (2), and the second region (12) corresponds to the second doping layer (3); and the channel region (13) is located between the first region (11) and the second region (12); A recessed structure (131) is provided at the edge junction of the channel region (13) close to the first region (11), the recessed structure (131) extending from the surface of the channel region (13) into the silicon substrate (1) to form a groove, the depth of the groove being d, and d≥0.1 μm; and / or, A recessed structure (131) is provided at the edge junction of the channel region (13) close to the second region (12); the recessed structure (131) extends from the surface of the channel region (13) into the silicon substrate (1) to form a groove; the depth of the groove is d, and d≥0.1 μm.

2. A back contact battery according to claim 1, characterized in that: The concave structure (131) extends in a direction X in the silicon substrate (1), and the angle between X and the silicon substrate (1) in the channel region (13) is 88° to 92°.

3. A back contact battery according to claim 1, characterized in that: The boundary between the first region (11) and the channel region (13) is a boundary line n, the boundary line n is arranged along the edge of the first doped layer (2), the recessed structure (131) does not exceed the boundary line n, and / or The boundary between the second region (12) and the channel region (13) is a boundary line m, the boundary line m is arranged along the edge of the second doped layer (3), and the recessed structure (131) does not exceed the boundary line m.

4. A back contact battery according to claim 1, characterized in that: In the concave structure (131), the depth d of the groove is ≥ 0.5 μm.

5. A back contact battery according to claim 4, characterized in that: In the concave structure (131), the depth d of the groove is ≤1 μm.

6. A back contact battery according to claim 1, characterized in that: In the recessed structure (131), the width of the groove is at least 1% of the width of the entire channel region (13).

7. A back contact battery according to claim 1, characterized in that: The width of the channel region (13) is 25 μm to 50 μm.

8. A back contact battery according to claim 1, characterized in that: In the backlight surface of the silicon substrate (1), the surface of the second region (12) is concave toward the silicon substrate (1) relative to the surface of the first region (11).

9. A back contact battery according to claim 8, characterized in that: In the backlight surface of the silicon substrate (1), the depth of the surface of the channel region (13) recessed into the silicon substrate (1) relative to the surface of the second region (12) is 1.6-2.3 μm.

10. A back contact battery according to claim 1, characterized in that: The first doped layer (2) is in ohmic contact with a first collector electrode (4), and the second doped layer (3) is in ohmic contact with a second collector electrode (5): the position where the first collector electrode (4) contacts the first doped layer (2) is at least 100 μm away from the edge of the first doped layer (2); and / or the position where the second collector electrode (5) contacts the second doped layer (3) is at least 100 μm away from the edge of the second doped layer (3).

11. A back contact battery according to claim 1, characterized in that: The first region (11) or the second region (12) is arranged at an edge position on the backlight surface of the silicon substrate (1); and / or, A first region (11) or a second region (12) is arranged at a middle position on the backlight surface of the silicon substrate (1).

12. A back contact battery according to any one of claims 1 to 11, characterized in that: The back contact cell further comprises a surface passivation layer (6) covering the first doping layer (2) and the second doping layer (3), wherein the surface passivation layer (6) is AlO x / SiN x and / or, The back contact battery further comprises a first passivation layer (7) and a second passivation layer (8), wherein the first passivation layer (7) is located between the first region (11) and the first doped layer (2), and the second passivation layer (8) is located between the second region (12) and the second doped layer (3).

13. A method for preparing a back contact battery, characterized in that: include: S1, a silicon substrate (1) surface treatment step: polishing the silicon substrate (1) to form a double-sided flat silicon substrate (1), wherein the backlight surface of the silicon substrate (1) comprises first regions (11) and second regions (12) that are alternately distributed, and a channel region (13) between the first region (11) and the second region (12) adjacent thereto; S2, step of forming a first doping layer (2): forming a first doping layer (2) on the first region (11); S3, step of forming a second doping layer (3): forming a second doping layer (3) on the second region (12); S4, metallization step: printing a first collector electrode (4) and a second collector electrode (5) on the first doped layer (2) and the second doped layer (3), respectively; The order of steps S2 and S3 is not limited, the polarities of the first doping layer (2) and the second doping layer (3) are opposite, and: During the step of forming the second doping layer (3), a concave structure (131) is formed at the edge junction of the channel region (13) close to the first region (11) and / or the second region (12) using a laser, wherein the concave structure (131) extends from the surface of the channel region (13) into the silicon substrate (1) to form a groove, and the depth of the groove is d, and d≥0.1 μm; Alternatively, after the step of forming the second doping layer (3) is completed, a laser is used to form a concave structure (131) at the edge junction of the channel region (13) close to the first region (11) and / or the second region (12), wherein the concave structure (131) extends from the surface of the channel region (13) into the silicon substrate (1) to form a groove, and the depth of the groove is d, and d≥0.1 μm.

14. The method for preparing a back contact battery according to claim 13, characterized in that: In step S2, the steps of forming the first doping layer (2) are: S21, depositing a first passivation layer (7), a first doping layer (2) and a first barrier layer in sequence on the backlight surface of the silicon substrate (1); S22, using a first laser to remove the first barrier layer on the second region (12) and the channel region (13), thereby exposing the first doping layer (2) on the second region (12) and the channel region (13); S23, removing the first doping layer (2) and the first passivation layer (7) in the second region (12) and the channel region (13) by using a wet etching process; In step S3, the steps of forming the second doping layer (3) are: S31, depositing a second passivation layer (8), a second doping layer (3) and a second barrier layer in sequence on the backlight surface of the silicon substrate (1); S32, using a second laser to remove the second barrier layer above the first region (11) and the channel region (13), thereby exposing the second doping layer (3) on the first region (11) and the channel region (13); S33, removing the second doping layer (3) and the second passivation layer (8) in the first region (11) and the channel region (13) by using a wet etching process; S34, using a third laser to remove the first barrier layer of the first region (11) and the second barrier layer of the second region (12); or, using a third laser to remove the first barrier layer of the first region (11) and the second barrier layer of the second region (12), and at the same time forming a concave structure (131) at the edge junction of the channel region (13) close to the first region (11) and / or the second region (12), wherein the concave structure (131) extends from the surface of the channel region (13) into the silicon substrate (1) to form a groove, and the depth of the groove is d, and d≥0.1 μm.

15. The method for preparing a back contact battery according to claim 14, characterized in that: In step S34, while removing the first barrier layer of the first region (11) and the second barrier layer of the second region (12), a concave structure (131) is formed at the edge junction of the channel region (13) close to the first region (11) and / or the second region (12), wherein the concave structure (131) extends from the surface of the channel region (13) into the silicon substrate (1) to form a groove, and the depth of the groove is d, and d≥0.1 μm. At this time, the third laser meets one of the following conditions: 1) When the output power of the third laser is 50% to 100%, the laser engraving speed v1 at the junction of the channel region (13) and the first region (11) and / or the second region (12) connected thereto is controlled to be lower than the laser engraving speed v2 at other positions; 2) when the output power of the third laser is 50% to 100%, the laser light frequency γ1 irradiated at the junction of the channel region (13) and the first region (11) and / or the second region (12) connected thereto is controlled to be higher than the laser light frequency γ2 at other positions; 3) The output power of the third laser is 0%~50%.

16. The method for preparing a back contact battery according to claim 15, characterized in that: v1=(0.5~0.7)×v2; γ1=(2~3) × γ2.

17. The method for preparing a back contact battery according to claim 14, characterized in that: In step S34, when the concave structure (131) is not formed at the edge junction of the channel region (13) close to the first region (11) and / or the second region (12), before the metallization process begins, a fourth laser is used to process the channel region (13) to form a concave structure (131) at the edge junction of the channel region (13) close to the first region (11) and / or the second region (12), wherein the concave structure (131) extends from the surface of the channel region (13) into the silicon substrate (1) to form a groove, and the depth of the groove is d, and d≥0.1 μm; at this time, the fourth laser meets one of the following conditions: 1) When the output power of the fourth laser is 50% to 100%, the laser engraving speed v3 at the junction of the channel region (13) and the first region (11) and / or the second region (12) connected thereto is controlled to be lower than the laser engraving speed v4 at other positions; 2) When the output power of the fourth laser is 50% to 100%, the laser light frequency γ3 irradiated at the junction of the channel region (13) and the first region (11) and / or the second region (12) connected thereto is controlled to be higher than the laser light frequency γ4 at other positions; 3) The output power of the fourth laser is 0%~50%.

18. The method for preparing a back contact battery according to claim 17, characterized in that: v3=(0.5~0.7)×v4; γ3=(2~3) × γ4.

19. A method for preparing a back contact battery according to any one of claims 13 to 18, characterized in that: The step S4 also includes a texturing and passivation process: texturing the silicon substrate (1), and then performing a passivation film to form a surface passivation layer (6).

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