PCIE adapter card and PCIE equipment card in-place detection circuit and method

Abstract

The invention discloses a PCIE adapter card and a PCIE equipment card in-place detection circuit and method, and the circuit comprises a PCIE adapter card slot, one slot position is connected with a detection port of a mainboard through an in-place signal line, and is connected to a power supply through a pull-up resistor, and the other slot position is connected with a first pull-down resistor; the second in-place signal pins of the different PCIE device clamping grooves are directly connected on the link and are connected to the first pull-down resistor, and the first in-place signal pins are grounded through the second pull-down resistors with different resistance values; and the in-place detection module is used for carrying out in-place detection on the PCIE adapter card and the PCIE equipment card according to the detected voltage value of the detection port. The problems that in the prior art, IO resources are wasted, I2C resources are wasted due to the fact that chips are increased and expanded, address avoiding or I2C switch chip increasing needs to be carried out, and meanwhile the board card space of an adapter card needs to be occupied are solved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit design, and in particular to a PCIE adapter card and a PCIE device card presence detection circuit and method. Background Art

[0002] With the development of the server industry, the utilization of PCIE (Peripheral Component Interconnect Express, a high-speed serial computer bus standard) resources of the CPU (Central Processing Unit) has attracted more and more attention. In order to meet the application scenario requirements of various customers, various types of PCIE device cards have emerged. Limited by the limitations of board space and chassis space, in order to achieve the interconnection of various PCIE device cards with the motherboard CPU, PCIE adapter cards are increasingly used in servers.

[0003] In order to realize the recognition of PCIE device card, the presence of PCIE device card and PCIE adapter card is detected to avoid abnormal loss of device, and provide reference for BMC (Baseboard Management Controller) I2C (Inter-Integrated Circuit) access device.

[0004] In an existing PCIE card in-place detection scheme, the in-place signals of the PCIE card and the adapter card are detected separately, and there are usually multiple adapter cards in a machine, which requires occupying a large number of IOs of the BMC or CPLD, seriously wasting IO resources; in another existing PCIE card in-place detection scheme, an IO expansion chip is added through I2C to realize in-place detection, and the BMC needs to repeatedly access the address of the IO expansion chip. Since there are usually multiple adapter cards in a machine, not only I2C resources are wasted, but also the I2C address conflict problem needs to be considered, and address avoidance or an I2C switch chip needs to be added; at the same time, the IO expansion chip also needs to occupy the board space of the adapter card. Summary of the invention

[0005] The purpose of the present application is to provide a PCIE adapter card and a PCIE device card in-place detection circuit and method, which are used to solve the problem of IO resource waste of the existing BMC or CPLD and waste of I2C resources by adding IO expansion chips, requiring address avoidance or adding I2C switch chips, and the IO expansion chip also needs to occupy the board space of the adapter card.

[0006] In a first aspect, an embodiment of the present application provides a PCIE adapter card and a PCIE device card in-place detection circuit, including:

[0007] A PCIE adapter card slot, wherein one slot is connected to a detection port of a mainboard via a presence signal line and is connected to a power supply via a pull-up resistor, and another slot is connected to a first pull-down resistor;

[0008] A plurality of PCIE device slots, each PCIE device slot comprising a first in-position signal pin and a second in-position signal pin, the second in-position signal pins of different PCIE device slots are directly connected on the link and connected to the first pull-down resistor, and the first in-position signal pins of different PCIE device slots are grounded through second pull-down resistors with different resistance values;

[0009] The in-place detection module is used to detect the voltage of the detection port and perform in-place detection of the PCIE adapter card and the PCIE device card according to the detected voltage value.

[0010] This application only needs one signal line to be implemented by inserting the PCIE adapter card slot of the PCIE adapter card and the PCIE device card slot of the PCIE device card inserted therein, which can greatly save the IO occupation of the BMC or CPLD; no additional I2C device is required, which can save the space of the PCIE adapter card and the I2C resources of the BMC; only one signal line is needed to meet the in-place detection of multiple devices, which can reduce the occupation of the PCIE adapter card and the motherboard connector and the gold finger PIN pin, saving PIN pin resources. In this way, the IO resource waste of the existing BMC or CPLD and the waste of I2C resources by adding IO expansion chips are solved, and the problem of address avoidance or adding I2C switch chips is needed, and the IO expansion chip also needs to occupy the board space of the adapter card.

[0011] In some possible embodiments, one of the slots is connected to the presence signal line via a gold finger or a modular connector input and output MCIO connector.

[0012] The corresponding slots can be connected to the in-place signal lines through hardware connection devices such as gold fingers or modular connectors.

[0013] In some possible embodiments, the detection port detects an analog-to-digital converter ADC of a baseboard management controller BMC on a mainboard to detect an input / output IO interface.

[0014] In this way, the corresponding divided voltage can be detected through the ADC detection IO interface of the BMC, so that the corresponding divided voltage is input into the corresponding calculation unit to perform the PCIE adapter card and PCIE device card in place detection.

[0015] In some possible embodiments, the PCIE adapter card is a gold finger type PCIE adapter card of a GENZ or PCIE standard slot, one of the slots is a third in-position signal pin, and the other slot is a fourth in-position signal pin of the motherboard plug-in connector.

[0016] A PCIE adapter card of the gold finger type using a GENZ or PCIE standard slot can utilize the definition of each pair of in-position signal lines in this standard type to realize the connection of corresponding pull-up resistors and pull-down resistors, thereby realizing the above circuit structure.

[0017] In some possible embodiments, the presence detection module is used to determine that both the PCIE adapter card and the PCIE device card are not online when detecting that the voltage value is the voltage of the power supply.

[0018] If both the PCIE adapter card and the PCIE device card are not online, the voltage division value is zero, so when the detected voltage value is the voltage of the power supply, it is determined that both the PCIE adapter card and the PCIE device card are not online.

[0019] In some possible embodiments, the minimum resistance of the second pull-down resistor is equal to that of the first pull-down resistor, and the resistance values ​​of the second pull-down resistors connected to the first in-position signal pins of different PCIE device slots are different multiples of a basic resistance value, and the basic resistance is the resistance value of the first pull-down resistor.

[0020] In the embodiment of the present application, when the first pull-down resistor and the second pull-down resistor are set, a multiple relationship is set between the resistors, thereby making the voltage division calculation faster.

[0021] In some possible embodiments, the first in-position signal pin and the second in-position signal pin are used to correspond to two in-position pins connected to a PCIE device card, and the two in-position pins on the PCIE device card are connected together, and the third in-position signal pin and the fourth in-position signal pin are used to correspond to two in-position pins connected to a PCIE adapter card, and the two in-position pins of the PCIE adapter card are connected together.

[0022] In some possible embodiments, the in-place detection module is specifically used to determine the in-place states of the PCIE adapter card and PCIE device card corresponding to the detected voltage value according to a pre-set mapping relationship between different in-place states of the PCIE adapter card and PCIE device card and corresponding voltage division values.

[0023] The present application can flexibly set the resistance values ​​of the pull-up resistor and the pull-down resistor, and predetermine the mapping relationship between different in-place states and corresponding voltage division values, so that when the voltage division value is detected, the in-place state of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value can be determined by comparing with the mapping relationship, so that the in-place state detection can be realized more quickly and accurately.

[0024] In some possible embodiments, the presence detection module is arranged in a baseboard management controller BMC;

[0025] Or the in-place detection module is arranged in an ADC chip externally connected to the BMC via I2C, and the ADC chip is connected to the detection port.

[0026] In the embodiment of the present application, the in-place detection module can be set in the BMC or in an ADC chip that is plugged into the BMC via I2C, and can be flexibly set as needed.

[0027] In a second aspect, an embodiment of the present application provides a method for detecting a PCIE adapter card and a PCIE device card in place, comprising:

[0028] Detect the voltage of the detection port of the mainboard;

[0029] According to the preset mapping relationship between different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values, the in-place states of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value are determined.

[0030] In a third aspect, an embodiment of the present application provides a PCIE adapter card and a PCIE device card in-place detection device, including:

[0031] A voltage detection module, used to detect the voltage of the detection port of the mainboard;

[0032] The in-place state detection module is used to determine the in-place state of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value according to the preset mapping relationship between different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values.

[0033] In a fourth aspect, an embodiment of the present application provides a computer program medium, wherein the computer storage medium stores a computer program, and the computer program is used to enable a computer to execute any PCIE adapter card and PCIE device card in-place detection method provided in the embodiment of the present application.

[0034] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained by the structures specifically pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. Obviously, the drawings introduced below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 It is a schematic diagram of the correspondence between a PCIE device card slot and a PCIE device card in the related art;

[0037] Figure 2 It is a schematic diagram of a PCIE device card and a PCIE adapter card in-place detection circuit commonly used in the related art;

[0038] Figure 3 A schematic diagram of a circuit for detecting the presence of a PCIE device card and a PCIE adapter card through an I2C and IO expansion chip in the related art;

[0039] Figure 4 A schematic diagram of a PCIE adapter card and a PCIE device card in-place detection circuit according to an embodiment of the present application;

[0040] Figure 5 A schematic diagram of a PCIE adapter card and a PCIE device card in-place detection circuit according to another embodiment of the present application;

[0041] Figure 6 A flowchart of a method for detecting a PCIE adapter card and a PCIE device card in place according to an embodiment of the present application;

[0042] Figure 7 A schematic diagram of a PCIE adapter card and a PCIE device card in-place detection circuit taking three PCIE device card slots as an example according to an embodiment of the present application;

[0043] Figure 8 A structural diagram of a PCIE device card and a PCIE adapter card in-place detection device according to an embodiment of the present application;

[0044] Fig. 9 A schematic diagram of a PCIE device card and a PCIE adapter card in-place detection device according to an embodiment of the present application. DETAILED DESCRIPTION

[0045] To further illustrate the technical solution provided by the embodiment of the present application, this is described in detail below in conjunction with the accompanying drawings and specific implementation methods. Although the embodiment of the present application provides the method operation steps as shown in the following embodiments or drawings, more or fewer operation steps may be included in the method based on routine or no creative labor. In the steps where there is no necessary causal relationship logically, the execution order of these steps is not limited to the execution order provided by the embodiment of the present application. The method can be executed in the order of the method shown in the embodiment or drawings or in parallel during the actual processing process or when the control device is executed.

[0046] In order to facilitate understanding of the solutions of the embodiments of the present application, the relevant technical terms are explained below.

[0047] With the development of the server industry, the utilization of CPU PCIE resources has attracted more and more attention. PCIE is mainly used to connect peripheral devices, such as graphics cards, sound cards, network cards, hard disk drives, etc. In order to meet the application scenario requirements of various customers, various types of PCIE device cards such as GPU (Graphics Processing Unit), PCIE network card, Raid (Redundant Arrays of Independent Disks) card, HBA (Host Bus Adapter) card, etc. came into being. Limited by the limitations of board space and chassis space, in order to realize the interconnection of various PCIE device cards with the motherboard CPU, PCIE adapter cards are increasingly used in servers.

[0048] A PCIE riser card is a way to add or enhance computer features and functions. It can be used to connect different types of PCIE device cards to the computer motherboard. PCIE riser cards can also be used to expand PCIE slots so that more PCIE cards can be used.

[0049] Traditional PCIE device cards are mostly connected to the motherboard by directly inserting the PCIE standard slot or GEN-Z (Generation Z, a high-speed direct-plug interconnect connector) slot on the motherboard through a gold finger (Connecting finger), or MCIO (Modular Connector Input Output, modular connector input and output) adapter. In order to realize the recognition of PCIE device cards, it is necessary to detect the presence of PCIE device cards and PCIE adapter cards to avoid abnormal loss of devices and provide a reference for BMC (Baseboard Management Controller) I2C (Inter-Integrated Circuit) to access devices.

[0050] According to the device presence detection method specified in the PCIE protocol, such as Figure 1 As shown, the upper part is a pin diagram of a standard PCIE device card, and the lower part is a pin diagram of a standard PCIE device slot, wherein for a CIE device card, the in-position signal PIN pins PRSNT1# and PRSNT2# are connected together through routing; for a PCIE device slot, PRSNT2# of the slot is connected to the detection end after a pull-up resistor, and PRSNT1# is directly grounded; when the PCIE device card is in place, that is, when the PCIE device card is inserted into the PCIE device slot, PRSNT1 is pulled down to 0V, thereby recognizing that the PCIE device card is in place, and the in-position of a directly inserted gold finger PCIE adapter card is usually also achieved in this way.

[0051] In the related art, there are two main PCIE device card in-place detection schemes:

[0052] 1) For PCIE adapter cards with direct connection to gold fingers, such as Figure 2 As shown, usually all the in-place signals of the PCIE card slots and the in-place signals of the PCIE adapter card slots are led out from the gold fingers, connected to the IO of the mainboard CPLD (Complex Programmable Logic Device) and the BMC (Baseboard Management Controller), and then the in-place detection of the PCIE adapter card and the PCIE device card is realized by judging the level of the in-place signal.

[0053] In the PCIE device card in-place detection scheme, the in-place signals of the PCIE device card and the PCIE adapter card are detected separately, and there are usually multiple PCIE adapter cards in a machine, which requires a large number of BMC or CPLD IOs, seriously wasting IO resources. In addition, the number of PINs of the interface (gold finger or MCIO and other external cables) for interconnecting two boards is limited, and in many cases, it cannot meet the in-place detection of all boards, and the number of available PINs is insufficient.

[0054] 2) For some PCIE adapter cards that are connected via MCIO cables, such as Figure 3 As shown in the figure, due to the small number of sideband signal PINs available for MCIO, the presence of the PCIE adapter card itself is usually ignored. The presence of the PCIE device card is to connect the presence signals of all slots of the PCIE device card slot to the IO port of the chip (IO expansion chip) on the adapter card board. The BMC accesses the IO expansion chip through the I2C bus to obtain the presence status of each PCIE device card.

[0055] To implement in-place detection by adding an IO expansion chip through I2C, the BMC needs to repeatedly access the address of the IO expansion chip. In addition, since there are usually multiple adapter cards in a machine, not only will I2C resources be wasted, but I2C address conflicts will also need to be considered, requiring address avoidance or adding an I2C switch chip. At the same time, the IO expansion chip also needs to occupy the board space of the adapter card.

[0056] In view of the waste of IO resources of BMC or CPLD in the related art and the waste of I2C resources by adding IO expansion chips, it is necessary to perform address avoidance or add I2C switch chips, and the IO expansion chips also need to occupy the board space of the adapter card. The present application proposes a PCIE adapter card and a PCIE device card in-place detection circuit and method.

[0057] The present application embodiment provides a PCIE adapter card and a PCIE device card in-place detection circuit, such as Figure 4 As shown, including:

[0058] A PCIE adapter card slot 401, wherein one slot is connected to a detection port of a mainboard via a presence signal line and is connected to a power supply via a pull-up resistor, and another slot is connected to a first pull-down resistor; the pull-up resistor can be represented by R1, and the pull-down resistor can be represented by R2. In the embodiment of the present application, the PCIE adapter card slot includes a plurality of slots, wherein one slot shares a presence signal line with the mainboard, and another slot is connected to a first pull-down resistor. When a PCIE adapter card is not inserted into the PCIE adapter card slot, the pull-down resistor R2 is not incorporated into the circuit for voltage division. When a PCIE adapter card is inserted into the PCIE adapter card slot, the pull-down resistor R2 is connected in parallel with the pull-up resistor R1 for voltage division.

[0059] A plurality of PCIE device card slots 402, each PCIE device card slot includes a first in-position signal pin and a second in-position signal pin, the second in-position signal pins of different PCIE device card slots are directly connected on the link and connected to the first pull-down resistor, and the first in-position signal pins of different PCIE device card slots are grounded through second pull-down resistors with different resistance values; in the embodiment of the present application, the plurality of PCIE device card slots are PCIE device card slots corresponding to different PCIE device cards on the PCIE adapter card for inserting, since each PCIE device card slot includes two in-position signal pins, and the second in-position signal pins of different PCIE device card slots are directly connected on the link and connected to the first pull-down resistor R2, and the in-position signal pins at the other end are connected to different second pull-down resistors, then when a PCIE device card is inserted into any PCIE device card slot, the first pull-down resistor R2 and the second pull-down resistor connected to the self-connected self are connected in parallel, and are connected in parallel with the first pull-up resistor for voltage division, then for different in-position states of different PCIE device cards, the corresponding voltage division values ​​are different.

[0060] The in-place detection module 403 is used to detect the voltage of the detection port, and perform in-place detection of the PCIE adapter card and the PCIE device card according to the detected voltage value.

[0061] The PCIE adapter card and PCIE device card in-place detection circuit and method provided in the embodiment of the present application, the PCIE adapter card slot into which the PCIE adapter card is inserted and the PCIE device card slot into which the PCIE device card is inserted, only need one signal line to realize, which can greatly save the occupation of the IO of the BMC or CPLD; no additional I2C device is required, which can save the space of the PCIE adapter card and the I2C resources of the BMC; only one signal line is needed to meet the in-place detection of multiple devices, which can reduce the occupation of the PCIE adapter card and the motherboard connector and the gold finger PIN pin, and save PIN pin resources. In this way, the IO resource waste of the existing BMC or CPLD and the waste of I2C resources by adding IO expansion chips are solved, and the problem of address avoidance or adding I2C switch chips is needed, and the IO expansion chip also needs to occupy the board space of the adapter card.

[0062] In some possible embodiments, one end of the slot is connected to the in-place signal line via a gold finger or a modular connector input / output MCIO connector. The specific connection method can be implemented in the corresponding technology and will not be described in detail here.

[0063] In some possible embodiments, the detection port is an analog-to-digital converter ADC of a baseboard management controller BMC on the main board that detects the input and output IO interface, so that the BMC can determine the in-place status of the PCIE adapter card and the PCIE device card by detecting the voltage value at the input and output IO interface by detecting the ADC.

[0064] The above-mentioned in-place detection module is a module for determining the in-place status of the PCIE adapter card and the PCIE device card according to the voltage of the detection port. As a possible implementation method, Figure 4 As shown, the in-place detection module is located in the baseboard management controller BMC, and the BMC performs in-place detection of the PCIE adapter card and the PCIE device card according to the detected voltage value; as another possible implementation, Figure 5 As shown, the in-place detection module is set in the ADC chip of the BMC through the I2C plug-in, and the ADC chip is connected to the detection port. The ADC chip performs in-place detection of the PCIE adapter card and the PCIE device card according to the detected voltage value.

[0065] In the embodiment of the present application, the PCIE adapter card is a gold finger type PCIE adapter card for a GENZ or PCIE standard slot, one end of the slot is a third in-position signal pin, and the other end of the slot is a fourth in-position signal pin of the motherboard plug-in connector. For a gold finger type PCIE adapter card for a GENZ or PCIE standard slot, the in-position signal pins PRSNT1# and PRSNT2# are connected together by routing, and for the PCIE adapter card slot, there are corresponding third in-position signal pins PRSNT2# and fourth in-position signal pins PRSNT1#, then the fourth in-position signal pin PRSNT1# is connected to the pull-down resistor R2, and the PRSNT signal of the motherboard is connected to the PCIE adapter card slot through the third in-position signal pin PRSNT2#.

[0066] In some possible embodiments, the above-mentioned in-place detection module detects whether the PCIE adapter card and the PCIE device card are online. One possible situation is that the in-place detection module is used to determine that both the PCIE adapter card and the PCIE device card are not online when it detects that the voltage value is the voltage of the power supply. If the detected voltage value is less than the voltage, it means that there is a voltage division situation, and it is necessary to detect the in-place status of the corresponding PCIE adapter card and PCIE device card according to the specific voltage division value.

[0067] In order to more conveniently and quickly detect the in-place status of the PCIE adapter card and the PCIE device card, the minimum resistance of the second pull-down resistor is equal to the first pull-down resistor, and the resistance of the second pull-down resistor connected to the first in-place signal pin of different PCIE device card slots is different multiples of the basic resistance, and the basic resistance is the resistance of the first pull-down resistor. In this way, the voltage division values ​​corresponding to different in-place states can be calculated according to the parallel connection of the resistors, and the current in-place state can be detected more accurately and quickly.

[0068] In some possible embodiments, the first in-position signal pin and the second in-position signal pin are used to correspond to two in-position pins connected to a PCIE device card, and the two in-position pins on the PCIE device card are connected together, and the third in-position signal pin and the fourth in-position signal pin are used to correspond to two in-position pins connected to a PCIE adapter card, and the two in-position pins of the PCIE adapter card are connected together.

[0069] In some possible embodiments, the above-mentioned in-place detection module is specifically used to determine the in-place state of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value according to the mapping relationship between the different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values ​​set in advance. Since the second pull-down resistors connected to the above-mentioned different PCIE device card slots are different and have a multiple relationship, the voltage values ​​of the detection ports corresponding to various in-place states can be calculated in advance, and the mapping relationship between the different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values ​​can be determined and stored, so that when the voltage value is detected, the in-place state of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value can be determined according to the pre-stored mapping relationship.

[0070] Based on the same inventive concept, the embodiment of the present application also provides a method for detecting a PCIE adapter card and a PCIE device card in place, such as Figure 6 As shown, including:

[0071] Step 601, detecting the voltage of the detection port of the mainboard;

[0072] Step 602, according to the preset mapping relationship between different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values, determine the in-place states of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value.

[0073] In a standard 2U model, the maximum number of PCIE device card slots that a PCIE adapter card can usually support is 3. Here, a 3-slot PCIE adapter card is taken as an example to illustrate the PCIE adapter card and PCIE device card presence detection circuit and method of the embodiment of the present application.

[0074] like Figure 7 As shown, the in-place detection module is integrated in the BMC of the motherboard. The BMC is connected to a slot of the PCIE adapter card slot through a detection port through a in-place signal line, and is connected to a pull-up resistor R1. The in-place signal pins PRSNT2# of the PCIE device card slot are directly connected together on the link and are connected to a pull-down resistor R2. The in-place signal pins PRSNT1# of the PCIE adapter card slot are grounded through a pull-down resistor, wherein the pull-down resistor connected to PRSNT1# of the PCIE adapter card slot 1 has a resistance value of R2, the pull-down resistor connected to PRSNT1# of the PCIE adapter card slot 2 has a resistance value of 2R2, and the pull-down resistor connected to PRSNT1# of the PCIE adapter card slot 3 has a resistance value of 3R2. Different PCIE adapter card slots have different pull-down resistor values, which can achieve voltage differences after voltage division, thereby helping the BMC to determine the slot of the inserted card. The pull-down resistor value settings of more slots can be deduced in the same way.

[0075] When a PCIE riser card is inserted into a PCIE riser card slot, and different positions and numbers of PCIE device cards are inserted into different PCIE device card slots in a PCIE riser card, the resistance values ​​obtained by connecting the corresponding pull-down resistors in parallel will also be different, and thus the voltage values ​​after voltage division monitored by the BMC will also be different. By detecting the voltage of the in-place signal, the in-place status judgment of the following situations can be realized, which can meet the in-place detection requirements in various scenarios.

[0076] 1) There is no PCIE device card or PCIE adapter card in place. At this time, there is no pull-down resistor and the monitoring voltage is directly to VCC;

[0077] At this time, the monitored voltage value is Vadc = VCC.

[0078] 2) Only the PCIE adapter card is in place, and the pull-up resistor R1 on the motherboard side and the pull-down resistor R2 on the adapter card side divide the voltage;

[0079] The voltage value monitored at this time is Vadc = VCC*R2 / (R1+R2);

[0080] 3) The PCIE device inserted into the PCIE device slot 1 is in place. At this time, the pull-down resistor R2 at the adapter end is connected in parallel with the pull-down resistor R2 at the PRSNT1# position of the PCIE device slot 1. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0081] The monitored voltage value at this time is Vadc=VCC*R2 / (2*R1+R2).

[0082] 4) The PCIE device inserted into PCIE device slot 2 is in place. At this time, the pull-down resistor R2 at the adapter card end is connected in parallel with the pull-down resistor 2R2 at the PRSNT1# position of the PCIE device inserted into PCIE device slot 1. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0083] The monitored voltage value at this time is Vadc=VCC*2*R2 / (3*R1+2*R2).

[0084] 5) The PCIE device inserted into PCIE device card slot 3 is in place. At this time, the pull-down resistor R2 at the adapter card end is connected in parallel with the pull-down resistor 3R2 at the PRSNT1# position of SLOT3. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0085] The monitored voltage value at this time is Vadc=VCC*3*R2 / (4*R1+3*R2).

[0086] 6) The PCIE device inserted into PCIE device slot 1 is in place and the PCIE device inserted into PCIE device slot 2 is in place. At this time, the pull-down resistor R2 at the adapter card end is connected in parallel with the pull-down resistor R2 at the PRSNT1# position of the PCIE device slot 1 and the pull-down resistor 2R2 of the PCIE device slot 1. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0087] The monitored voltage value at this time is Vadc=VCC*2*R2 / (5*R1+2*R2).

[0088] 7) The PCIE device inserted into PCIE device slot 1 is in place and the PCIE device inserted into PCIE device slot 3 is in place. At this time, the pull-down resistor R2 at the adapter card end is connected in parallel with the pull-down resistor R2 at the PRSNT1# position of PCIE device slot 1 and the pull-down resistor 3R2 of PCIE device slot 3. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0089] The monitored voltage value at this time is Vadc=VCC*3*R2 / (7*R1+3*R2).

[0090] 8) The PCIE device inserted into PCIE device slot 2 is in place and the PCIE device inserted into PCIE device slot 3 is in place. At this time, the pull-down resistor R2 at the adapter card end is connected in parallel with the pull-down resistor 2R2 at the PRSNT1# position of the PCIE device slot 2 and the pull-down resistor 3R2 of the PCIE device slot 3. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0091] The monitored voltage value at this time is Vadc=VCC*6*R2 / (11*R1+6*R2).

[0092] 9) The PCIE device card inserted into PCIE device slot 1, the PCIE device card inserted into PCIE device slot 2 and the PCIE device card inserted into PCIE device slot 3 are in place at the same time. At this time, the pull-down resistor R2 at the adapter card end is connected in parallel with the pull-down resistor R2 at the PRSNT1# position of PCIE device slot 1, the pull-down resistor 2R2 of PCIE device slot 2, and the pull-down resistor 3R2 of PCIE device slot 3. At this time, the pull-up resistor R1 at the mainboard end is divided by the parallel resistor;

[0093] The monitored voltage value at this time is Vadc=VCC*6*R2 / (17*R1+6*R2).

[0094] In the embodiment of the present application, a mapping relationship table between different in-place states and voltage values ​​of the PCIE adapter card and the PCIE device card can be set in advance according to the voltage values ​​corresponding to different in-place states, as shown in Table 1.

[0095] Table 1 Mapping relationship between voltage value and in-position state

[0096]

[0097]

[0098] The following example takes R1 as 2K, VCC as 1.8V, and R2 as 2K. At this time, 2R2 is 4K, and 3R2 is 6K. The corresponding voltage values ​​in different in-position states are shown in Table 2.

[0099] Table 2 Reference table of voltage division effect after actual setting of resistance value

[0100]

[0101] In this way, the BMC can recognize and distinguish the in-place status of the PCIE adapter card and the PCIE device card by reading different voltage values.

[0102] The embodiment of the present application realizes the in-place detection of multiple boards through ADC. A PCIE adapter card slot and the PCIE device card slot inserted therein only need one signal to realize, which can greatly save the occupation of BMC or CPLD IO; the ADC monitoring method usually does not require additional I2C devices, which can save the space of the adapter card and the I2C resources of the BMC; only one signal is needed to meet the in-place detection of multiple devices, which can reduce the occupation of the adapter card and the motherboard connector and the gold finger PIN pin, saving PIN pin resources;

[0103] Based on the same inventive concept, Figure 8 As shown, an embodiment of the present application provides a PCIE adapter card and a PCIE device card in-place detection device, the device comprising:

[0104] The voltage detection module 801 is used to detect the voltage of the detection port of the mainboard;

[0105] The in-place state detection module 802 is used to determine the in-place state of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value according to the preset mapping relationship between different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values.

[0106] In some possible embodiments, the in-place state detection module is specifically used to determine the in-place state of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value according to the mapping relationship between the different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values ​​set in advance.

[0107] Based on the same inventive concept, the embodiment of the present application also provides a PCIE adapter card and PCIE device card in-place detection device, which can be a separate plug-in chip independent of the BMC, including at least one processor and at least one memory. The memory stores program code, and when the program code is executed by the processor, the processor executes the steps of the PCIE adapter card and PCIE device card in-place detection method described in the above description of this specification according to various exemplary embodiments of the present application.

[0108] Refer to the following Fig. 9 To describe the PCIE adapter card and PCIE device card presence detection device according to this embodiment of the present application. Fig. 9 The PCIE adapter card and PCIE device card presence detection device shown are merely examples and should not bring any limitations to the functions and scope of use of the embodiments of the present application.

[0109] like Fig. 9 As shown, the PCIE adapter card and the PCIE device card presence detection device may include but are not limited to: the at least one processor 901 and the at least one memory 902 .

[0110] The memory 902 may include readable media in the form of volatile memory, such as random access memory (RAM) and / or cache memory, and may further include read-only memory (ROM).

[0111] Memory 902 may also include a program / utility having a set (at least one) of program modules, such program modules including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0112] In some possible implementations, various aspects of a method for detecting presence of a PCIE device card and a PCIE adapter card provided in the present application may also be implemented in the form of a program product, which includes a program code. When the program product is run on a computer device, the program code is used to enable the computer device to execute the steps of a method for detecting presence of a PCIE device card and a PCIE adapter card according to various exemplary implementations of the present application described above in this specification.

[0113] The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0114] The program product for monitoring of the embodiment of the present application can adopt a portable compact disk read-only memory (CD-ROM) and include program code, and can be run on an electronic device. However, the program product of the present application is not limited to this. In this document, a readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, an apparatus or a device or used in combination with it.

[0115] The readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, wherein the readable program code is carried. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The readable signal medium may also be any readable medium other than a readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0116] The program code embodied on the readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination of the foregoing.

[0117] The program code for performing the operations of the present application can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and also conventional procedural programming languages ​​such as "C" language or similar programming languages. The program code can be executed entirely on the user electronic device, partially on the user device, as an independent software package, partially on the user electronic device and partially on the remote electronic device, or entirely on the remote electronic device or server. In the case of a remote electronic device, the remote electronic device can be connected to the user electronic device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external electronic device (for example, using an Internet service provider to connect through the Internet).

[0118] It should be noted that, although several units or subunits of the device are mentioned in the above detailed description, this division is merely exemplary and not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided into multiple units to be embodied.

[0119] In addition, although the operations of the method of the present application are described in a specific order in the drawings, this does not require or imply that the operations must be performed in this specific order, or that all the operations shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps.

[0120] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 Process or multiple processes and boxes Figure 1 A function specified in one or more boxes.

[0121] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 Process or multiple processes and boxes Figure 1 The steps for the functions specified in one or more boxes.

[0122] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0123] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A PCIE adapter card and a PCIE device card in-place detection circuit, characterized in that: include: A PCIE adapter card slot, wherein one slot is connected to a detection port of a mainboard via a presence signal line and is connected to a power supply via a pull-up resistor, and another slot is connected to a first pull-down resistor; A plurality of PCIE device slots, each PCIE device slot comprises a first in-position signal pin and a second in-position signal pin, the second in-position signal pins of different PCIE device slots are directly connected on the link and connected to the first pull-down resistor, and the first in-position signal pins of different PCIE device slots are grounded through second pull-down resistors with different resistance values; The in-place detection module is used to detect the voltage of the detection port and perform in-place detection of the PCIE adapter card and the PCIE device card according to the detected voltage value.

2. The circuit according to claim 1, characterized in that One of the slots is connected to the in-place signal line via a gold finger or a modular connector input and output MCIO connector.

3. The circuit according to claim 1, characterized in that The detection port is an analog-to-digital converter ADC of a baseboard management controller BMC on the main board to detect an input and output IO interface.

4. The circuit according to claim 1, characterized in that The PCIE adapter card is a gold finger type PCIE adapter card of a GENZ or PCIE standard slot, one of the slots is a third in-position signal pin, and the other slot is a fourth in-position signal pin of a motherboard plug-in connector.

5. The circuit according to claim 1, characterized in that The presence detection module is used to determine that both the PCIE adapter card and the PCIE device card are not online when detecting that the voltage value is the voltage of the power supply.

6. The circuit according to any one of claims 1 to 5, characterized in that: The minimum resistance of the second pull-down resistor is equal to that of the first pull-down resistor, and the resistance values ​​of the second pull-down resistors connected to the first in-position signal pins of different PCIE device slots are different multiples of the basic resistance value, and the basic resistance is the resistance value of the first pull-down resistor.

7. The circuit according to any one of claims 1 to 5, characterized in that: The first in-position signal pin and the second in-position signal pin are used to correspond to the two in-position pins of the PCIE device card, and the two in-position pins on the PCIE device card are connected together. The third in-position signal pin and the fourth in-position signal pin are used to correspond to the two in-position pins of the PCIE adapter card, and the two in-position pins of the PCIE adapter card are connected together.

8. The circuit according to claim 6, characterized in that The in-place detection module is specifically used to determine the in-place states of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value according to the preset mapping relationship between different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values.

9. The circuit according to claim 1, characterized in that The presence detection module is arranged in the baseboard management controller BMC; Or the in-place detection module is arranged in an ADC chip externally connected to the BMC via I2C, and the ADC chip is connected to the detection port.

10. A method for detecting the presence of a PCIE adapter card and a PCIE device card, characterized in that: include: Detect the voltage of the detection port of the mainboard; According to the preset mapping relationship between different in-place states of the PCIE adapter card and the PCIE device card and the corresponding voltage division values, the in-place states of the PCIE adapter card and the PCIE device card corresponding to the detected voltage value are determined.

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