Method and apparatus for geometric partitioning mode with adaptive mixing

Abstract

Methods, apparatuses, and non-transitory storage media for video decoding and encoding are provided. In a decoding method, a decoder obtains a context-compressed binarized value generated by compressing the binarized value using one or more contexts. Further, the decoder obtains a hybrid index based on the binarized value of the context compression, where the hybrid index is binarized into one or more bins, and the one or more bins are compressed by the one or more contexts. Further, the decoder obtains a mixing width for the current block based on the mixing index and a mapping relationship between a plurality of mixing indexes and a mixing width set, where the current block is divided into two parts along a partition line for prediction in a geometric partition mode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based on and claims priority from U.S. Provisional Application No. 63 / 350,846, filed on June 9, 2022, entitled “Methods and Devices for Geometric Partitioning Mode with Adaptive Blending,” the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0003] The present disclosure relates to video coding and compression, and more particularly to a method and apparatus for improving coding efficiency of a Geometric Partitioning Mode (GPM). Background Art

[0004] Various video codec technologies can be used to compress video data. Video coding and decoding are performed according to one or more video codec standards. For example, today, some well-known video codec standards include Versatile Video Coding (VVC), High Efficiency Video Coding (HEVC, also known as H.265 or MPEG-H Part 2), and Advanced Video Coding (AVC, also known as H.264 or MPEG-4 Part 10), which are jointly developed by ISO / IEC MPEG and ITU-T VECG. AOMedia Video 1 (AV1) was developed by the Alliance for Open Media (AOM) as a successor to its previous standard VP9. Audio Video Coding (AVS), a digital audio and digital video compression standard, is another video compression standard family developed by the Chinese Audio and Video Codec Standard Working Group. Most existing video coding standards are based on the well-known hybrid video coding framework, that is, using block-based prediction methods (e.g., inter-frame prediction, intra-frame prediction) to reduce the redundancy present in video images or sequences, and using transform coding to compress the energy of prediction errors. An important goal of video coding technology is to compress video data into a form that uses a lower bit rate while avoiding or minimizing video quality degradation.

[0005] The first version of the VVC standard was completed in July 2020, providing approximately 50% bitrate savings or equivalent perceptual quality compared to the previous generation video codec standard HEVC. Although the VVC standard provides significant codec improvements over its predecessor, there is evidence that better codec efficiency can be achieved with additional codec tools. Recently, the Joint Video Exploration Team (JVET), in collaboration with ITU-T VECG and ISO / IEC MPEG, began exploring advanced technologies that can achieve significantly enhanced codec efficiency over VVC. In April 2021, a software code base called the Enhanced Compression Model (ECM) was established for future video codec exploration work. The ECM reference software is based on the VVC Test Model (VTM) developed by JVET for VVC, in which several existing modules (e.g., intra / inter prediction, transform, loop filter, etc.) are further extended and / or improved. In the future, any new codec tools beyond the VVC standard will need to be integrated into the ECM platform and tested using the JVET Common Test Conditions (CTC). Summary of the invention

[0006] The present disclosure provides examples of techniques related to improving the encoding and decoding efficiency of a geometric partitioning mode (GPM) in a video encoding or decoding process.

[0007] According to a first aspect of the present disclosure, a method for video decoding is provided. In the method for video decoding, a decoder may obtain a context-compressed binarized value generated by compressing a binarized value using one or more contexts. In addition, the decoder may obtain a mixed index based on the context-compressed binarized value, wherein the mixed index is binarized into a binarized value. In addition, the decoder may obtain a mixed width for a current block based on the mixed index and a mapping relationship between a plurality of mixed indexes and a mixed width set, wherein the current block is divided into two parts along a partition line for prediction in a geometric partitioning mode.

[0008] According to a second aspect of the present disclosure, a method for video encoding is provided. In the method for video encoding, an encoder may obtain a mixed index based on a mapping relationship and a mixed width of a current block, wherein the current block is divided into two parts along a partition line for prediction in a geometric partitioning mode, and the mapping relationship is a relationship between a plurality of mixed indexes and a set of mixed widths. In addition, the encoder may obtain a binarized value by binarizing the mixed index, wherein the binarized value may include one or more binary bits. In addition, the encoder may obtain a context-compressed binarized value by compressing the binarized value using one or more contexts. In addition, the encoder may signal the context-compressed binarized value in a bitstream.

[0009] According to a third aspect of the present disclosure, a device for video decoding is provided. The device includes one or more processors and a memory, the memory is coupled to the one or more processors and is configured to store instructions executable by the one or more processors. In addition, the one or more processors are configured to perform the method according to the first aspect above when executing the instructions.

[0010] According to a fourth aspect of the present disclosure, a device for video encoding is provided. The device includes one or more processors and a memory, the memory is coupled to the one or more processors and is configured to store instructions executable by the one or more processors. In addition, the one or more processors are configured to perform the method according to the second aspect above when executing the instructions.

[0011] According to a fifth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer-executable instructions is provided, wherein when the computer-executable instructions are executed by one or more computer processors, the one or more computer processors receive a bit stream and execute the method according to the first aspect.

[0012] According to a sixth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer-executable instructions is provided, wherein when the computer-executable instructions are executed by one or more computer processors, the one or more computer processors execute the method according to the second aspect to encode a current block into a bit stream and send the bit stream.

[0013] According to a seventh aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing a bit stream to be decoded by the method according to the first aspect.

[0014] According to an eighth aspect of the present disclosure, a non-transitory computer-readable storage medium is provided, storing a bit stream generated by the method according to the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] A more particular description of examples of the present disclosure will be presented by reference to specific examples shown in the accompanying drawings. Given that these drawings depict only some examples and are therefore not to be considered limiting in scope, the examples will be described and explained with additional specificity and detail through use of the accompanying drawings.

[0016] Figure 1A is a block diagram of a video encoder according to some examples of the present disclosure.

[0017] Figure 1B is a block diagram illustrating an exemplary video encoder according to some examples of the present disclosure.

[0018] Figure 1Cis a block diagram illustrating an exemplary video decoder according to some examples of the present disclosure.

[0019] Figure 2 is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

[0020] Figure 3 is a block diagram of a video decoder according to some examples of the present disclosure.

[0021] Figure 4 Allowable GPM partitions according to some examples of the present disclosure are shown.

[0022] Figure 5 Selection of a unidirectional prediction motion vector from a motion vector in a merge candidate list for a GPM according to some examples of the present disclosure is shown.

[0023] Figure 6 Template matching algorithms according to some examples of the present disclosure are shown.

[0024] Figure 7 A set of selected pixels are shown on which gradient analysis is performed according to some examples of the present disclosure.

[0025] Figure 8 Convolution of a 3x3 Sobel gradient filter is shown according to some examples of the present disclosure.

[0026] Fig. 9 Prediction fusion by weighted averaging of two HoG modes and planes according to some examples of the present disclosure is shown.

[0027] Fig.10 Templates and their reference samples used in TIMD according to some examples of the present disclosure are shown.

[0028] Fig.11 A mix of templates for reordering of GPM partitioning patterns according to some examples of the present disclosure is shown.

[0029] FIG. 12A to FIG. 12C Available IPM candidates for a GPM with inter prediction and intra prediction according to some examples of the present disclosure are shown.

[0030] Fig.12D Disabling combinations for a GPM with inter prediction and intra prediction are shown according to some examples of the present disclosure.

[0031] Fig.13 The distance from any location within a block to a partition edge for a geometric partitioning pattern is shown according to some examples of the present disclosure.

[0032] Fig.14 Some examples according to the present disclosure are shown Fig.13 Example of quantization of distances in .

[0033] Fig.15 Soft blending regions on both sides of a partition boundary are shown according to some examples of the present disclosure.

[0034] Fig.16 GPM mixing in the current ECM 4.0 according to some examples of the present disclosure is shown.

[0035] Fig.17 is a block diagram illustrating a system for encoding and decoding video blocks according to some examples of the present disclosure.

[0036] Fig.18 is a diagram illustrating a computing environment coupled with a user interface according to some examples of the present disclosure.

[0037] Fig.19A is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

[0038] Fig.19B is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

[0039] Fig.19C is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

[0040] Fig.19D is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

[0041] Fig. 20 is a flowchart illustrating a method for video decoding according to some examples of the present disclosure.

[0042] Fig.21 is a diagram showing some examples according to the present disclosure. Fig. 20 The method for video decoding shown in FIG. 1 corresponds to a flowchart of a method for video encoding. DETAILED DESCRIPTION

[0043] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous non-limiting specific details are set forth to aid in understanding the subject matter presented herein. However, it will be apparent to one of ordinary skill in the art that various alternatives may be used. For example, it will be apparent to one of ordinary skill in the art that the subject matter presented herein may be implemented on many types of electronic devices having digital video capabilities.

[0044] The terms used in this disclosure are only suitable for the purpose of describing specific embodiments and are not intended to limit the present disclosure. In the present disclosure and the appended claims, singular forms are also intended to include plural forms, unless other meanings are clearly indicated throughout the disclosure. It should also be understood that the term "and / or" used in this disclosure refers to and includes one or any or all possible combinations of the listed multiple related items.

[0045] References throughout this specification to "one embodiment," "an embodiment," "an example," "some embodiments," "some examples," or similar language indicate that the particular features, structures, or characteristics being described are included in at least one embodiment or example. Unless explicitly stated otherwise, features, structures, elements, or characteristics described in conjunction with one or some embodiments are also applicable to other embodiments.

[0046] Throughout the disclosure, the terms "first", "second", "third", etc. are used as nomenclatures for referring only to related elements (e.g., devices, components, compositions, steps, etc.), without implying any spatial or temporal order, unless otherwise explicitly stated. For example, "first device" and "second device" may refer to two separately formed devices, or two parts, components, or operating states of the same device, and may be named arbitrarily.

[0047] The terms "module", "sub-module", "circuit", "sub-circuit", "circuitry", "sub-circuitry", "unit", or "sub-unit" may include memory (shared, dedicated, or combined) that stores code or instructions that can be executed by one or more processors. A module may include one or more circuits with or without stored code or instructions. A module or circuit may include one or more components connected directly or indirectly. These components may or may not be physically attached to or located adjacent to each other.

[0048] As used herein, the terms "if" or "when" may be understood to mean "on" or "in response to" depending on the context. These terms, if they appear in a claim, may not indicate that the associated limitation or feature is conditional or optional. For example, a method may include the following steps: i) when condition X exists or if condition X exists, perform function or action X', and ii) when condition Y exists or if condition Y exists, perform function or action Y'. The method may be implemented using both the ability to perform function or action X' and the ability to perform function or action Y'. Therefore, both functions X' and Y' may be performed at different times when the method is performed multiple times.

[0049] A unit or module may be implemented only by software, only by hardware, or by a combination of hardware and software. In a software-only implementation, for example, a unit or module may include functionally related code blocks or software components that are linked together directly or indirectly to perform a specific function.

[0050] Similar to all previous video codec standards, ECM is built on a block-based hybrid video codec framework. Figure 1A A block diagram of a general block-based hybrid video coding system is given. The input video signal is processed block by block (called coding unit (CU)). In ECM-1.0, a CU can be up to 128×128 pixels. However, like VVC, a coding tree unit (CTU) is split into multiple CUs based on quadtree / binarytree / ternarytree to adapt to the changing local characteristics.

[0051] In the multi-type tree structure, a CTU is first divided into a quadtree structure, and then each quadtree leaf CU can be further divided into a binary tree structure and a ternary tree structure.

[0052] Figure 2 is a schematic diagram showing a multi-type tree partitioning mode according to some embodiments of the present disclosure. Figure 2 As shown, there are five types of partitioning, four-way partitioning, horizontal binary partitioning, vertical binary partitioning, horizontal ternary partitioning, and vertical ternary partitioning.

[0053] exist Figure 2 In the video processing, spatial prediction and / or temporal prediction can be performed. Spatial prediction (or "intra-frame prediction") uses pixels from samples of coded neighboring blocks in the same video picture / slice (which are called reference samples) to predict the current video block. Spatial prediction reduces the spatial redundancy inherent in the video signal. Temporal prediction (also called "inter-frame prediction" or "motion compensated prediction") uses reconstructed pixels from coded video pictures to predict the current video block. Temporal prediction reduces the temporal redundancy inherent in the video signal. The temporal prediction signal for a given CU is typically signaled by one or more motion vectors (MVs), which indicate the amount and direction of motion between the current CU and its temporal reference.

[0054] In addition, if multiple reference pictures are supported, a reference picture index is additionally sent, which is used to identify which reference picture in the reference picture repository the temporal prediction signal comes from. After spatial prediction and / or temporal prediction, the mode decision block in the encoder selects the best prediction mode, for example, based on a rate-distortion optimization method. The prediction block is then subtracted from the current video block; and the prediction residual is decorrelated using transforms and quantization. The quantized residual coefficients are inversely quantized and inversely transformed to form a reconstructed residual, which is then added back to the prediction block to form the reconstructed signal of the CU. In addition, before the reconstructed CU is placed in the reference picture repository and used to encode and decode future video blocks, loop filtering, such as a deblocking filter, sample adaptive offset (SAO), and an adaptive loop filter (ALF), may be applied to the reconstructed CU. In order to form an output video bitstream, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy coding unit for further compression and packaging to form a bitstream.

[0055] Figure 3 A block diagram of a block-based video decoder according to some embodiments of the present disclosure is provided. In the block-based hybrid video decoder 200, the video bitstream 201 is first entropy decoded at the entropy decoding unit 202. The coding mode and prediction information are sent to the spatial prediction unit (in the case of intra-frame coding) or the temporal prediction unit (in the case of inter-frame coding) to form a prediction block. The residual transform coefficients are sent to the dequantization unit 204 and the inverse transform unit 206 to reconstruct the residual block. The prediction block and the residual block are then added together. Before the reconstructed block is stored in the reference picture buffer 213, loop filtering 209 may be further performed on the reconstructed block. The reconstructed video in the reference picture buffer 213 is then sent out for display and for predicting future video blocks.

[0056] The main focus of this disclosure is to further improve the codec efficiency of context modeling for GPM with adaptive hybrid proposed in JVET-Z0127. Below, some relevant codec tools in ECM are briefly reviewed. Then, some deficiencies of the existing design of context modeling in GPM with adaptive hybrid are discussed. Finally, solutions for improving the existing GPM with adaptive hybrid are proposed.

[0057] Fig.17 is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel according to some embodiments of the present disclosure. Fig.17As shown in , system 10 includes a source device 12 that generates and encodes video data to be later decoded by a destination device 14. Source device 12 and destination device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some implementations, source device 12 and destination device 14 are equipped with wireless communication capabilities.

[0058] In some embodiments, the target device 14 may receive the encoded video data to be decoded via the link 16. The link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14. In one example, the link 16 may include a communication medium that enables the source device 12 to send the encoded video data directly to the target device 14 in real time. The encoded video data may be modulated according to a communication standard (such as a wireless communication protocol) and sent to the target device 14. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network (e.g., a local area network, a wide area network, or a global network such as the Internet). The communication medium may include a router, a switch, a base station, or any other device that may be useful in facilitating communication from the source device 12 to the target device 14.

[0059] In some other embodiments, the encoded video data may be sent from the output interface 22 to the storage device 32. Subsequently, the encoded video data in the storage device 32 may be accessed by the target device 14 via the input interface 28. The storage device 32 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a digital versatile disk (DVD), a compact disc read-only memory (CD-ROM), a flash memory, a volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data. In another example, the storage device 32 may correspond to a file server or another intermediate storage device that can store the encoded video data generated by the source device 12. The target device 14 can access the stored video data from the storage device 2 via streaming or downloading. The file server can be any type of computer capable of storing encoded video data and sending the encoded video data to the target device 14. Exemplary file servers include a web server (e.g., for a website), a File Transfer Protocol (FTP) server, a Network Attached Storage (NAS) device, or a local disk drive. The target device 14 may access the encoded video data through any standard data connection suitable for accessing the encoded video data stored on the file server, including a wireless channel (e.g., a Wireless Fidelity (Wi-Fi) connection), a wired connection (e.g., a Digital Subscriber Line (DSL), a cable modem, etc.), or a combination of both. The transmission of the encoded video data from the storage device 32 may be a streaming transmission, a download transmission, or a combination of both a streaming transmission and a download transmission.

[0060] like Fig.17 As shown in , source device 12 includes video source 18, video encoder 20 and output interface 22. Video source 18 may include sources such as or a combination of such sources: a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video. As an example, if video source 18 is a camera of a security monitoring system, source device 12 and target device 14 may form a camera phone or a video phone. However, the embodiments described in this application are generally applicable to video encoding and decoding, and may be applied to wireless and / or wired applications.

[0061] Captured, pre-captured, or computer-generated video may be encoded by video encoder 20. Encoded video data may be sent directly to target device 14 via output interface 22 of source device 12. Encoded video data may also (or optionally) be stored on storage device 32 for later access by target device 14 or other devices for decoding and / or playback. Output interface 22 may also include a modem and / or a transmitter. In some examples, video encoder 20 may be a video encoding system as shown in FIG. 1.

[0062] Target device 14 includes input interface 28, video decoder 30, and display device 34. Input interface 28 may include a receiver and / or a modem and receives encoded video data via link 16. The encoded video data communicated via link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included in the encoded video data sent on a communication medium, stored on a storage medium, or stored on a file server. In some examples, video decoder 30 may be a processor such as a processor, such as a processor, a processor, or a display device. Figure 3 The video decoder shown.

[0063] In some embodiments, the target device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with the target device 14. The display device 34 displays the decoded video data to the user and may include any of a variety of display devices, such as a Liquid Crystal Display (LCD), a plasma display, an Organic Light Emitting Diode (OLED) display, or another type of display device.

[0064] The video encoder 20 and the video decoder 30 may operate according to a proprietary standard or an industry standard (e.g., VVC, HEVC, MPEG-4, Part 10, AVC) or an extension of such a standard. It should be understood that the present application is not limited to a specific video encoding / decoding standard and may be applicable to other video encoding / decoding standards. It is generally believed that the video encoder 20 of the source device 12 may be configured to encode video data according to any of these current standards or future standards. Similarly, it is also generally believed that the video decoder 30 of the target device 14 may be configured to decode video data according to any of these current standards or future standards.

[0065] The video encoder 20 and the video decoder 30 may be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA), discrete logic, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device may store instructions for the software in a suitable non-volatile computer-readable medium, and use one or more processors to execute the instructions in the hardware to perform the video encoding / decoding operations disclosed in the present disclosure. Each of the video encoder 20 and the video decoder 30 may be included in one or more encoders or decoders, and any of the encoders or decoders may be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device.

[0066] In a typical video encoding and decoding process, a video sequence usually includes an ordered set of frames or pictures. Each frame may include three sample arrays, denoted as SL, SCb, and SCr. SL is a two-dimensional array of luma samples. SCb is a two-dimensional array of Cb chroma samples. SCr is a two-dimensional array of Cr chroma samples. In other cases, a frame may be monochrome and therefore include only a two-dimensional array of luma samples.

[0067] like Fig.19A As shown in FIG. , the video encoder 20 (or more specifically, the prediction unit 45) (as shown in FIG. Figure 1B 20 (as shown in FIG. 1 ) generates an encoded representation of a frame by first dividing the frame into a set of CTUs. A video frame may include an integer number of CTUs sequentially ordered from left to right and from top to bottom in a raster scan order. Each CTU is the largest logical coding unit and is encoded by the video encoder 20 (as shown in FIG. 1 ). Figure 1B As shown in FIG. 1 , the width and height of the CTU are signaled in the sequence parameter set so that all CTUs in the video sequence have the same size of one of 128×128, 64×64, 32×32, and 16×16. However, it should be noted that the present application is not necessarily limited to a specific size. Fig.19B As shown in , each CTU may include one CTB for luma samples, two corresponding coding tree blocks for chroma samples, and syntax elements for encoding and decoding the samples of the coding tree blocks. The syntax elements describe the properties of different types of units for coding pixel blocks and how they may be encoded in video decoder 30 (e.g., Figure 1CThe CTU reconstructs the video sequence at the position shown in Figure 1, including inter-frame prediction or intra-frame prediction, intra-frame prediction mode, motion vector and other parameters. In a monochrome picture or a picture with three separate color planes, a CTU may include a single coding tree block and syntax elements for encoding and decoding samples of the coding tree block. The coding tree block may be an N×N sample block.

[0068] To achieve better performance, the video encoder 20 (such as Figure 1B As shown in FIG. 1 , a tree partitioning method such as binary tree partitioning, ternary tree partitioning, quadtree partitioning, or a combination thereof may be recursively performed on the coding tree block of the CTU, and the CTU may be divided into smaller CUs. Fig.19C As depicted in , a 64×64 CTU 400 is first partitioned into four smaller CUs, each CU having a block size of 32×32. Among the four smaller CUs, CU 410 and CU 420 are partitioned into four CUs of a block size of 16×16, respectively. Two 16×16 CUs 430 and CU 440 are further partitioned into four CUs of a block size of 8×8, respectively. Fig.19D Depicted is a diagram showing Fig.19C The quadtree data structure of the final result of the partitioning process of the CTU 400 depicted in FIG. 4 is shown in FIG. 4 , where each leaf node of the quadtree corresponds to a CU of each size ranging from 32×32 to 8×8. Fig.19B Each CU may include a CB of luma samples and two corresponding coding blocks of chroma samples of the same size frame, and syntax elements for encoding and decoding the samples of the coding blocks. In a monochrome picture or a picture with three separate color planes, a CU may include a single coding block and syntax structures for encoding and decoding the samples of the coding block. It should be noted that Fig.19C and Fig.19D The quadtree partitioning depicted in FIG is for illustrative purposes only, and one CTU may be split into CUs based on quadtree / ternary tree / binary tree partitioning to adapt to varying local characteristics. In a multi-type tree structure, one CTU is divided by a quadtree structure, and each quadtree leaf CU may be further divided by a binary tree structure and a ternary tree structure. Figure 2 As shown, there are five possible partition types for a coding block with a width of W and a height of H, namely, quadruple partition, horizontal binary partition, vertical binary partition, horizontal ternary partition and vertical ternary partition.

[0069] In some embodiments, the video encoder 20 may further divide the coding block of the CU into one or more M×NPBs. A PB is a rectangular (square or non-square) sample block to which the same prediction (inter or intra) is applied. The PU of a CU may include a PB of luma samples, two corresponding PBs of chroma samples, and syntax elements for predicting the PBs. In a monochrome picture or a picture with three separate color planes, a PU may include a single PB and a syntax structure for predicting the PB. The video encoder 20 may generate a predicted luma block, a predicted Cb block, and a predicted Cr block for the luma PB, Cb PB, and Cr PB of each PU of the CU.

[0070] Video encoder 20 may use intra prediction or inter prediction to generate a prediction block for a PU. If video encoder 20 uses intra prediction to generate a prediction block for a PU, video encoder 20 may generate the prediction block for the PU based on decoded samples of a frame associated with the PU. If video encoder 20 uses inter prediction to generate a prediction block for a PU, video encoder 20 may generate the prediction block for the PU based on decoded samples of one or more frames other than the frame associated with the PU.

[0071] After the video encoder 20 generates the predicted luma block, the predicted Cb block, and the predicted Cr block for one or more PUs of a CU, the video encoder 20 may generate a luma residual block for the CU by subtracting the predicted luma block of the CU from the original luma coding block of the CU, so that each sample in the luma residual block of the CU indicates the difference between a luma sample in one of the predicted luma blocks of the CU and a corresponding sample in the original luma coding block of the CU. Similarly, the video encoder 20 may generate a Cb residual block and a Cr residual block for the CU, respectively, so that each sample in the Cb residual block of the CU indicates the difference between a Cb sample in one of the predicted Cb blocks of the CU and a corresponding sample in the original Cb coding block of the CU, and each sample in the Cr residual block of the CU may indicate the difference between a Cr sample in one of the predicted Cr blocks of the CU and a corresponding sample in the original Cr coding block of the CU.

[0072] In addition, if Fig.19CAs shown in , the video encoder 20 may use quadtree partitioning to decompose the luma residual block, Cb residual block and Cr residual block of the CU into one or more luma transform blocks, Cb transform blocks and Cr transform blocks, respectively. A transform block is a rectangular (square or non-square) sample block to which the same transform is applied. A TU of a CU may include a transform block of luma samples, two corresponding transform blocks of chroma samples, and syntax elements for transforming the transform block samples. Therefore, each TU of a CU may be associated with a luma transform block, a Cb transform block and a Cr transform block. In some examples, the luma transform block associated with a TU may be a sub-block of the luma residual block of the CU. The Cb transform block may be a sub-block of the Cb residual block of the CU. The Cr transform block may be a sub-block of the Cr residual block of the CU. In a monochrome picture or a picture with three separate color planes, a TU may include a single transform block and a syntax structure for transforming the samples of the transform block.

[0073] The video encoder 20 may apply one or more transforms to the luma transform block of the TU to generate a luma coefficient block for the TU. The coefficient block may be a two-dimensional array of transform coefficients. The transform coefficient may be a scalar. The video encoder 20 may apply one or more transforms to the Cb transform block of the TU to generate a Cb coefficient block for the TU. The video encoder 20 may apply one or more transforms to the Cr transform block of the TU to generate a Cr coefficient block for the TU.

[0074] After generating a coefficient block (e.g., a luma coefficient block, a Cb coefficient block, or a Cr coefficient block), video encoder 20 may quantize the coefficient block. Quantization generally refers to a process in which transform coefficients are quantized to potentially reduce the amount of data used to represent the transform coefficients, thereby providing further compression. After video encoder 20 quantizes the coefficient block, video encoder 20 may entropy encode syntax elements indicating the quantized transform coefficients. For example, video encoder 20 may perform CABAC on the syntax elements indicating the quantized transform coefficients. Finally, video encoder 20 may output a bitstream including a sequence of bits that form a representation of an encoded frame and associated data, and the bitstream is stored in storage device 32 or sent to target device 14.

[0075] After receiving the bitstream generated by the video encoder 20, the video decoder 30 may parse the bitstream to obtain syntax elements from the bitstream. The video decoder 30 may reconstruct a frame of video data based at least in part on the syntax elements obtained from the bitstream. The process of reconstructing the video data is generally the inverse of the encoding process performed by the video encoder 20. For example, the video decoder 30 may perform an inverse transform on a coefficient block associated with a TU of the current CU to reconstruct a residual block associated with the TU of the current CU. The video decoder 30 also reconstructs the coding block of the current CU by adding samples of the prediction block for the PU of the current CU to corresponding samples of the transform block of the TU of the current CU. After reconstructing the coding block for each CU of the frame, the video decoder 30 may reconstruct the frame.

[0076] As mentioned above, video codecs mainly use two modes, namely, intra-frame prediction (or intra-frame prediction) and inter-frame prediction (or inter-frame prediction) to achieve video compression. It should be noted that IBC can be regarded as intra-frame prediction or a third mode. Between the two modes, inter-frame prediction contributes more to codec efficiency than intra-frame prediction because motion vectors are used to predict the current video block from the reference video block.

[0077] However, with the ever-improving video data capture technology and more refined video block sizes for retaining details in the video data, the amount of data required to represent the motion vector of the current frame has also increased significantly. One way to overcome this challenge is to benefit from the fact that not only a group of neighboring CUs in both the spatial domain and the temporal domain have similar video data for prediction purposes, but the motion vectors between these neighboring CUs are also similar. Therefore, the motion information of spatially neighboring CUs and / or temporally co-located CUs can be used as an approximation of the motion information (e.g., motion vector) of the current CU by exploring the spatial and temporal correlation of the spatially neighboring CUs and / or the temporally co-located CUs, which is also referred to as the "motion vector predictor (MVP)" of the current CU.

[0078] Instead of combining as above Figure 1B The actual motion vector of the current CU determined by the motion estimation unit 42 is encoded into the video bitstream, and the motion vector predictor of the current CU is subtracted from the actual motion vector of the current CU to generate the motion vector difference (MVD) of the current CU. By doing so, the motion vector determined by the motion estimation unit 42 for each CU of the frame does not need to be encoded into the video bitstream, and the amount of data used to represent motion information in the video bitstream can be significantly reduced.

[0079] As in the process of selecting a prediction block in a reference frame during inter-frame prediction of a coding block, both the video encoder 20 and the video decoder 30 need to adopt a set of rules for constructing a motion vector candidate list (also called a "merge list") of the current CU using those potential candidate motion vectors associated with the spatial neighboring CUs and / or the temporal co-located CUs of the current CU, and then selecting a member from the motion vector candidate list as the motion vector predictor of the current CU. By doing so, the motion vector candidate list itself does not need to be sent from the video encoder 20 to the video decoder 30, and the index of the selected motion vector predictor in the motion vector candidate list is sufficient for the video encoder 20 and the video decoder 30 to use the same motion vector predictor in the motion vector candidate list to encode and decode the current CU.

[0080] Geometric partitioning mode (GPM)

[0081] In VVC, for inter prediction, geometric partitioning mode is supported. Geometric partitioning mode is signaled as a special merge mode through a CU level flag. In the current GPM design, for each possible CU size (excluding 8×64 and 64×8) with width and height not less than 8 and not more than 64, GPM mode supports a total of 64 partitions.

[0082] When using this mode, the CU Figure 4 The geometric positioning straight line shown in is divided into two parts. The position of the partition line is mathematically derived from the angle and offset parameters of the specific partition. Each part of the geometric partition in the CU uses its own motion for inter-frame prediction; only unidirectional prediction is allowed for each partition, that is, each part has one motion vector and one reference index. Unidirectional prediction motion constraints are applied to ensure that only two motion compensated predictions are required for each CU, the same as conventional bidirectional prediction. If a geometric partitioning mode is used for the current CU, a geometric partitioning index indicating the partitioning mode (angle and offset) of the geometric partition, and two merge indexes (one merge index for each partition) are further signaled. The number of the maximum GPM candidate size is explicitly signaled at the sequence level.

[0083] One-way prediction candidate list construction

[0084] To derive the unidirectional prediction motion vector for a geometric partition, first derive a unidirectional prediction candidate list directly from the regular merge candidate list generation process. Denote n as the index of the unidirectional prediction motion in the geometric unidirectional prediction candidate list. The LX motion vector of the nth merge candidate (where X is an odd or even number of n) is used as the nth unidirectional prediction motion vector for the geometric partition mode. These motion vectors are in Figure 5In the case where the corresponding LX motion vector of the n-th extended merge candidate does not exist, the L(1-X) motion vector of the same candidate is used as the unidirectional prediction motion vector for the geometric partitioning mode instead.

[0085] Blending along the edges of geometric partitions

[0086] After obtaining each geometric partition using its own motion, blending is applied to the two unidirectional prediction signals to derive samples around the edges of the geometric partitions. A blending weight for each position of the CU is derived based on the distance from each individual sample position to the corresponding partition edge.

[0087] like Fig.13 As shown, the distance (or displacement) d(x_c,y_c) from any position within a block to the edge of a partition (or partition boundary) is mathematically defined by the Hessian norm form:

[0088]

[0089] where x c and c Indicates the position relative to the center of the block; represents the angle parameter, and ρ represents the offset parameter of the partition boundary.

[0090] In order to realize displacement calculation in practice, the angle parameter and the offset parameter are quantized into integers.

[0091] d(x c ,y c )=.(x c +ρ x,j )cosLut[i] / >>3+.(y c +ρ y,j )cosLut[(i+8)%32] / >>3,

[0092] where ρ x,j and ρ y,j is a quantized offset that depends on the width and height of the block; and cosLut[i] represents the quantized cosine lookup table for angle parameter index i.

[0093] Finally, the continuous sample point positions (x c ,y c ) is quantized to integer positions (m,n), and the displacement d(m,n) is given by:

[0094] d(m,n)=.(m+ρ x.j )<<1-w+1 / cosLut[i]+.(n+ρ y,j )<<1-h+1 / cosLut[(i+8)%32].

[0095] Fig.14 Some examples according to the present disclosure are shown Fig.13 Quantification of the distance in .

[0096] Quantized d(m,n) and d(x c ,y c ) is given by the following formula:

[0097]

[0098] Fig.15 Soft blending regions on both sides of a partition boundary are shown according to some examples of the present disclosure. Fig.15 As shown in FIG. 1 , a soft mix region with a width of θ luminance samples is defined on both sides of the partition boundary. Outside the soft mix region, only weighting values ​​0 or 8 can be selected. In the soft mix region, the weighting value δ(x c ,y c ):

[0099]

[0100] The ramp function is also quantized to integer positions to obtain weighted values ​​ω(m,n), which are used in the mixing process of GPM, i.e.,

[0101] ω(m,n)=Clip3(0,8,(d(m,n)+32+4)>>3).

[0102] Two mixing matrices (W0 and W1) are generated using these values ​​in different locations.

[0103] The GPM predictor is then given by:

[0104]

[0105] GPM signaling design

[0106] According to the current GPM design, the use of GPM is indicated by signaling a flag at the CU level. The flag is signaled only when the current CU is encoded through merge mode or skip mode. Specifically, when the flag is equal to one, it indicates that the current CU is predicted through GPM. Otherwise (the flag is equal to zero), the CU is encoded and decoded through another merge mode, such as normal merge mode, merge mode with motion vector difference, combined inter and intra prediction, etc. When GPM is enabled for the current CU, a syntax element (i.e., merge_gpm_partition_idx) is further signaled to indicate the applied geometric partitioning mode (which specifies the direction and offset of the straight line from the CU center that divides the CU into two partitions, such as Figure 4). Thereafter, two syntax elements merge_gpm_idx0 and merge_gpm_idx1 are signaled to indicate the indexes of the unidirectional prediction merge candidates used for the first GPM partition and the second GPM partition. More specifically, these two syntax elements are used to determine the unidirectional MVs of the two GPM partitions from the unidirectional prediction merge list. According to the current GPM design, in order to make the two unidirectional MVs more different, the two indexes cannot be the same. Based on such a priori knowledge, the unidirectional prediction merge index of the first GPM partition is first signaled and used as a prediction factor to reduce the signaling overhead of the unidirectional prediction merge index of the second GPM partition. In detail, if the second unidirectional prediction merge index is less than the first unidirectional prediction merge index, the original value of the second unidirectional prediction merge index is directly signaled. Otherwise (the second unidirectional prediction merge index is greater than the first unidirectional prediction merge index), the value of the second unidirectional prediction merge index is subtracted by 1 before being signaled to the bitstream. On the decoder side, the first unidirectional prediction merge index is first decoded. Then, for decoding of the second unidirectional prediction merge index, if the resolved value is less than the first unidirectional prediction merge index, the second unidirectional prediction merge index is set equal to the resolved value; otherwise (the resolved value is equal to or greater than the first unidirectional prediction merge index), the second unidirectional prediction merge index is set equal to the resolved value plus 1. Table 1 shows the existing syntax elements for the GPM mode in the current VVC specification.

[0107] Table 1 Existing GPM syntax elements in the merged data syntax table of the VVC specification

[0108]

[0109] On the other hand, in the current GPM design, truncated unary codes are used for the binarization of two unidirectional prediction merge indexes (i.e., merge_gpm_idx0 and merge_gpm_idx1). In addition, because the two unidirectional prediction merge indexes cannot be the same, different maximum values ​​are used to truncate the codewords of the two unidirectional prediction merge indexes, which are set equal to MaxGPMMergeCand-1 and MaxGPMMergeCand-2 for merge_gpm_idx0 and merge_gpm_idx1, respectively. MaxGPMMergeCand is the number of candidates in the unidirectional prediction merge list. On the decoder side, when the received value of merge_gpm_idx1 is equal to or greater than merge_gpm_idx0, the value of merge_gpm_idx1 will be increased by 1, taking into account that the values ​​of merge_gpm_idx0 and merge_gpm_idx1 cannot be the same. When the GPM mode is applied, two different binarization methods are applied to translate the syntax merge_gpm_partition_idx into a string of binary bits. Specifically, in VVC, the syntax element is binarized by fixed-length code and truncated binary code.

[0110] Motion signaling for regular inter-mode

[0111] Similar to the HEVC standard, in addition to merge mode / skip mode, both VVC and AVS3 allow an inter-CU to explicitly specify its motion information in the bitstream. In general, the motion information signaling in both VVC and AVS3 remains the same as that in the HEVC standard. Specifically, an inter-prediction syntax (i.e., inter_pred_idc) is first signaled to indicate whether the prediction signal is from list L0, list L1, or both. For each reference list used, the corresponding reference picture is identified by signaling a reference picture index ref_idx_lx (x=0, 1) for the corresponding reference list, and the corresponding MV is represented by an MVP index mvp_lx_flag (x=0, 1) used to select the MV predictor (MVP), followed by its motion vector difference (MVD) between the target MV and the selected MVP. In addition, in the VVC standard, a control flag mvd_l1_zero_flag is signaled at the slice level. When mvd_l1_zero_flag is equal to 0, L1 MVD is signaled in the bitstream; otherwise (when mvd_l1_zero_flag flag is equal to 1), L1 MVD is not signaled and its value is always inferred to be zero at the encoder and decoder.

[0112] Bidirectional prediction with CU-level weights

[0113] In previous standards before VVC and AVS3, when weighted prediction (WP) is not applied, a bidirectional prediction signal is generated by averaging the unidirectional prediction signals obtained from two reference pictures. In VVC, a tool codec, bidirectional prediction with CU-level weights (BCW), is introduced to improve the efficiency of bidirectional prediction. Specifically, instead of simple averaging, the bidirectional prediction in BCW is extended by allowing a weighted average of two prediction signals, as depicted below:

[0114] P'(i,j)=((8-w)·P0(i,j)+w·P1(i,j)+4)>>3.

[0115] In VVC, when the current picture is a low-latency picture, the weight of a BCW coding block is allowed to be selected from a predefined set of weight values ​​w∈{-2,3,4,5,10}, and a weight of 4 represents the traditional bidirectional prediction case where two unidirectional prediction signals are equally weighted. For low latency, only 3 weights w∈{3,4,5} are allowed. In general, although there are some design similarities between WP and BCW, the two coding tools aim to solve the problem of brightness changes at different granularities. However, because the interaction between WP and BCW may potentially complicate the VVC design, it is not allowed to enable both tools at the same time. Specifically, when WP is enabled for a slice, the BCW weights of all bidirectional predicted CUs in the slice are not signaled and are inferred to be 4 (i.e., equal weights are applied).

[0116] Template Matching

[0117] Template Matching (TM) is a decoder-side MV derivation method used to refine the motion information of the current CU by finding the best match between a template consisting of the top and left neighboring reconstructed samples of the current CU and a reference block in the reference picture (i.e., the same size as the template). Figure 6 As shown in , an MV is searched around the initial motion of the current CU in the [-8, +8] pixel search range. The best match can be defined as the MV that achieves the lowest matching cost (e.g., sum of absolute difference (SAD), sum of absolute transform difference (SATD), etc.) between the current template and the reference template. There are two different ways to apply TM mode to inter-frame coding.

[0118] In AMVP mode, MVP candidates are determined based on template matching differences to pick the MVP candidate that achieves the minimum difference between the current block template and the reference block template, and then TM performs MV refinement only for this specific MVP candidate. TM refines this MVP candidate starting from full-pixel MVD accuracy (or 4 pixels for 4-pixel AMVR mode) within the [-8, +8] pixel search range using an iterative diamond search. Depending on the AMVR mode specified as in the table below, the AMVP candidate can be further refined by using a cross search with full-pixel MVD accuracy (or 4 pixels for 4-pixel AMVR mode), followed by half-pixel accuracy and 1 / 4 pixel accuracy. This search process ensures that the MVP candidate still maintains the same MV accuracy as indicated by the AMVR mode after the TM process.

[0119] Table 2 Search patterns for AMVR mode and merge mode

[0120]

[0121] In merge mode, a similar search method applies to the merge candidates indicated by the merge index. As shown in the table above, TM can be performed all the way to 1 / 8 pixel MVD accuracy or skip those MVD accuracy exceeding half pixel MVD accuracy, depending on whether an alternative interpolation filter is used based on the merge motion information (an alternative interpolation filter is used when AMVR is half pixel mode).

[0122] Decoder-side Intra Mode Derivation (DIMD)

[0123] DIMD is an intra-frame codec tool in which the luma intra prediction mode (IPM) is not sent via the bitstream. Instead, it is derived in the same way at the encoder and decoder using previously encoded / decoded pixels. The DIMD method performs texture gradient processing to derive 2 best modes. These two modes and the planar mode are then applied to the block, and their prediction factors are weighted averaged. For intra-coded blocks, the selection of DIMD is signaled in the bitstream using a flag. At the decoder, if the DIMD flag is true, the same previously encoded neighboring pixels are used to derive the intra prediction mode during the reconstruction process. If the DIMD flag is false, the intra prediction mode is parsed from the bitstream as in traditional intra-frame coding mode.

[0124] In order to derive the intra prediction mode for a block, we first have to select a set of neighboring pixels for which the gradient analysis will be performed. For normative purposes, these pixels should be in the decoded / reconstructed pixel pool. Figure 7As shown, a template is selected that surrounds the current block T pixels to the left and T pixels upward. Next, a gradient analysis is performed on the pixels of the template. This allows the determination of the principal direction for the template, assuming (and this is the core premise of the proposed method) that there is a high probability that the principal direction is the same as the principal direction of the current block. A simple 3×3 Sobel gradient filter is used and defined by the following matrix that is convolved with the template:

[0125] and

[0126] For each pixel of the template, each of these two matrices is point-wise multiplied with a 3×3 window centered on the current pixel and consisting of its 8 immediate neighbors, and the results are summed. Thus, two values ​​Gx (from the multiplication result with Mx) and Gy (from the multiplication result with My) corresponding to the gradient at the current pixel are obtained in the horizontal and vertical directions, respectively.

[0127] Figure 8 The convolution process is shown. Pixel 801 is the current pixel. Pixel 803 (including pixel 801) is a pixel that can be gradient analyzed. Pixel 802 is a pixel that cannot be gradient analyzed due to the lack of some neighbors. Pixel 804 is an available (reconstructed) pixel outside the template under consideration, which is used for gradient analysis of pixel 803. In the case where pixel 804 is not available (for example, because the block is too close to the boundary of the picture), the gradient analysis of all pixels 803 using this pixel 804 is not performed. For each pixel 803, the intensity (G) and direction (O) of the gradient are calculated using Gx and Gy, as follows:

[0128] G=|G x |+|G y | and

[0129] The direction of the gradient is then converted to an intra-frame angular prediction mode for indexing the histogram (initialized to zero first). The histogram values ​​in the intra-frame angular mode are increased by G. Once all pixels 803 in the template have been processed, the histogram will contain the cumulative value of the gradient strength for each intra-frame angular mode. The IPM corresponding to the two highest histogram bars is selected for the current block. If the maximum value in the histogram is 0 (indicating that gradient analysis cannot be performed, or the area that makes up the template is flat), the DC mode is selected as the intra-frame prediction mode for the current block.

[0130] The two IPMs corresponding to the two highest Histogram of Oriented Gradients (HoG) bins are combined with the plane mode. Prediction fusion is applied as a weighted average of the above three predictors. For this purpose, the weight of the plane is fixed to 21 / 64 (~1 / 3). The remaining weight 43 / 64 (~2 / 3) is then shared between the two HoG IPMs in proportion to the magnitude of their HoG bins. Fig. 9 The process was visualized.

[0131] The derived intra modes are included in the master list of intra most probable modes (MPMs), so the DIMD process is performed before building the MPM list. The master derived intra modes of a DIMD block are stored with the block and used for MPM list construction for neighboring blocks.

[0132] Template-based intra mode derivation (TIMD)

[0133] For each intra mode in MPM, calculate Fig.10 The sum of absolute transformed differences (SATD) between the predicted samples and the reconstructed samples of the template area shown, and the intra modes of the first two modes with the smallest SATD cost are selected, and then they are merged with the weights, and this weighted intra prediction is used to encode and decode the current CU.

[0134] The cost of the two selected patterns is compared to the threshold. In the test, a cost factor of 2 is applied as follows:

[0135] costMode2<2×costMode1.

[0136] If this condition is true, then fusion is applied, otherwise only mode 1 is used.

[0137] The weights of the modes are calculated according to their SATD costs as follows:

[0138] weight1=costMode2 / (costMode1+costMode2)

[0139] weight2=1-weight1.

[0140] Geometric Partitioning Mode with Template Matching (TM)

[0141] In ECM, template matching (TM) is applied on top of the geometric partitioning mode. When GPM is enabled for the current CU, two unidirectional motion information sets of GPM are derived from the GPM merge candidate list for each part of the GPM. The GPM merge candidate list is constructed as follows:

[0142] In the first step, interleaved list 0 MV candidates and list 1 MV candidates are derived directly from the regular merge candidate list, where list 0 MV candidates have a higher priority than list 1 MV candidates. A pruning method with an adaptive threshold based on the current CU size is applied to remove redundant MV candidates.

[0143] In the second step, interleaved list-1 MV candidates and list-0 MV candidates are further derived directly from the regular merge candidate list, where list-1 MV candidates have a higher priority than list-0 MV candidates. The same pruning method with adaptive threshold is also applied to remove redundant MV candidates.

[0144] The third step is to fill in zero MV candidates until the GPM candidate list is full.

[0145] A CU level flag is further signaled to indicate that TM is enabled for GPM, i.e., the two motion vectors of the GPM are further refined using template matching. During this template matching, one of the following template types may be used for refinement, i.e., above (A), left (L), above plus left (A+L) of the current block. In the current ECM 3.1 (adopted from JVET W0065), the template type is selected based on the angle parameter of the GPM, as shown in Table 3 below.

[0146] Table 3 Template type selection

[0147] Partition Angle 0 2 3 4 5 8 11 12 13 14 First Division A A A A L+A L+A L+A L+A A A Second Division L+A L+A L+A L L L L L+A L+A L+A Partition Angle 16 18 19 20 21 24 27 28 29 30 First Division A A A A L+A L+A L+A L+A A A Second Division L+A L+A L+A L L L L L+A L+A L+A

[0148] The motion is then refined by minimizing the difference between the current template and the template in the reference picture using the same search pattern of merge mode with the half-pixel interpolation filter disabled.

[0149] Template matching based reordering for GPM segmentation mode

[0150] In VVC and ECM-3.1, there are 64 GPM partition modes, and the use of the partition mode for each GPM coding unit (CU) is signaled using a fixed-length binary code. This coding approach may mean that all GPM partition modes are treated as equally probable events, so a fixed-length code can be used for signaling accordingly.

[0151] A template matching based GPM segmentation pattern reordering method was first proposed in JVET document JVET-Y0135. The template matching cost for each GPM segmentation pattern is calculated, and the segmentation patterns are reordered based on the cost at both the encoder and decoder sides. Only the best N candidates are available, where N is less than or equal to 64. Golomb-Rice codes are used instead of fixed-length binary codes to signal the GPM pattern index.

[0152] The reordering method for the GPM partitioning mode is a two-step process after generating the corresponding reference templates of the two GPM partitions in the coding unit, as follows:

[0153] Mix the reference templates of the two GPM partitions using the corresponding weights of the partitioning mode (i.e., generate 64 mixed reference templates), and calculate the corresponding TM costs of these mixed reference templates;

[0154] Re-sort the TM costs in ascending order and mark the best N candidates as available segmentation patterns.

[0155] The edges on the template extend from the edges of the current CU, such as Fig.11 The corresponding weights used in the template's blending process are calculated similarly to the GPM weight derivation process. The only differences are as follows:

[0156] The sample point positions on the template (relative to the original positions of the CU) are used to derive weights;

[0157] • The weights are mapped to 0 and 8 before use, depending on which one is closer, and so the edges on the template are cleanly cut to simplify calculations during blending of the templates.

[0158] GPM with inter-frame prediction and intra-frame prediction

[0159] In previous GPM designs, inter prediction with two unidirectional predictions is used to generate the final prediction. JVET-X0166 and JVET-Y0065 introduced a method that combines inter prediction and intra prediction for GPM.

[0160] In GPM with inter prediction and intra prediction, for each GPM separated region, the final prediction samples are generated by weighting the inter prediction samples and the intra prediction samples. Each part contains a flag to indicate whether inter prediction or intra prediction is used. The inter prediction samples are derived by the same scheme as the current GPM, while the intra prediction samples are derived by the intra prediction mode (IPM) candidate list and the index signaled from the encoder. The IPM candidate list size is predefined to be 3. The available IPM candidates are parallel angle modes (such as Fig. 12Aparallel mode as shown in ), perpendicular angle mode relative to the GPM block boundary (as shown in Fig. 12B vertical mode as shown in Fig. 12C In addition, as shown in Fig.12D The GPM with intra prediction and intra prediction shown is limited in this method to reduce the signaling overhead for IPM and avoid increasing the size of the intra prediction circuit on the hardware decoder. In addition, direct motion vector and IPM storage is introduced on the GPM mixed region to further improve the codec performance.

[0161] In addition, the IPM list within the GPM frame can be further improved by DIMD, TIMD and angle mode from neighboring blocks. More specifically, parallel mode is used in the first position of the IPM list, and then the IPM candidates from the neighbors' TIMD, DIMD and angle mode are used to perform cropping between candidates.

[0162] Regarding neighbor mode derivation, there are up to five positions for available neighbor blocks, but they are restricted by the angles of the GPM block boundaries, as shown in Table 4 below.

[0163] Table 4. Location of neighboring blocks subject to angle constraints of GPM

[0164] GPM Angle 0 2 3 4 5 8 11 12 13 14 First Division A A A A L+A L+A L+A L+A A A Second Division L+A L+A L+A L L L L L+A L+A L+A Partition Angle 16 18 19 20 21 24 27 28 29 30 First Division A A A A L+A L+A L+A L+A A A Second Division L+A L+A L+A L L L L L+A L+A L+A

[0165] The motion is then refined by minimizing the difference between the current template and the template in the reference picture using the same search pattern in merge mode with the half-pixel interpolation filter disabled.

[0166] GPM Adaptive Mixing

[0167] The GPM adaptive hybrid method has been disclosed in JVET-Z0127.

[0168] During the development of VVC, the Geometric Partitioning Mode (GPM) was adopted. During the development of ECM, GPM was further enhanced by, for example, GPM+TM, GPM+MMVD, and inter+intra GPM. However, the mixing strength of GPM has not been improved since the original GPM design. That is, Fig.16 As shown, for all different contents, the blending strength or blending area width θ is fixed.

[0169] The weighting values ​​in the blending mask can be given by a ramp function:

[0170]

[0171] With θ=2 pixels fixed in the current ECM (VVC) design, the ramp function can be quantized as:

[0172] ω m，n =Clip3(0,8,(d(m,n)+32+4)>>3).

[0173] This design is not necessarily optimal because a fixed blending region width may not always provide the best blending quality for various types of video content. For example, screen video content often contains strong textures and sharp edges, which require a narrow blending region to preserve edge information. For camera-captured content, blending is usually required; however, the blending region width depends on multiple factors, such as the actual boundaries of moving objects and the uniqueness of the motion of the two partitions.

[0174] To solve the above problems, an adaptive blending scheme is proposed for GPM, which dynamically adjusts the width of the blending region around the GPM partition boundary. Specifically, the width of the blending region (i.e., θ) is allowed to be selected from a set of predefined values ​​(e.g., {0, 1, 2, 4, 8}). The optimal blending region width is determined for each GPM CU at the encoder and is signaled to the decoder based on a syntax element merge_gpm_blending_width_idx. In this scheme, all predefined blending strength values ​​are shiftable, while all cropping and shifting operations in the existing GPM blending process can be maintained without any changes.

[0175] In addition, the range of weights is increased from [0, 8] to [0, 32] to accommodate the increased width of the GPM mixing region. Specifically, the weights are calculated as:

[0176]

[0177] In current GPM adaptive mixing, the index of the mix width needs to be signaled into the bitstream at the encoder and needs to be parsed at the decoder. In current methods, all bins of the mix width index are encoded and decoded using the same context, which is inefficient in terms of compression performance. To further improve the compression performance of GPM with adaptive mixing, several context modeling methods are proposed to improve the encoding and decoding efficiency of the mix width index.

[0178] Methods and apparatus are provided for improving context modeling of mixed-width indices for geometric partitioning patterns with adaptive mixing.

[0179] All bins after binarization of the mixed-width index are compressed with the context, and the compressed value is the context-compressed binarized value.

[0180] Mixed-width encoding and decoding with 1 context

[0181] In this embodiment, all bins after binarization of the mixed width index are compressed with the same context (probability model), as done in JVET-Z0127. Here, the binarization method can be, but is not limited to, a truncated unary method, a truncated rice method, and an exponential Golomb method.

[0182] Mixed-width encoding and decoding with 2 contexts

[0183] In this embodiment, two contexts (denoted as C0 and C1) are used to compress the bins of the mixed width index. For example, in the GPM adaptive mixing method of JVEY-Z0127, the mixed width candidates are predefined as θ = {0, 1, 2, 4, 8}. The binarization method and context modeling design are shown in Table 5. The first bin of the index is encoded and decoded using context C0, while the remaining bins are encoded and decoded using context C1.

[0184] Table 5 Two context mixed width codecs when the mixed width is {0, 1, 2, 4, 8}

[0185] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 0 011 <![CDATA[C0C1 C1]]> 2 1 010 <![CDATA[C0 C1 C1]]> 3 4 000 <![CDATA[C0 C1 C1]]> 4 8 001 <![CDATA[C0 C1 C1]]>

[0186] In yet another example, the mixed width candidates may be defined as θ={1 / 2, 1, 2, 4, 8}. The binarization method and the context modeling method are designed as Table 6 below.

[0187] Table 6 Two context mixing width codecs for mixing widths {1 / 2, 1, 2, 4, 8}

[0188] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 / 2 011 <![CDATA[C0C1 C1]]> 2 1 010 <![CDATA[C0C1 C1]]> 3 4 000 <![CDATA[C0C1 C1]]> 4 8 001 <![CDATA[C0C1 C1]]>

[0189] In yet another case, the mixed width candidates may be defined as θ={0, 1 / 2, 2, 4, 8}. The binarization method and the context modeling method are designed as Table 7 below.

[0190] Table 7 Two context mixing width codecs for mixing widths {0, 1 / 2, 2, 4, 8}

[0191] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 0 011 <![CDATA[C0C1 C1]]> 2 1 / 2 010 <![CDATA[C0C1 C1]]> 3 4 000 <![CDATA[C0C1 C1]]> 4 8 001 <![CDATA[C0C1 C1]]>

[0192] In yet another example, the mixed width candidate may be defined as θ={0, 2, 4}. The binarization method and the context modeling method are designed as Table 8 below.

[0193] Table 8 Two context mixed width codecs when the mixed width is {0, 2, 4}

[0194] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 0 01 <![CDATA[C0C1]]> 2 4 00 <![CDATA[C0C1]]>

[0195] In yet another example, the mixed width candidate may be defined as θ={0, 2, 8}. The binarization method and the context modeling method are designed as Table 9 below.

[0196] Table 9 Two context mixed width codecs when the mixed width is {0, 2, 8}

[0197] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 0 01 <![CDATA[C0C1]]> 2 8 00 <![CDATA[C0C1]]>

[0198] In yet another example, the mixed width candidate may be defined as θ={1 / 2, 2, 4}. The binarization method and the context modeling method are designed as Table 10 below.

[0199] Table 10 Two context mixed width encoding and decoding when the mixed width is {1 / 2, 2, 4}

[0200] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 / 2 01 <![CDATA[C0C1]]> 2 4 00 <![CDATA[C0C1]]>

[0201] In yet another example, the mixed width candidate may be defined as θ={1 / 2, 2, 8}. The binarization method and the context modeling method are designed as Table 11 below.

[0202] Table 11 Two context mixed width codecs for the case where the mixed width is {1 / 2, 2, 8}

[0203] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 / 2 01 <![CDATA[C0C1]]> 2 8 00 <![CDATA[C0C1]]>

[0204] In yet another example, the mixed width candidates may be defined as θ={1, 2, 4}. The binarization method and the context modeling method are designed as Table 12 below.

[0205] Table 12 Two context mixed width codecs for the case where the mixed width is {1, 2, 4}

[0206] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 01 <![CDATA[C0C1]]> 2 4 00 <![CDATA[C0C1]]>

[0207] In yet another example, the mixed width candidates may be defined as ={1, 2, 8}. The binarization method and the context modeling method are designed as Table 13 below.

[0208] Table 13 Two context mixed width codecs for the case where the mixed width is {1, 2, 8}

[0209] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 01 <![CDATA[C0C1]]> 2 8 00 <![CDATA[C0C1]]>

[0210] Mixed-width encoding and decoding with 3 contexts

[0211] In this embodiment, three contexts (denoted as C0, C1 and C2) are used to compress the bins of the mixed-width index.

[0212] For example, in the GPM adaptive mixing method of JVEY-Z0127, the mixing width candidate is predefined as θ = {0, 1, 2, 4, 8}. The binarization method and context modeling design are shown in Table 14. The first binary bit of the index is encoded and decoded using context C0, the second binary bit is encoded and decoded using context C1, and the remaining binary bits are encoded and decoded using context C2.

[0213] Table 14 Three context mixed width encoding and decoding when the mixed width is {0, 1, 2, 4, 8}

[0214] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 0 011 <![CDATA[C0C1C2]]> 2 1 010 <![CDATA[C0C1C2]]> 3 4 000 <![CDATA[C0C1C2]]> 4 8 001 <![CDATA[C0C1C2]]>

[0215] In yet another example, the mixed width candidates may be defined as θ={1 / 2, 1, 2, 4, 8}. The binarization method and the context modeling method are designed as Table 15 below.

[0216] Table 15 Three context mixing width encoding and decoding when the mixing width is {1 / 2, 1, 2, 4, 8}

[0217]

[0218]

[0219] In yet another example, the mixed width candidates may be defined as θ={0, 1 / 2, 2, 4, 8}. The binarization method and the context modeling method are designed as Table 16 below.

[0220] Table 16 Three context mixing width encoding and decoding when the mixing width is {0, 1 / 2, 2, 4, 8}

[0221] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 / 2 011 <![CDATA[C0C1C2]]> 2 0 010 <![CDATA[C0C1C2]]> 3 4 000 <![CDATA[C0C1C2]]> 4 8 001 <![CDATA[C0C1C2]]>

[0222] Mixed-width encoding and decoding with 4 contexts

[0223] In this embodiment, four contexts (denoted as C0, C1, C2, and C3) are used to compress the bins of the mixed-width index.

[0224] For example, in the GPM adaptive mixing method of JVEY-Z0127, the mixing width candidate is predefined as θ = {0, 1, 2, 4, 8}. The binarization method and context modeling design are shown in Table 17. The first binary bit of the index is encoded and decoded using context C0, and the second binary bit is encoded and decoded using context C1. If the second binary bit is equal to 1, the third binary bit is encoded and decoded using context C2, otherwise the third binary bit is encoded and decoded using context C3.

[0225] Table 17 Four context mixed width encoding and decoding when the mixed width is {0, 1, 2, 4, 8}

[0226] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 0 011 <![CDATA[C0C1C2]]> 2 1 010 <![CDATA[C0C1C2]]> 3 4 000 <![CDATA[C0C1C3]]> 4 8 001 <![CDATA[C0C1C3]]>

[0227] In yet another example, the mixed width candidates may be defined as θ={1 / 2, 1, 2, 4, 8}. The binarization method and the context modeling method are designed as Table 18 below.

[0228] Table 18 Four context mixing width encoding and decoding when the mixing width is {1 / 2, 1, 2, 4, 8}

[0229]

[0230]

[0231] In yet another example, the mixed width candidates may be defined as θ={0, 1 / 2, 2, 4, 8}. The binarization method and the context modeling method are designed as Table 19 below.

[0232] Table 19 Four context mixing width encoding and decoding when the mixing width is {0, 1 / 2, 2, 4, 8}

[0233] index Mixed Theta Binarization value Context 0 2 1 <![CDATA[C0]]> 1 1 / 2 011 <![CDATA[C0C1C2]]> 2 0 010 <![CDATA[C0C1C2]]> 3 4 000 <![CDATA[C0C1C3]]> 4 8 001 <![CDATA[C0C1C3]]>

[0234] Fig.18 A computing environment 1610 is shown coupled to a user interface 1650. The computing environment 1610 may be part of a data processing server. The computing environment 1610 may include a processor 1620, a memory 1630, and an input / output (I / O) interface 1640.

[0235] The processor 1620 generally controls the overall operation of the computing environment 1610, such as operations associated with display, data acquisition, data communication, and image processing. The processor 1620 may include one or more processors to execute instructions to perform all or some steps in the above method. In addition, the processor 1620 may include one or more modules that facilitate interaction between the processor 1620 and other components. The processor may be a central processing unit (CPU), a microprocessor, a single-chip microcomputer, a graphics processing unit (GPU), etc.

[0236] The memory 1630 is configured to store various types of data to support the operation of the computing environment 1610. The memory 1630 may include predetermined software 1632. Examples of such data include instructions for any application or method operating on the computing environment 1610, video data sets, image data, etc. The memory 1630 may be implemented by using any type of volatile or non-volatile memory device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0237] I / O interface 1640 provides an interface between processor 1620 and peripheral interface modules such as a keyboard, click wheel, buttons, etc. Buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. I / O interface 1640 may be coupled to an encoder and a decoder.

[0238] In an embodiment, a non-transitory computer-readable storage medium is also provided, which includes, for example, a plurality of programs in a memory 1630, which can be executed by a processor 1620 in a computing environment 1610 to perform the above method. Optionally, the non-transitory computer-readable storage medium may store therein a bit stream or a data stream, the bit stream or the data stream including the bit stream or the data stream generated by an encoder (e.g., Fig.17 The video encoder 20 in the example generates a video signal for a decoder (e.g., Fig.17 The non-transitory computer-readable storage medium may be, for example, a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0239] In an embodiment, a computing device is also provided, comprising: one or more processors (e.g., processor 1620); and a non-transitory computer-readable storage medium or memory 1630 storing therein a plurality of programs executable by the one or more processors, wherein the one or more processors are configured to perform the above-mentioned method when executing the plurality of programs.

[0240] In an embodiment, a computer program product is also provided, including a plurality of programs, for example in the memory 1630, which can be executed by the processor 1620 in the computing environment 1610 to perform the above method. For example, the computer program product may include a non-transitory computer-readable storage medium.

[0241] In an embodiment, the computing environment 1610 may be implemented using one or more ASICs, DSPs, digital signal processing devices (DSPDs), programmable logic devices (PLDs), FPGAs, GPUs, controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0242] The description of the present disclosure has been presented for purposes of illustration and is not intended to be exhaustive or limited to the present disclosure. Many modifications, variations, and alternative embodiments will be apparent to one of ordinary skill in the art having the benefit of the teachings presented in the foregoing description and the associated drawings.

[0243] Unless otherwise explicitly stated, the order of the steps of the method according to the present disclosure is intended to be illustrative only, and the steps of the method according to the present disclosure are not limited to the order specifically described above, but may be changed according to actual circumstances. In addition, at least one step of the method according to the present disclosure may be adjusted, combined or deleted according to actual needs.

[0244] The examples are chosen and described in order to explain the principles of the present disclosure and to enable other persons skilled in the art to understand the various embodiments of the present disclosure and to best utilize the basic principles and various embodiments with various modifications suitable for the specific use contemplated. Therefore, it should be understood that the scope of the present disclosure is not limited to the specific examples of the disclosed embodiments, and modifications and other embodiments are intended to be included within the scope of the present disclosure.

[0245] Fig. 20 is a flow chart illustrating a method for video decoding according to an example of the present disclosure. The example method may be implemented by a decoder.

[0246] In step 2001, at the decoder side, the processor 1620 may obtain a context-compressed binarized value generated by compressing a binarized value using one or more contexts, wherein the binarized value includes one or more binary bits. For example, as shown in Table 5, the binarized value of the mixed width index has one or more binary bits. The binary bits are compressed with the context to form the context-compressed binarized value.

[0247] In step 2002, the processor 1620 may obtain a mixed index based on the binarized value compressed by the context, wherein the mixed index is binarized into the binarized value. For example, as shown in Table 5, the processor 1620 obtains the mixed index from the first column based on the binarized value compressed by the context, wherein the mixed index in the first column is binarized into binary bits in the third column, and the binary bits in the third column are compressed by the context in the fourth column.

[0248] In step 2003, the processor 1620 may obtain a mixed width for a current block based on a mixed index and a mapping relationship between a plurality of mixed indexes and a mixed width set, wherein the current block is divided into two parts along a partition line for prediction in a geometric partitioning mode, such as Figure 4 , Figure 15 to Figure 16 For example, as shown in Table 5, the mapping relationship between the mixing index and the mixing width is variable.

[0249] In some embodiments, the mixed width set includes a plurality of predefined values. Figure 5 As shown, the plurality of predefined values ​​may include 2, 0, 1, 4, and 8. In another example, Figure 6 As shown, the plurality of predefined values ​​may include 2, 1 / 2, 1, 4, and 8. Tables 7 to 19 respectively show different examples of the plurality of predefined values.

[0250] In some examples, when the binarization value includes multiple binary bits, the one or more contexts may include a first context and a second context, a first binary bit in the multiple binary bits is encoded and decoded using the first context, and the remaining binary bits in the multiple binary bits are encoded and decoded using the second context. For example, as shown in Table 5, the first context is C0 and the second context is C1. Tables 6-13 respectively show different examples of encoding and decoding the first binary bit and the remaining binary bits using the first context and the second context.

[0251] In another example, when the binarization value includes multiple binary bits, the one or more contexts may include a first context, a second context, and a third context, and the first binary bit of the multiple binary bits is encoded and decoded using the first context, the second binary bit of the multiple binary bits is encoded and decoded using the second context, and the third binary bit of the multiple binary bits is encoded and decoded using the third context. For example, as shown in Table 14, the first context is C0, the second context is C1, and the third context is C2. Tables 15-16 respectively show different examples of encoding and decoding the first binary bit and the remaining binary bits using the first context, the second context, and the third context.

[0252] In one example, when the binarized value includes multiple binary bits, the one or more contexts may include a first context, a second context, a third context, and a fourth context, a first binary bit among the multiple binary bits is encoded and decoded using the first context, and a second binary bit among the multiple binary bits is encoded and decoded using the second context, in response to determining that the second binary bit is equal to one, a third binary bit among the multiple binary bits is encoded and decoded using the third context, and in response to determining that the second binary bit is not equal to one, the third binary bit among the multiple binary bits is encoded and decoded using the fourth context. For example, as shown in Table 17, the first context is C0, the second context is C1, the third context is C2, and the fourth context is C3. Tables 18-19 show different examples of encoding and decoding the first binary bit and the remaining binary bits using the first context, the second context, and the third context, respectively.

[0253] Fig.21 is shown as Fig. 20 The method for video decoding shown corresponds to a flow chart of a method for video encoding. The example method may be implemented by an encoder.

[0254] In step 2101, at the encoder side, the processor 1620 may obtain based on the mapping relationship and the mixed width of the current block, where the current block is divided into two parts along the partition line for prediction in the geometric partition mode, such as Figure 4 , Figure 15 to Figure 16 As shown, the mapping relationship is the relationship between multiple mixing indexes and mixing width sets. For example, if the block size condition is met, the processor 1620 obtains a predefined value set θ={0, 1, 2, 4, 8}.

[0255] In step 2102, the processor 1620 may obtain a binarized value by binarizing the mixed index, wherein the binarized value includes one or more binary bits. For example, in Table 5, the processor may binarize the mixed index in the first column into a binarized value in the third column, and the binarized value in the third column has one or more binary bits.

[0256] In step 2103, the processor 1620 may compress the binarized value using one or more contexts to obtain a context-compressed binarized value. For example, in Table 5, the processor 1620 may compress the binarized value in the third column using the context in the fourth column to obtain a context-compressed binarized value.

[0257] In step 2104 , the processor 1620 may signal the context-compressed binarized value in a bitstream.

[0258] In some embodiments, the mixed width set includes a plurality of predefined values. Figure 5 As shown, the plurality of predefined values ​​may include 2, 0, 1, 4, and 8. In another example, Figure 6 As shown, the plurality of predefined values ​​may include 2, 1 / 2, 1, 4, and 8. Tables 7 to 19 respectively show different examples of the plurality of predefined values.

[0259] In some examples, when the binarization value includes multiple binary bits, the one or more contexts may include a first context and a second context, a first binary bit in the multiple binary bits is encoded and decoded using the first context, and the remaining binary bits in the multiple binary bits are encoded and decoded using the second context. For example, as shown in Table 5, the first context is C0 and the second context is C1. Tables 6-13 respectively show different examples of encoding and decoding the first binary bit and the remaining binary bits using the first context and the second context.

[0260] In another example, when the binarization value includes multiple binary bits, the one or more contexts may include a first context, a second context, and a third context, and the first binary bit of the multiple binary bits is encoded and decoded using the first context, the second binary bit of the multiple binary bits is encoded and decoded using the second context, and the third binary bit of the multiple binary bits is encoded and decoded using the third context. For example, as shown in Table 14, the first context is C0, the second context is C1, and the third context is C2. Tables 15-16 respectively show different examples of encoding and decoding the first binary bit and the remaining binary bits using the first context, the second context, and the third context.

[0261] In one example, when the binarized value includes multiple binary bits, the one or more contexts may include a first context, a second context, a third context, and a fourth context, a first binary bit among the multiple binary bits is encoded and decoded using the first context, and a second binary bit among the multiple binary bits is encoded and decoded using the second context, in response to determining that the second binary bit is equal to one, a third binary bit among the multiple binary bits is encoded and decoded using the third context, and in response to determining that the second binary bit is not equal to one, the third binary bit among the multiple binary bits is encoded and decoded using the fourth context. For example, as shown in Table 17, the first context is C0, the second context is C1, the third context is C2, and the fourth context is C3. Tables 18-19 show different examples of encoding and decoding the first binary bit and the remaining binary bits using the first context, the second context, and the third context, respectively.

[0262] The above method can be implemented using an apparatus including one or more circuits, including an application specific integrated circuit (ASIC), a digital signal processor (DSP), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA), a controller, a microcontroller, a microprocessor or other electronic components. The apparatus can use circuits combined with other hardware or software components to perform the above method. Each module, submodule, unit or subunit disclosed above can be implemented at least in part using one or more circuits.

[0263] In view of the specification and practice of the present disclosure disclosed herein, other examples of the present disclosure will be apparent to those skilled in the art. This application is intended to cover any variation, use or adaptation of the present disclosure that follows the general principles of the present disclosure, and includes deviations from the present disclosure that fall within known or customary practices in the art. It is intended that the specification and examples be considered exemplary only.

[0264] It should be understood that the present disclosure is not limited to the specific examples described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof.

Claims

1. A method for video decoding, comprising: Obtaining, by a decoder, a context-compressed binarized value generated by compressing a binarized value using one or more contexts, wherein the binarized value includes one or more binary bits; Obtaining, by the decoder, a mixed index based on the binarized value compressed by the context, wherein the mixed index is binarized into the binarized value; as well as The decoder obtains a mixed width for a current block based on the mixed index and a mapping relationship between multiple mixed indexes and a mixed width set, wherein the current block is divided into two parts along a partition line for prediction in a geometric partitioning mode. The method according to claim 1 , wherein the set of mixed widths comprises a plurality of predefined values.

3. The method of claim 2, wherein in response to determining that the binarized value includes a plurality of binary bits, the one or more contexts include a first context and a second context, A first bin of the plurality of bins is encoded and decoded using the first context, and remaining bins of the plurality of bins are encoded and decoded using the second context.

4. The method of claim 2, wherein in response to determining that the binarized value includes a plurality of binary bits, the one or more contexts include a first context, a second context, and a third context, A first bin of the plurality of bins is encoded or decoded using the first context, A second bin of the plurality of bins is encoded and decoded using the second context, and a third bin of the plurality of bins is encoded and decoded using the third context.

5. The method of claim 2, wherein in response to determining that the binarized value includes a plurality of binary bits, the one or more contexts include a first context, a second context, a third context, and a fourth context, A first bin of the plurality of bins is encoded or decoded using the first context, and a second bin of the plurality of bins is encoded or decoded using the second context, In response to determining that the second bin is equal to one, a third bin of the plurality of bins is encoded and decoded using the third context, and In response to determining that the second bin is not equal to one, a third bin of the plurality of bins is encoded and decoded using the fourth context.

6. The method of claim 3, wherein the set of mixed widths comprises one of the following value sets: {0,1,2,4,8}, {1 / 2,1,2,4,8}, {0,1 / 2,2,4,8}, {0,2,4}, {0,2,8}, {1 / 2,2,4}, {1 / 2,2,8}, {1,2,4}, or {1,2,8}.

7. The method of claim 4, wherein the set of mixed widths comprises one of the following sets of values: {0,1,2,4,8}, {1 / 2,1,2,4,8}, or {0,1 / 2,2,4,8}.

8. The method of claim 5, wherein the set of mixed widths comprises one of the following sets of values: {0,1,2,4,8}, {1 / 2,1,2,4,8}, or {0,1 / 2,2,4,8}.

9. A method for video encoding, comprising: Obtaining, by the encoder, a mixing index based on a mapping relationship and a mixing width of a current block, wherein the current block is divided into two parts along a partition line for prediction in a geometric partitioning mode, and the mapping relationship is a relationship between a plurality of mixing indexes and a set of mixing widths; The encoder binarizes the mixed index to obtain a binarized value, wherein the binarized value includes one or more binary bits; The encoder compresses the binarized value by using one or more contexts to obtain a context-compressed binarized value; as well as The context compressed binarized values ​​are signaled by the encoder in a bitstream stream.

10. The method of claim 9, wherein the set of mixing widths comprises a plurality of predefined values.

11. The method of claim 10, wherein in response to determining that the binarized value includes a plurality of binary bits, the one or more contexts include a first context and a second context, A first bin of the plurality of bins is encoded and decoded using the first context, and remaining bins of the plurality of bins are encoded and decoded using the second context.

12. The method of claim 10, wherein in response to determining that the binarized value includes a plurality of binary bits, the one or more contexts include a first context, a second context, and a third context, A first bin of the plurality of bins is encoded and decoded using the first context, a second bin of the plurality of bins is encoded and decoded using the second context, and a third bin of the plurality of bins is encoded and decoded using the third context.

13. The method of claim 10, wherein in response to determining that the binarized value includes a plurality of binary bits, the one or more contexts include a first context, a second context, a third context, and a fourth context, A first bin of the plurality of bins is encoded and decoded using the first context, and a second bin of the plurality of bins is encoded using the second context, In response to determining that the second bin is equal to one, a third bin of the plurality of bins is encoded and decoded using the third context, and In response to determining that the second bin is not equal to one, a third bin of the plurality of bins is encoded and decoded using the fourth context.

14. The method of claim 11, wherein the set of mixed widths comprises one of the following sets of values: {0,1,2,4,8}, {1 / 2,1,2,4,8}, {0,1 / 2,2,4,8}, {0,2,4}, {0,2,8}, {1 / 2,2,4}, {1 / 2,2,8}, {1,2,4}, or {1,2,8}.

15. The method of claim 12, wherein the set of mixed widths comprises one of the following sets of values: {0,1,2,4,8}, {1 / 2,1,2,4,8}, or {0,1 / 2,2,4,8}.

16. The method of claim 13, wherein the set of mixed widths comprises one of the following sets of values: {0,1,2,4,8}, {1 / 2,1,2,4,8}, or {0,1 / 2,2,4,8}.

17. An apparatus comprising: one or more processors; as well as a memory coupled to the one or more processors and configured to store instructions executable by the one or more processors, Wherein the one or more processors are configured to perform the method according to any one of claims 1-16 when executing the instructions.

18. A non-transitory computer-readable storage medium for storing computer-executable instructions, which, when executed by one or more computer processors, cause the one or more computer processors to receive a bit stream and perform the method of any one of claims 1-8 based on the bit stream.

19. A non-transitory computer-readable storage medium for storing computer-executable instructions, which, when executed by one or more computer processors, cause the one or more computer processors to perform the method according to any one of claims 9 to 16 to encode a current block into a bit stream, and send the bit stream.

20. A non-transitory computer-readable storage medium for storing a bit stream to be decoded by the method of any one of claims 1-8.

21. A non-transitory computer-readable storage medium for storing a bit stream generated by the method of any one of claims 9-16.

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