Request processing method and device, storage medium and program product

Abstract

The invention provides a request processing method and device, a storage medium and a program product, relates to the technical field of communication, and solves the technical problem of poor processing flexibility of a communication processing request in related technologies. The method comprises the following steps: receiving a function request; the function request is used for requesting a physical layer function service; based on the type of the function request, processing the function request based on a target unit; the target unit comprises one of the following units: the baseband unit and the radio remote unit; and the baseband unit comprises one of the following components: the field programmable logic gate array chip and the central processing unit.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a request processing method, device, storage medium and program product. Background Art

[0002] The current physical layer wireless baseband processing units mostly adopt a hybrid architecture of digital signal processing units and custom integrated circuits. After receiving a communication processing request transmitted by the data link layer, the information or data to be processed is scheduled for processing according to the idle status of the custom integrated circuit.

[0003] However, there is a problem of poor flexibility in the processing of communication processing requests by customized integrated circuits. Summary of the invention

[0004] The present application provides a request processing method, device, storage medium and program product, which solve the technical problem of poor flexibility in processing communication processing requests in related technologies.

[0005] In a first aspect, the present application provides a request processing method, comprising: receiving a function request; the function request is used to request a physical layer function service; based on the type of the function request, the function request is processed based on a target unit; the target unit comprises one of the following: a baseband unit, a radio frequency remote unit; the baseband unit comprises one of the following: a field programmable gate array chip, a central processing unit.

[0006] In one possible implementation, based on the type of function request, the function request is processed based on the target unit, including: based on the function request being a high-layer physical layer function request, processing the function request based on the baseband unit; based on the function request being a low-layer physical layer function request, processing the function request based on the radio frequency remote unit.

[0007] In one possible implementation, the baseband unit includes a field programmable gate array chip and a central processing unit, and based on the function request being a high-level physical layer function request, the function request is processed based on the baseband unit, including: based on the high-level physical layer function request being a bit-level function request, the function request is processed based on the field programmable gate array chip; based on the high-level physical layer function request being a symbol-level function request, the function request is processed based on the central processing unit.

[0008] In a possible implementation, the function request includes a bit-level function request and a symbol-level function request, and based on the function request being a high-level physical layer function request, the function request is processed based on a baseband unit, including: based on the data transmission process corresponding to the function request being a coding modulation process, the bit-level function request and the symbol-level function request are processed in a first processing sequence, and the priority of processing the bit-level function request in the first processing sequence is higher than the priority of processing the symbol-level function request; based on the data transmission process corresponding to the function request being a decoding modulation process, the bit-level function request and the symbol-level function request are processed in a second processing sequence, and the priority of processing the bit-level function request in the second processing sequence is lower than the priority of processing the symbol-level function request.

[0009] In one possible implementation, based on the type of the function request, the function request is processed based on the target unit, including: based on the type of the function request, determining the type of the target unit; based on the type of the target unit, configuring a working thread corresponding to the function request; and controlling the target unit to process the function request through the working thread.

[0010] In one possible implementation, the method also includes: obtaining a processing result corresponding to the working thread; inputting the processing result into a target parameter prediction model to obtain a processing situation corresponding to the processing result, the processing situation being used to indicate whether the processing result meets the expected processing situation; the processing situation includes processing time and / or result accuracy; when the processing situation indicates that the processing result does not meet the expected processing situation, updating the working thread corresponding to the function request based on the processing situation; through the updated working thread, controlling the unit corresponding to the updated working thread to process the function request.

[0011] In the second aspect, the present application provides a request processing device, including: a receiving module and a processing module; the receiving module is used to receive a function request; the function request is used to request a physical layer function service; the processing module is used to process the function request based on the type of the function request and based on the target unit; the target unit includes one of the following: a baseband unit, a radio frequency remote unit; the baseband unit includes one of the following: a field programmable gate array chip, a central processing unit.

[0012] In one possible implementation, the processing module is specifically used to process the function request based on the baseband unit based on the function request being a high-level physical layer function request; the processing module is also specifically used to process the function request based on the radio frequency remote unit based on the function request being a low-level physical layer function request.

[0013] In a possible implementation, the baseband unit includes a field programmable logic gate array chip and a central processing unit. The processing module is further specifically used to process the function request based on the field programmable logic gate array chip based on the high-level physical layer function request being a bit-level function request; the processing module is further specifically used to process the function request based on the central processing unit based on the high-level physical layer function request being a symbol-level function request.

[0014] In a possible implementation, the function request includes a bit-level function request and a symbol-level function request. The processing module is further specifically used to process the bit-level function request and the symbol-level function request according to a first processing sequence based on the data transmission process corresponding to the function request being a coding modulation process, and the priority of processing the bit-level function request in the first processing sequence is higher than the priority of processing the symbol-level function request; the processing module is further specifically used to process the bit-level function request and the symbol-level function request according to a second processing sequence based on the data transmission process corresponding to the function request being a decoding modulation process, and the priority of processing the bit-level function request in the second processing sequence is lower than the priority of processing the symbol-level function request.

[0015] In a possible implementation, the processing module is further specifically used to determine the type of the target unit based on the type of the function request; the processing module is further specifically used to configure the working thread corresponding to the function request based on the type of the target unit; and through the working thread, the target unit is controlled to process the function request.

[0016] In a possible implementation, the request processing device further includes an acquisition module. The acquisition module is used to acquire the processing result corresponding to the working thread; input the processing result into the target parameter prediction model to obtain the processing situation corresponding to the processing result, and the processing situation is used to indicate whether the processing result meets the expected processing situation; the processing situation includes the processing time and / or the result accuracy; the processing module is also used to update the working thread corresponding to the function request based on the processing situation when the processing situation indicates that the processing result does not meet the expected processing situation; the processing module is also used to control the unit corresponding to the updated working thread to process the function request through the updated working thread.

[0017] In a third aspect, the present application provides a request processing device, comprising: a processor and a memory configured to store processor executable instructions; wherein the processor is configured to execute the instructions to implement any one of the optional request processing methods in the first aspect above.

[0018] In a fourth aspect, the present application provides a computer-readable storage medium having instructions stored thereon. When the instructions in the computer-readable storage medium are executed by a request processing device, the request processing device is enabled to execute any one of the optional request processing methods in the first aspect described above.

[0019] In a fifth aspect, the present application provides a computer program product, the computer program product comprising computer technology program instructions, and when the computer program instructions are executed by a processor, any one of the optional request processing methods in the above-mentioned first aspect is implemented.

[0020] The request processing method, device, storage medium and program product provided by the present application, the target unit is a processing unit corresponding to the type of function request, and the target unit can process the function request more reliably and efficiently. In this way, the processing efficiency and reliability of the function request can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below.

[0022] Figure 1 A schematic diagram of a network architecture provided for an embodiment of the present application;

[0023] Figure 2 A schematic diagram of the structure of a base station provided in an embodiment of the present application;

[0024] Figure 3 A schematic diagram of a protocol architecture provided for an embodiment of the present application;

[0025] Figure 4 A flowchart of a request processing method provided in an embodiment of the present application;

[0026] Figure 5 A schematic diagram of physical layer division and deployment provided in an embodiment of the present application;

[0027] Figure 6 A schematic diagram of the structure of another base station provided in an embodiment of the present application;

[0028] Figure 7 A schematic diagram of the overall software architecture of the physical layer is provided for an embodiment of the present application;

[0029] Figure 8 A schematic diagram of a request processing architecture provided for an embodiment of the present application;

[0030] Fig. 9 A schematic diagram of another request processing architecture provided for an embodiment of the present application;

[0031] Fig.10 A flowchart of another request processing method provided in an embodiment of the present application;

[0032] Fig.11 A thread pool processing schematic diagram provided for an embodiment of the present application;

[0033] Fig.12 A schematic diagram of the structure of a request processing device provided in an embodiment of the present application;

[0034] Fig.13 A schematic diagram of the structure of another request processing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0035] The request processing method, device, storage medium and program product provided in the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0036] The terms "first" and "second" in the specification and drawings of this application are used to distinguish different objects rather than to describe the specific order of the objects. For example, the first processing order and the second processing order are used to distinguish different processing orders rather than to describe the specific order of the processing orders.

[0037] In addition, the terms "including" and "having" and any variations thereof mentioned in the description of the present application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but may optionally include other steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices.

[0038] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0039] The term "and / or" used in the present application includes using either or both of the two methods.

[0040] In the description of the present application, unless otherwise specified, “plurality” means two or more.

[0041] The following explains some concepts involved in a request processing method, device, storage medium and program product provided in an embodiment of the present application.

[0042] The overall network architecture of the 5G wireless cloud base station system is as follows: Figure 1 As shown in the figure, gNB is a 5G base station, which is responsible for generating downlink wireless signals and receiving uplink wireless signals to achieve wireless access for user terminals.

[0043] The architecture of the base station is as follows Figure 2As shown in the figure. The base station is divided into three parts: Centralized Unit (CU), Distributed Unit (DU) and Radio Unit (RU). Among them, CU is responsible for the high-level protocol stack and the interface with the core network; DU is responsible for the low-level protocol stack and High-PHY functions; RU is responsible for Low-PHY and radio functions. OAM, as an external module, implements the management function of the entire system and has a management interface with each module of the base station.

[0044] Physical layer overview: To support the higher throughput and shorter latency system requirements proposed by NR, the wireless interface consists of the physical layer (Layer 1, L1), the data link layer (Layer 2, L2) and the application layer (Layer 3, L3).

[0045] Figure 3 The NR radio interface protocol architecture around the physical layer (L1) is shown. The physical layer connects the medium access control (MAC) sublayer of the data link layer (L2) and the radio resource control (RRC) layer of the application layer (L3). The circles between the different layers / sublayers represent the service access points (SAPs).

[0046] The physical layer provides transport channels for MAC, which is responsible for how to transmit information through the wireless interface. MAC provides different logical channels to the radio link control (RLC) sublayer of the data link layer (L2), which is responsible for the type of information transmitted.

[0047] The physical layer shall perform at least one of the following functions to provide data transmission services: error detection on the transport channel and indication to higher layers; FEC encoding / decoding of the transport channel; HARQ soft combining; rate matching of the coded transport channel with the physical channel; mapping of the coded transport channel to the physical channel; power control of the physical channel; modulation and demodulation of the physical channel; frequency and time synchronization; wireless signal measurement and indication to higher layers; multiple-input multiple-output (MIMO) antenna processing; and radio frequency processing.

[0048] Field-programmable gate array (FPGA) is a special chip that can be configured to implement a variety of different circuit functions. According to specific computing needs, FPGA can be configured into a customized circuit to perform specific computing tasks. Unlike instruction-based architectures, FPGA does not require writing software programs, but instead performs computing tasks by directly configuring hardware circuits. Since FPGA chips do not rely on general architectures and software, they can achieve higher performance and efficiency on specific computing tasks.

[0049] The central processing unit (CPU) is a fixed circuit with a von Neumann structure, which is good at instruction scheduling, instruction decoding and execution, and shared memory. Since the execution unit (such as the CPU core) may execute any instruction, it is necessary to have an instruction memory, a decoder, an operator for various instructions, and branch jump processing logic. Since the control logic of the instruction stream is complex, it is impossible to have too many independent instruction streams, so the GPU uses SIMD (single instruction multiple data) to allow multiple execution units to process different data at the same pace, that is, the CPU also supports SIMD instructions. When we need to perform calculations, we usually choose to use instruction-based architectures, such as central processing units (CPUs) or graphics processing units (GPUs), and write software programs suitable for these architectures. These architectures are general and can perform various types of computing tasks.

[0050] Based on the description in the background technology, since in the related technology, the current physical layer wireless baseband processing unit mostly adopts a hybrid architecture of a digital signal processing unit and a customized integrated circuit, after receiving a communication processing request transmitted by the data link layer, the information or data to be processed is scheduled for processing according to the idle status of the customized integrated circuit.

[0051] However, there is a problem of poor flexibility in the processing of communication processing requests by customized integrated circuits.

[0052] Based on this, the embodiments of the present application provide a request processing method, device, storage medium and program product, wherein the target unit is a processing unit corresponding to the type of the function request, and the target unit can process the function request more reliably and efficiently. In this way, the processing efficiency and reliability of the function request can be improved.

[0053] In some embodiments, the request processing device may be a cloud server or a control terminal of a 5G wireless cloud base station.

[0054] Exemplarily, the request processing device that executes the request processing method provided in the embodiment of the present application may also include a base station, an evolved node base station (eNB), a next generation node base station (gNB), a new radio base station (new radio eNB), a macro base station, a micro base station, a high frequency base station or a transmission and reception point (TRP), a non-third generation partnership project (3GPP) access network (such as WiFi) and / or a non-3GPP interworking function (N3IWF) and other devices.

[0055] like Figure 4 As shown, the request processing method provided in the embodiment of the present application may include S401-S402.

[0056] S401: Receive a function request.

[0057] Among them, the function request is used to request physical layer function services.

[0058] S402: Based on the type of the function request, the function request is processed based on the target unit.

[0059] The target unit includes one of the following: a baseband unit and a radio remote unit; the baseband unit includes one of the following: a field programmable gate array chip and a central processing unit.

[0060] It should be understood that the target unit is a processing unit corresponding to the type of the function request, and the target unit can process the function request more reliably and efficiently, thereby improving the processing efficiency and reliability of the function request.

[0061] In some embodiments, the above-mentioned processing of the function request based on the type of the function request and based on the target unit is implemented in the following manner: based on the function request being a high-layer physical layer function request, the function request is processed based on the baseband unit. Or based on the function request being a low-layer physical layer function request, the function request is processed based on the radio remote unit.

[0062] It should be understood that the baseband unit can complete the processing of high-level physical layer function requests more quickly and reliably than the radio remote unit.

[0063] It should be understood that the radio remote unit can complete the processing of low-level physical layer function requests more quickly and reliably than the baseband unit.

[0064] In some embodiments, in order to reduce the physical layer processing pressure on the baseband processing unit and reduce the pressure on the throughput of the fronthaul interface, the physical layer function can be divided into two parts: the high-PHY and the low-PHY. Among them, the baseband unit or the baseband unit side (i.e., BBU) completes the High-PHY part of the function, and the radio remote unit or the remote radio unit side (i.e., RRU) completes the Low-PHY part of the function.

[0065] For example, Figure 5 As shown, a physical layer division and deployment schematic diagram provided in an embodiment of the present application is used to illustrate how the physical layer functions are divided and deployed into High-PHY and Low-PHY.

[0066] Among them, the functions in High-PHY are implemented by BBU processing, and the functions in Low-PHY are implemented by RRU processing. The High-PHY and Low-PHY communicate through a CPRI interface or an eCPRI interface. The CPRI interface is a serial digital bus interface between the RRU and the BBU, including user data, control management data and synchronization data, including two layers, namely the physical layer, supporting electrical interface and optical interface and data link layer, supporting measurability and adaptability.

[0067] It should be noted that the data transmitted on the communication protocol stack will be encoded layer by layer, and the amount of data will increase as it goes to the physical layer. Therefore, the CPRI interface can no longer support the signal transmission requirements of 5G. At this time, the eCPRI interface can be used to replace the original CPRI interface.

[0068] In some embodiments, the design idea of ​​eCPRI is: since the data transmitted on the communication protocol stack will be encoded layer by layer, the amount of data will increase as it goes to the physical layer. Therefore, the data processed on the BBU can be moved up one layer (BBU processing from High Phy upwards), and the data below can be handed over to the RRU for processing (RRU processing from Low Phy downwards), which can reduce the amount of data between the BBU and RRU.

[0069] In some embodiments, the eCPRI protocol can be encapsulated on top of the UDP or TCP protocol, or it can skip the TCP / IP protocol stack and be directly carried on the MAC Ethernet frame.

[0070] In some embodiments, in order to reduce the delay between PHY_High and PHY_Low, the eCPRI protocol can be directly encapsulated on the MAC layer Ethernet frame.

[0071] In some embodiments, the eCPRI protocol provides the same three service access points as the CPRI protocol: UserPlane data: Here, it is the IQ mobile phone user data between PHY_High and PHY_Low, which is encapsulated through the eCPRI protocol.

[0072] Sync (synchronization plane): This is the synchronization between PHY_High and PHY_Low, and the clock synchronization between RRU and DU. This service is mainly provided by the standard IEEE1588 protocol.

[0073] Control and management protocol: The control protocol is the signaling message between PHY_High and PHY_Low. The management protocol is mainly used for OAM (operation, maintenance, and management) data of RRU, which is carried through standard HTTP or SSH protocol. The control protocol is mainly used for signaling control between PHY_High and PHY_Low, which can be carried through eCPRI protocol.

[0074] For example, Figure 6 As shown, it is a schematic diagram of the structure of another base station provided in an embodiment of the present application. Among them, the wireless network (O-RAN) divides the base station system into a control unit (O-CU), a distribution unit (O-DU), and a radio frequency unit (O-RU), wherein the high-level separation interface between the O-CU and the O-DU follows the 3GPP F1 interface, and the low-level separation interface between the O-DU and the O-RU adopts Option 7 (ie, the eCPRI interface). The most notable feature of Option 7 is that the physical layer can be divided into PHY-High and PHY-Low, and the compression technology can be used to reduce the fronthaul bandwidth requirements between the O-DU and the O-RU. Option 7 can be further subdivided into Option 7-1, Option 7-2 and Option 7-3.

[0075] In some embodiments, the DU side implements some of the High-PHY functions defined in ORAN protocol option 7-2a.

[0076] For example, Figure 7 As shown, an embodiment of the present application provides a schematic diagram of the overall software architecture of the physical layer. The physical layer software as a whole is divided into a FAPI interface adaptation module, a thread processing module, and an RRU interface processing module. The thread processing module is further divided into a real-time thread and a non-real-time thread. Real-time threads include working threads and I / O threads, and non-real-time threads include monitoring threads. The 5G FAPI interface is located inside the gNB-DU and is the interface standard between the MAC layer and the physical layer.

[0077] In some embodiments, the baseband unit includes a field programmable gate array chip and a central processing unit, and based on the function request being a high-level physical layer function request, the function request is processed based on the baseband unit, including: based on the high-level physical layer function request being a bit-level function request, the function request is processed based on the field programmable gate array chip; based on the high-level physical layer function request being a symbol-level function request, the function request is processed based on the central processing unit.

[0078] It should be noted that the physical channel is the interface between the physical layer and the MAC layer. The physical layer provides services to the MAC layer in the form of physical channels, similar to TCP / IP providing different types of application layer ports. The physical channel is the actual carrier of high-level information in the wireless environment. In LTE, the physical channel is determined by a specific subcarrier, time slot, and antenna port. That is, on a specific antenna port, there is a series of wireless time-frequency resources (Resource Element, RE).

[0079] In some embodiments, the function request includes a bit-level function request and a symbol-level function request, and based on the function request being a high-level physical layer function request, the function request is processed based on the baseband unit, including: based on the data transmission process corresponding to the function request being a coding modulation process, the bit-level function request and the symbol-level function request are processed in a first processing sequence, and the priority of processing the bit-level function request in the first processing sequence is higher than the priority of processing the symbol-level function request; based on the data transmission process corresponding to the function request being a decoding modulation process, the bit-level function request and the symbol-level function request are processed in a second processing sequence, and the priority of processing the bit-level function request in the second processing sequence is lower than the priority of processing the symbol-level function request.

[0080] It should be noted that physical channels generally undergo two major processing processes: bit-level processing and symbol-level processing. From the perspective of the transmitter, bit-level processing is the front end of physical channel data processing, which mainly adds CRC check to the binary bit data stream; performs channel coding, interleaving, rate matching, and scrambling. After scrambling, symbol-level processing is performed, including modulation, layer mapping, precoding, resource block mapping, antenna transmission, and other processes. At the receiving end, symbol-level processing is performed first, followed by bit-level processing, and the processing order is different from that of the transmitting end.

[0081] In some embodiments, since the physical layer mainly performs operations such as encoding and modulation on the signal to be transmitted sent by the MAC layer and performs operations such as decoding and demodulating the signal received from the RRU to transmit the decoded signal to the MAC layer, the functions of the High-PHY in the physical layer (PHY) can be identified based on the way in which the high-level physical layer and the low-level physical layer are divided and the physical layer functions.

[0082] For example, Figure 8As shown, it is a schematic diagram of a request processing architecture provided by an embodiment of the present application. The functions can be functionally classified according to the specific content of bit-level processing and the specific content of symbol-level processing, and the High-PHY can be further functionally segmented according to the functional classification results to determine the functions belonging to bit-level processing and symbol-level processing.

[0083] In some embodiments, the bit-level processing function can be associated with an FPGA chip to process bit-level processing requests through the FPGA chip, and the symbol-level processing function can be associated with a CPU processor to process symbol-level processing requests through the CPU processor.

[0084] In some embodiments, different identifiers can be set in advance for processing requests for bit-level processing, processing requests for symbol-level processing, and logic control requests. The identifier of the processing request for bit-level processing is stored in the storage unit of the FPGA chip, and the associated trigger code is written for the FPGA chip so that the FPGA chip automatically triggers the operation of processing the request after identifying the identifier of the processing request for bit-level processing. The identifier of the processing request for symbol-level processing and the identifier of the logic control request are stored in the storage unit of the CPU processor, and the associated trigger code is written for the CPU processor so that the CPU processor automatically triggers the operation of processing the request after identifying the identifier of the processing request for symbol-level processing or the identifier of the logic control request.

[0085] In some embodiments, before using an FPGA chip or a CPU to process the data to be processed received by the physical layer, the processing task of the received data can be identified first, and the processing function requirements corresponding to each data can be determined based on the identified processing tasks. The data can be classified according to the requirements, and then an identifier can be assigned to each data classification according to a pre-set identifier to facilitate the FPGA chip and the CPU processor to identify and process the data to be processed.

[0086] It should be understood that associating the bit-level processing function with the FPGA chip and associating the symbol-level processing function with the CPU processor can speed up the physical layer channel processing speed and reduce the system processing delay. In addition, the High-PHY operation in the physical layer is further divided, where the bit-level computationally intensive process is processed by the FPGA chip, and the logic control and symbol-level processing process is processed on the CPU.

[0087] It should be understood that FPGA is more energy efficient than CPU, which is essentially a benefit brought by the architecture without instructions and shared memory, because the function of each logic unit of FPGA is determined when reprogramming (burning), and no instructions are required. But this method is more laborious and requires circuit design and hardware implementation. CPU is a fixed circuit with von Neumann structure, which is good at instruction scheduling, so it can run software, that is, software programmable. The structure of FPGA logic circuit is variable and can be defined at any time. This is the true meaning of hardware programmability. It can realize any circuit through hardware description language. The lack of instructions is also the weak point of FPGA. Every time you do something different, you will occupy a certain amount of FPGA logic resources. If the things to be done are complex and not repetitive, they will occupy a lot of logic resources, most of which are idle. At this time, it is better to use CPU for processing.

[0088] It is understandable that FPGA is suitable for parallel processing and has fast processing speed based on hardware circuits, while CPU is good at batch data processing in a homogeneous mode and uses software programming with high processing flexibility. Therefore, FPGA and CPU can be used to work together, and bit-level processing requests with strong locality and repetitiveness can be processed by FPGA chips, and complex calculations, namely symbol-level processing and logic control can be processed by CPU.

[0089] In some embodiments, the processing of the 5G NR physical layer is mainly divided into bit-level processing and symbol-level processing. The protocol has relatively complete provisions for bit-level processing, and the process is relatively fixed; for different application scenarios such as multi-user and multi-cell, the complexity and flexibility of bit-level processing are relatively small; in addition, FPGA has the characteristics of strong programmability, high-speed performance, low power consumption, parallel processing capability, high pipeline processing, and hardware-level acceleration based on gate circuits, which is very suitable for processing bit-level data in the physical layer under 5G NR. However, the amount of symbol-level data is large, and the protocol provisions are highly open, so different manufacturers can choose their own implementation solutions; in scenarios such as multi-user and multi-antenna (such as SU-MIMO, MU-MIMO, etc.), symbol-level data processing has different processing processes, and the processing process is relatively complex. Compared with FPGA, CPU has more abundant computing resources and storage resources, and the processing is more flexible and easy to configure according to the application scenario. Therefore, taking into full consideration the characteristics of each stage of the physical layer processing and the advantages and disadvantages of FPGA and CPU processing, the physical layer function processing is divided, and the bit-level calculation-intensive process is still processed by FPGA chips, and the symbol-level data processing is processed by CPU.

[0090] For example, Fig. 9As shown, it is a schematic diagram of another request processing architecture provided by an embodiment of the present application. The FPGA acceleration module and the CPU interact through the PCIe bus, and the real-time thread running on the CPU initiates a processing request to the acceleration module and receives a processing response from the acceleration module through the underlying driver API. Among them, PCIe is a high-speed serial computer expansion bus standard, which is mainly used to expand the data throughput of the computer system bus and improve the communication speed of the device. PCIe belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, and the connected devices are allocated exclusive channel bandwidth and do not share the bus bandwidth. PCIe exists in two forms, the M.2 interface channel form and the PCIE standard slot.

[0091] In some embodiments, the physical layer CPU processing part uses the DPDK software library for function development, including: traditional network devices (switches, routers, etc.) are embedded with network process processors (NP) in order to quickly process data packets, and built-in hardware circuits realize high-speed forwarding of data packets. With the development of cloud computing, CPU is the core, the operating system is Linux, and network devices are virtualized, without NP processors. Cloud computing requires high-speed processing of data packets. At the same time, since the real-time processing of the physical layer is very high, and the ECPRI interface is an Ethernet-based protocol data packet, in order to fully utilize the processing performance of the domestic CPU for packet data processing, the physical layer CPU processing part uses the data plane development kit (DPDK) software library for function development.

[0092] It should be noted that DPDK is a data plane development tool set provided by Intel, which aims to provide library functions and driver support for efficient data packet processing in user space under the ARM processor architecture. In layman's terms, DPDK is a software library used to accelerate packet data processing.

[0093] In some embodiments, in combination Figure 4 The embodiment shown, as Fig.10 As shown, the above S402 processes the function request based on the type of the function request and the target unit, including S1001-S1003:

[0094] S1001. Determine the type of the target unit based on the type of the function request.

[0095] S1002. Based on the type of the target unit, configure a work thread corresponding to the function request.

[0096] S1003. Control the target unit to process the function request through the working thread.

[0097] It should be understood that by configuring the working thread, the processing of the function request can be realized.

[0098] In some embodiments, the working thread corresponding to the pending request can be obtained through a pre-built static thread pool, and the processing method of the pending request can be determined based on the association between the above-mentioned symbol-level processing or bit-level processing and the chip, and the processing thread of the pending task can be configured according to the processing method.

[0099] It should be noted that the processing type included in the working thread may be the processing task included in the working thread, and the task to be processed includes bit-level processing, symbol-level processing and logic control, but which specific processing needs to be further identified. Identification method: Compare the characteristics of the data in the task to be processed with the characteristics of the data after bit-level processing and the characteristics of the data after symbol-level processing, and determine the current processing stage of the task to be processed according to the comparison result. Since the bit-level processing includes adding CRC check to the data, channel coding, interleaving, rate matching and scrambling, the symbol-level processing includes modulation, layer mapping, precoding, resource block mapping, antenna transmission and other processes, and the bit-level processing and symbol-level processing have a sequence, so when the current stage of the data in the task to be processed is identified, the task to be processed can be processed to the next step.

[0100] In some embodiments, bit-level processing and symbol-level processing have a sequence: the physical layer includes two channels, one for encoding and modulating data to ensure the integrity and security of data during transmission; and one for decoding and demodulating the coded and modulated data so that the receiving end can receive and identify the data sent by the sending end. The coding and modulation process is to first process the data at the bit level and then at the symbol level, and the decoding and demodulation process is to first process the data at the symbol level and then at the bit level.

[0101] In some embodiments, the processing threads of the physical layer tasks are designed using a static thread pool.

[0102] It should be understood that the thread pool is a thread management technology that uses the idea of ​​pooling technology to reuse threads, conveniently manage threads and tasks, and decouple thread creation from task execution. We can reuse the created threads by creating a thread pool, and reduce the resource consumption caused by frequent thread creation and destruction. The thread pool is a container for managing threads. When there are tasks to be processed, it will successively determine whether the number of core threads is still idle, whether the task queue in the thread pool is full, and whether it exceeds the thread pool size, and then call or create a thread or queue. The thread will not be destroyed immediately after completing the task, but will still wait for the next task in the thread pool. If there is no new task after the survival time, it will be destroyed. By reusing threads in this way, the overhead can be reduced.

[0103] For example, Fig.11 The figure shows a thread pool processing schematic diagram provided in an embodiment of the present application.

[0104] Among them, the basic architecture of the software thread pool usually includes the following parts:

[0105] Thread pool manager: responsible for managing the status of the thread pool, including thread creation, destruction, and monitoring.

[0106] Task queue: used to store tasks to be executed, usually implemented using a blocking queue.

[0107] Worker thread: A thread in the thread pool that is responsible for executing tasks in the task queue.

[0108] In some embodiments, configuration parameters that may be involved in thread pool processing include the size of the thread pool, the size of the task queue, etc., which are used to configure the behavior of the thread pool.

[0109] It should be understood that due to the concurrency, asymmetry and burstiness of the processing of physical layer channels and signals, in order to make full use of the computing resources of domestic CPUs, the processing threads of physical layer tasks adopt a static thread pool design, that is, a group of working threads are created during the system startup phase. The processing of each working thread is not pre-set, but the current content and behavior to be processed are determined according to the real-time task request during system operation. This brings great benefits to the concurrent processing of physical layer channels of multiple cells and multiple users.

[0110] In some embodiments, the working threads in the static thread pool may not have fixed tasks, that is, one working thread can handle multiple signal processing tasks. When a working thread processes a bit-level task, it can call the FPGA chip for processing according to the identifier of the bit-level task. When the bit-level task is processed and the thread continues to process the symbol-level task, the thread can call the CPU chip to continue processing according to the identifier of the symbol-level task. The specific implementation method is that the programmer writes two sections of chip calling code for each thread in advance, which are used to call the FPGA chip and the CPU chip respectively, and the dependency relationship between the two sections of code is: Finish-to-Start (FS): After the predecessor task is completed, the successor task starts, and the progress of the predecessor task directly affects the successor task, thereby ensuring the execution order of each working thread. Therefore, the baseband processing unit in the physical layer can be composed of one of the FPGA chip or the CPU, and can also be composed of a combination of the FPGA chip and the CPU according to the processing order.

[0111] In some embodiments, the baseband processing unit may be composed of a combination of an FPGA chip and a CPU. The processing method of the pending request may be a method in which data is processed by at least one of the FPGA chip and the CPU. Before performing task processing, the identification field of each chip may be read first, and after identifying the task stage of the pending task, the identification associated with the task stage is searched, and the remaining computing power resources of the chips bound to each identification are identified, and the chip with remaining computing power resources is called to execute the thread.

[0112] In some embodiments, the pending requests received by the physical layer can be submitted to the task queue of a pre-built static thread pool, and the current idle threads in the thread pool can be determined by reading the data in the thread pool. The idle threads are allocated to the pending requests according to their priorities, and the current task stage of the pending tasks is identified by comparing the data features as mentioned above. The chip calling method of each working thread is determined according to the task stage and the above-mentioned association relationship, and the computing power resources for the thread are then configured according to the chip calling method.

[0113] In some embodiments, the priority of the pending request is: interrupt processing task > request receiving timestamp. The interrupt processing task is to monitor the processing data in the working thread during the processing of each working thread. When it is monitored that the processing data does not meet the computing power requirements of the pending task, the task processing progress of the thread is interrupted, and the thread is reallocated for the pending task. At this time, the pending task is the interrupt processing task. The interrupt processing task can be the entire pending task or a part of the pending task. Specifically, if the pending task is not detected as not meeting the computing power requirements during the bit-level processing of the original working thread, but is detected as not meeting the computing power requirements during the symbol-level processing, the original bit-level processing results are saved and a new thread is directly allocated to the subsequent symbol-level processing task.

[0114] In some embodiments, the computing power requirements of the task to be processed include: the computing power requirements determined according to the data volume and processing content of the task to be processed and the computing power requirements pre-customized by the sending end. For example: the performance requirements for chip computing power, such as processing speed, response time or throughput; the load characteristics of the chip, such as computing intensive or memory intensive, and parallel processing capabilities; chip cost and operational stability.

[0115] In some embodiments, the processing data in the working thread can be monitored; and when the current thread cannot meet the expectations, the thread can be reallocated for the task to be processed.

[0116] In some embodiments, the method further includes: obtaining a processing result corresponding to the working thread. Inputting the processing result into the target parameter prediction model to obtain a processing situation corresponding to the processing result. When the processing situation indicates that the processing result does not meet the expected processing situation, updating the working thread corresponding to the function request based on the processing situation. Through the updated working thread, controlling the unit corresponding to the updated working thread to process the function request. Among them, the processing situation is used to indicate whether the processing result meets the expected processing situation. The processing situation includes processing time and / or result accuracy.

[0117] It should be understood that the target parameter prediction model can accurately obtain the processing situation corresponding to the processing result. If the processing situation does not meet the expected processing request, the working thread is updated. Based on the updated working thread, the processing request can be completed more accurately and reliably. The reliability of the processing request is guaranteed.

[0118] In some embodiments, the actual processing time of each of the working threads for the tasks to be processed may be monitored.

[0119] In some embodiments, computing resources can be allocated to the working thread of the task to be processed based on the current stage of the task to be processed according to data characteristics.

[0120] It should be noted that if there is a certain error in the judgment result, when the stage of the task to be processed is judged incorrectly, the chip called by the thread and the processing performed will also be wrong. At the same time, when allocating computing resources to each thread, the chip with the corresponding function is randomly called according to the processing type of the task (bit-level processing or symbol-level processing), and there can be multiple chips with different configurations but the same function in a thread pool. Different tasks have different computing power requirements. There may be a situation where the configuration parameters or performance of the called chip do not meet the computing power requirements of the task to be processed. Therefore, it is necessary to monitor the processing data during or after the thread processing and reallocate the threads or chips according to the monitoring results.

[0121] In some embodiments, the actual processing time of a task to be processed by a working thread is the actual time taken by the working thread to complete processing of its corresponding task to be processed.

[0122] In some embodiments, the processing time of each of the working threads can be monitored by using two CountDownLatch countdown locks. The two CountDownLatch countdown locks include a start timer lock and a task end timer lock. The start timer lock blocks all child threads through await() at the start of the child thread task, and then controls all child threads through CountDownLatch in the main thread to start obtaining the start time at the same time; the task end timer lock CountDownLatch counts down once after each child thread is executed, until all child threads are executed, and the main thread starts to record the end time of all task executions. The processing time of each of the working threads can also be determined by obtaining the timestamp in each of the working threads.

[0123] Optionally, before obtaining the processing time of each of the work threads, each of the work threads may be classified according to the complexity of the processing type of each work thread and the amount of data to be processed in the thread, and the processing time of a work thread in each category may be sampled respectively. The actual processing time of each work thread for the request to be processed is estimated based on the sampling results and the number of threads in each category, so as to reduce the statistics of the thread processing time in the thread pool and improve the statistical efficiency.

[0124] Exemplarily, the processing type complexity of each work thread in the static thread pool is determined according to the number of processing tasks and processing requirements of each work thread, and the processing type complexity is ranked, the above data volume is ranked according to the data volume of the tasks to be processed by each work thread, and the sum of the processing type complexity ranking and the data volume ranking of each work thread is calculated, and the same work threads are regarded as the same type of work threads, and the processing time of a thread in the same type of work threads is obtained, and the processing time is used as the processing time of each work thread included in the type to which it belongs.

[0125] In some embodiments, the working thread can be input into a pre-trained processing time prediction model, and the preset processing time of the request to be processed can be predicted according to the processing time prediction model, and the actual processing time can be compared to see whether it is less than the preset processing time.

[0126] It should be noted that the processing time prediction model can be a neural network model pre-trained by the R&D personnel of the physical layer operation based on the historical working threads in the static thread pool and the processing time corresponding to the historical working threads. The processing time corresponding to the historical working threads can be the processing time of each working thread in the thread pool by the physical layer before the physical layer is split using this solution. The preset processing time can be the processing time of each working thread in the thread pool for the task to be processed, predicted by the processing time prediction model without performing physical layer splitting.

[0127] It can be understood that the purpose of functionally splitting the physical layer and using FPGA chips and CPU processors to classify and process pending requests is to make full use of the processing power of the CPU and improve processing efficiency. Therefore, it is possible to determine whether the processing method of the pending requests has improved processing efficiency by comparing whether the actual processing time is less than the preset processing time.

[0128] Specifically, when the processing method of the pending request is correct, the processing time of the physical layer for the pending request should be less than the processing time before the physical layer is split (ie, the preset processing time).

[0129] In some embodiments, only the processing time of each stage of the pending task can be monitored. If it is monitored that the time taken by the working thread to complete a task of a certain stage of the pending task is longer than the preset processing time of the stage, the thread can be directly interrupted and a working thread can be reassigned to the thread. The stage task can be the whole process of bit-level processing or the whole process of symbol-level processing.

[0130] In some embodiments, the actual processing results of each work thread in the pending request can be obtained, the work thread is input into a pre-trained processing result prediction model to predict the predicted processing results of each work thread, and it is identified whether the accuracy of the actual processing result meets the standard of the predicted processing result.

[0131] In some embodiments, the actual processing result of each work thread may be the data obtained after each work thread processes the data in the task to be processed. The processing result prediction model may be a neural network model pre-trained by the R&D personnel of the physical layer operation based on the historical work threads in the static thread pool and the processing results corresponding to the historical work threads. The processing results corresponding to the historical work threads are the processing results of the physical layer on each work thread in the thread pool before the physical layer is split using this solution. The predicted processing result is the processing result of the physical layer on the work threads in the thread pool without physical layer splitting, obtained by predicting the processing result prediction model. The standard for predicting the processing result may be the maximum and minimum values ​​of the processing results of each work thread on the task to be processed when the physical layer function is not split and the FPGA chip and CPU in the physical layer are operating normally.

[0132] Furthermore, if it is detected that the actual processing data of a task at a certain stage of the pending task does not meet the standard of the predicted processing result, the thread can be directly interrupted, and the computing power resources called by the thread for the subsequent stage tasks and the computing power requirements of the subsequent stage tasks in the pending task are evaluated for adaptability, and whether it is necessary to reallocate computing power resources for the subsequent stage tasks is determined based on the evaluation results. The specific evaluation method is as follows:

[0133]

[0134] Among them, i is the computing resource requirement item of the subsequent stage task, n is the number of computing resource requirement items, f(t) is the computing resource called by the working thread for the subsequent stage task, and the value of β is set according to the specific computing resource requirement of the task to be processed.

[0135] It is understandable that the purpose of functionally splitting the physical layer and using FPGA chips and CPU processors to classify and process pending requests is to fully release the computing power of domestic CPUs and improve the performance of domestic 5G cloud base station equipment, that is, the request processing performed using the physical layer functional splitting method in this solution should ensure the accuracy of the processing results. Therefore, the accuracy of the processing method of the pending request can be judged by comparing whether the accuracy of the actual processing results meets the standard of the predicted processing results. Specifically, when the processing method of the pending request is correct, the accuracy of the processing result of the physical layer for the pending request should not be lower than the accuracy of the processing result before the physical layer split (that is, the standard of the predicted processing result).

[0136] In some embodiments, if at least one of the worker threads does not meet the prediction criteria, it is determined that there is a problem with the way the pending request is processed.

[0137] In some embodiments, if at least one item of the work threads does not meet the prediction criteria, it means that there is an error in the judgment of the stage of the task to be processed or the computing power resource call is incorrect. Therefore, the work threads can be reallocated to the pending requests and the computing power resources of each work thread can be reconfigured.

[0138] Specifically, if the thread does not meet the preset processing time standard, it means that the current task stage of the task to be processed is judged incorrectly. At this time, the task stage judged initially is filtered out, and the task stage is re-judged based on the data characteristics of the task to be processed. The new idle threads in the thread pool are polled, and the task to be processed is assigned to the new idle threads, and then the processing time of the traversal threads meets the preset processing time standard.

[0139] In some embodiments, the task stage is determined based on the data features of the task to be processed: the similarity of the data type, format, and data size of the task to be processed is compared with the data features corresponding to each task stage, and the task stage with the highest similarity is used as the current or completed task stage of the task to be processed. The next step of processing required for the task to be processed is determined based on the current or completed task stage and the order of each task stage in bit-level processing and symbol-level processing, and then the chip call order of the thread is determined based on the next step of processing requirements. If the thread does not meet the standard for predicting the processing result, the computing power resources can be reallocated.

[0140] The embodiment of the present application can divide the functional modules of the request processing device, etc. according to the above method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0141] In the case of dividing each functional module into corresponding functional modules, Fig.12 A possible structural diagram of the request processing device involved in the above embodiment is shown. Fig.12 As shown, the request processing device may include: a receiving module 1201 and a processing module 1202 .

[0142] The receiving module 1201 is used to receive a function request; the function request is used to request a physical layer function service.

[0143] The processing module 1202 is used to process the function request based on the type of the function request and based on the target unit; the target unit includes one of the following: a baseband unit and a radio frequency remote unit; the baseband unit includes one of the following: a field programmable logic gate array chip and a central processing unit.

[0144] In a possible implementation, the processing module 1202 is specifically configured to process the function request based on a baseband unit, based on the function request being a high-layer physical layer function request.

[0145] The processing module 1202 is further specifically configured to process the function request based on the radio remote unit, based on the function request being a lower physical layer function request.

[0146] In a possible implementation, the baseband unit includes a field programmable logic gate array chip and a central processing unit.

[0147] The processing module 1202 is further specifically configured to process the function request based on a field programmable gate array chip based on the high-level physical layer function request being a bit-level function request.

[0148] The processing module 1202 is further specifically configured to process the function request based on the central processing unit based on the high-level physical layer function request being a symbol-level function request.

[0149] In a possible implementation manner, the function request includes a bit-level function request and a symbol-level function request.

[0150] The processing module 1202 is also specifically used to process bit-level function requests and symbol-level function requests in a first processing order based on the data transmission process corresponding to the function request being a coding modulation process. The priority of processing bit-level function requests in the first processing order is higher than the priority of processing symbol-level function requests.

[0151] The processing module 1202 is also specifically used to process bit-level function requests and symbol-level function requests according to a second processing sequence based on the data transmission process corresponding to the function request being a decoding and modulation process. The priority of processing bit-level function requests in the second processing sequence is lower than the priority of processing symbol-level function requests.

[0152] In a possible implementation, the processing module 1202 is further specifically configured to determine the type of the target unit based on the type of the function request.

[0153] The processing module 1202 is further specifically used to configure a working thread corresponding to the function request based on the type of the target unit; and control the target unit to process the function request through the working thread.

[0154] In a possible implementation, the request processing device further includes an acquisition module 1203 .

[0155] Acquisition module 1203 is used to obtain the processing result corresponding to the working thread; input the processing result into the target parameter prediction model to obtain the processing status corresponding to the processing result, and the processing status is used to indicate whether the processing result meets the expected processing status; the processing status includes processing time and / or result accuracy.

[0156] The processing module 1202 is further configured to update the working thread corresponding to the function request based on the processing situation when the processing situation indicates that the processing result does not meet the expected processing situation.

[0157] The processing module 1202 is also used to control the unit corresponding to the updated working thread to process the function request through the updated working thread.

[0158] In the case of an integrated unit, Fig.13 FIG. 1 shows a possible structural diagram of the request processing device involved in the above embodiment. Fig.13 As shown, the request processing device may include: a processing module 1301 and a communication module 1302. The processing module 1301 may be used to control and manage the actions of the request processing device. The communication module 1302 may be used to support the communication between the request processing device and other entities. Figure 7 As shown, the request processing device may further include a storage module 1303 for storing program codes and data of the request processing device 130 .

[0159] The processing module 1301 may be a processor or a controller. The communication module 1302 may be a transceiver, a transceiver circuit or a communication interface, etc. The storage module 1303 may be a memory.

[0160] When the processing module 1301 is a processor, the communication module 1302 is a transceiver, and the storage module 1303 is a memory, the processor, the transceiver, and the memory may be connected via a bus. The bus may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc.

[0161] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0162] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0163] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0164] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0165] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or may include one or more servers, data centers and other data storage devices that can be integrated with the medium. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state disk (SSD)).

[0166] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A request processing method, characterized in that: The method comprises: receiving a function request; the function request is used to request a physical layer function service; Based on the type of the function request, the function request is processed based on a target unit; the target unit includes one of the following: the baseband unit, the radio frequency remote unit; the baseband unit includes one of the following: the field programmable gate array chip, the central processing unit.

2. The method according to claim 1, characterized in that The processing of the function request based on the type of the function request and based on the target unit includes: Based on the function request being a high-level physical layer function request, processing the function request based on a baseband unit; Based on the function request being a low-layer physical layer function request, the function request is processed based on the radio remote unit.

3. The method according to claim 2, characterized in that The baseband unit includes a field programmable logic gate array chip and a central processing unit, and the function request is based on the fact that the function request is a high-level physical layer function request, and the baseband unit processes the function request, including: Based on the high-level physical layer function request being a bit-level function request, processing the function request based on the field programmable gate array chip; Based on the high-level physical layer function request being a symbol-level function request, the central processor processes the function request.

4. The method according to claim 3, characterized in that The function request includes a bit-level function request and a symbol-level function request, and based on the function request being a high-level physical layer function request, processing the function request based on a baseband unit includes: Based on the data transmission process corresponding to the function request being a coding modulation process, processing the bit-level function request and the symbol-level function request in a first processing order, wherein a priority of processing the bit-level function request in the first processing order is higher than a priority of processing the symbol-level function request; Based on that the data transmission process corresponding to the function request is a decoding and modulation process, the bit-level function request and the symbol-level function request are processed according to a second processing sequence, and the priority of processing the bit-level function request in the second processing sequence is lower than the priority of processing the symbol-level function request.

5. The method according to claim 1, characterized in that The processing of the function request based on the type of the function request and based on the target unit includes: Determining the type of the target unit based on the type of the function request; Based on the type of the target unit, configure a work thread corresponding to the function request; The target unit is controlled to process the function request through the working thread.

6. The method according to claim 5, characterized in that The method further comprises: Obtaining the processing result corresponding to the working thread; Inputting the processing result into a target parameter prediction model to obtain a processing situation corresponding to the processing result, wherein the processing situation is used to indicate whether the processing result meets the expected processing situation; the processing situation includes processing time and / or result accuracy; In a case where the processing situation indicates that the processing result does not meet the expected processing situation, updating the working thread corresponding to the function request based on the processing situation; Through the updated working thread, the unit corresponding to the updated working thread is controlled to process the function request.

7. A request processing device, characterized in that: include: Receiving module and processing module; The receiving module is used to receive a function request; The function request is used to request a physical layer function service; The processing module is used to process the function request based on the type of the function request and based on the target unit; The target unit includes one of the following: the baseband unit, the radio remote unit, the field programmable logic gate array chip, and the central processing unit.

8. A request processing device, characterized in that: The request processing device comprises: processor; a memory configured to store instructions executable by the processor; The processor is configured to execute the instructions to implement the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instructions in the computer-readable storage medium are executed by a request processing device, the request processing device is enabled to execute the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that The computer program product comprises computer program instructions, and when the computer program instructions are executed by a processor, the method according to any one of claims 1 to 6 is implemented.

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