Control device and control method for reducing THD (total harmonic distortion) value of PFC (power factor correction) circuit

Abstract

The invention discloses a control device for reducing a THD value of a PFC circuit and a control method thereof, and relates to the technical field of PFC circuits. The control device comprises a microcontroller unit and a PI controller provided with a current loop and a voltage loop. The microcontroller unit inputs voltage change parameters to the voltage loop of the PI controller based on obtained external load information and current input voltage, and obtains a power factor value higher than a preset PFC threshold value. Obtaining an output voltage of the voltage loop, and calculating a voltage difference value between the output voltage and a preset reference voltage; calculating an input voltage effective value of the voltage loop, and obtaining a reference current value of the current loop; the input current is compared with a reference current value of a current loop, the duty ratio of a synchronous PWM signal of a PI controller is calculated and determined based on a current loop of the PFC circuit, and the microcontroller unit performs optimization control on the PFC circuit based on the duty ratio of the synchronous PWM signal; the PFC circuit has the effect of further reducing the THD value of the PFC circuit.

Description

Technical Field

[0001] The present application relates to the technical field of PFC circuits, and in particular to a control device and a control method for reducing a THD value of a PFC circuit. Background Art

[0002] With the rapid development of electronic products, the power consumption of various equipment is constantly increasing. With the increase in product power demand, in order to improve the utilization rate of electric energy, obtain a more stable output voltage and high and low voltage ripple, a power factor correction circuit is generally added to the AC input end of the product, also known as a PFC (Power Factor Correction) circuit. The THD (Total Harmonic Distortion) value of the PFC circuit refers to the ratio of all harmonic components in the input current to the effective value of the fundamental wave, which is used to measure the impact of nonlinear loads on the power quality of the power grid.

[0003] Under ideal conditions, the PFC circuit will make the input current a sine wave with the same phase as the input voltage, so that the power factor is close to 1 and the THD value is very low. However, in actual applications, due to various factors, the input current may contain harmonic components of different amplitudes, resulting in current waveform distortion, which in turn affects the THD value. Currently, most PFC control circuits on the market can achieve a PFC value of about 0.95 to 0.99, but the THD value can generally only be reduced to within the range of 5% to 10%. It is very technically difficult for this type of control circuit to obtain a lower THD value. Therefore, how to effectively reduce the THD value of the PFC circuit has always been a hot topic in technical research in related fields. Summary of the invention

[0004] In order to further reduce the THD value of the PFC circuit, the present application provides a control device and a control method for reducing the THD value of the PFC circuit.

[0005] In the first aspect, the invention objective of the present application is achieved by adopting the following technical solutions: A control device for reducing THD value of a PFC circuit, comprising a microcontroller unit and a PI controller provided with a current loop and a voltage loop: The microcontroller unit collects the zero-crossing input voltage and input current of the PFC circuit based on a preset sampling frequency, and inputs a voltage change parameter to the voltage loop of the PI controller based on the acquired external load information and the current input voltage to obtain a power factor value higher than a preset PFC threshold; Obtaining the output voltage of the voltage loop, calculating the voltage difference between the output voltage and a preset reference voltage; calculating the effective value of the input voltage of the voltage loop using a preset voltage algorithm, and obtaining a reference current value of the current loop; The input current is compared with a reference current value of the current loop, and a duty cycle of a synchronous PWM signal of a PI controller is determined based on the current loop calculation of the PFC circuit. The microcontroller unit optimizes and controls the PFC circuit based on the duty cycle of the synchronous PWM signal.

[0006] By adopting the above technical solution, in order to achieve the technical effect of further reducing the THD value of the PFC circuit, the present application adopts high-precision pulse width modulation signal (synchronous PWM signal) control and AC voltage overcurrent detection to achieve optimized control of the PFC circuit; specifically, the frequency value of the preset sampling frequency is relatively high to optimize the sampling signal quality; the preset PFC threshold is 0.99; the preset voltage algorithm is a root mean square formula algorithm, and since the input voltage is not a perfect sine wave, the input voltage root mean square method is used to calculate the input voltage effective value, which is conducive to optimizing the input voltage; the control device monitors the input voltage, input current and input voltage effective value of the voltage loop at the zero point in real time, and introduces input voltage change parameters corresponding to different external load information and the current input voltage to perform PI loop The invention relates to a method for realizing a PI loop compensation system for a power factor of not less than 0.99 under the full range of input voltage and different load conditions, and then calculating the voltage difference between the output voltage and the preset reference voltage, obtaining the reference current value of the current loop through calculation, and then determining the duty cycle of the synchronous PWM signal of the PI controller through the current loop calculation of the PFC circuit of the microcontroller unit, so as to accurately control the working state of the PFC circuit; the present application realizes the real-time detection of the input voltage by the microcontroller unit, and introduces the voltage change parameter when the input voltage changes to perform PI loop compensation under different input voltage conditions, so that the whole PFC control circuit can obtain a power factor value of more than 0.99 under the full input voltage range and different load conditions, and the THD value can be reduced to a THD parameter of about 2.5% after optimization control.

[0007] In a preferred example of the present application, the microcontroller unit optimizes and controls the PFC circuit based on the duty cycle of the synchronous PWM signal, specifically including: The microcontroller unit uses a digital signal processing algorithm to detect the zero-crossing point of the AC voltage to obtain a time reference for generating the synchronous PWM signal; The microcontroller unit uses an adaptive filtering algorithm to calculate the current delay information generated during the sampling process, and obtains a dynamic compensation parameter for adjusting the current loop behavior based on the current delay information and the voltage difference of the voltage loop; and determines a gain adjustment strategy for the integral term in the current loop according to the dynamic compensation parameter to perform current sampling compensation; An optimal PWM duty cycle range is calculated based on the external load information, and a PFC circuit is dynamically adjusted in real time based on an optimal value of the optimal PWM duty cycle range and the gain adjustment strategy.

[0008] By adopting the above technical solution, the PFC circuit is optimized and controlled by a microcontroller unit (MCU), especially by using a digital signal processing algorithm to detect the zero-crossing point of the AC voltage to generate a time base for the synchronous PWM signal, which can ensure the synchronization of the PWM signal with the input AC voltage and help reduce the distortion of the current waveform; the adaptive filtering algorithm is used to calculate the current delay information, and the behavior of the current loop is adjusted in combination with the voltage difference of the voltage loop, which can more accurately compensate for the delay and other non-ideal factors in the actual current sampling; not only the accuracy of the current control is improved, but also the dynamic response characteristics of the system are improved, so that the current loop can respond to load changes and grid fluctuations more quickly; the dynamic compensation parameter is used to determine the gain adjustment strategy of the integral term in the current loop, so that its control parameters can be automatically adjusted according to the real-time working conditions, which is conducive to making the PFC circuit maintain good stability under different working conditions.

[0009] In the second aspect, the invention objective of the present application is achieved by adopting the following technical solutions: A control method for reducing THD value of a PFC circuit is applied to a control device for reducing THD value of a PFC circuit as described above, the method comprising: Based on a preset sampling frequency, the microcontroller unit collects the zero-crossing input voltage and input current of the PFC circuit; The microcontroller unit combines the acquired external load information and the current input voltage to provide voltage variation parameters to the voltage loop of the PI controller to obtain a power factor value higher than a preset PFC threshold; Obtaining an output voltage of the voltage loop, and calculating a voltage difference between the output voltage and a preset reference voltage; Calculate the effective value of the input voltage of the voltage loop using a preset voltage algorithm, and determine the reference current value of the current loop; Comparing the actual input current with the reference current value of the current loop, and determining the duty cycle of the synchronous PWM signal of the PI controller according to the current loop calculation of the PFC circuit; The microcontroller unit performs optimization control on the PFC circuit according to the determined duty cycle of the synchronous PWM signal to reduce the THD value of the PFC circuit.

[0010] By adopting the above technical solution, multiple working parameter data detected under preset operating conditions are conducive to comprehensive analysis and understanding of the actual PFC circuit state; by accurately extracting several different target parameters, where the target parameters are key indicators reflecting the performance of the PFC circuit; several different target parameters are input into a preset harmonic analysis model to obtain detailed harmonic analysis results, which is helpful to identify specific factors affecting the THD value; based on the harmonic analysis results, different target parameters are optimized and adjusted in a targeted manner to form a corresponding THD improvement plan. The THD improvement plan is directly designed to reduce the THD value, and a better current waveform is achieved by adjusting key parameters, thereby effectively reducing total harmonic distortion.

[0011] In a preferred example of the present application, the operating parameter data is generated by at least one key component in the PFC circuit, and after optimizing and adjusting the different target parameters to obtain the corresponding THD improvement solution, the method includes: Obtaining a key component relationship diagram of each PFC circuit, wherein the key component relationship diagram is generated according to the electrical connection relationship of each component in the PFC circuit, and the key component relationship diagram includes a power supply node and multi-level component nodes; the power supply node represents the input power supply, each level of component node represents a component in the PFC circuit, and each level of component node is connected to its corresponding power supply node or the previous level of component node; In the obtained key component relationship diagram, the target parameters are associated with the corresponding power supply nodes or component nodes to form a parameter association diagram of each PFC circuit; Acquire a power system load distribution diagram, wherein the power system distribution diagram includes a plurality of load nodes and energy transmission paths between the load nodes; Based on the power system load distribution diagram, the load influence relationship of each PFC circuit is obtained; based on the preset node matching rules and the THD improvement scheme corresponding to different target parameters, the parameter association diagrams of each PFC circuit are integrated to form a visual THD optimization effect diagram.

[0012] By adopting the above technical solution, a key component relationship diagram of the PFC circuit is obtained, and the target parameters are associated with the power supply nodes or component nodes, forming a parameter association diagram of each PFC circuit, so as to more accurately analyze and understand the impact of each circuit component on the overall circuit performance, so as to facilitate more refined and targeted optimization adjustments in the future; when faced with a complex power system with multiple PFC circuits, the load distribution diagram of the power system can be obtained and the load influence relationship of each PFC circuit can be analyzed, so as to clearly see the impact path of different loads on circuit performance; further, the parameter association diagram is combined with the power system load distribution diagram to form a visualized THD optimization effect diagram. The visualization method not only makes the complex electrical connection and load influence relationship intuitive and easy to understand, but also helps engineers identify and analyze the effects of optimization measures.

[0013] In a preferred example of the present application, the different target parameters are optimized and adjusted to obtain a corresponding THD improvement solution, specifically including: Calculate the amplitude and phase of each harmonic in the corresponding target parameter based on the harmonic component information to determine the harmonic composition; When the harmonic composition meets the preset optimization conditions, a first THD improvement solution is provided based on a preset parameter optimization database in combination with corresponding target parameters; When the harmonic composition does not meet the preset optimization conditions, the dynamic characteristics of the corresponding target parameters are analyzed, and a second THD improvement plan for the target parameters is formulated according to the analysis results of the dynamic characteristics; The first THD improvement solution or the second THD improvement solution is used as a final THD improvement solution corresponding to the target parameter.

[0014] By adopting the above technical solution and a condition-oriented optimization strategy, when the harmonic composition meets the preset optimization conditions, a preliminary first THD improvement solution can be quickly provided based on the preset parameter optimization database, which not only speeds up the response speed, but also ensures the effectiveness and reliability of the solution because it is a database built based on historical data and best practices; for situations that do not meet the preset optimization conditions, the solution introduces a dynamic characteristic analysis of the target parameters, which can more deeply understand the behavior patterns of the system under different working conditions, and then formulate a more flexible and adaptable second THD improvement solution; the final selection of the THD improvement solution (first or second) depends on accurate harmonic component analysis and dynamic characteristic evaluation, which is conducive to improving the quality of optimization decisions; the present application effectively improves the control level of the THD value in the PFC circuit by realizing accurate harmonic component analysis, an optimization strategy combining condition-oriented and dynamic characteristic drive, and high-quality optimization decisions.

[0015] In a preferred example of the present application: the THD improvement scheme includes a specific parameter adjustment strategy; after forming a visualized THD optimization effect diagram, the following is also included: After applying the specific parameter adjustment strategy, monitor and record the actual THD changes of the PFC circuit; Identify the THD change trend and key influencing factors before and after the implementation of the parameter adjustment strategy in the visual THD optimization effect diagram; Evaluate the effectiveness of parameter adjustment strategies based on actual THD changes and key influencing factors, and optimize strategies based on evaluation results to continuously improve THD performance; The visualized THD optimization effect diagram is associated with the evaluation result of the parameter adjustment strategy to generate a visualized THD optimization process tracking model.

[0016] By adopting the above technical solution, after applying a specific parameter adjustment strategy, the system can monitor and record the actual THD changes of the PFC circuit in real time; at the same time, by identifying the THD change trend and key influencing factors before and after the implementation of the parameter adjustment strategy in the visual THD optimization effect diagram; based on the actual THD changes and key influencing factors, the effectiveness of the parameter adjustment strategy can be evaluated. It can not only effectively verify whether the current strategy has achieved the expected goals, but also discover potential problems or deficiencies. Through evaluation, the strategy can be continuously optimized and improved to ensure that it is always in the best state and to ensure that the power factor value higher than the preset PFC threshold is obtained.

[0017] In a preferred example of the present application, the working parameter data is analyzed and processed to obtain a number of different target parameters, specifically including: Using a frequency domain analysis algorithm to calculate the frequency distribution of the plurality of working parameter data, and obtaining a frequency domain characteristic data group of each working parameter; The operating parameter data and abnormal operating conditions whose frequency domain characteristic data exceed the preset normal range are filtered out; the operating parameter data under the preset operating conditions are sequentially subjected to data preprocessing including stability verification, noise filtering, redundant data extraction and key feature extraction to obtain a number of different target parameters.

[0018] By adopting the above technical solution, the frequency distribution of multiple working parameter data is calculated using a frequency domain analysis algorithm, and the frequency domain characteristic data group of each working parameter can be obtained; the working parameter data that exceeds the preset normal range and the abnormal working state are filtered out, ensuring that the data set used for analysis is reliable and meets the actual operating conditions, which helps to avoid misjudgment or optimization deviation caused by abnormal conditions; the working parameter data under the preset operating conditions is stability verified, ensuring that the data used is obtained under stable conditions; further, the entire data preprocessing process includes stability verification, noise filtering, redundant data elimination and key feature extraction, which is a multi-level and multi-angle data purification process, which enhances the accuracy of the final analysis results.

[0019] In summary, the present application includes at least one of the following beneficial technical effects: 1. The zero-crossing input voltage and input current of the PFC circuit are collected by the microcontroller unit (MCU) at a preset sampling frequency, and the voltage loop parameters of the PI controller are adjusted in combination with the external load information; this ensures accurate synchronization between the voltage and current waveforms, helps reduce the phase difference, and thus directly reduces the THD value; 2. Through comprehensive monitoring, accurate analysis, effective improvement, intelligent control, component association, load integration and visual management, the THD performance of the PFC circuit is significantly improved and the harmonic distortion is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is an application example diagram of a control device for reducing THD value of a PFC circuit in one embodiment of the present application; Figure 2 This is a flow chart of a control method for reducing THD value of a PFC circuit in one embodiment of the present application; Figure 3 This is another flow chart of a control method for reducing THD value of a PFC circuit in an embodiment of the present application. DETAILED DESCRIPTION

[0021] The present application is further described in detail below in conjunction with the accompanying drawings.

[0022] In one embodiment, if Figure 1As shown, the present application discloses a control device for reducing the THD value of a PFC circuit, the control device comprising a microcontroller unit and a PI controller provided with a current loop and a voltage loop: the microcontroller unit is an MCU, and a C2000 series DSP controller or an STM32F4 series MCU based on an ARMCortex-M4 core can be selected; the microcontroller unit collects the zero-crossing input voltage and input current of the PFC circuit based on a preset sampling frequency, and inputs a voltage change parameter to the voltage loop of the PI controller based on the acquired external load information and the current input voltage, and obtains a power factor value higher than a preset PFC threshold value. In this embodiment, the preset PFC threshold value is 0.99; the output voltage of the voltage loop is obtained, and the voltage difference between the output voltage and the preset reference voltage is calculated; the input voltage effective value of the voltage loop is calculated using a preset voltage algorithm, and a reference current value of the current loop is obtained. In this embodiment, the preset voltage algorithm is a root mean square method based on the input voltage; the input current is compared with the reference current value of the current loop, and the duty cycle of the synchronous PWM signal of the PI controller is determined based on the current loop calculation of the PFC circuit, and the microcontroller unit optimizes and controls the PFC circuit based on the duty cycle of the synchronous PWM signal.

[0023] Specifically, the microcontroller unit adopts a digital signal processing algorithm (DSP algorithm) to detect the zero-crossing point of the AC voltage and obtains a time base for generating a synchronous PWM signal; the microcontroller unit adopts an adaptive filtering algorithm to calculate the current delay information generated in the sampling process, and obtains a dynamic compensation parameter for adjusting the current loop behavior based on the current delay information and the voltage difference of the voltage loop; the gain adjustment strategy of the integral term in the current loop is determined according to the dynamic compensation parameter, and the integral term gain adjustment strategy refers to a method of adjusting the gain of the integral part in the PI controller, the purpose of which is to improve the transient response and stability of the system, while avoiding oscillation problems caused by excessive integration; current sampling compensation is performed; the optimal PWM duty cycle range is calculated based on external load information, and the PFC circuit is dynamically adjusted in real time based on the optimal value of the optimal PWM duty cycle range and the gain adjustment strategy.

[0024] The working principle of a control device for reducing THD value in a PFC circuit is as follows: The PFC circuit adopts the average current mode. In the average current control system, the output voltage is collected by the MCU, and the voltage difference between the output voltage and the preset reference voltage is calculated by the MCU. The voltage difference is calculated by the voltage loop of the PI controller and multiplied by the input voltage and then divided by the effective value of the input voltage to obtain the reference current value of the current loop; the input current is collected by the MCU, and the input current is subtracted from the reference current value calculated by the voltage loop. The duty cycle of the synchronous PWM signal of the PI controller is calculated through the current loop, and the microcontroller unit optimizes and controls the PFC circuit based on the duty cycle of the synchronous PWM signal.

[0025] In one embodiment, if Figure 2 As shown, a control method for reducing the THD value of a PFC circuit is provided, and the control method for reducing the THD value of a PFC circuit is applied to a control device for reducing the THD value of a PFC circuit.

[0026] A control method for reducing THD value of a PFC circuit specifically comprises the following steps: S1: Based on a preset sampling frequency, the zero-crossing input voltage and input current of the PFC circuit are collected through the microcontroller unit.

[0027] In this embodiment, the preset sampling frequency specifies the rate at which the microcontroller collects voltage and current data. A higher sampling frequency can provide more accurate data. A high-precision ADC module is used to capture the AC voltage and current waveforms, and a software algorithm is used to identify the zero-crossing moment in each cycle.

[0028] S2: The microcontroller unit combines the acquired external load information and the current input voltage to provide a voltage change parameter to the voltage loop of the PI controller to obtain a power factor value higher than a preset PFC threshold.

[0029] In this embodiment, the external load information includes information of all electrical devices connected to the PFC circuit; the voltage variation parameter refers to adjusting the setting value of the PI controller according to the current input voltage and external load conditions.

[0030] Specifically, the current input voltage level and load characteristics are analyzed, and the proportional and integral gains of the PI controller are dynamically adjusted to ensure that the output voltage is stable and the power factor reaches or exceeds a predetermined standard (for example, a power factor value greater than 0.99).

[0031] S3: Obtain the output voltage of the voltage loop, and calculate the voltage difference between the output voltage and a preset reference voltage.

[0032] In this embodiment, the preset reference voltage is a preset target output voltage value, which is used as a comparison benchmark to evaluate whether the actual output voltage meets expectations.

[0033] S4: Calculate the effective value of the input voltage of the voltage loop using a preset voltage algorithm, and determine the reference current value of the current loop.

[0034] S5: Compare the actual input current with the reference current value of the current loop, and determine the duty cycle of the synchronous PWM signal of the PI controller according to the current loop calculation of the PFC circuit.

[0035] In this embodiment, the duty cycle refers to the time ratio of the PWM signal being at a high level in one cycle, which determines the average output power.

[0036] S6: The microcontroller unit performs optimization control on the PFC circuit according to the determined duty cycle of the synchronous PWM signal to reduce the THD value of the PFC circuit.

[0037] In one embodiment, if Figure 3 As shown, a control method for reducing the THD value of a PFC circuit also includes: S10: monitoring the PFC circuit under preset operating conditions to obtain a plurality of operating parameter data, each operating parameter data being associated with identification information.

[0038] In this embodiment, since in actual application scenarios, a complex power system will be connected to multiple PFC circuits, in order to further analyze and study the THD control effect of the PFC circuit in the actual complex power system, and to achieve refined control of the PFC circuit in different power systems; this application further performs harmonic analysis and optimization adjustment effect tracking.

[0039] Specifically, the preset operating conditions specify the operating parameters and performance indicators that the PFC circuit should meet under a specific environment or operating mode, including input voltage range, input current range, load characteristics, etc.; the operating parameter data refers to various status information collected in real time from the PFC circuit, such as current, voltage, temperature, etc., to reflect the current operating status of the circuit; the identification information is a unique identification code assigned to each operating parameter.

[0040] In this embodiment, the working parameter data is analyzed and processed to obtain several different target parameters, including: S101: Calculate the frequency distribution of multiple working parameter data using a frequency domain analysis algorithm to obtain a frequency domain characteristic data group of each working parameter.

[0041] In this embodiment, the frequency domain analysis algorithm is the fast Fourier transform (FFT); the frequency domain feature data group refers to a series of data sets describing the frequency characteristics of the signal calculated by the frequency domain analysis algorithm, including amplitude, phase and frequency components; by analyzing the frequency components of each working parameter (such as input voltage, input current), recording its amplitude, phase and frequency position, a data set containing all relevant frequency domain features is formed.

[0042] S102: filtering out the operating parameter data and abnormal operating status whose frequency domain characteristic data exceed the preset normal range; sequentially performing stability verification, noise filtering, redundant data extraction and key feature extraction on the operating parameter data under the preset operating conditions to obtain a number of different target parameters.

[0043] In this embodiment, the preset normal range refers to a reasonable parameter interval defined according to the system design and operation specifications, and any data beyond this range may indicate an abnormal situation. The preset normal range can be set based on standard specifications and design goals. For example, reference can be made to the provisions on the performance of power equipment in international or national standards (such as IEC, IEEE, etc.). For power factor, the standards of many countries require that the power factor of industrial power equipment should be higher than 0.95. Therefore, the normal range of power factor can be set to between 0.95 and 1.0. If the design goal is to make the total harmonic distortion (THD) lower than 5%, the normal range of THD can be set to 0% to 5%. A certain safety margin is reserved within the determined normal range to cope with possible extreme situations. For the switching frequency, considering the influence of temperature changes and other uncertain factors, a safety margin of 10%-20% can be added to the nominal value of the design. For example, if the design nominal value is 100kHz, the normal range can be set to 80kHz to 120kHz.

[0044] Specifically, stability verification refers to statistical analysis of data to evaluate its changing trends over time, ensure that the data remains relatively stable over a period of time, and avoid using unstable samples to affect the results; noise filtering refers to the application of low-pass filters to eliminate noise signals; redundant data elimination refers to identifying and deleting duplicate or highly correlated data points to simplify the data set structure.

[0045] S20: Analyze and process the working parameter data to obtain a number of different target parameters, and input the different target parameters into a preset harmonic analysis model to obtain harmonic analysis results corresponding to the different target parameters according to the identification information.

[0046] In this embodiment, in the PFC circuit, different target parameters are key indicators extracted from the original operating parameter data in order to evaluate and optimize system performance, reflecting the key characteristics of the circuit and its impact on the THD value. The target parameters include input voltage effective value, input current effective value, power factor, THD value, amplitude and phase of each harmonic, transient response time, temperature, switching frequency, DC bus voltage, load current, current loop gain and voltage loop gain, etc.

[0047] S30: Based on the harmonic analysis results, different target parameters are optimized and adjusted to obtain corresponding THD improvement solutions.

[0048] In this embodiment, the harmonic analysis result includes harmonic component information; step S30 specifically includes: S3011: Calculate the amplitude and phase of each harmonic in the corresponding target parameter based on the harmonic component information to determine the harmonic composition.

[0049] Specifically, the harmonic component information refers to the specific properties of each harmonic extracted from the frequency domain analysis, including amplitude, frequency, phase, etc.

[0050] S3012: When the harmonic composition meets the preset optimization conditions, a first THD improvement solution is provided based on a preset parameter optimization database in combination with corresponding target parameters.

[0051] Specifically, check whether the harmonic composition meets the preset optimization conditions, such as whether the amplitude of certain subharmonics is lower than the set threshold. If the conditions are met, query the parameter optimization database to find historical cases similar to the current target parameters; based on the cases found, propose a set of preliminary optimization measures, such as adjusting the PWM signal duty cycle, modifying the PI controller gain, etc.

[0052] S3013: When the harmonic composition does not meet the preset optimization conditions, the dynamic characteristics of the corresponding target parameters are analyzed, and a second THD improvement plan for the target parameters is formulated according to the analysis results of the dynamic characteristics.

[0053] Specifically, the preset optimization conditions are a set of standards or thresholds defined according to the system design and operating specifications to determine whether specific optimization measures are needed for the current harmonic composition. Dynamic characteristics are used to describe the system's behavior patterns that change over time under different operating conditions, such as transient response and load change adaptability. When it is found that the harmonic composition does not meet the preset optimization conditions, the dynamic characteristics of the target parameters are further analyzed in depth. For example, the system's performance under load mutations, grid fluctuations, etc. is observed to identify the specific causes of high THD values.

[0054] S3014: Using the first THD improvement solution or the second THD improvement solution as the final THD improvement solution corresponding to the target parameter.

[0055] Specifically, the first THD improvement plan is a preliminary optimization measure based on preset optimization conditions and parameter optimization database, which is applicable to most common situations; the second THD improvement plan is a customized optimization measure formulated through in-depth analysis of the system dynamic characteristics for situations that do not meet the preset optimization conditions.

[0056] For example, the current PFC circuit type is a Boost PFC circuit; the input voltage range is 220V±10%; the output voltage is 400VDC; the load characteristics are a mixture of a constant resistive load and a changing nonlinear load; the initial THD value exceeds 20% and needs to be reduced to below 5%; the preset optimization condition is that the amplitude of the main harmonic components (such as the 3rd, 5th, and 7th harmonics) is lower than the set threshold.

[0057] Assume that the main harmonic components calculated by the frequency domain analysis algorithm are as follows: 3rd harmonic: amplitude is 5A, phase angle is -60°; 5th harmonic: amplitude is 3A, phase angle is -90°; 7th harmonic: amplitude is 2A, phase angle is -120°.

[0058] If the above harmonic components are within the preset optimization conditions, the first THD improvement plan is provided, such as appropriately increasing the duty cycle of the PWM signal to improve the average current level according to the historical data in the parameter optimization database, making the input current waveform closer to a sine wave, and fine-tuning the proportional and integral gains of the PI controller, especially for low-order harmonics (such as the third harmonic), to enhance the suppression of these frequency components.

[0059] Assume that during frequency domain analysis, it is found that the amplitudes of some higher-order harmonics (such as the 11th and 13th) exceed the preset thresholds, indicating an abnormal situation. At this time, the dynamic characteristics are analyzed: through transient response testing, it is found that when the load suddenly increases, an obvious overshoot phenomenon is observed in the current waveform, which leads to the aggravation of higher-order harmonics. In addition, when the input voltage fluctuates greatly, the system fails to adjust in time, resulting in an increase in the THD value and unstable adaptability to grid fluctuations. At this time, a second THD improvement plan can be formulated.

[0060] The second THD improvement plan developed includes: First, introduce an adaptive control algorithm, that is, develop an adaptive control algorithm based on real-time monitoring, which can dynamically adjust the PWM signal and PI controller parameters according to the current load and grid conditions to ensure fast response and stable operation.

[0061] Second, optimize the filter design, take into account the problem of high-order harmonics, and redesign the filter parameters to make it have a higher attenuation ability for specific frequency components.

[0062] Third, enhance heat dissipation management. Since high-order harmonics may cause additional heat loss, strengthen heat dissipation management to ensure that the operating temperature of key components remains within a safe range and prevent performance degradation due to overheating. By deploying new adaptive control algorithms and improved filter designs, a series of experimental verifications confirm that the system can maintain a THD value below 5% under different operating conditions.

[0063] S40: generating a plurality of control instructions based on a plurality of different target parameters, harmonic analysis results and corresponding THD improvement solutions, and sending the plurality of control instructions to a corresponding PFC circuit controller according to a preset instruction execution rule.

[0064] In this embodiment, the control instructions include adjusting the duty cycle of the PWM signal, modifying the gain of the PI controller, etc.; the preset instruction execution rules are customized and generated according to the actual PFC circuit and the connected key component relationship diagram.

[0065] For example, set the priority first: adjust the PWM duty cycle first, then adjust the PI controller gain; set the time interval to execute the instruction every 1 second; and set the condition trigger to execute the instruction to adjust the PWM duty cycle only when the input current change exceeds 1%.

[0066] In one embodiment, the operating parameter data is generated by at least one key component in the PFC circuit. After step S30, a control method for reducing the THD value of the PFC circuit includes: S301: Obtain a key component relationship diagram of each PFC circuit. The key component relationship diagram is generated according to the electrical connection relationship of each component in the PFC circuit. The key component relationship diagram includes a power supply node and multi-level component nodes. The power supply node represents the input power supply, and each level of component node represents a component in the PFC circuit. Each level of component node is connected to its corresponding power supply node or the previous level of component node.

[0067] In this embodiment, the key component relationship diagram is a graphical representation describing the electrical connection relationship between various components in the PFC circuit, including power supply nodes and multi-level component nodes; the power supply node represents the location of the input power supply and serves as the starting point in the key component relationship diagram; the component node represents the specific components in the PFC circuit (such as inductors, capacitors, switches, etc.), and each component node is connected to its corresponding power supply node or the upper-level component node.

[0068] S302: in the acquired key component relationship diagram, the target parameter is associated with the corresponding power supply node or component node to form a parameter association diagram of each PFC circuit.

[0069] In this embodiment, the parameter association diagram refers to a graph formed by associating the target parameter with the corresponding power supply node or component node, which is used to intuitively display the position of each parameter in the circuit and their mutual relationship; Specifically, analyze the measurement position of the target parameters (such as input voltage RMS, input current RMS, power factor, THD, etc.) in the circuit; associate each target parameter with the most relevant power node or component node, such as the input voltage RMS to the power node and the inductor current to the inductor component node; draw a parameter association diagram to intuitively display the position of each parameter in the circuit and their relationship.

[0070] S303: Obtain a power system load distribution diagram, where the power system distribution diagram includes multiple load nodes and energy transmission paths between the load nodes.

[0071] In this embodiment, the power system load distribution diagram is a graph describing multiple load nodes and energy transmission paths between them, reflecting the load distribution of the entire power system and several PFC circuits; Specifically, information about all loads in the power system is collected, including type, power demand, location, etc.; then, a graph reflecting the actual load distribution is constructed using power system simulation tools or field measurement data to determine the energy transfer path between each load node.

[0072] S304: Obtain the load influence relationship of each PFC circuit based on the power system load distribution diagram; integrate the parameter association diagrams of each PFC circuit based on the preset node matching rules and the THD improvement solutions corresponding to different target parameters to form a visualized THD optimization effect diagram.

[0073] In this embodiment, the load impact relationship is information obtained based on the load distribution diagram of the power system, which illustrates the degree and manner of influence of different loads on the PFC circuit; the node matching rule is a set of predetermined logic or standards, which stipulates how to integrate the parameter association diagrams of different PFC circuits according to specific conditions; the visualized THD optimization effect diagram is a comprehensive diagram finally generated, which shows the optimized and adjusted THD improvement plan and its impact on system performance.

[0074] Specifically, the load distribution diagram of the power system is analyzed to determine the specific impact of different loads on the PFC circuit (such as the increase in harmonics caused by load changes, etc.), and then node matching rules are formulated to clearly specify how to integrate the parameter association diagrams of different PFC circuits. For example, when two circuits share the same power node, their corresponding parameters can be combined and displayed; the parameter association diagrams of each PFC circuit are integrated, combined with the effect evaluation of the THD improvement solution, to generate a comprehensive visual THD optimization effect diagram.

[0075] In one embodiment, the THD improvement scheme includes a specific parameter adjustment strategy; after step S304, a control method for reducing the THD value of a PFC circuit further includes: S3041: After applying a specific parameter adjustment strategy, monitor and record actual THD changes of the PFC circuit.

[0076] In this embodiment, the parameter adjustment strategy specifically refers to a method for adjusting the operating parameters of key components in the PFC circuit.

[0077] Specifically, use high-precision measurement equipment (such as a power analyzer) to monitor the THD of the PFC circuit in real time, and define the monitoring cycle to ensure that the immediate response after parameter adjustment and long-term stability can be captured; record all relevant data including but not limited to timestamps, THD values, ambient temperature and other factors that may affect the results.

[0078] S3042: Identify the THD change trend and key influencing factors before and after the implementation of the parameter adjustment strategy in the visualized THD optimization effect diagram.

[0079] In this embodiment, the THD change trend and key influencing factors before and after the implementation of the parameter adjustment strategy are identified in the visualized THD optimization effect diagram; the THD change trend represents the change pattern of total harmonic distortion (THD) over time or other variables over a period of time; the key influencing factors are those parameters or conditions that have a significant impact on THD, such as load characteristics, power supply voltage quality, component aging, etc.; strategy effectiveness evaluation is the process of analyzing and evaluating the effect of the adopted parameter adjustment strategy to determine whether the expected THD improvement goal has been achieved.

[0080] Specifically, use data analysis tools (such as MATLAB, Python, etc.) to process the collected data and draw a THD trend chart; analyze the THD trend chart to find obvious upward or downward trends, and try to associate them with known key influencing factors; mark and describe how each key influencing factor affects THD, such as how load fluctuations lead to increased THD.

[0081] S3043: Evaluate the effectiveness of the parameter adjustment strategy based on actual THD changes and key influencing factors, and optimize the strategy based on the evaluation results to continuously improve THD performance.

[0082] In this embodiment, clear evaluation criteria are set, such as THD reduction percentage, stability and other indicators; the actual THD change is compared with the preset target to determine whether the current strategy is effective; if it is found that some key influencing factors are not fully considered, or the existing strategy fails to achieve the expected effect, it is necessary to review and adjust the parameter adjustment strategy; implement the optimized strategy, and monitor the THD change again to form a continuous improvement cycle.

[0083] S3044: Associating the visualized THD optimization effect diagram with the evaluation result of the parameter adjustment strategy to generate a visualized THD optimization process tracking model.

[0084] In this embodiment, a dynamic and interactive tool is created to record the entire process of THD optimization.

[0085] Specifically, all data related to THD optimization are integrated into a unified view, including original THD levels, parameter adjustment strategies, THD changes after implementation, evaluation results, etc., to ensure that the THD optimization process tracking model is easy to understand and each step in the optimization process and its effects can be intuitively seen. Key nodes are highlighted in the THD optimization process tracking model, such as important turning points before and after parameter adjustment, and areas where special attention is needed as indicated by the evaluation results.

[0086] It should be understood that the serial numbers of the steps in the above embodiments do not imply a sequence of execution. The execution sequence of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0087] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, it should be understood by those skilled in the art that the technical solutions described in the aforementioned embodiments may still be modified, or some of the features thereof may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A control device for reducing THD value of a PFC circuit, characterized in that: It consists of a microcontroller unit and a PI controller with current and voltage loops: The microcontroller unit collects the zero-crossing input voltage and input current of the PFC circuit based on a preset sampling frequency, and inputs a voltage change parameter to the voltage loop of the PI controller based on the acquired external load information and the current input voltage to obtain a power factor value higher than a preset PFC threshold; Obtaining an output voltage of the voltage loop, and calculating a voltage difference between the output voltage and a preset reference voltage; Calculating the effective value of the input voltage of the voltage loop by using a preset voltage algorithm, and obtaining the reference current value of the current loop; The input current is compared with a reference current value of the current loop, and a duty cycle of a synchronous PWM signal of a PI controller is determined based on the current loop calculation of the PFC circuit. The microcontroller unit optimizes and controls the PFC circuit based on the duty cycle of the synchronous PWM signal.

2. A control device for reducing THD value of a PFC circuit according to claim 1, characterized in that: The microcontroller unit optimizes and controls the PFC circuit based on the duty cycle of the synchronous PWM signal, specifically including: The microcontroller unit uses a digital signal processing algorithm to detect the zero-crossing point of the AC voltage to obtain a time reference for generating the synchronous PWM signal; The microcontroller unit uses an adaptive filtering algorithm to calculate the current delay information generated during the sampling process, and obtains a dynamic compensation parameter for adjusting the current loop behavior based on the current delay information and the voltage difference of the voltage loop; and determines a gain adjustment strategy for the integral term in the current loop according to the dynamic compensation parameter to perform current sampling compensation; An optimal PWM duty cycle range is calculated based on the external load information, and a PFC circuit is dynamically adjusted in real time based on an optimal value of the optimal PWM duty cycle range and the gain adjustment strategy.

3. A control method for reducing THD value of a PFC circuit, characterized in that: A control device for reducing THD value of a PFC circuit as claimed in any one of claims 1 to 2, the method comprising: Based on a preset sampling frequency, the microcontroller unit collects the zero-crossing input voltage and input current of the PFC circuit; The microcontroller unit combines the acquired external load information and the current input voltage to provide voltage variation parameters to the voltage loop of the PI controller to obtain a power factor value higher than a preset PFC threshold; Obtaining an output voltage of the voltage loop, and calculating a voltage difference between the output voltage and a preset reference voltage; Calculate the effective value of the input voltage of the voltage loop using a preset voltage algorithm, and determine the reference current value of the current loop; Comparing the actual input current with the reference current value of the current loop, and determining the duty cycle of the synchronous PWM signal of the PI controller according to the current loop calculation of the PFC circuit; The microcontroller unit performs optimization control on the PFC circuit according to the determined duty cycle of the synchronous PWM signal to reduce the THD value of the PFC circuit.

4. A control method for reducing THD value of a PFC circuit according to claim 3, characterized in that: The method further comprises: Monitoring the PFC circuit under preset operating conditions to obtain a plurality of operating parameter data, each of the operating parameter data being associated with identification information; Analyzing and processing the working parameter data to obtain a plurality of different target parameters, and inputting the different target parameters into a preset harmonic analysis model to obtain harmonic analysis results corresponding to the different target parameters according to the identification information; Based on the harmonic analysis results, the different target parameters are optimized and adjusted to obtain corresponding THD improvement solutions; A plurality of control instructions are generated based on a plurality of different target parameters, harmonic analysis results and corresponding THD improvement schemes, and the plurality of control instructions are sent to the corresponding PFC circuit controller according to a preset instruction execution rule.

5. A control method for reducing THD value of a PFC circuit according to claim 4, characterized in that: The operating parameter data is generated by at least one key component in the PFC circuit, and after optimizing and adjusting the different target parameters to obtain a corresponding THD improvement solution, the method includes: Obtaining a key component relationship diagram of each PFC circuit, wherein the key component relationship diagram is generated according to the electrical connection relationship of each component in the PFC circuit, and the key component relationship diagram includes a power supply node and multi-level component nodes; the power supply node represents the input power supply, each level of component node represents a component in the PFC circuit, and each level of component node is connected to its corresponding power supply node or the previous level of component node; In the obtained key component relationship diagram, the target parameters are associated with the corresponding power supply nodes or component nodes to form a parameter association diagram of each PFC circuit; Acquire a power system load distribution diagram, wherein the power system distribution diagram includes a plurality of load nodes and energy transmission paths between the load nodes; Based on the power system load distribution diagram, the load influence relationship of each PFC circuit is obtained; based on the preset node matching rules and the THD improvement scheme corresponding to different target parameters, the parameter association diagrams of each PFC circuit are integrated to form a visual THD optimization effect diagram.

6. A control method for reducing THD value of a PFC circuit according to claim 5, characterized in that: The harmonic analysis result includes harmonic component information; based on the harmonic analysis result, the different target parameters are optimized and adjusted to obtain a corresponding THD improvement solution, specifically including: Calculate the amplitude and phase of each harmonic in the corresponding target parameter based on the harmonic component information to determine the harmonic composition; When the harmonic composition meets the preset optimization conditions, a first THD improvement solution is provided based on a preset parameter optimization database in combination with corresponding target parameters; When the harmonic composition does not meet the preset optimization conditions, the dynamic characteristics of the corresponding target parameters are analyzed, and a second THD improvement plan for the target parameters is formulated according to the analysis results of the dynamic characteristics; The first THD improvement solution or the second THD improvement solution is used as a final THD improvement solution corresponding to the target parameter.

7. A control method for reducing THD value of a PFC circuit according to claim 5, characterized in that: The THD improvement scheme includes a specific parameter adjustment strategy; after forming a visualized THD optimization effect diagram, it also includes: After applying the specific parameter adjustment strategy, monitor and record the actual THD changes of the PFC circuit; Identify the THD change trend and key influencing factors before and after the implementation of the parameter adjustment strategy in the visual THD optimization effect diagram; Evaluate the effectiveness of parameter adjustment strategies based on actual THD changes and key influencing factors, and optimize strategies based on evaluation results to continuously improve THD performance; The visualized THD optimization effect diagram is associated with the evaluation result of the parameter adjustment strategy to generate a visualized THD optimization process tracking model.

8. A control method for reducing THD value of a PFC circuit according to claim 4, characterized in that: The analysis and processing of the working parameter data to obtain a number of different target parameters specifically include: Using a frequency domain analysis algorithm to calculate the frequency distribution of the plurality of working parameter data, and obtaining a frequency domain characteristic data group of each working parameter; The operating parameter data and abnormal operating conditions whose frequency domain characteristic data exceed the preset normal range are filtered out; the operating parameter data under the preset operating conditions are sequentially subjected to data preprocessing including stability verification, noise filtering, redundant data extraction and key feature extraction to obtain a number of different target parameters.

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