MEMS device, manufacturing method thereof and electronic device

Abstract

The invention discloses an MEMS device and a manufacturing method thereof, and an electronic device, the MEMS device comprises a first semiconductor substrate and a second semiconductor substrate, the first semiconductor substrate and the second semiconductor substrate are bonded, and a device region is arranged between the first semiconductor substrate and the second semiconductor substrate; the semiconductor device further comprises a liquid blocking wall structure, the liquid blocking wall structure, the first semiconductor substrate and the second semiconductor substrate define cavity units, and the device area is correspondingly arranged in one cavity unit. In the manufacturing process of the MEMS device, even if cracks are generated in the semiconductor substrate, corrosive liquid entering the device regions along the cracks is difficult to diffuse in a large area among the plurality of device regions due to the blocking of the liquid blocking wall structure, so that the metal structure of the large-area device region is prevented from being corroded, and the reliability of the MEMS device is improved. Therefore, the chip yield of the whole semiconductor substrate is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a MEMS device and a manufacturing method thereof, and an electronic device. Background Art

[0002] In the preparation process of MEMS (Micro-Electro-Mechanical System) devices, there is a process of bonding one semiconductor substrate to another semiconductor substrate by metal bonding, and thinning the back side of one of the semiconductor substrates after bonding. The thinning process usually uses processes such as but not limited to chemical mechanical polishing processes, pure physical polishing processes, etc. If cracks are generated in the semiconductor substrate during the thinning process, then in the current thinning process or subsequent manufacturing processes, corrosive liquids such as but not limited to grinding fluids will enter the device area between the two semiconductor substrates along the cracks, and quickly diffuse in the device area, causing the metal structure of a large area of ​​the device area to be corroded, thereby reducing the chip yield of the entire semiconductor substrate. Summary of the invention

[0003] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0004] In view of the existing problems, an embodiment of the present invention provides a MEMS device, which includes:

[0005] a first semiconductor substrate;

[0006] A second semiconductor substrate, the first semiconductor substrate and the second semiconductor substrate are bonded, and a device region is provided between the two;

[0007] The liquid retaining wall structure, the liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate together form a chamber unit, and the device area is correspondingly arranged in one chamber unit.

[0008] In some embodiments of the present application, a plurality of spaced-apart device regions are provided between the first semiconductor substrate and the second semiconductor substrate;

[0009] The liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate are combined to form a plurality of chamber units, and each device area corresponds to a chamber unit and is located in the corresponding chamber unit.

[0010] In some embodiments of the present application, the first semiconductor substrate is provided with a first bonding layer in the device region, the second semiconductor substrate is provided with a second bonding layer in the device region, the first bonding layer and the second bonding layer are bonded to form a stacked structure unit, and the top view shape of the stacked structure unit is a ring;

[0011] The chamber unit comprises a first sub-chamber; the top view shape of the first sub-chamber is also annular, and the stacked structure unit is arranged in the first sub-chamber.

[0012] In some embodiments of the present application, a micromechanical structure unit is disposed on at least one of the first semiconductor substrate and the second semiconductor substrate, and the stacked structure unit surrounds the micromechanical structure unit;

[0013] The chamber unit further includes a second sub-chamber, the first sub-chamber surrounds the second sub-chamber, and the micromechanical structure unit is located in the second sub-chamber.

[0014] In some embodiments of the present application, the liquid retaining wall structure includes a first liquid retaining wall structure, which is annular in shape when viewed from above and separates the first sub-chamber from the second sub-chamber.

[0015] In some embodiments of the present application, the first semiconductor substrate is further provided with a pad group in the device region, the pad group includes at least one pad, and the pad group is located outside the stacked structure unit;

[0016] The chamber unit further includes a third sub-chamber located outside the first sub-chamber, and the pad group is located in the third sub-chamber.

[0017] In some embodiments of the present application, an opening is provided through the second semiconductor substrate, and the pad group is located opposite to the opening;

[0018] The third sub-chamber is in communication with the opening, and a side chamber wall of the third sub-chamber separates the opening from other sub-chambers in the chamber unit.

[0019] In some embodiments of the present application, the liquid retaining wall structure includes:

[0020] A second liquid retaining wall structure, the second liquid retaining wall structure is annular in top view, so as to enclose a third sub-chamber together with the first semiconductor substrate and the second semiconductor substrate;

[0021] At least one third liquid retaining wall structure, both ends of the third liquid retaining wall structure are connected to the second liquid retaining wall structure; part of the second liquid retaining wall structure and the third liquid retaining wall structure are combined into a ring to form the outer wall of the first sub-chamber.

[0022] A second aspect of an embodiment of the present invention provides a method for manufacturing a MEMS device, the method comprising:

[0023] providing a first semiconductor substrate and a second semiconductor substrate;

[0024] forming a liquid retaining wall structure on at least one of the first semiconductor substrate and the second semiconductor substrate;

[0025] The first semiconductor substrate and the second semiconductor substrate are bonded together; a device area is arranged between the first semiconductor substrate and the second semiconductor substrate; the liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate are combined to form a chamber unit; and the device area is arranged in one chamber unit accordingly.

[0026] A third aspect of an embodiment of the present invention provides an electronic device, which includes the above MEMS device.

[0027] According to the MEMS device and its manufacturing method and electronic device provided by the present invention, a liquid retaining wall structure is provided on at least one semiconductor substrate; after the first semiconductor substrate and the second semiconductor substrate are bonded, the liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate are combined to form a chamber unit, and the device area is correspondingly provided in one chamber unit. Therefore, during the manufacturing process of the MEMS device, even if cracks are generated in the semiconductor substrate, the corrosive liquid that enters the device area along the cracks is difficult to diffuse over a large area between multiple device areas due to the blocking of the liquid retaining wall structure, thereby preventing the metal structure of the large area device area from being corroded, thereby improving the chip yield of the entire semiconductor substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The following drawings of the present invention are used to understand the present invention as part of the present invention. The embodiments of the present invention are shown in the drawings and the description thereof is used to explain the principle of the present invention.

[0029] In the attached figure:

[0030] Figure 1A to Figure 1B A schematic top view and a schematic cross-sectional view taken along line AA of a first semiconductor substrate according to a specific embodiment of the present invention are respectively shown;

[0031] FIG. 2A to FIG. 2B Schematic diagram of top view and schematic diagram of cross section along line BB of a second semiconductor substrate according to a specific embodiment of the present invention are respectively shown;

[0032] FIG. 3A to FIG. 3C The semi-perspective schematic diagram of a top view of a second semiconductor substrate after bonding, the CC cross-sectional schematic diagram, and the top enlarged schematic diagram of a chamber unit according to a specific embodiment of the present invention are respectively shown;

[0033] FIG. 4A to FIG. 4B A schematic diagram of a top view of the second semiconductor substrate after the opening and a DD cross-sectional diagram of a specific embodiment of the present invention are respectively shown;

[0034] Figure 5 A flow chart of a method for manufacturing a MEMS device according to an embodiment of the present invention is shown.

[0035] Reference numerals:

[0036] 10-first semiconductor substrate 20-second semiconductor substrate

[0037] 21- opening 30- laminated structure unit

[0038] 31-first bonding layer 32-second bonding layer

[0039] 33-third bonding layer 34-fourth bonding layer

[0040] 40- Chamber unit 41- First sub-chamber

[0041] 42-second sub-chamber 43-third sub-chamber

[0042] 50-liquid retaining wall structure 51-first liquid retaining wall structure

[0043] 52-second liquid retaining wall structure 53-third liquid retaining wall structure

[0044] 60-Pad DETAILED DESCRIPTION

[0045] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present invention. However, it is apparent to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features well known in the art are not described.

[0046] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0047] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0048] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0049] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0050] In the preparation process of MEMS devices, after one semiconductor substrate is bonded to another semiconductor substrate by metal bonding, the back side of one of the semiconductor substrates is thinned. In the prior art, the defect requirements before bonding and the cleaning process during the thinning process are very high, otherwise cracks will be generated in the semiconductor substrate during the thinning process after bonding due to defect problems and the introduction of particles during the grinding process, resulting in water or other liquid corrosive chemicals in the subsequent process entering the device area between the two semiconductor substrates along the cracks when the semiconductor substrate is thinned, and rapidly diffused in the device area of ​​the semiconductor substrate, causing the metal structure of a large area to be corroded, resulting in a large number of device areas failing, thereby affecting the yield of the entire semiconductor substrate.

[0051] Therefore, in view of the existence of the aforementioned technical problems, reference Figures 1A to 3C , an embodiment of the present invention provides a MEMS device, the MEMS device mainly comprising:

[0052] A first semiconductor substrate 10;

[0053] A second semiconductor substrate 20, the first semiconductor substrate 10 and the second semiconductor substrate 20 are bonded, and a device region is provided between the two;

[0054] The liquid retaining wall structure 50 , the first semiconductor substrate 10 and the second semiconductor substrate 20 together form a chamber unit 40 , and the device area is correspondingly arranged in one chamber unit 40 .

[0055] The above embodiment has the following beneficial effects: by providing a liquid retaining wall structure 50 on at least one semiconductor substrate; after the first semiconductor substrate 10 and the second semiconductor substrate 20 are bonded, the liquid retaining wall structure 50, the first semiconductor substrate 10 and the second semiconductor substrate 20 are combined to form a chamber unit 40, and the device area is correspondingly provided in one chamber unit 40. Therefore, during the manufacturing process of the MEMS device, even if cracks are generated in the semiconductor substrate, the corrosive liquid that enters the device area along the cracks is difficult to diffuse over a large area between multiple device areas due to the blocking of the liquid retaining wall structure, thereby preventing the metal structure of the large area device area from being corroded, thereby improving the chip yield of the entire semiconductor substrate.

[0056] The specific principle is as follows: In the prior art, after water and other liquid corrosive chemicals enter the device area between the two semiconductor substrates along the cracks, it is impossible to effectively prevent water and other liquid corrosive chemicals from flowing and diffusing in different device areas, which will cause the metal structure of a large area of ​​the device area to be corroded, resulting in failure of a large number of device areas, thereby affecting the chip yield on the entire semiconductor substrate.

[0057] In the above embodiments of the present application, reference Figures 1A to 3C By setting a liquid retaining wall structure 50, together with the first semiconductor substrate 10 and the second semiconductor substrate 20, different device areas are separated in different chamber units 40, so that different device areas are completely separated and do not affect each other. The function of the liquid retaining wall structure 50 is similar to a watertight compartment in a ship's hull, preventing water or other corrosive liquids that enter between the two semiconductor substrates through cracks from diffusing in different device areas. Even if cracks appear in the semiconductor substrate, in the subsequent thinning process or other processes, after water and other liquid corrosive chemicals enter the device area between the two semiconductor substrates along the cracks, the presence of the liquid retaining wall structure 50 will limit the diffusion path and diffusion speed of the corrosive liquid, so that the corrosive liquid is only distributed in a small area directly below or near the crack, and only corrodes the metal structure of a small number of device areas, while other device areas will not enter the corrosive liquid due to the protection of the liquid retaining wall structure 50. As a result, only the metal structure of a small number of device areas is corroded, while the metal structure of a large number of device areas is not affected. As a result, only a few device areas fail, while a large number of device areas do not fail, thereby improving the yield of the entire semiconductor substrate and ensuring the product yield.

[0058] Below, refer to Figures 1A to 4B The MEMS device according to the embodiment of the present invention is described in detail.

[0059] refer to Figure 3B After the first semiconductor substrate is bonded to the second semiconductor substrate, when the liquid retaining wall structure 50, the first semiconductor substrate 10 and the second semiconductor substrate 20 are combined to form a plurality of chamber units 40, the first semiconductor substrate 10 and the second semiconductor substrate 20 can be the top cavity wall and the bottom cavity wall of the chamber unit 40 respectively, and the liquid retaining wall structure 50 constitutes the side cavity wall of the chamber unit 40.

[0060] Exemplary, reference Figures 1A to 3C A plurality of spaced-apart device areas are arranged between the first semiconductor substrate 10 and the second semiconductor substrate 20; the liquid retaining wall structure 50, the first semiconductor substrate 10 and the second semiconductor substrate 20 are enclosed into a plurality of chamber units 40, each device area corresponds to a chamber unit 40 and is located in the corresponding chamber unit 40, so as to independently isolate and protect the plurality of device areas on the semiconductor substrate.

[0061] Exemplary, reference Figure 3A , multiple device regions are arranged on a semiconductor substrate along two directions perpendicular to each other.

[0062] There are many ways to bond the first semiconductor substrate 10 and the second semiconductor substrate 20 , some of which are exemplarily described below.

[0063] Exemplarily, the first semiconductor substrate 10 is provided with a first bonding layer 31 in the device region, the second semiconductor substrate 20 is provided with a second bonding layer 32 in the device region, and the first bonding layer 31 and the second bonding layer 32 are bonded to form a stacked structure unit 30 .

[0064] Illustratively, each device region may be provided with the first bonding layer 31 and the second bonding layer 32 described above, so that after two semiconductor substrates are bonded, each device region forms a stacked structure unit 30 .

[0065] The shape of the laminated structure unit 30 can be any type of shape, which is related to the specific function it plays. The shape of the corresponding chamber unit 40 can also be adjusted according to the shape of the laminated structure unit 30.

[0066] Exemplarily, the top view shape of the stacked structure unit 30 may be annular; the chamber unit 40 may include a first sub-chamber 41; the top view shape of the first sub-chamber 41 is also annular, and the stacked structure unit 30 is disposed in the first sub-chamber 41. Therefore, after the first bonding layer 31 and the second bonding layer 32 are bonded to form the stacked structure unit 30, the inner side and the outer side of the stacked structure unit 30 can be completely sealed and separated, so as to form a cavity structure of the MEMS device inside the stacked structure unit 30. At this time, refer to Figures 2A to 3C When looking down at the first sub-chamber 41 and the laminated structure unit 30 , the shape of the first sub-chamber 41 is also annular, and the laminated structure unit 30 is disposed in the first sub-chamber 41 .

[0067] That is, each chamber unit 40 is provided with a first sub-chamber 41 of matching shape for the annular stacked structure unit, so that the stacked structure unit 30 is inserted into the first sub-chamber 41, thereby providing additional independent isolation protection for the stacked structure unit 30 in each device area, preventing corrosive liquid from entering the device area from corroding the stacked structure unit 30, and increasing the anti-corrosion protection effect of the stacked structure unit 30.

[0068] Exemplary, reference Figure 3C The width of the first sub-chamber 41 can be slightly wider than the width of the laminated structure unit 30, so that the inner and outer sides of the laminated structure unit 30 are spaced from the inner and outer walls of the first sub-chamber 41 to prevent the liquid retaining wall structure 50 from affecting the function of the laminated structure unit 30.

[0069] Specifically, refer to Figure 3B and Figure 3CSince the first sub-chamber 41 is annular, it has an inner cavity wall and an outer cavity wall surrounding the inner cavity wall and spaced apart from the inner cavity wall, so as to form a receiving space of the first sub-chamber 41 between the inner cavity wall and the outer cavity wall. The annular laminated structure unit 30 is penetrated in the first sub-chamber 41, and is located between the inner cavity wall and the outer cavity wall of the first sub-chamber 41, and is spaced apart from the inner cavity wall and the outer cavity wall, thereby increasing the anti-corrosion protection effect of the laminated structure unit 30.

[0070] Exemplarily, a micromechanical structure unit (not shown) is disposed on at least one of the first semiconductor substrate 10 and the second semiconductor substrate 20, and the micromechanical structure unit is surrounded by the stacked structure unit 30. For example, a micromechanical structure unit may be disposed in each device region, and each stacked structure unit 30 corresponds to a micromechanical structure unit and surrounds the corresponding micromechanical structure unit.

[0071] At this time, the chamber unit 40 further includes a second sub-chamber 42, the first sub-chamber 41 surrounds the second sub-chamber 42, and the micro-mechanical structure unit is located in the second sub-chamber 42. Figures 2A to 3C When looking down at the first sub-chamber 41 and the second sub-chamber 42, the first sub-chamber 41 surrounds the second sub-chamber 42, and the micro-mechanical structure unit is located in the corresponding second sub-chamber 42, thereby increasing the difficulty for the corrosive liquid to enter the micro-mechanical structure unit area and improving the protection effect on the micro-mechanical structure unit.

[0072] Exemplarily, a movable structure may be formed in the micromechanical structure unit, such as a movable structure in an accelerometer or an inertial sensor. A micromechanical structure protection cavity may be formed in the two semiconductor substrates for the micromechanical structure unit to protect the micromechanical structure unit. Exemplarily, the micromechanical structure unit may be disposed in the first semiconductor substrate 10, and a concave cavity may be formed in the second semiconductor substrate 20, the position of which corresponds to the position of the micromechanical structure unit. After the first bonding layer 31 and the second bonding layer 32 are bonded, the micromechanical structure protection cavity is located above the micromechanical structure unit.

[0073] For example, reference Figure 3B and Figure 3C The liquid retaining wall structure 50 may include a first liquid retaining wall structure 51, which is annular in top view and separates the first sub-chamber 41 from the second sub-chamber 42. For example, each device area is provided with a first liquid retaining wall structure 51, and each first liquid retaining wall structure 51 corresponds to a stacked structure unit 30 and is located on the inner side of the corresponding stacked structure unit 30.

[0074] It should be noted that the reference Figure 3B and Figure 3CThe first sub-chamber 41 and the second sub-chamber 42 are separated by the annular first liquid retaining wall structure 51. The first liquid retaining wall structure 51 constitutes both the inner wall of the first sub-chamber 41 and the side wall of the second sub-chamber 42, thereby simplifying the liquid retaining wall structure 50.

[0075] Of course, in other embodiments, the inner cavity wall of the first sub-chamber 41 and the side cavity wall of the second sub-chamber 42 may not share the liquid retaining wall structure 50 .

[0076] In some embodiments, reference Figure 1A and Figure 1B The first semiconductor substrate 10 is also provided with a pad group in the device area, the pad group includes at least one pad 60, and the pad group is located outside the stacked structure unit 30; the chamber unit 40 also includes a third sub-chamber 43 located outside the first sub-chamber 41, and the pad group is located in the third sub-chamber 43.

[0077] For example, a pad group is provided in each device region of the first semiconductor substrate 10, and each pad group corresponds to a stacked structure unit 30 and is located outside the corresponding stacked structure unit 30. Figure 3B and Figure 3C The pad group is located in the corresponding third sub-chamber 43 to protect the pad group and increase the difficulty of corrosive liquid entering the pad group, thereby improving the anti-corrosion effect of the pad group.

[0078] Exemplary, reference Figure 1A and Figure 1B The pad group can be arranged on one side outside the corresponding stacked structure unit 30, and the pad 60 in the pad group can be electrically connected to, for example but not limited to, the stacked structure unit 30, the micromechanical structure unit, etc. through the routing and plug structure in the first semiconductor substrate 10.

[0079] Exemplary, reference Figure 1A and Figure 1B The pad group includes a plurality of pads 60, which are arranged side by side or in an array in the third sub-chamber 43 and spaced from the side wall of the third sub-chamber 43, so that the liquid retaining wall structure 50 and the pads 60 do not affect each other functionally.

[0080] Exemplary, reference Figure 4A and Figure 4B The second semiconductor substrate 20 is provided with an opening 21, and the pad group is opposite to the opening 21, so that the pad group on the first semiconductor substrate 10 is exposed to the outside, which is convenient for leading out the pad 60 in the pad group. Figure 4A and Figure 4BThe third sub-chamber 43 can be connected to the opening 21, and the side wall of the third sub-chamber 43 separates the opening 21 from other sub-chambers in the chamber unit 40, thereby preventing corrosive liquids or granular impurities in etching to form the opening 21 or in other subsequent processes from entering the stacked structure unit 30 or the micromechanical structure unit area of ​​the device area through the opening 21, thereby improving the protection effect.

[0081] Specifically, the number of the openings 21 in the second semiconductor substrate 20 may be one or more, and the openings 21 are limited to exposing the pads 60 in the pad group to the outside.

[0082] In some embodiments, reference Figure 3B and Figure 3C The liquid retaining wall structure 50 may include: a second liquid retaining wall structure 52 , the second liquid retaining wall structure 52 is annular in top view, so as to enclose a third sub-chamber 43 together with the first semiconductor substrate 10 and the second semiconductor substrate 20 .

[0083] Exemplarily, each device area can be provided with a second liquid retaining wall structure 52, and each second liquid retaining wall structure 52 corresponds to a pad group; when looking down at the second liquid retaining wall structure 52 and the chamber unit 40, the second liquid retaining wall structure 52 is in the shape of a ring, so as to enclose a third sub-chamber 43 together with the first semiconductor substrate 10 and the second semiconductor substrate 20, so as to completely surround a corresponding pad group and enhance the anti-corrosion protection effect.

[0084] Exemplary, reference Figure 3B and Figure 3C The liquid retaining wall structure 50 may further include: at least one third liquid retaining wall structure 53, both ends of the third liquid retaining wall structure 53 are connected to the second liquid retaining wall structure 52; a portion of the second liquid retaining wall structure 52 and the third liquid retaining wall structure 53 are combined into a ring to form the outer cavity wall of the first sub-chamber 41. By using the portion of the second liquid retaining wall structure 52 to be combined into a ring to serve as the outer cavity wall of the annular first sub-chamber 41, the difficulty of setting the liquid retaining wall structure 50 is simplified.

[0085] Illustratively, each device area may be provided with at least one third liquid retaining wall structure 53 , so that part of the second liquid retaining wall structure 52 of the same device area and the third liquid retaining wall structure 53 are combined into a ring to form the outer wall of the first sub-chamber 41 .

[0086] Regarding the arrangement of the third liquid retaining wall structure 53, it can be arranged in a variety of ways, and its extension can be a straight line extension or a broken line extension. Some of the methods are introduced as examples below.

[0087] Exemplary, reference Figure 3B and Figure 3CTwo third liquid retaining wall structures 53 are provided for each chamber unit 40. The two liquid retaining wall structures 50 are respectively located on the left and right sides of the stacked structure unit. The lower end of each third liquid retaining wall structure 53 is connected to the second liquid retaining wall structure 52 located below among the two second liquid retaining wall structures 52 adjacent to each other, and the upper end of each third liquid retaining wall structure 53 is connected to the second liquid retaining wall structure 52 located above among the two second liquid retaining wall structures 52 adjacent to each other, so that the two third liquid retaining wall structures 53 are surrounded into a ring with the help of parts of the two second liquid retaining wall structures 52 adjacent to each other, so as to form the outer cavity wall of the annular first sub-chamber 41.

[0088] Of course, the configuration of the third liquid retaining wall structure 53 is not limited to the above-mentioned configuration, and other configurations may also be used. Figure 3C A third liquid retaining wall structure 53 is shown as being located at the top. The extension direction of the third liquid retaining wall structure 53 is a broken line extension method, and both ends of the third liquid retaining wall structure 53 are connected to different positions of the same second liquid retaining wall structure 52, thereby forming the outer cavity wall of the first sub-chamber 41 together with part of the second liquid retaining wall structure 52.

[0089] Regarding the setting position of the liquid retaining wall structure 50 before bonding, various methods can be adopted, and some methods are introduced as examples below.

[0090] Exemplary, reference FIG. 2A to FIG. 3B The liquid retaining wall structure 50 can be set on the second semiconductor substrate 20, and the height of the liquid retaining wall structure 50 is higher than the height of the second bonding layer 32, so that after the second bonding layer 32 is bonded to the corresponding first bonding layer 31, the surface of the liquid retaining wall structure 50 facing away from the second semiconductor substrate 20 abuts against the first semiconductor substrate 10.

[0091] Specifically, before bonding, a liquid retaining wall structure 50 having a height higher than the second bonding layer 32 is only provided on the second semiconductor substrate 20. Exemplarily, the height of the liquid retaining wall structure 50 can be equal to the total height of the stacked structure unit 30, so that after the second bonding layer 32 is bonded to the corresponding first bonding layer 31, the surface of the liquid retaining wall structure 50 facing away from the second semiconductor substrate 20 abuts against the first semiconductor substrate 10, thereby achieving a sealed connection between the liquid retaining wall structure 50 and the first semiconductor substrate 10, thereby improving the sealing effect of the chamber unit 40 and thus improving the anti-corrosion protection effect.

[0092] Exemplarily, the liquid retaining wall structure 50 may also be disposed on the first semiconductor substrate 10 , and its disposition method is substantially the same as the above method.

[0093] Exemplarily, part of the thickness layer in the liquid retaining wall structure 50 can be set on the first semiconductor substrate 10, and part of the thickness layer can be set on the second semiconductor substrate 20. After the second bonding layer 32 is bonded to the corresponding first bonding layer 31, these two parts of the thickness layer are butt-jointed together to form a complete liquid retaining wall structure 50.

[0094] Exemplarily, the first bonding layer 31 and the second bonding layer 32 may both include metal materials, that is, the bonding type of the first bonding layer 31 and the second bonding layer 32 is metal bonding. Exemplarily, the material of one of the first bonding layer 31 and the second bonding layer 32 may be aluminum, and the material of the other bonding layer may be germanium, so that aluminum-germanium bonding is performed between the two bonding layers.

[0095] Exemplary, reference Figure 1A , Figure 2A and Figure 3A The above-mentioned device area and chamber unit 40 can be arranged in the central area of ​​the two semiconductor substrates, a ring-shaped third bonding layer 33 can be arranged in the edge area of ​​the first semiconductor substrate 10, and a ring-shaped fourth bonding layer 34 can be arranged in the edge area of ​​the second semiconductor substrate 20. When the first semiconductor substrate 10 and the second semiconductor substrate 20 are bonded, the third bonding layer 33 and the fourth bonding layer 34 are bonded, thereby forming a sealing bonding structure with a sealing function in the edge area of ​​the two semiconductor substrates to prevent corrosive liquids from entering the central area between the two semiconductor substrates.

[0096] Exemplarily, the third bonding layer 33 can be made of the same material and prepared in the same process as the first bonding layer 31. Exemplarily, the fourth bonding layer 34 can be made of the same material and prepared in the same process as the second bonding layer 32.

[0097] Embodiment 2

[0098] The present invention also provides a method for manufacturing a MEMS device, referring to Figures 1A to 3C and Figure 5 , which mainly includes the following steps:

[0099] In step S501, a first semiconductor substrate 10 and a second semiconductor substrate 20 are provided;

[0100] In step S502, a liquid retaining wall structure 50 is formed on at least one of the first semiconductor substrate 10 and the second semiconductor substrate 20;

[0101] In step S503, the first semiconductor substrate 10 and the second semiconductor substrate 20 are bonded together; a device area is set between the first semiconductor substrate 10 and the second semiconductor substrate 20, and the liquid retaining wall structure 50, the first semiconductor substrate 10 and the second semiconductor substrate 20 are enclosed into a chamber unit 40, and the device area is correspondingly set in one chamber unit 40.

[0102] Below, reference Figures 1A to 4B The manufacturing method of the MEMS device of the embodiment of the present invention is described in detail. It is worth mentioning that in order to avoid repetition, the same components and structures as those in the above-mentioned embodiment 1 are only briefly described, and their specific explanations and descriptions can refer to the description in the embodiment 1.

[0103] Regarding the materials of the first semiconductor substrate 10 and the second semiconductor substrate 20, any substrate material can be selected. Exemplarily, the first semiconductor substrate 10 and the second semiconductor substrate 20 can be silicon or silicon on insulator (SOI). For example, the first semiconductor substrate 10 and the second semiconductor substrate 20 can be Si-containing semiconductor substrates. Among them, the term "Si-containing semiconductor substrate" refers to any semiconductor material containing at least silicon. Illustrative examples of Si-containing semiconductor materials that can be used as substrates include: Si, SiGe, SiC, SiGeC, silicon on insulator (SOI) or SiGe on insulator (SGOI), but are not limited thereto. Depending on the device being manufactured, the substrate can be undoped or doped. Exemplarily, the first semiconductor substrate 10 and the second semiconductor substrate 20 can be made of single crystal silicon material.

[0104] There are many ways to bond the first semiconductor substrate 10 and the second semiconductor substrate 20. Some of the ways are introduced as examples below. For example, a bonding layer bonding method can be used.

[0105] For example, refer to Figure 1A and Figure 1B , a plurality of first bonding layers 31 spaced apart are formed on the first semiconductor substrate 10. Specifically, a first bonding material layer may be formed on the first semiconductor substrate 10 by a process such as but not limited to deposition or growth, and then the first bonding material layer may be etched to form a patterned first bonding layer 31.

[0106] refer to Figure 2A and Figure 2B , a plurality of second bonding layers 32 spaced apart are formed on the second semiconductor substrate 20. Specifically, a second bonding material layer may be first formed on the second semiconductor substrate 20 by a process such as but not limited to deposition, growth, etc., and then the second bonding material layer may be etched to form a patterned second bonding layer 32.

[0107] refer to Figure 2A and Figure 2B A liquid retaining wall structure 50 may also be formed on at least one of the first semiconductor substrate 10 and the second semiconductor substrate 20 .

[0108] For example, refer to Figure 2A and Figure 2B A liquid retaining wall structure 50 can be formed on the second semiconductor substrate 20, and the height of the liquid retaining wall structure 50 is higher than the height of the second bonding layer 32, so that after the second bonding layer 32 is bonded to the corresponding first bonding layer 31, the surface of the liquid retaining wall structure 50 facing away from the second semiconductor substrate 20 abuts against the first semiconductor substrate 10.

[0109] Next, refer to FIG. 3A to FIG. 3C The first semiconductor substrate 10 and the second semiconductor substrate 20 are bonded together, and a device region is provided between the two. For example, each first bonding layer 31 can be bonded to the corresponding second bonding layer 32 to form a plurality of stacked structure units 30 .

[0110] The first semiconductor substrate 10 and the second semiconductor substrate 20 include a plurality of device regions, and each stacked structure unit 30 is located in a corresponding device region. The liquid retaining wall structure 50, the first semiconductor substrate 10 and the second semiconductor substrate 20 together enclose a plurality of chamber units 40, and each stacked structure unit 30 is located in a corresponding chamber unit 40 corresponding to the device region where the chamber unit 40 is located.

[0111] Exemplary, reference FIG. 3A to FIG. 3C The stacked structure unit 30 is in a ring shape, and a micromechanical structure unit may be formed on at least one of the first semiconductor substrate 10 and the second semiconductor substrate 20, and the stacked structure unit 30 is disposed around the micromechanical structure unit.

[0112] Exemplary, reference FIG. 3A to FIG. 3C A pad group may also be formed on the first semiconductor substrate 10 , and the pad group is located outside the stacked structure unit 30 .

[0113] Exemplary, reference Figure 3B and Figure 4B The surface of the second semiconductor substrate 20 that is away from the second bonding layer 32 may also be thinned. The thinning process may be, for example but not limited to, a chemical mechanical polishing process, a pure physical polishing process, or the like.

[0114] Exemplary, reference Figure 4A and Figure 4B The surface of the second semiconductor substrate 20 facing away from the second bonding layer 32 may also be etched to form an opening 21 in the second semiconductor substrate 20 so that the pad group is exposed in the opening 21 .

[0115] At this point, the process steps implemented in the method for manufacturing a MEMS device according to an embodiment of the present invention have been completed. It can be understood that the method for manufacturing a MEMS device in this embodiment not only includes the above steps, but may also include other necessary steps before, during or after the above steps, which are all included in the scope of the manufacturing method of this embodiment.

[0116] According to the manufacturing method of the MEMS device provided by the present invention, a liquid retaining wall structure 50 is provided on at least one semiconductor substrate; after the first semiconductor substrate 10 and the second semiconductor substrate 20 are bonded, the liquid retaining wall structure 50, the first semiconductor substrate 10 and the second semiconductor substrate 20 are combined to form a chamber unit 40, and the device area is correspondingly provided in one chamber unit 40. Therefore, during the manufacturing process of the MEMS device, even if cracks are generated in the semiconductor substrate, the corrosive liquid entering the device area along the cracks is difficult to diffuse over a large area between multiple device areas due to the blocking of the liquid retaining wall structure 50, thereby preventing the metal structure of the large area device area from being corroded, thereby improving the chip yield of the entire semiconductor substrate.

[0117] Embodiment 3

[0118] Another embodiment of the present invention provides an electronic device, which includes the aforementioned MEMS device, and the MEMS device is manufactured according to the aforementioned method.

[0119] The electronic device of this embodiment can be any electronic product or device such as a mobile phone, a tablet computer, a laptop computer, a netbook, a game console, a television, a VCD, a DVD, a navigator, a digital photo frame, a camera, a video camera, a voice recorder, an MP3, an MP4, a PSP, etc., or any intermediate product including a circuit. The electronic device of the embodiment of the present invention has better performance due to the use of the above-mentioned MEMS device.

[0120] The present invention has been described by the above embodiments, but it should be understood that the above embodiments are only for the purpose of example and description, and are not intended to limit the present invention to the scope of the described embodiments. In addition, it can be understood by those skilled in the art that the present invention is not limited to the above embodiments, and more variations and modifications can be made according to the teachings of the present invention, and these variations and modifications all fall within the scope of the protection claimed by the present invention. The protection scope of the present invention is defined by the attached claims and their equivalents.

Claims

1. A MEMS device, characterized in that: include: a first semiconductor substrate; a second semiconductor substrate, wherein the first semiconductor substrate and the second semiconductor substrate are bonded to each other and a device region is provided therebetween; A liquid retaining wall structure, wherein the liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate together form a chamber unit, and the device area is correspondingly arranged in one of the chamber units.

2. The MEMS device according to claim 1, characterized in that A plurality of spaced apart device regions are provided between the first semiconductor substrate and the second semiconductor substrate; The liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate together form a plurality of chamber units, and each of the device areas corresponds to one chamber unit and is located in the corresponding chamber unit.

3. The MEMS device according to claim 1, characterized in that The first semiconductor substrate is provided with a first bonding layer in the device region, the second semiconductor substrate is provided with a second bonding layer in the device region, the first bonding layer and the second bonding layer are bonded to form a stacked structure unit, and the stacked structure unit has a ring shape in top view; The chamber unit includes a first sub-chamber; the top view shape of the first sub-chamber is also annular, and the stacked structure unit is arranged in the first sub-chamber.

4. The MEMS device according to claim 3, characterized in that A micromechanical structure unit is disposed on at least one of the first semiconductor substrate and the second semiconductor substrate, and the stacked structure unit surrounds the micromechanical structure unit; The chamber unit further includes a second sub-chamber, the first sub-chamber surrounds the second sub-chamber, and the micromechanical structure unit is located in the second sub-chamber.

5. The MEMS device according to claim 4, characterized in that The liquid retaining wall structure includes a first liquid retaining wall structure. The first liquid retaining wall structure is annular in shape when viewed from above and separates the first sub-chamber from the second sub-chamber.

6. The MEMS device according to any one of claims 3 to 5, characterized in that: The first semiconductor substrate is further provided with a pad group in the device region, the pad group includes at least one pad, and the pad group is located outside the stacked structure unit; The chamber unit further includes a third sub-chamber located outside the first sub-chamber, and the pad group is located in the third sub-chamber.

7. The MEMS device according to claim 6, characterized in that An opening is provided through the second semiconductor substrate, and the pad group is opposite to the opening; The third sub-chamber is in communication with the opening, and a side chamber wall of the third sub-chamber separates the opening from other sub-chambers in the chamber unit.

8. The MEMS device according to claim 6, characterized in that The liquid retaining wall structure comprises: a second liquid retaining wall structure, wherein the second liquid retaining wall structure is annular in top view, so as to enclose the third sub-chamber together with the first semiconductor substrate and the second semiconductor substrate; At least one third liquid retaining wall structure, both ends of the third liquid retaining wall structure are connected to the second liquid retaining wall structure; part of the second liquid retaining wall structure and the third liquid retaining wall structure are combined into a ring to form an outer wall of the first sub-chamber.

9. A method for manufacturing a MEMS device, characterized in that: include: providing a first semiconductor substrate and a second semiconductor substrate; forming a liquid retaining wall structure on at least one of the first semiconductor substrate and the second semiconductor substrate; bonding the first semiconductor substrate and the second semiconductor substrate; A device area is arranged between the first semiconductor substrate and the second semiconductor substrate. The liquid retaining wall structure, the first semiconductor substrate and the second semiconductor substrate together form a chamber unit. The device area is correspondingly arranged in one of the chamber units.

10. An electronic device, characterized in that: The electronic device comprises the MEMS device according to any one of claims 1 to 8.

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