Isolation circuit, three-phase isolation circuit, controller, method and storage medium

Abstract

The invention discloses an isolation circuit, a three-phase isolation circuit, a controller, a method and a storage medium, and the isolation circuit comprises an input filter capacitor (Ci), a first inductor (Lf1), a second inductor (Lf2), an upper tube (Q1), a lower tube (Q2), a first energy transfer capacitor (C1), a second energy transfer capacitor (C2), a first transformer (T1) and a second transformer (T2). Meanwhile, a single-stage isolation topology control algorithm is simplified, the conversion efficiency is greatly improved, the requirements of higher power level design and wider output voltage range can be met, and higher input voltage working capacity can be achieved; the electromagnetic compatibility of the power supply module can be greatly improved due to the double-inductor design of input energy transfer; furthermore, an active power factor calibration function can be realized, and input and output current ripples and voltage ripples can be greatly reduced through upper and lower tube staggered phase-shifting control, so that the service life of an output capacitor is prolonged.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular to an isolation circuit, a three-phase isolation circuit, a controller and method, and a storage medium. Background Art

[0002] With the rapid development of power electronics technology, there are more and more isolated AC / DC power supply topologies for converting AC to DC. The current high-power, high-frequency switching, and electrically isolated AC / DC conversion topologies usually adopt a two-stage topology. For example, when single-phase AC input is used, the front stage adopts a BOOST circuit with or without a bridge, and the back stage adopts an LLC circuit or a phase-shifted full-bridge circuit to achieve DCDC conversion and high-efficiency soft switching operation; when three-phase input is used, the front stage adopts a three-phase Vienna circuit to achieve power factor calibration and AC-DC conversion, and the back stage also adopts an LLC circuit or a phase-shifted full-bridge circuit to achieve a wide range of DC output voltage and high-efficiency soft switching operation.

[0003] The three-phase input AC / DC isolated power supply adopts a two-stage solution, which requires the addition of large-capacitance electrolytic capacitors in the middle. The whole machine has a large number of semiconductor switch devices and magnetic components, high production costs, low efficiency, and low power density. However, the current two-stage solution technology is mature, the control strategy is relatively simple, and it is easy to transform into an engineering project.

[0004] The single-stage AC / DC topology can significantly reduce the number of power supply components, lower power supply costs, and improve power supply efficiency. The current single-stage AC / DC converter has many problems, such as complex control algorithms, a large number of semiconductor components, and cannot meet higher power levels, a wider output voltage range, or a wider three-phase AC input voltage range. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide an isolation circuit, a three-phase isolation circuit, a controller and method, and a storage medium in view of the defects of the prior art such as the complex single-stage topology structure.

[0006] The technical solution adopted by the present invention to solve its technical problem is: construct an isolation circuit, which includes an input filter capacitor, a first inductor, a second inductor, an upper tube, a lower tube, a first energy transfer capacitor, a second energy transfer capacitor, a first transformer and a second transformer. The two ends of the input filter capacitor are used to access direct current or access an alternating current voltage via a rectifier circuit. One end of the input filter capacitor is connected to the other end of the input filter capacitor via the first inductor, the first energy transfer capacitor, the primary side of the first transformer, the primary side of the second transformer, the second energy transfer capacitor and the second inductor in sequence. The upper tube and the lower tube are connected in series between the common connection point of the first inductor and the first energy transfer capacitor and the common connection point of the second energy transfer capacitor and the second inductor. The common connection point of the upper tube and the lower tube is connected to the common connection point of the primary side of the first transformer and the primary side of the second transformer. The secondary side of the first transformer and the secondary side of the second transformer are connected to the output filter circuit.

[0007] Furthermore, in the isolation circuit of the present invention, the secondary side of the first transformer and the secondary side of the second transformer are respectively connected in parallel with the output filter circuit;

[0008] Alternatively, it also includes a series-parallel switching circuit, the secondary side of the first transformer is connected in parallel with one of the output filter circuits, the secondary side of the second transformer is connected in parallel with another of the output filter circuits, and the rear stages of the two output filter circuits are connected to the series-parallel switching circuit to achieve the output of the two output filter circuits in series or in parallel through the series-parallel switching circuit.

[0009] Furthermore, in the isolation circuit described in the present invention, the series-parallel switching circuit includes a first switching switch, a second switching switch and a third switching switch, the first switching switch is connected between the positive output end of one of the output filter circuits and the negative output end of another of the output filter circuits, the second switching switch is connected between the negative output ends of the two output filter circuits, and the third switching switch is connected between the positive output ends of the two output filter circuits.

[0010] Furthermore, in the isolation circuit of the present invention, the primary side and / or the secondary side of the first transformer and the second transformer also respectively include a winding switching circuit for adjusting the transformation ratio of the transformer;

[0011] The winding switching circuit includes two switching switches, the first switching switch is arranged at the front stage of the same-name end of the corresponding winding, and the second primary switching switch is connected between the middle position of the corresponding winding and the end of the first primary switching switch away from the winding.

[0012] Furthermore, in the isolation circuit of the present invention, the phase difference between the upper tube and the lower tube in emitting waves is 0 or 180°.

[0013] Furthermore, in the isolation circuit described in the present invention, the wave generation of the upper tube and the lower tube is controlled by a controller, and the controller calculates the drive signals of the upper tube and the lower tube according to the input voltage, input current, output voltage, and output current of the isolation circuit, with the input current waveform tracking the input voltage waveform and the output voltage and output current tracking their respective given values ​​as the goal.

[0014] In a second aspect, a three-phase isolation circuit is constructed, which includes three isolation circuits as described above.

[0015] The secondary sides of the first transformer and the secondary sides of the second transformer of the three isolation circuits are respectively connected in parallel with the same output filter circuit;

[0016] Alternatively, the secondary sides of the first transformers of the three isolation circuits are respectively connected in parallel with one of the output filter circuits, the secondary sides of the second transformers of the three isolation circuits are respectively connected in parallel with another of the output filter circuits, and the rear stages of the two output filter circuits are connected to a series-parallel switching circuit to realize the output of the three isolation circuits in series or in parallel through the series-parallel switching circuit.

[0017] Furthermore, in the three-phase isolation circuit described in the present invention, when there are two of the three-phase isolation circuits, the output ends of the two three-phase isolation circuits are directly connected in parallel or the two three-phase isolation circuits are connected to a series-parallel switching circuit to realize the output of the two three-phase isolation circuits in series or in parallel through the series-parallel switching circuit.

[0018] In a third aspect, a control method for an isolation circuit is constructed to control the isolation circuit, the method comprising: calculating the drive signals of the upper tube and the lower tube according to the input voltage, input current, output voltage, and output current of the isolation circuit, with the input current waveform tracking the input voltage waveform and the output voltage and output current tracking their respective given values ​​as the goal.

[0019] More specifically, the method comprises:

[0020] Inputting the sampling signal of the output current of the isolation circuit and the given signal as input signals into the loop compensator of the output current loop to obtain the output result of the output current loop;

[0021] Inputting the sampling signal of the output voltage of the isolation circuit and the given signal as input signals into the loop compensator of the output voltage loop to obtain the output result of the output voltage loop;

[0022] The output result of the output current loop and the output result of the output voltage loop are taken as the smaller one to obtain the output control loop result;

[0023] Processing the sampling signal of the input voltage of the isolation circuit to obtain a steamed wave voltage after absolute value processing;

[0024] A given signal of input current is calculated based on the multiplication of the output control loop result and the steamed wave voltage;

[0025] Input the sampling signal and the given signal of the input current as input quantities and input signals to the loop compensator of the input current loop to obtain the output result of the input current loop;

[0026] The output result of the input current loop is input as an input quantity to the PWM generator to obtain the driving signals of the upper tube and the lower tube.

[0027] In a fourth aspect, a controller is constructed, which includes a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the method described are implemented.

[0028] In a fifth aspect, a computer-readable storage medium is constructed, storing a computer program, and when the computer program is executed by a processor, the steps of the described method are implemented.

[0029] The isolation circuit, three-phase isolation circuit, controller and method, and storage medium of the present invention have the following beneficial effects: the isolation circuit of the present invention is a single-stage structure, and the isolation circuit can be used for single-stage DC / DC isolation, and has the output voltage step-up and step-down function, and can meet the requirements of high efficiency and high power transmission at the same time, and can also be used for AC / DC isolation after adding the front-stage rectifier circuit, and optimizes the number of components of the single-stage AC / DC isolation topology to the greatest extent, and simplifies the single-stage isolation topology control algorithm, greatly improves the conversion efficiency of the power module, and can meet the requirements of higher power level design and wider output voltage range, and can also achieve higher input voltage. pressure working ability; the dual inductor design of input energy transmission can greatly improve the electromagnetic compatibility performance of the power module and reduce the cost of input EMC devices; further, in terms of control method, through the dual-loop competition design of the output voltage loop and the output current loop, the loop output result of the dual-loop competition is multiplied by the input AC voltage steamed waveform to obtain the loop control setting of the input current loop, so as to realize the input current waveform tracking the input voltage waveform, realize the active power factor calibration function, and the high-efficiency single-stage isolation energy transmission function; the staggered phase-shift control of the upper and lower tubes can greatly reduce the input current ripple, reduce the output current ripple and voltage ripple, thereby improving the life of the output capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below. Obviously, the drawings in the following description are only embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on the provided drawings without creative work:

[0031] Figure 1 is a schematic diagram of the structure of the isolation circuit of the first embodiment;

[0032] Figure 2 It is a schematic diagram of the control model of the upper tube and the lower tube;

[0033] Figure 3 It is a schematic diagram of synchronous wave driving of the upper tube and the lower tube;

[0034] Figure 4 This is one of the schematic diagrams of the staggered drive of the upper tube and the lower tube;

[0035] Figure 5 This is the second schematic diagram of the staggered drive of the upper tube and the lower tube;

[0036] Figure 6 is a schematic structural diagram of an isolation circuit of Embodiment 2;

[0037] Figure 7 is a schematic diagram of the structure of the isolation circuit of Embodiment 3;

[0038] Figure 8 is a schematic structural diagram of an isolation circuit of Embodiment 4;

[0039] Fig. 9 is a schematic structural diagram of a three-phase isolation circuit of Embodiment 5;

[0040] Fig.10 is a schematic structural diagram of a three-phase isolation circuit of Embodiment 6;

[0041] Fig.11 is a schematic structural diagram of a three-phase isolation circuit of Embodiment 7;

[0042] Fig.12 This is the control method of the isolation circuit of the eighth embodiment. DETAILED DESCRIPTION

[0043] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Typical embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, rather than limitations on the technical solutions of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0044] Embodiment 1

[0045] refer to Figure 1 The front stage of the isolation circuit 2 of this embodiment is connected to the rectifier circuit 1, and the rectifier circuit 1 is used to access an AC voltage. The AC voltage can be a line voltage of a three-phase AC power or a phase voltage of a three-phase AC power. In this embodiment, it is a line voltage Vab. The rear stage of the isolation circuit 2 is connected to the output filter circuit 3, and Vo+ and Vo- are DC output voltages.

[0046] Among them, the isolation circuit 2 specifically includes an input filter capacitor Ci, a first inductor Lf1, a second inductor Lf2, an upper tube Q1, a lower tube Q2, a first energy transfer capacitor C1, a second energy transfer capacitor C2, a first transformer T1 and a second transformer T2, the rectifier circuit 1 is a full-bridge rectifier circuit composed of four diodes D11, D12, D13, and D14, and the output filter circuit 3 includes diodes D1, D2 and a capacitor Cout.

[0047] An AC voltage Vab is outputted to both ends of the capacitor Ci via the rectifier circuit 1. One end of the input filter capacitor Ci is connected to the other end of the input filter capacitor Ci via the first inductor Lf1, the first energy transfer capacitor C1, the primary side of the first transformer T1, the primary side of the second transformer T2, the second energy transfer capacitor C2, and the second inductor Lf2. The upper tube Q1 and the lower tube Q2 are connected in series between the common point P1 of the first inductor Lf1 and the first energy transfer capacitor C1 and the common point P2 of the second energy transfer capacitor C2 and the second inductor Lf2. The common point P3 of the upper tube Q1 and the lower tube Q2 is connected to the common point P4 of the primary side of the first transformer T1 and the primary side of the second transformer T2. The secondary side of the first transformer T1 and the secondary side of the second transformer T2 are respectively connected in parallel with the capacitor Cout in the output filter circuit 3. Specifically, the like-name end of the secondary side of the first transformer T1 is connected to the positive electrode of the capacitor Cout via the diode D1, the like-name end of the secondary side of the second transformer T2 is connected to the positive electrode of the capacitor Cout via the diode D2, and the opposite-name end of the secondary side of the first transformer T1 and the opposite-name end of the secondary side of the second transformer T2 are both connected to the negative electrode of the capacitor Cout.

[0048] The wave generation of the upper tube Q1 and the lower tube Q2 is controlled by a controller, see Figure 2 , showing the principle of the relevant control model of the controller controlling the upper tube Q1 and the lower tube Q2. The controller calculates the drive signals of the upper tube Q1 and the lower tube Q2 according to the input voltage of the rectifier circuit 1 in the front stage of the isolation circuit 2, the input current of the isolation circuit 2, and the output voltage and output current of the isolation circuit 2, with the input current waveform tracking the input voltage waveform and the output voltage and output current tracking their respective given values. The processing contents of (1)-(8) in the control model of the upper tube and the lower tube are explained below:

[0049] (1): Io_samp is the output current sampling signal, Ioset is the given signal of the output current, Io_samp and Ioset are used as input signals to the loop compensator Icomp, and the output result Ipi of the current loop is obtained. The loop compensator can sample the traditional PI loop control or PID control, depending on the requirements of the project. Vcomp, iPI, and other loop compensators in the subsequent control block diagram are also loop compensators. The design method is similar to that of the Icomp compensator, and needs to be designed according to actual engineering requirements.

[0050] (2): Vo_samp is the output voltage sampling signal, Voset is the given signal of the output voltage, Vo_samp and Voset are input as input signals to the loop compensator Vcomp to obtain the output result Vpi of the voltage loop.

[0051] (3): Take the smaller of the current loop output result Ipi and the voltage loop output result Vpi to obtain the output control loop result Piout.

[0052] (4): Vab_samp is the sampling signal of the AC input voltage. The signal has a sine wave with positive and negative values. After absolute value processing, it becomes the steamed wave voltage |Vab| of the input voltage signal.

[0053] (5)-(6): Multiply the output control loop result Piout by the input AC voltage's steamed-wave voltage |Vab| and the waveform given conversion coefficient Kv to obtain the given signal Ii_ref of the input current loop at this time, that is, Ii_ref = Kv*|Vab|*Piout.

[0054] (7): The input current sampling signal Ii_samp and the calculated given signal Ii_ref are used as input quantities and input into the loop compensator iPI to obtain the output result iPIout of the input current loop. Since the given signal Ii_ref contains the steamed bun waveform of the input voltage of this phase, the input current can be controlled to follow the input voltage waveform, thereby realizing active power factor correction.

[0055] (8): The output result iPIout of the input current loop is input into the PWM generator as the input quantity. The duty cycle of the upper tube Q1 and the lower tube Q2 is obtained through the PWM pulse width modulation strategy. After the driving signals of the upper tube Q1 and the lower tube Q2 are interleaved, the output voltage waveform is obtained.

[0056] There are two modes of wave generation for the upper tube Q1 and the lower tube Q2. The two modes are introduced below:

[0057] Wave generation mode 1: The wave generation phase of the upper tube Q1 and the lower tube Q2 is staggered by 0°.

[0058] refer to Figure 3 When the phase difference between Q1 and Q2 is 0, that is, they are completely turned on and off at the same time, there are two timing sequences in the working mode. iLf represents the inductor current, and the switch is turned on when Vgs is high.

[0059] Mode 1: When Q1 / Q2 is turned on, the voltage Vi across Ci is superimposed on the inductors Lf1 and Lf2, the inductor current increases, the inductor starts to store energy, and at this time, the voltage VC1 on C1 is reversely superimposed on the two ends of the primary side of the transformer T1, C1 starts to discharge and demagnetizes the transformer T1 at the same time; the voltage Vc2 on C2 is also reversely superimposed on the two ends of the primary side of the transformer T2, C2 also starts to discharge and demagnetizes the transformer T2 at the same time. The output diodes D1 and D2 are in the reverse cut-off state at this time, and the primary sides of the transformers T1 and T2 stop transferring energy to the secondary side.

[0060] Mode 2: When Q1 / Q2 is disconnected, since the inductor current cannot change suddenly, the inductors Lf1 and Lf2 are in the freewheeling stage. The freewheeling current flows through Lf1, C1, the primary side of T1, the primary side of T2, C2, Lf2, and Ci. The freewheeling current charges C1 and C2, and also transmits energy to the secondary side through transformers T1 and T2. At this time, D1 and D2 are in the on state.

[0061] This ripple mode is simple to control, but the input inductor current ripple frequency is equal to the switch control frequency. At this time, both the input ripple current and the output ripple current are large.

[0062] Transmission mode 2: The transmission phase of the upper tube Q1 and the lower tube Q2 is staggered by 180°. When the transmission of Q1 and Q2 is staggered by 180°, there are two different situations according to the transmission duty cycle:

[0063] The first case is when the duty cycle of the switch tube is less than 50%. Figure 4 As shown, there are four working modes:

[0064] Mode 1: When Q1 is closed and Q2 is open, the current on the inductors Lf1 and Lf2 is in the rising stage. At this time, the inductors are in the energy storage stage and charge C2 at the same time to transfer energy to the secondary side of the transformer T2, that is, the output diode D2 is in the conduction energy transfer stage; at this time, the voltage VC1 on C1 is reversely superimposed on both ends of the primary side of the transformer T1, C1 begins to discharge and demagnetize the transformer T1 at the same time, and the output diode D1 is in the reverse cut-off state.

[0065] Mode 2: When Q1 / Q2 is disconnected, since the inductor current cannot change suddenly, the inductors Lf1 and Lf2 are in the freewheeling stage. The freewheeling current flows through Lf1, C1, the primary side of T1, the primary side of T2, C2, Lf2, and Ci. The freewheeling current charges C1 and C2, and also transmits energy to the secondary side through transformers T1 and T2. At this time, D1 and D2 are in the on state.

[0066] Mode 3: When Q2 is closed and Q1 is open, the current on inductors Lf1 and Lf2 is in the rising stage. At this time, the inductors are in the energy storage stage and charge C1 at the same time, transferring energy to the secondary side of transformer T1, that is, the output diode D1 is in the conduction energy transfer stage; at this time, the voltage VC2 on C2 is reversely superimposed on both ends of the primary side of transformer T2, C2 begins to discharge and demagnetize transformer T2 at the same time, and the output diode D2 is in the reverse cut-off state.

[0067] Mode 4: When Q1 / Q2 is disconnected, since the inductor current cannot change suddenly, the inductors Lf1 and Lf2 are in the freewheeling stage. The freewheeling current flows through Lf1, C1, the primary side of T1, the primary side of T2, C2, Lf2, and Ci. The freewheeling current charges C1 and C2, and also transfers energy to the secondary side through transformers T1 and T2. At this time, D1 and D2 are in the on state.

[0068] The second situation is when the duty cycle of the switch tube is greater than 50%. Figure 5 As shown, there are four working modes:

[0069] Mode 1: When Q1 is closed and Q2 is open, inductors Lf1 and Lf2 are in the freewheeling stage, and at the same time charge C2 and transfer energy to the secondary side of transformer T2, that is, output diode D2 is in the conduction energy transfer stage; at this time, the voltage VC1 on C1 is reversely superimposed on both ends of the primary side of transformer T1, C1 starts to discharge and demagnetize transformer T1 at the same time, and output diode D1 is in the reverse cut-off state.

[0070] Mode 2: When Q1 / Q2 is turned on, Vi is completely superimposed on the two ends of the inductor Lf1 and Lf2, the inductor current rises, the inductor is in the energy storage stage, and at this time, the voltage VC1 on C1 is reversely superimposed on the two ends of the primary side of the transformer T1, C1 starts to discharge and demagnetizes the transformer T1 at the same time; the voltage Vc2 on C2 is also reversely superimposed on the two ends of the primary side of the transformer T2, C2 also starts to discharge and demagnetizes the transformer T2 at the same time. The output diodes D1 and D2 are in the reverse cut-off state at this time, and the primary sides of the transformers T1 and T2 stop transferring energy to the secondary side.

[0071] Mode 3: When Q2 is closed and Q1 is open, inductors Lf1 and Lf2 are in the freewheeling stage and charge C1 at the same time, transferring energy to the secondary side of transformer T1, that is, output diode D1 is in the conduction and energy transfer stage; at this time, the voltage VC2 on C2 is reversely superimposed on both ends of the primary side of transformer T2, C2 starts to discharge and demagnetize transformer T2 at the same time, and output diode D2 is in the reverse cut-off state.

[0072] Mode 4: When Q1 / Q2 is turned on, Vi is completely superimposed on the two ends of the inductor Lf1 and Lf2, the inductor current rises, the inductor is in the energy storage stage, and at this time, the voltage VC1 on C1 is reversely superimposed on the two ends of the primary side of the transformer T1, C1 starts to discharge and demagnetizes the transformer T1 at the same time; the voltage Vc2 on C2 is also reversely superimposed on the two ends of the primary side of the transformer T2, C2 also starts to discharge and demagnetizes the transformer T2 at the same time. The output diodes D1 and D2 are in the reverse cut-off state at this time, and the primary sides of the transformers T1 and T2 stop transferring energy to the secondary side.

[0073] When the switch tube driving wave mode is designed as an interleaved wave mode, the input inductor current ripple can be greatly reduced, and the frequency of the output power transmission power is also changed to twice the switching frequency ripple, which reduces the output voltage ripple and output current ripple, effectively reduces the number of filter components, and realizes high power density, high efficiency, and high performance power supply design.

[0074] Embodiment 2

[0075] In the first embodiment, transformers T1 and D1, T2 and D2 form two output circuits. When a wider output voltage range is required, the two windings can be switched in series and parallel, which is the optimization idea of ​​the second embodiment. Figure 6 As shown, this embodiment adds a series-parallel switching circuit 4 on the basis of embodiment 1. At this time, two output filter circuits 3 are configured, such as two capacitors Co1 and Co2 in the figure. The secondary side of the first transformer T1 is connected in parallel with the capacitor Co1, and the secondary side of the second transformer T2 is connected in parallel with the capacitor Co2. The rear stage of capacitors Co1 and Co2 is connected to the series-parallel switching circuit 4 to realize series or parallel output through the series-parallel switching circuit.

[0076] Specifically, the series-parallel switching circuit 4 includes a first switching switch S1, a second switching switch S2 and a third switching switch S3. The first switching switch S1 is connected between the positive electrode of capacitor Co1 and the negative electrode of Co2, the second switching switch S2 is connected between the negative electrodes of capacitors Co1 and Co2, and the third switching switch S3 is connected between the positive electrodes of capacitors Co1 and Co2.

[0077] In this embodiment, the three switching switches can be relay switches, and the series-parallel switching of the two output circuits is realized by three groups of relay switches. When the output voltage requirement is low voltage, the switch S1 is disconnected, and the switches S2 and S3 are closed. At this time, the capacitors Co1 and Co2 work in parallel; when the output voltage requirement is high voltage, the switches S2 and S3 are disconnected, and the switch S1 is closed, and the capacitors Co1 and Co2 work in series. When the output works in the series working state, the difference in the duty cycle of Q1 and Q2 can be adjusted through closed-loop control to realize the voltage equalization function on the two output capacitors Co1 and Co2.

[0078] Embodiment 3

[0079] Embodiments 1 and 2 are applied to AC scenarios. In fact, the rectifier circuit 1 of embodiments 1 and 2 can be omitted, and the two ends of the input filter capacitor Ci can be directly connected to DC power. In this way, this embodiment can work alone in an isolated DC / DC application scenario, such as Figure 7 As shown, the rectifier circuit 1 is removed on the basis of the second embodiment, and the DC power is directly input to the input filter capacitor Ci. At this time, the control model can be Figure 2 Vab_samp in the above example can be changed to the voltage on capacitor Ci. This deformed topology can achieve both the boost and buck functions of the output voltage relative to the input voltage, while also meeting the electrical isolation performance. This deformed topology can be used for multi-channel input and output parallel design, and has the ability to expand the multi-channel interleaved parallel design for greater power.

[0080] Embodiment 4

[0081] When the topology of the present invention realizes a wider output voltage range, a winding switching function can be added to the primary or secondary winding of the output transformer. The primary and / or secondary windings of the first transformer T1 and the second transformer T2 are also respectively configured with winding switching circuits for adjusting the transformer transformation ratio. For example, this embodiment is to perform the following steps on the transformer: Figure 8 The modified design shown can achieve a wider output voltage range capability. In this embodiment, a winding switching circuit for adjusting the transformation ratio of the transformer T1 is configured on both the primary side and the secondary side of the first transformer T1, and a winding switching circuit for adjusting the transformation ratio of the transformer T2 is configured on the primary side of the second transformer T2.

[0082] Each of the winding switching circuits includes two switching switches, the first switching switch is arranged in the front stage of the same-name end of the corresponding winding, and the second primary switching switch is connected between the middle position of the corresponding winding (the middle position here refers to any position between the same-name end and the opposite-name end of the winding, not the position of the center half in a strict sense) and the end of the first primary switching switch away from the winding.

[0083] Embodiment 5

[0084] refer to Fig. 9 In this embodiment, a three-phase isolation circuit is constructed by using the isolation circuits of the three first embodiments. When the three-phase input voltage adopts an AC three-wire system and there is no N-wire input, the input AC voltage is designed as a three-phase input line voltage (i.e., Vab, Vbc, Vca), and the three-phase input line voltage is respectively input into the three isolation circuits; when the three-phase input voltage adopts an AC four-wire system and includes an N-wire input, the input AC voltage can be designed as a three-phase input line voltage (i.e., Vab, Vbc, Vca) and respectively input into the three isolation circuits, or the input voltage can be designed as a three-phase input phase voltage (i.e., Van, Vbn, Vcn) and respectively input into the three isolation circuits.

[0085] In this embodiment, the three isolation circuits share one output filter circuit, and the secondary sides of the first transformer T1 and the secondary sides of the second transformer T2 of the three isolation circuits are respectively connected in parallel to the same output filter circuit.

[0086] Embodiment 6

[0087] To meet the demand for a larger output current, this embodiment optimizes and improves the fifth embodiment by adding a series-parallel switching circuit, such as Fig.10 As shown, the secondary sides of the first transformer T1 of the three isolation circuits are respectively connected in parallel with one of the output filter circuits, and the secondary sides of the second transformer T2 of the three isolation circuits are respectively connected in parallel with another of the output filter circuits. The rear stages of the two output filter circuits are connected to a series-parallel switching circuit to realize the output of the three isolation circuits in series or in parallel through the series-parallel switching circuit.

[0088] Embodiment 7

[0089] When there are two three-phase isolation circuits, the output ends of the two three-phase isolation circuits can be directly connected in parallel. For example, the Vo+ (reference Fig. 9 / Fig.10 ) are connected together to connect the Vo- (reference Fig. 9 / Fig.10 ) together.

[0090] The two three-phase isolation circuits may be further connected to a series-parallel switching circuit to realize the output of the two three-phase isolation circuits in series or in parallel through the series-parallel switching circuit. Fig.11 For example, you can use two Fig. 9 The three-phase isolation circuit in Fig.11 The three switches shown are connected in series and parallel, which can meet the demand for greater output power and also output a wider output voltage range.

[0091] Embodiment 8

[0092] Based on the same inventive concept, this embodiment discloses a control method for an isolation circuit, which is used to control the aforementioned isolation circuit. The executor of the method is a controller, and the method includes: according to the input voltage, input current, output voltage, and output current of the isolation circuit, with the input current waveform tracking the input voltage waveform and the output voltage and output current tracking their respective given values ​​as the goal, calculating the drive signals of the upper tube Q1 and the lower tube Q2.

[0093] Specifically, refer to Fig.12 , can be combined with Figure 2 The control model is understood, the method of this embodiment includes:

[0094] S101: inputting a sampling signal Io_samp of the output current of the isolation circuit and a given signal Iset as input signals into a loop compensator Icomp of an output current loop to obtain an output result Ipi of the output current loop;

[0095] S102: inputting a sampling signal Vo_samp of the output voltage of the isolation circuit and a given signal Vset as input signals into a loop compensator Vcomp of an output voltage loop to obtain an output result Vpi of the output voltage loop;

[0096] S103: taking the smaller of the output result Ipi of the output current loop and the output result Vpi of the output voltage loop to obtain the output control loop result Piout;

[0097] S104: Processing the sampling signal Vab_samp of the input voltage of the isolation circuit by absolute value to obtain the steamed wave voltage |Vab|;

[0098] S105: Calculate and obtain a given input current signal Ii_ref based on the multiplication of the output control loop result Piout and the steamed wave voltage |Vab|;

[0099] S106: input the sampling signal Ii_samp of the input current and the given signal Ii_ref as input quantities and input signals to the loop compensator iPI of the input current loop, to obtain the output result iPIout of the input current loop;

[0100] S107: Input the output result iPIout of the input current loop as an input quantity to the PWM generator to obtain the driving signals of the upper tube Q1 and the lower tube Q2.

[0101] For more details, please refer to the previous circuit embodiments, which will not be described again here.

[0102] Embodiment 9

[0103] Based on the same inventive concept, this embodiment discloses a controller, which includes a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the method described in Embodiment 8 are implemented. The specific implementation process can be referred to the description of the above method embodiment, which will not be repeated here.

[0104] Embodiment 10

[0105] Based on the same inventive concept, this embodiment discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the method described in Embodiment 8. The specific implementation process can be found in the description of the above method embodiment, which will not be repeated here.

[0106] In summary, the isolation circuit, three-phase isolation circuit, controller and method, and storage medium of the present invention have the following beneficial effects: the isolation circuit of the present invention is a single-stage structure, which can be used for single-stage DC / DC isolation, has the output voltage step-up and step-down function, and can meet the requirements of high efficiency and high power transmission. It can also be used for AC / DC isolation after adding a front-stage rectifier circuit, which optimizes the number of components of the single-stage AC / DC isolation topology to the greatest extent, simplifies the single-stage isolation topology control algorithm, greatly improves the conversion efficiency of the power module, and can meet the requirements of higher power level design and wider output voltage range, and can also achieve higher output. Input voltage working capability; the dual inductor design of input energy transmission can greatly improve the electromagnetic compatibility performance of the power module and reduce the cost of input EMC devices; further, in terms of control method, through the dual-loop competition design of the output voltage loop and the output current loop, the loop output result of the dual-loop competition is multiplied by the input AC voltage steamed bun waveform to obtain the loop control setting of the input current loop, thereby realizing the input current waveform tracking the input voltage waveform, realizing the active power factor calibration function, and the high-efficiency single-stage isolation energy transmission function; the staggered phase-shift control of the upper and lower tubes can greatly reduce the input current ripple, reduce the output current ripple and voltage ripple, thereby improving the life of the output capacitor.

[0107] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0108] Terms containing ordinal numbers such as "first", "second" etc. used in this specification can be used to describe various constituent elements, but these constituent elements are not limited by these terms. The purpose of using these terms is only to distinguish one constituent element from other constituent elements. For example, without departing from the scope of the present invention, the first constituent element can be named as the second constituent element, and similarly, the second constituent element can also be named as the first constituent element. The term "and / or" used herein includes any and all combinations of one or more related listed items. The "connected" or "connected" not only includes directly connecting two entities, but also indirectly connecting through other entities with beneficial improvement effects.

[0109] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. An isolation circuit, characterized in that: The invention comprises an input filter capacitor (Ci), a first inductor (Lf1), a second inductor (Lf2), an upper tube (Q1), a lower tube (Q2), a first energy transfer capacitor (C1), a second energy transfer capacitor (C2), a first transformer (T1) and a second transformer (T2), wherein both ends of the input filter capacitor (Ci) are used to access direct current or access an alternating current voltage via a rectifier circuit, and one end of the input filter capacitor (Ci) is successively connected to the primary side of the first transformer (T1), the primary side of the second transformer (T2), and the second The energy transfer capacitor (C2) and the second inductor (Lf2) are connected to the other end of the input filter capacitor (Ci); the upper tube (Q1) and the lower tube (Q2) are connected in series between the common connection point of the first inductor (Lf1) and the first energy transfer capacitor (C1) and the common connection point of the second energy transfer capacitor (C2) and the second inductor (Lf2); the common connection point of the upper tube (Q1) and the lower tube (Q2) is connected to the common connection point of the primary side of the first transformer (T1) and the primary side of the second transformer (T2); the secondary side of the first transformer (T1) and the secondary side of the second transformer (T2) are connected to the output filter circuit.

2. The isolation circuit according to claim 1, characterized in that: The secondary side of the first transformer (T1) and the secondary side of the second transformer (T2) are respectively connected in parallel with the output filter circuit; Alternatively, it also includes a series-parallel switching circuit, wherein the secondary side of the first transformer (T1) is connected in parallel with one of the output filter circuits, the secondary side of the second transformer (T2) is connected in parallel with another of the output filter circuits, and the rear stages of the two output filter circuits are connected to the series-parallel switching circuit to achieve the output of the two output filter circuits in series or in parallel through the series-parallel switching circuit.

3. The isolation circuit according to claim 2, characterized in that: The series-parallel switching circuit comprises a first switching switch (S1), a second switching switch (S2) and a third switching switch (S3), wherein the first switching switch (S1) is connected between the positive output end of one of the output filter circuits and the negative output end of another of the output filter circuits, the second switching switch (S2) is connected between the negative output ends of the two output filter circuits, and the third switching switch (S3) is connected between the positive output ends of the two output filter circuits.

4. The isolation circuit according to claim 1, characterized in that: The primary side and / or the secondary side of the first transformer (T1) and the second transformer (T2) also respectively include a winding switching circuit for adjusting the transformation ratio of the transformer; The winding switching circuit includes two switching switches, the first switching switch is arranged at the front stage of the same-name end of the corresponding winding, and the second primary switching switch is connected between the middle position of the corresponding winding and the end of the first primary switching switch away from the winding.

5. The isolation circuit according to claim 1, characterized in that: The phase difference between the wave generation of the upper tube (Q1) and the lower tube (Q2) is 0 or 180 degrees.

6. The isolation circuit according to claim 5, characterized in that: The wave generation of the upper tube (Q1) and the lower tube (Q2) is controlled by a controller. The controller calculates the driving signals of the upper tube (Q1) and the lower tube (Q2) according to the input voltage, input current, output voltage and output current of the isolation circuit, with the input current waveform tracking the input voltage waveform and the output voltage and output current tracking their respective given values ​​as the goal.

7. A three-phase isolation circuit, characterized in that: The device comprises three isolation circuits as claimed in claim 1.

8. The three-phase isolation circuit according to claim 7, characterized in that: The secondary sides of the first transformer (T1) and the secondary sides of the second transformer (T2) of the three isolation circuits are respectively connected in parallel to the same output filter circuit; Alternatively, the secondary sides of the first transformers (T1) of the three isolation circuits are respectively connected in parallel with one of the output filter circuits, the secondary sides of the second transformers (T2) of the three isolation circuits are respectively connected in parallel with another of the output filter circuits, and the rear stages of the two output filter circuits are connected to a series-parallel switching circuit to achieve the output of the three isolation circuits in series or in parallel through the series-parallel switching circuit.

9. The three-phase isolation circuit according to claim 8, characterized in that: When there are two three-phase isolation circuits, the output ends of the two three-phase isolation circuits are directly connected in parallel or the two three-phase isolation circuits are connected to a series-parallel switching circuit to realize the output of the two three-phase isolation circuits in series or in parallel through the series-parallel switching circuit.

10. A control method for an isolation circuit, used to control the isolation circuit as claimed in claim 1, characterized in that: The method comprises: according to the input voltage, input current, output voltage and output current of the isolation circuit, the input current waveform tracks the input voltage waveform and the output voltage and output current track their respective given values, calculating the driving signals of the upper tube (Q1) and the lower tube (Q2).

11. The control method according to claim 10, characterized in that: The method specifically comprises: Inputting a sampling signal (Io_samp) of the output current of the isolation circuit and a given signal (Iset) as input signals into a loop compensator (Icomp) of an output current loop to obtain an output result (Ipi) of the output current loop; Inputting a sampling signal (Vo_samp) of the output voltage of the isolation circuit and a given signal (Vset) as input signals into a loop compensator (Vcomp) of an output voltage loop to obtain an output result (Vpi) of the output voltage loop; The output result of the output current loop (Ipi) and the output result of the output voltage loop (Vpi) are taken to be smaller to obtain the output control loop result (Piout); The sampling signal (Vab_samp) of the input voltage of the isolation circuit is processed by absolute value to obtain a steamed wave voltage (|Vab|); A given signal (Ii_ref) of the input current is calculated based on the multiplication of the output control loop result (Piout) and the steamed wave voltage (|Vab|); The sampling signal (Ii_samp) of the input current and the given signal (Ii_ref) are input as input quantities and input signals to the loop compensator (iPI) of the input current loop to obtain the output result (iPIout) of the input current loop; The output result (iPIout) of the input current loop is input to the PWM generator as an input quantity to obtain the driving signals of the upper tube (Q1) and the lower tube (Q2).

12. A controller, characterized in that: The method comprises a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the method according to any one of claims 10 to 11 are implemented.

13. A computer-readable storage medium, characterized in that: A computer program is stored, and when the computer program is executed by a processor, the steps of the method according to any one of claims 10-11 are implemented.

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