Signal processing method based on radio frequency system-on-chip chip and related device
By receiving and processing target linear frequency modulation signals on the system chip on the RF chip, and determining the preamble of the signal using the maximum energy value algorithm, the problem of insufficient signal positioning accuracy in traditional technology is solved, and higher signal processing accuracy and noise immunity are achieved.
Patent Information
- Application Number
- CN202510445004.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-10
- Publication Date
- 2025-05-09
- Estimated Expiration
- 2045-04-10
AI Technical Summary
Traditional digital signal processing technology is difficult to meet the high computing power and low power consumption requirements in the demands of the Internet of Things. The RF system-on-chip chip has problems with insufficient positioning accuracy and noise resistance in signal processing.
By receiving the target linear frequency modulation signal, the complex array is determined using the preset down frequency linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the preamble of the target linear frequency modulation signal is determined in combination with the maximum energy value algorithm, thereby improving the positioning accuracy of the starting position of the signal data.
It improves the accuracy of the starting position of signal data, reduces the impact of interference and noise, and enhances the signal processing capabilities of the RF system-on-chip chip in the Internet of Things scenario.
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Figure CN119966445A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of signal processing of radio frequency system-on-chip chips, and specifically relates to a signal processing method based on a radio frequency system-on-chip chip and a related device. Background Art
[0002] In recent years, the Internet of Things has developed rapidly, with tens of thousands of devices connected to the Internet every day. Faced with such a huge market demand, traditional digital signal processing technology has long been overwhelmed, and the new generation of digital signal processing has put forward more requirements such as high computing power and low power consumption. RF system-on-chip chips equipped with RF modules have become an important support for the development of the Internet of Things, but in order to adapt to the needs of the Internet of Things, there are still many problems to be solved in the signal processing of RF system-on-chip chips. Summary of the invention
[0003] The embodiment of the present application provides a signal processing method and related device based on a radio frequency system-on-chip chip. After receiving the target linear frequency modulation signal, the complex array can be determined according to the preset down-conversion linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the preamble code of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm, which is beneficial to improving the accuracy of positioning the starting position of the signal data.
[0004] In a first aspect, an embodiment of the present application provides a signal processing method based on a radio frequency system-on-chip chip, which is applied to a digital signal processor of the radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip includes the digital signal processor and a microcontroller; the method includes: receiving a target linear frequency modulation signal; Determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; Performing a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; According to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values; Performing a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values; determining a maximum total energy value among the plurality of total energy values; A target symbol value of a preamble code of the target linear frequency modulation signal is determined according to the maximum total energy value.
[0005] In a possible example, after receiving the target linear frequency modulation signal, the method includes: Acquire signal strength information of the target linear frequency modulation signal; Determining a target gain value according to the signal strength information; The driver layer function is called to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.
[0006] In a possible example, the calling of the driver layer function to transmit the target gain value to the microcontroller includes: Calling the first driver layer function to store the target gain value in a target storage area of the inter-processor communication peripheral device; The second driver layer function is called to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executed program after receiving the interrupt request message, and read the target gain value stored in the inter-processor communication peripheral.
[0007] In a possible example, determining a target gain value according to the signal strength information includes: Determining an average power of the target linear frequency modulation signal according to the signal strength information; Get the historical average power of the historical processing cycle; Determining a rate of change of signal strength according to the average power and the historical average power; Determining a first adjustment coefficient according to the rate of change of the signal strength; Performing a fast Fourier transform on the target linear frequency modulation signal to obtain a target spectrum; Determining the bandwidth, center frequency and flatness of the target spectrum; Determining a second adjustment coefficient according to the bandwidth, the center frequency and the flatness; respectively determining the matching degree between the target linear frequency modulation signal and a plurality of template signals; Determining a target template signal having the greatest matching degree among the multiple template signals; Determining a reference gain value according to the target template signal; The target gain value is determined according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and a basic gain value.
[0008] In a possible example, determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and a basic gain value includes: Determining a first gain value according to the basic gain value and the first adjustment coefficient; Determining a second gain value according to the first gain value, the second adjustment coefficient and the flatness; Determining a target weight according to the matching degree of the target template signal; The target gain value is determined according to the target weight, the second gain value and the reference gain value.
[0009] In a possible example, before receiving the target linear frequency modulation signal, the method includes: Get the number of first data slices produced in the current state; Determine the number of second data slices consumed in the current state; Determining whether the number of the first data slices and the number of the second data slices meet a target constraint condition; If it is determined that the first data slice quantity and the second data slice quantity meet the target constraint condition, it is determined to receive the target linear frequency modulation signal.
[0010] In a second aspect, an embodiment of the present application provides a signal processing device based on a radio frequency system-on-chip chip, which is applied to a digital signal processor of the radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip includes the digital signal processor and a microcontroller, and the device includes a receiving unit, a determining unit and a sliding window operation unit; wherein, The receiving unit is used to receive a target linear frequency modulation signal; The determining unit is used to determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; The determination unit is further used to perform a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; The determination unit is further used to determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values; The sliding window operation unit is used to perform a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values; The determining unit is further configured to determine a maximum total energy value among the multiple total energy values; The determining unit is further configured to determine a target symbol value of a preamble code of the target linear frequency modulation signal according to the maximum total energy value.
[0011] The third aspect of the present application provides an electronic device, comprising: a processor and a memory; and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the processor, and the programs include instructions for some or all of the steps described in the first aspect.
[0012] A fourth aspect of an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store a computer program, wherein the computer program enables a computer to execute instructions of some or all of the steps described in the first aspect of the embodiment of the present application.
[0013] A fifth aspect of the embodiments of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute some or all of the steps described in the first aspect of the embodiments of the present application. The computer program product may be a software installation package.
[0014] It can be seen that in the embodiment of the present application, the digital signal processor of the RF system-on-chip chip can first receive the target linear frequency modulation signal, and then determine the complex array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the complex array includes multiple elements, and a single element includes the amplitude and phase of a frequency component, and then determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values, and further, perform a sliding window summation operation on the multiple energy values in the time domain to obtain multiple total energy values, and further, determine the maximum total energy value among the multiple total energy values, and finally determine the target symbol value of the leading code of the target linear frequency modulation signal according to the maximum total energy value. After receiving the target linear frequency modulation signal, the complex array can be determined according to the preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the leading code of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values and finding the largest energy value among them, the influence of interference and noise is reduced, which is conducive to improving the accuracy of positioning the starting position of signal data. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0016] Figure 1 It is a schematic diagram of the architecture of a radio frequency system-on-chip chip provided in an embodiment of the present application; Figure 2 It is a flowchart of a signal processing method based on a radio frequency system-on-chip chip provided in an embodiment of the present application; Figure 3 It is a schematic diagram of a signal processing flow provided by an embodiment of the present application; Figure 4It is a flowchart of another signal processing method based on a radio frequency system-on-chip chip provided in an embodiment of the present application; Figure 5 It is a schematic diagram of a flow chart of a transmission target gain value provided in an embodiment of the present application; Figure 6 It is a flow chart of a signal data receiving management provided by an embodiment of the present application; Figure 7 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application; Figure 8 It is a block diagram of the functional units of a signal processing device based on a radio frequency system-on-chip provided in an embodiment of the present application. DETAILED DESCRIPTION
[0017] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0018] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.
[0019] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0020] In the embodiments of the present application, "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists alone; A and B exist at the same time; B exists alone. Among them, A and B can be singular or plural.
[0021] In the embodiment of the present application, the symbol " / " can indicate that the objects associated with each other are in an "or" relationship. In addition, the symbol " / " can also indicate a division sign, that is, performing a division operation. For example, A / B can indicate A divided by B.
[0022] In the embodiments of the present application, "at least one item" or similar expressions refer to any combination of these items, including any combination of single items or plural items, and refer to one or more, and multiple refers to two or more. For example, at least one item of a, b, or c can represent the following seven situations: a, b, c, a and b, a and c, b and c, a, b, and c. Among them, each of a, b, and c can be an element or a set containing one or more elements.
[0023] In the embodiments of the present application, "equal to" can be used in conjunction with greater than, and is applicable to the technical solution adopted when greater than, and can also be used in conjunction with less than, and is applicable to the technical solution adopted when less than. When equal to is used in conjunction with greater than, it is not used in conjunction with less than; when equal to is used in conjunction with less than, it is not used in conjunction with greater than.
[0024] In order to better understand the solutions of the embodiments of the present application, the electronic devices, related concepts and backgrounds that may be involved in the embodiments of the present application are first introduced below.
[0025] The electronic device of the application embodiment is a device with wireless communication function, which can be called terminal, user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal equipment, vehicle-mounted terminal equipment, industrial control terminal equipment, UE unit, UE station, mobile station, remote station, remote terminal equipment, mobile device, UE terminal equipment, wireless communication equipment, UE agent or UE device, etc. The terminal device can be fixed or mobile. It should be noted that the terminal device can support at least one wireless communication technology, such as LTE, new radio (NR), wideband code division multiple access (WCDMA), etc. For example, the terminal device may be a mobile phone, a tablet computer (pad), a desktop computer, a laptop computer, an all-in-one computer, a vehicle-mounted terminal, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication function, an electronic device or other processing device connected to a wireless modem, a wearable device, a terminal device in a future mobile communication network, or a terminal device in a future evolved public mobile land network (PLMN), etc.
[0026] See also Figure 1 , Figure 1 Schematic diagram of the architecture of a radio frequency system-on-chip chip provided in an embodiment of the present application. Figure 1As shown, the RF system-on-chip chip 1 includes a digital signal processor 10, a microcontroller 20, a first peripheral 30 of the digital signal processor 10, a second peripheral 40 of the microcontroller 20, a RF module 50, a digital front end 60 and a digital front end interface 70, wherein the digital signal processor 10 is respectively connected to the first peripheral 30 and the microcontroller 20, the microcontroller 20 is respectively connected to the second peripheral 40 and the digital front end, the second peripheral 40 is connected to the RF module 50, and the digital front end 60 is respectively connected to the digital front end interface 70 and the RF module 50.
[0027] Among them, the radio frequency system-on-chip chip is an RFSoC chip that can be used for IoT communications.
[0028] The digital signal processor 10 may be a DSP (Digital Signal Processing) core. The digital signal processor 10 may select the CEVA-BX1 architecture. The CEVA-BX1 architecture uses an 11-stage pipeline and a 5-way VLIW micro-architecture, provides parallel processing, loading / storage and program control of dual scalar computing engines, and reaches a main frequency of 2 GHz.
[0029] Among them, the first peripheral 30 includes an asynchronous receiver and transmitter UART, a digital front end DFE data interface, a direct memory access DMA, an inter-processor communication (IPC) peripheral, a timer Timer and a hardware accelerator. The hardware accelerator may include a fast Fourier transform (FFT), a trigger, a multiplier, etc. The UART is a debugging interface that can output print information. The DFE interface is responsible for data interaction with the digital front end DFE. The DMA allows the peripheral to directly transfer data to the memory of the digital signal processor 10 or from the memory of the digital signal processor 10 to the peripheral.
[0030] The microcontroller 20 may be an MCU core. The microcontroller 20 may be arm cortex-m0, which has the greatest feature of low power consumption design. Its core architecture is ARMv6M, and its computing power can reach 0.9 DMIPS / MHz.
[0031] The second peripheral 40 includes an asynchronous receiver / transmitter UART / SPI interface, a DFE control interface, a timer Timer and a WatchDog watchdog timer. The SPI interface is used for the microcontroller 20 to configure the radio frequency module 50 and the digital front end 60.
[0032] Among them, the driver layer can be designed. The driver layer directly interacts with the hardware devices and is responsible for the initialization, configuration and control of the hardware devices. The driver layer implements specific hardware drivers and provides the operating interface of the hardware devices. Specifically, the DSP peripheral driver, MCU peripheral driver and RF driver are designed. The DSP peripheral driver mainly configures, controls and interrupts the UART / DFE data interface, DMA, IPC, Timer, and hardware accelerator. The MCU peripheral driver mainly configures, controls and interrupts the UART / SPI interface, DFE control interface, Timer, and WatchDog. RF driver development is to realize the control of RF modules and DFE, mainly including transmit and receive (Rx / Tx) control and frequency, bandwidth, and filter coefficient configuration.
[0033] The digital signal processor 10 may receive signal data from an external device through a DFE interface, for example, receive a linear frequency modulation signal Chirp signal.
[0034] Among them, the hardware abstraction layer, namely the HAL development mode, can be designed. HAL serves as a bridge between the hardware driver and the upper-level program, and is ultimately encapsulated in the form of a function library. The upper-level physical layer algorithm program can call the standard HAL interface to operate the hardware. Through HAL design, the portability of the code can be improved, the hardware driver development can be simplified, and the stability and security of the system can be enhanced.
[0035] In one possible example, the digital signal processor 10 of the RF system-on-chip chip 1 may first receive a target linear frequency modulation signal, and the digital signal processor 10 may then determine a complex array in the frequency domain based on the target linear frequency modulation signal and a preset down-converted linear frequency modulation signal, the complex array including multiple elements, a single element including the amplitude and phase of a frequency component, and the digital signal processor 10 may then determine the energy value of each frequency component based on the amplitude and phase of each element to obtain multiple energy values, and further, the digital signal processor 10 may perform a sliding window summation operation on the multiple energy values in the time domain to obtain multiple total energy values, and further, the digital signal processor 10 may determine the maximum total energy value among the multiple total energy values, and finally, the digital signal processor 10 may determine the target symbol value of the preamble code of the target linear frequency modulation signal based on the maximum total energy value. After receiving the target linear frequency modulation signal, a complex array can be determined according to the preset down-conversion linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the preamble code of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values and finding the largest energy value, the influence of interference and noise is reduced, which is beneficial to improving the accuracy of positioning the starting position of the signal data.
[0036] See also Figure 2 , Figure 2It is a flow chart of a signal processing method based on a radio frequency system-on-chip chip provided by an embodiment of the present application, which is applied to a digital signal processor of a radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip includes the digital signal processor and a microcontroller, and the method includes: Step S201, receiving a target linear frequency modulation signal.
[0037] The DFE interface receives a target linear frequency modulation signal from an external device, and moves the target linear frequency modulation signal from the DFE interface RAM to an internal buffer of the digital signal processor through DMA.
[0038] The digital signal processor can divide the internal buffer into 2×Q parts, one part for read operation and the other part for write operation, allowing the read and write operations to be performed in parallel. The internal interface buffer here needs to be able to store data under the maximum time slot format SF and the maximum oversampling rate multiple Q.
[0039] Step S202, determining a multiplication result of the target linear frequency modulation signal and a preset down-converted linear frequency modulation signal to obtain a target signal.
[0040] Step S203, performing a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, where the complex array includes a plurality of elements, and a single element includes the amplitude and phase of a frequency component.
[0041] The preset down-conversion linear frequency modulation signal may be set according to actual needs and is not limited here.
[0042] Among them, the target signal is subjected to FFT transformation to obtain a complex number array in frequency.
[0043] The calculation formula is as follows: , Indicates the target signal, represents the target linear frequency modulation signal, Indicates the preset down-conversion linear frequency modulation signal.
[0044] Step S204, determining the energy value of each frequency component according to the amplitude and phase of each element, and obtaining a plurality of energy values.
[0045] In which, it is assumed that the elements in the complex array are Z=A×e jm , where A represents the amplitude and m represents the phase. According to Euler's formula e jn =cosm+jsinm, then Z= Acosm+jAsinm. Energy value= .
[0046] Step S205 , performing a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values.
[0047] Among them, multiple energy values are arranged in sequence, a single window corresponds to an energy value, and the sliding window summation operation is performed starting from the first energy value. The number of windows summed each time is a preset number, and one window is slid each time according to the window arrangement order.
[0048] The preset number may be manually set or set by the system by default, and is not limited here. For example, the preset number may be 3, that is, the energy of 3 windows is measured each time.
[0049] The energy values of a preset number of adjacent points are accumulated according to the following formula: Step S206: determining the maximum total energy value among the multiple total energy values.
[0050] Step S207: determining a target symbol value of a preamble of the target linear frequency modulation signal according to the maximum total energy value.
[0051] The formula for the target symbol value of the preamble is as follows: , Indicates the target symbol value to be detected.
[0052] Specifically, the digital signal processor can design multiple algorithm modules, including a preamble code synchronization detection algorithm module, a frequency offset calculation algorithm module, a frequency offset compensation algorithm module, a payload detection algorithm module and a decoding algorithm module. The algorithm steps executed by the preamble code detection algorithm module may include steps S202-S206.
[0053] Among them, the frequency deviation estimation operation is to calculate the frequency deviation of multiple linear frequency modulation signals, specifically, to perform the following operations on each linear frequency modulation signal to obtain multiple downchirp detection values: by determining a complex array in the frequency domain according to the linear frequency modulation signal and the preset upper frequency linear frequency modulation signal, the complex array includes multiple elements, and a single element includes the amplitude and phase of a frequency component; according to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values; a sliding window summation operation is performed on the multiple energy values to obtain multiple total energy values; the maximum total energy value among the multiple total energy values is determined, and the maximum total energy value is used as the downchirp detection value; the average value of the multiple downchirp detection values is calculated to obtain the frequency deviation.
[0054] Among them, the frequency offset compensation algorithm module is used to compensate the subsequent data according to the frequency offset calculated by the frequency offset calculation algorithm module. The payload detection algorithm module is used to locate the starting position of the payload and demodulate the data after the starting position. The decoding algorithm module includes Gray mapping, de-diagonal interleaving, channel whitening, decoding, and CRC check. The order of multiple algorithm modules in signal processing is as follows: Figure 3 As shown, Figure 3 This is a flow chart of a signal processing provided in an embodiment of the present application: preamble code synchronization detection-frequency offset calculation-frequency offset compensation-Payload detection-decoding.
[0055] It can be seen that in the embodiment of the present application, the digital signal processor of the RF system-on-chip chip can first receive the target linear frequency modulation signal, and then determine the complex array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the complex array includes multiple elements, and a single element includes the amplitude and phase of a frequency component, and then determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values, and further, perform a sliding window summation operation on the multiple energy values in the time domain to obtain multiple total energy values, and further, determine the maximum total energy value among the multiple total energy values, and finally determine the target symbol value of the leading code of the target linear frequency modulation signal according to the maximum total energy value. After receiving the target linear frequency modulation signal, the complex array can be determined according to the preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the leading code of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing multiple energy values to find the maximum energy value, it is less affected by interference and noise, which is conducive to improving the accuracy of positioning the starting position of signal data.
[0056] See also Figure 4 , Figure 4 : is a flow chart of another signal processing method based on a radio frequency system-on-chip chip provided by an embodiment of the present application, wherein, after receiving the target linear frequency modulation signal, the method may further include the following steps: Step S401, obtaining signal strength information of the target linear frequency modulation signal; The signal strength information includes the average power of the target linear frequency modulation signal.
[0057] Step S402, determining a target gain value according to the signal strength information; In order to keep the signal strength of the linear frequency modulation signal received by the digital signal processor within a suitable strength range to ensure the accuracy and stability of signal processing, it is necessary to perform gain control on the RF module.
[0058] Step S403: calling a driver layer function to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the RF module according to the target gain value.
[0059] The upper layer application of the digital signal processor calls the hardware abstraction function HAL_RfSetGain in the function library of the hardware abstraction layer in the HAL development mode, and the microcontroller transmits the target gain value through the hardware abstraction function HAL_RfSetGain.
[0060] Optionally, the steps for the microcontroller to perform gain control are as follows: first configure SPI communication, then construct an SPI communication command according to the gain control register address and gain value of the RF module, and then send the SPI communication command to the RF module through the SPI interface. Finally, obtain the response signal of the RF module, and determine whether the gain control is successful based on the response signal. If it fails, resend the command or check the cause of the error.
[0061] Among them, configuring SPI communication includes setting the SPI working mode, clock frequency, number of data bits, and configuring the chip select model, configuring the chip select pin to output mode, and setting the initial state to a high level. When communication with the RF module is required, the chip select signal is pulled low to select the RF module.
[0062] It can be seen that in this example, the gain value is quickly settled by the digital signal processor, and the target gain value is transmitted to the microcontroller by calling the driver layer function, which is beneficial to improving the efficiency and stability of the RF module gain control.
[0063] See also Figure 5 , Figure 5 : is a flow chart of transmitting a target gain value provided by an embodiment of the present application, wherein the target gain value is transmitted to the microcontroller in calling the driver layer function, including: Step S501, calling a first driver layer function to store the target gain value in a target storage area of an inter-processor communication peripheral device; The digital signal processor may call the first driver layer function DRV_DspIpcD2MMem32Write to write the target gain value into the target storage area of the inter-processor communication peripheral.
[0064] Step S502, calling the second driver layer function to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executed program after receiving the interrupt request message, and read the target gain value stored in the inter-processor communication peripheral.
[0065] The digital signal processor may call DRV_DspIpcD2MIntSend to send an interrupt request message to the microcontroller, and the microcontroller parses the interrupt request message, pauses the currently executed program, and reads the target gain value stored in the target storage area of the inter-processor communication peripheral.
[0066] It can be seen that in this example, the gain value is quickly settled by the digital signal processor, and the target gain value is transmitted to the microcontroller by calling the driver layer function, which is beneficial to improving the efficiency and stability of the RF module gain control.
[0067] In one possible example, determining the target gain value based on the signal strength information includes: determining the average power of the target linear frequency modulation signal based on the signal strength information; obtaining the historical average power of the historical processing period; determining the rate of change of the signal strength based on the average power and the historical average power; determining the first adjustment coefficient based on the rate of change of the signal strength; performing a fast Fourier transform on the target linear frequency modulation signal to obtain a target spectrum; determining the bandwidth, center frequency and flatness of the target spectrum; determining the second adjustment coefficient based on the bandwidth, the center frequency and the flatness; respectively determining the degree of match between the target linear frequency modulation signal and multiple template signals; determining the target template signal with the greatest degree of match among the multiple template signals; determining a reference gain value based on the target template signal; and determining the target gain value based on the reference gain value, the first adjustment coefficient, the second adjustment coefficient and the basic gain value.
[0068] Among them, (average power-historical average power) / number of cycles=rate of change of signal strength, the number of cycles refers to the number of historical processing cycles, and the number of historical processing cycles can be preset.
[0069] Among them, if it is judged that the rate of change of signal strength is greater than 0 and greater than the preset rising threshold, it means that the signal strength is rising rapidly and an overly strong signal may be about to appear. At this time, the rate of change of signal strength can be substituted into the adjustment coefficient formula of the rising amplitude to obtain the first adjustment coefficient; if it is judged that the rate of change of signal strength is less than 0 and the absolute value of the rate of change of signal strength is greater than the preset falling threshold, it means that the signal strength is falling rapidly and a weak signal may be about to appear. At this time, the rate of change of signal strength can be substituted into the adjustment coefficient formula of the falling amplitude to obtain the first adjustment coefficient. The adjustment coefficient formula of the rising amplitude is as follows: , is the proportionality constant, is the first adjustment coefficient, is the rate of change of signal strength, is the preset rising threshold; the adjustment coefficient formula for the falling range is as follows: , is the proportionality constant, is the first adjustment coefficient, is the rate of change of signal strength, The preset rising threshold and the preset falling threshold can be set manually or by system default, and are not limited here.
[0070] Among them, flatness reflects the uniformity of the spectrum in the entire frequency band. The flatness formula is as follows: , Indicates flatness, The target spectrum is obtained after the target linear frequency modulation signal is transformed by FFT, where: .
[0071] The calculation formula of the second adjustment coefficient is as follows: ,in, represents the second adjustment coefficient, is the proportionality constant, is the bandwidth, For the ideal bandwidth, is the center frequency, is the ideal center frequency, m and n are the weight coefficients of bandwidth and center frequency respectively.
[0072] Among them, the correlation coefficient between the target linear frequency modulation signal and each template signal can be calculated, and the formula of the correlation coefficient is as follows: , represents the correlation coefficient, is a template signal, and the closer the correlation coefficient is to 1, the higher the matching degree is. Wherein, matching degree = (correlation coefficient + 1) / 2. The template signal may be a preset linear frequency modulation signal, and each template signal may correspond to a reference gain value.
[0073] It can be seen that in this example, when determining the target gain value, the digital signal processor takes into account the average power, bandwidth, center frequency, flatness and matching, which is conducive to improving the accuracy of gain value determination and improving the stability of gain control.
[0074] In one possible example, in terms of determining the target gain value based on the reference gain value, the first adjustment coefficient, the second adjustment coefficient and the basic gain value, the above method may include the following steps: determining a first gain value based on the basic gain value and the first adjustment coefficient; determining a second gain value based on the first gain value, the second adjustment coefficient and the flatness; determining a target weight based on the matching degree of the target template signal; and determining the target gain value based on the target weight, the second gain value and the reference gain value.
[0075] The basic gain value = current signal power - target signal power, the target signal power may be an ideal signal power, and the current signal power is the current signal power of the target linear frequency modulation signal.
[0076] Among them, if the signal strength rises rapidly, the basic gain value is appropriately reduced, and at this time the first gain value = basic gain value × (1-first adjustment coefficient); if the signal strength rises rapidly, the basic gain value is appropriately increased, and at this time the first gain value = basic gain value × (1+first adjustment coefficient).
[0077] The second gain value=the first gain value×(1-the second adjustment coefficient×flatness).
[0078] Among them, the target gain value = target weight × second gain value + (1-target weight) reference gain value.
[0079] Among them, the target weight is associated with the matching degree. The greater the matching degree, the smaller the target weight, and the smaller the matching degree, the greater the target weight.
[0080] It can be seen that in this example, when determining the target gain value, the digital signal processor takes into account the average power, bandwidth, center frequency, flatness and matching, which is conducive to improving the accuracy of gain value determination and improving the stability of gain control.
[0081] See also Figure 6 , Figure 6 : is a flow chart of a signal data reception management provided by an embodiment of the present application, wherein before receiving the target linear frequency modulation signal, it includes: Step S601, obtaining the number of first data slices produced in the current state.
[0082] The number of the first data slices produced is increased by 1 in a DMA transfer interrupt.
[0083] Step S602, determining the number of second data slices consumed in the current state.
[0084] The calculation formula for the number of consumed second data slices is: , start_index is the index of the consumed data, and slices_cost is the number of the second data slices consumed.
[0085] Step S603, determining whether the number of the first data slices and the number of the second data slices satisfy a target constraint condition.
[0086] The target constraint condition is (slicesnum / (2×Q)×(2×Q)-slices_cost>=2×2×Q), where slicesnum is the number of the first data slices produced.
[0087] Step S604: if it is determined that the first data slice quantity and the second data slice quantity meet the target constraint condition, determine to receive the target linear frequency modulation signal.
[0088] It can be seen that in this example, the target linear frequency modulation signal can be received and managed, which is beneficial to improving the stability of data transmission on the DFE interface.
[0089] See also Figure 7 , Figure 7 is a structural diagram of an electronic device provided in an embodiment of the present application, which is applied to a digital signal processor of a radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip includes the digital signal processor and a microcontroller; Figure 6 As shown, the electronic device includes a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory, and the one or more programs are configured to execute the following steps by the processor: receiving a target linear frequency modulation signal; Determine a complex array in the frequency domain according to the target linear frequency modulation signal and the preset down-conversion linear frequency modulation signal, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; According to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values; Performing a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values; determining a maximum total energy value among the plurality of total energy values; A target symbol value of a preamble code of the target linear frequency modulation signal is determined according to the maximum total energy value.
[0090] It can be seen that in the embodiment of the present application, the electronic device can first receive the target linear frequency modulation signal, and then determine the complex array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the complex array includes multiple elements, and a single element includes the amplitude and phase of a frequency component, and then determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values, and further, perform a sliding window summation operation on the multiple energy values in the time domain to obtain multiple total energy values, and further, determine the maximum total energy value among the multiple total energy values, and finally determine the target symbol value of the leading code of the target linear frequency modulation signal according to the maximum total energy value. After receiving the target linear frequency modulation signal, the complex array can be determined according to the preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the leading code of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values and finding the largest energy value among them, the influence of interference and noise is reduced, which is conducive to improving the accuracy of positioning the starting position of signal data.
[0091] In a possible example, in determining the complex number array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the program includes instructions for performing the following steps: Determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; Performing a fast Fourier transform on the target signal to obtain the complex number array in the frequency domain.
[0092] In a possible example, after receiving the target linear frequency modulation signal, the program includes instructions for performing the following steps: Acquire signal strength information of the target linear frequency modulation signal; Determining a target gain value according to the signal strength information; The driver layer function is called to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.
[0093] In a possible example, in the aspect of calling the driver layer function to transmit the target gain value to the microcontroller, the program includes instructions for executing the following steps: Calling the first driver layer function to store the target gain value in a target storage area of the inter-processor communication peripheral device; The second driver layer function is called to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executed program after receiving the interrupt request message, and read the target gain value stored in the inter-processor communication peripheral.
[0094] In a possible example, in determining the target gain value according to the signal strength information, the program includes instructions for performing the following steps: Determining an average power of the target linear frequency modulation signal according to the signal strength information; Get the historical average power of the historical processing cycle; Determining a rate of change of signal strength according to the average power and the historical average power; Determining a first adjustment coefficient according to the rate of change of the signal strength; Performing a fast Fourier transform on the target linear frequency modulation signal to obtain a target spectrum; Determining the bandwidth, center frequency and flatness of the target spectrum; Determining a second adjustment coefficient according to the bandwidth, the center frequency and the flatness; respectively determining the matching degree between the target linear frequency modulation signal and a plurality of template signals; Determining a target template signal having the greatest matching degree among the multiple template signals; Determining a reference gain value according to the target template signal; The target gain value is determined according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and a basic gain value.
[0095] In a possible example, in determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the basic gain value, the program further includes instructions for executing the following steps: Determining a first gain value according to the basic gain value and the first adjustment coefficient; Determining a second gain value according to the first gain value, the second adjustment coefficient and the flatness; Determining a target weight according to the matching degree of the target template signal; The target gain value is determined according to the target weight, the second gain value and the reference gain value.
[0096] In a possible example, before receiving the target linear frequency modulation signal, the program further includes instructions for performing the following steps: Get the number of first data slices produced in the current state; Determine the number of second data slices consumed in the current state; Determining whether the number of the first data slices and the number of the second data slices meet a target constraint condition; If it is determined that the first data slice quantity and the second data slice quantity meet the target constraint condition, it is determined to receive the target linear frequency modulation signal.
[0097] The above mainly introduces the scheme of the embodiment of the present application from the perspective of the execution process on the method side. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and / or software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiments provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.
[0098] The embodiment of the present application can divide the electronic device into functional units according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.
[0099] In the case of dividing each functional module into corresponding functional modules, Figure 8 is a block diagram of the functional units of a signal processing device based on a radio frequency system-on-chip provided by an embodiment of the present application, such as Figure 8 As shown, a digital signal processor applied to a radio frequency system-on-chip chip, the radio frequency system-on-chip chip includes the digital signal processor and a microcontroller; the device includes a receiving unit 801, a determining unit 802, a sliding window operation unit 803 and a transmission unit 804; wherein, The receiving unit 801 is used to receive a target linear frequency modulation signal; The determining unit 802 is used to determine a complex array in the frequency domain according to the target linear frequency modulation signal and the preset down-conversion linear frequency modulation signal, where the complex array includes a plurality of elements, and a single element includes an amplitude and a phase of a frequency component; The determining unit 802 is further used to determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values; The sliding window operation unit 803 is used to perform a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values; The determining unit 802 is further configured to determine a maximum total energy value among the multiple total energy values; The determining unit 802 is further configured to determine a target symbol value of the preamble code of the target linear frequency modulation signal according to the maximum total energy value.
[0100] It can be seen that in the embodiment of the present application, the signal processing device based on the RF system-on-chip chip can first receive the target linear frequency modulation signal, and then determine the complex array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the complex array includes multiple elements, and a single element includes the amplitude and phase of a frequency component, and then determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values, and further, perform a sliding window summation operation on the multiple energy values in the time domain to obtain multiple total energy values, and further, determine the maximum total energy value among the multiple total energy values, and finally determine the target symbol value of the leading code of the target linear frequency modulation signal according to the maximum total energy value. After receiving the target linear frequency modulation signal, the complex array can be determined according to the preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the leading code of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values and finding the largest energy value among them, the influence of interference and noise is reduced, which is conducive to improving the accuracy of positioning the starting position of signal data.
[0101] In a possible example, in determining the complex number array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the determining unit 802 is specifically configured to: Determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; Performing a fast Fourier transform on the target signal to obtain the complex number array in the frequency domain.
[0102] In a possible example, after receiving the target linear frequency modulation signal, the determining unit 802 is specifically configured to: Acquire signal strength information of the target linear frequency modulation signal; Determining a target gain value according to the signal strength information; The driver layer function is called to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.
[0103] In a possible example, in calling the driver layer function to transmit the target gain value to the microcontroller, the transmission unit 804 is specifically used to: Calling the first driver layer function to store the target gain value in a target storage area of the inter-processor communication peripheral device; The second driver layer function is called to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executed program after receiving the interrupt request message, and read the target gain value stored in the inter-processor communication peripheral.
[0104] In a possible example, in determining the target gain value according to the signal strength information, the determining unit 802 is further specifically configured to: Determining an average power of the target linear frequency modulation signal according to the signal strength information; Get the historical average power of the historical processing cycle; Determining a rate of change of signal strength according to the average power and the historical average power; Determining a first adjustment coefficient according to the rate of change of the signal strength; Performing a fast Fourier transform on the target linear frequency modulation signal to obtain a target spectrum; Determining the bandwidth, center frequency and flatness of the target spectrum; Determining a second adjustment coefficient according to the bandwidth, the center frequency and the flatness; respectively determining the matching degree between the target linear frequency modulation signal and a plurality of template signals; Determining a target template signal having the greatest matching degree among the multiple template signals; Determining a reference gain value according to the target template signal; The target gain value is determined according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and a basic gain value.
[0105] In a possible example, in determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the basic gain value, the determining unit 802 is further specifically configured to: Determining a first gain value according to the basic gain value and the first adjustment coefficient; Determining a second gain value according to the first gain value, the second adjustment coefficient and the flatness; Determining a target weight according to the matching degree of the target template signal; The target gain value is determined according to the target weight, the second gain value and the reference gain value.
[0106] In a possible example, before receiving the target linear frequency modulation signal, the determining unit 802 is further specifically configured to: Get the number of first data slices produced in the current state; Determine the number of second data slices consumed in the current state; Determining whether the number of the first data slices and the number of the second data slices meet a target constraint condition; If it is determined that the first data slice quantity and the second data slice quantity meet the target constraint condition, it is determined to receive the target linear frequency modulation signal.
[0107] It should be noted that all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module and will not be repeated here.
[0108] The electronic device provided in this embodiment is used to execute the above-mentioned signal processing method based on the radio frequency system-on-chip chip, and thus can achieve the same effect as the above-mentioned implementation method.
[0109] In the case of an integrated unit, the electronic device may include a processing module, a storage module and a communication module. The processing module may be used to control and manage the actions of the electronic device, for example, it may be used to support the electronic device to execute the steps performed by the above-mentioned functional unit. The storage module may be used to support the electronic device to execute stored program codes and data, etc. The communication module may be used to support the communication between the electronic device and other devices.
[0110] Among them, the processing module can be a processor or a controller. It can implement or execute various exemplary logic boxes, modules and circuits described in conjunction with the disclosure of this application. The processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of digital signal processing (DSP) and a microprocessor, etc. The storage module can be a memory. The communication module can specifically be a device that interacts with other electronic devices, such as a radio frequency circuit, a Bluetooth chip, a Wi-Fi chip, etc.
[0111] An embodiment of the present application also provides a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps of any method described in the above method embodiments, and the above computer includes an electronic device.
[0112] The present application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute some or all of the steps of any method described in the method embodiment. The computer program product may be a software installation package, and the computer includes a control platform.
[0113] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.
[0114] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0115] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the above-mentioned units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.
[0116] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0117] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0118] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to execute all or part of the steps of the above-mentioned methods in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk and other media that can store program codes.
[0119] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, which can include: a flash drive, a read-only memory, a random access memory, a magnetic disk or an optical disk, etc.
[0120] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of the present application. At the same time, for general technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A signal processing method based on a radio frequency system-on-chip chip, characterized in that: A digital signal processor applied to a radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip comprises the digital signal processor and a microcontroller, and the digital signal processor is connected to the microcontroller; the method comprises: receiving a target linear frequency modulation signal; Determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; Performing a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; According to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values; Performing a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values; determining a maximum total energy value among the plurality of total energy values; A target symbol value of the preamble code of the target linear frequency modulation signal is determined according to the maximum total energy value.
2. The method according to claim 1, characterized in that After receiving the target linear frequency modulation signal, the method further comprises: Acquire signal strength information of the target linear frequency modulation signal; Determining a target gain value according to the signal strength information; The driver layer function is called to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.
3. The method according to claim 2, characterized in that The calling of the driver layer function to transmit the target gain value to the microcontroller includes: Calling the first driver layer function to store the target gain value in a target storage area of the inter-processor communication peripheral device; The second driver layer function is called to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executed program after receiving the interrupt request message, and read the target gain value stored in the inter-processor communication peripheral.
4. The method according to claim 2, characterized in that: The step of determining a target gain value according to the signal strength information includes: Determining an average power of the target linear frequency modulation signal according to the signal strength information; Get the historical average power of the historical processing cycle; Determining a rate of change of signal strength according to the average power and the historical average power; Determining a first adjustment coefficient according to the rate of change of the signal strength; Performing a fast Fourier transform on the target linear frequency modulation signal to obtain a target spectrum; Determining the bandwidth, center frequency and flatness of the target spectrum; Determining a second adjustment coefficient according to the bandwidth, the center frequency and the flatness; respectively determining the matching degree between the target linear frequency modulation signal and a plurality of template signals; Determining a target template signal having the greatest matching degree among the multiple template signals; Determining a reference gain value according to the target template signal; The target gain value is determined according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and a basic gain value.
5. The method according to claim 4, characterized in that The determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and the basic gain value includes: Determining a first gain value according to the basic gain value and the first adjustment coefficient; Determining a second gain value according to the first gain value, the second adjustment coefficient and the flatness; Determining a target weight according to the matching degree of the target template signal; The target gain value is determined according to the target weight, the second gain value and the reference gain value.
6. The method according to claim 1, characterized in that Before receiving the target linear frequency modulation signal, the method includes: Get the number of first data slices produced in the current state; Determine the number of second data slices consumed in the current state; Determining whether the number of the first data slices and the number of the second data slices meet a target constraint condition; If it is determined that the first data slice quantity and the second data slice quantity meet the target constraint condition, it is determined to receive the target linear frequency modulation signal.
7. The method according to any one of claims 1 to 6, characterized in that: The RF system-on-chip chip also includes a first peripheral of the digital signal processor, a second peripheral of the microcontroller, a RF module, a digital front end and a digital front end interface. The digital signal processor is respectively connected to the first peripheral and the microcontroller, the microcontroller is respectively connected to the second peripheral and the digital front end, the second peripheral is connected to the RF module, and the digital front end is respectively connected to the digital front end interface and the RF module.
8. A signal processing device based on a radio frequency system-on-chip, characterized in that: A digital signal processor applied to a radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip comprises the digital signal processor and a microcontroller; the device comprises a receiving unit, a determining unit and a sliding window operation unit; wherein, The receiving unit is used to receive a target linear frequency modulation signal; The determining unit is used to determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; The determination unit is further used to perform a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; The determination unit is further used to determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values; The sliding window operation unit is used to perform a sliding window summation operation on the multiple energy values in time series to obtain multiple total energy values; The determining unit is further configured to determine a maximum total energy value among the multiple total energy values; The determining unit is further configured to determine a target symbol value of a preamble code of the target linear frequency modulation signal according to the maximum total energy value.
9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory is used to store one or more programs and is configured to be executed by the processor, wherein the programs include instructions for executing the steps in the method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: A computer program for electronic data exchange is stored, wherein the computer program enables a computer to execute the method according to any one of claims 1 to 7.
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